unit 3 op amp

Upload: lian-ai-chen

Post on 07-Apr-2018

221 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/4/2019 UNIT 3 OP AMP

    1/28

    TOPIC 3OP AMP

    OPERATIONAL AMPLIFIER

  • 8/4/2019 UNIT 3 OP AMP

    2/28

    OPERATIONAL AMPLIFIERS (OP AMP)

    Operational amplifier (op amp) is an integratedcircuit that amplifies the difference between twoinput voltages and produces a single output.

    Have high gain amplifier and able to amplify signal

    with frequency ranging from 0 to 1MHz.

    To perform mathematical operations likesummation, subtraction, multiplication, differentialand integration etc in analogue computer.

    It has 2 input terminal :

    a) Inverting input terminal

    b) Non inverting input terminal

  • 8/4/2019 UNIT 3 OP AMP

    3/28

    Continue.

    A complete amplifier electronic circuit may containstransistor, diode, resistor, capacitorand otherscomponents and constructed on a single silicon ship.

    Op-amp application: As scalar orlinear (e.g. small signal) constant gain

    amplifierboth inverting and no-inverting

    As unity follower

    Adder or summer

    Subtractor Integr ator

    Differentiator

    comparator

  • 8/4/2019 UNIT 3 OP AMP

    4/28

    Symbol of operational amplifier

    NON INVERTING INPUT

    INVERTING INPUT

  • 8/4/2019 UNIT 3 OP AMP

    5/28

  • 8/4/2019 UNIT 3 OP AMP

    6/28

    Inverting

    Noninverting

    Internal Block Diagram

    Op Amp

    Differential

    Amp.

    Highimpedance

    High Gain

    Voltage

    Amplifier

    Low impedance

    Output

    Output

  • 8/4/2019 UNIT 3 OP AMP

    7/28

    First Stage

    Input terminal

    Has 2 input:-

    + non inverting input

    - inverting input

    high input impedance

  • 8/4/2019 UNIT 3 OP AMP

    8/28

    Second Stage

    Gain Voltage amplifier

    Is the ability of an electronic circuit toincrease level of a signal.

    High voltage gain

    High drive current gain to trigger output and

    not burden to input.

  • 8/4/2019 UNIT 3 OP AMP

    9/28

    Third Stage

    Output terminal

    has 1 output terminal

    low output impedance

  • 8/4/2019 UNIT 3 OP AMP

    10/28

    Differential Amplifier block diagram

  • 8/4/2019 UNIT 3 OP AMP

    11/28

    Push pull amplifier block diagram

  • 8/4/2019 UNIT 3 OP AMP

    12/28

    DIFFERENTIALAMPLIFIER

    Connect 1 voltage signalonto 1 input terminal andanother voltage signalonto other input terminal.

    The output voltage will beproportional to

    the "Difference" betweenthe two

    input voltage signals of V1and V2.

    Vout = R3 (V2-V1)

    R1

  • 8/4/2019 UNIT 3 OP AMP

    13/28

    Input Bias Current

    Ideally, no currentflows into the inputterminals of an opamp.

    In practice, there arealways two input biascurrents, IB+ and IB-(see figure beside).

    It is an average

    current flowing bothinputs.

    Ideally, two input biascurrents are equal.

    Diagram of inputbias current

  • 8/4/2019 UNIT 3 OP AMP

    14/28

    Continued

    A very variable parameter!

    IB can vary from 60 A to many A,

    depending on the device.

    Some structures have well-matched IB ,

    others do not. Some structures' IB varies little with

    temperature, but a FET op amp's IBdoubles with every 10C rise in temp.

    Some structures have IB which may flowin either direction.

  • 8/4/2019 UNIT 3 OP AMP

    15/28

    Input Offset Current

    Input offset current, IOS= Ib+- Ib-.

    Offset current arises from incidental

    imbalances in the internal component of theamplifiers.

    This is the difference of the two input bias

    currents when the output is zero.The offset current value is usually smaller

    than bias current.

  • 8/4/2019 UNIT 3 OP AMP

    16/28

    INPUT OFFSET VOLTAGE

    The voltage source Voffin series with the input terminals iscalled an offset voltage, it is caused by internal circuitimbalances.

    This is the voltage that must be applied to one of the inputpins to give a zero output voltage.

    Foran ideal op amp, output offset voltage is zero.

  • 8/4/2019 UNIT 3 OP AMP

    17/28

    Common Mode Gain

    Gain whenboth input terminal have same signal Should be when Vid =0, Vo= 0

    Pr actically, when Vo have value Acm will have smallvalue.

    Knows as CMRR, Common Mode Rejection RatioCMRR = Closed loop gain, Av

    Common mode gain, Acm

    NormallyAcm

  • 8/4/2019 UNIT 3 OP AMP

    18/28

    A measure of the ability of the op-ampto reject signals that are simultaneously

    present at both inputs is called the

    Common Mode Rejection Ratio orCMRR.

    It is the ratio of the common-mode input

    voltage to the generated output voltage.

    Expressed in decibels (dB)

    Common Mode Rejection Ratio(CMRR).

  • 8/4/2019 UNIT 3 OP AMP

    19/28

    More stages of gain amplifier

    When a number of stages are connectedin series, the overall gain is the product of

    the individual stage gain.

    Figurebelow shown a connection of threestage.

    More stages of gain amplifier

  • 8/4/2019 UNIT 3 OP AMP

    20/28

    The first stage is connected to provide

    non inverting gain as given by equation

    belowA = 1 + Rf

    R1

  • 8/4/2019 UNIT 3 OP AMP

    21/28

    The overall circuit gain is then

    noninverting and calculate by

    A = A1A2A3Where

    A1 = 1+Rf , A2 = -Rf and A3 = -Rf

    R1 R2 R3

  • 8/4/2019 UNIT 3 OP AMP

    22/28

    PUSH PULL AMPLIFIER

    When we get amplifier output current for 1800 ofinput it's called B class amplifier.

    In a push pull class B amplifier, one of the 2 powertransistors or other amplifying elements handles the

    positive half of the waveform and the other elementhandles the negative half of the waveform as shownin figure below.

    Figure: Block representation of push pull operation.

  • 8/4/2019 UNIT 3 OP AMP

    23/28

    Continued

    Two amplifiers are used to accomplishclass B power amplifier.

    One is used to push the current and the

    other one is used to pull the current.

    These two amplifiers are almost same butone is connector supplied and the other

    one is emitter supplied.

    This "push-pull" amplifier is used where

    high power output and good fidelity areneeded: Example: receiver output stages,

    public address amplifiers, and AM

    modulators.

  • 8/4/2019 UNIT 3 OP AMP

    24/28

    Operation circuit..

    R1 provides the proper bias for Q1 and Q2.

    The tapped secondary ofT1 develops thetwo input signals for the bases of Q1 and Q2.

    Half of the original input signal will beamplified by Q-1, the other half by Q-2.

    T2 combines (couples) the amplified output

    signal to the speaker and providesimpedance matching

    Figure: Push Pull circuit

  • 8/4/2019 UNIT 3 OP AMP

    25/28

    Definition of IDEAL OP AMP

    An idealised op-amp has the

    following characteristics:

    infinite input impedance, infinite open-loop gain,

    zero output impedance,

    infinite bandwidth,

    zero noise

  • 8/4/2019 UNIT 3 OP AMP

    26/28

    Parameters Characteristics of Ideal OP AmpVoltage gain

    (to increase the output voltage)Input impedance

    (when Rin = ,zero current flowsfrom V+ to V- )

    Output impedance 0 (i.e., Rout = 0, so that output voltage

    does not vary with output current).

    Input offset voltage 0 (i.e., when the input terminals are

    shorted so that , the output is a virtual

    ground or Vout = 0).

    Bandwidth (i.e., the frequency magnituderesponse is considered to be flat

    everywhere with zero phase shift)

    IDEAL OP AMP

  • 8/4/2019 UNIT 3 OP AMP

    27/28

    An offset voltage

    means that there exists a voltage vd

    when both inputs are grounded. Thisoffset is called an input offset

    because the voltage vd is offset from

    its ideal value of zero volts. The input

    offset voltage is multiplied by the

    open loop gain to create an output

    offset voltage.

  • 8/4/2019 UNIT 3 OP AMP

    28/28