tri-ads: targeted remote information and advertisement distribution system
DESCRIPTION
TRI-ADS: Targeted Remote Information and Advertisement Distribution System. Wade Pentz Blake Orth Grant Fritz Andrew Gunn Brian Weinstein. System Overview. Network of targeted advertisement display modules Change display based on location, time of day, weather, emergency status, etc - PowerPoint PPT PresentationTRANSCRIPT
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Wade PentzBlake OrthGrant Fritz
Andrew GunnBrian Weinstein
TRI-ADS:Targeted Remote Information and
Advertisement Distribution System
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System Overview
Wade Pentz
Network of targeted advertisement display modules
Change display based on location, time of day, weather, emergency status, etc
Provide standard DVI outputModules communicate wirelessly with a
base stationPowered from 12V DC wall adapter or car
outlet
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System Overview
Wade Pentz
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Primary
Secondary
Tertiary
• GPS data processing• LCD display• GPS based image change
• WiFi communication• Base station
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Level 0 Functional Decomposition
Wade Pentz
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Level 1Hardware Functional Decomposition
Wade Pentz
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Command and Data Handling System Overview
Grant Fritz
Coordinate DVI output with CPLD and load image off of SD card
Store GPS location and coordinate ad changes
Manage Wifi/3G link and remote updateManage Bluetooth communications
between display modulesGather temperature/accelerometer data
and coordinate ad changes
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CDH Functional Decomposition
Grant Fritz
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Command and Data Handling System Hardware
Grant Fritz
Using NGW-100 as main boardAT32AP7000 microprocessor2.6 Linux Kernel
Resource ManagementModular process software designUtilize standard libraries
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Software Functional Diagram
Grant Fritz
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CDH Software Functional Decomposition
Grant Fritz
Level 0 Module RunBabyRun (Level 0) Inputs - Raw GPS data
- Inter-module Bluetooth data - Configuration data
Outputs - Monitor display data - Inter-module Bluetooth data - Status data
Functionality This process is the primary control and data processor for the TRI-AD system. It takes in raw GPS data through serial, processes it to understand its current location. Receives raw analog sensor data through the I2C bus. Receives update information and status requests through Inter-Process Communication. Negotiates display information with the CPLD through the SPI bus and coordinates with the DVI Chip through the I2C bus. Finally this module also does the primary logic of the system where which image is selected to be displayed.
Test Procedure
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Level 1 Software Decomposition
Grant Fritz
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CDH SFT Functional Decomposition
Grant Fritz
Level 1
Logic Module Logic (Level 1) Inputs - GPS Coordinates
- Temperature - Time - Configuration Data Matrix
Outputs - Image name to Display Functionality This takes in GPS coordinates, temperature, and time and determines which image
from the configuration data to display. Test Procedure
GPS Module GPS (Level 1) Inputs - Raw Serial GPS Data Outputs - GPS Coordinates Functionality Takes in raw serial data, parses the serial char string and writes the data to
variables. Test Procedure
Display Module Display (Level 1) Inputs - Image filename Outputs - I2C commands to DVI Chip
- SPI commands and image data to CPLD Functionality Takes in an image filename and converts it to a matrix of RGB triplets before
transmitting the data over SPI to the CPLD. Test Procedure
CParse Module CParse (Level 1) Inputs - Configuration File name Outputs - Configuration Data Matrix Functionality Takes in the configuration file address and then parses the data into a data matrix
for easy reference. Test Procedure
Inter-Process Communication Receive Module Inter-Process Communication Receive (Level 1) Inputs - IPC Messages Outputs - Control Functionality Takes in IPC Messages from a message queue and processes the message with the
given command. The commands will consist of PING, SETIMAGE, CLEARIMAGE, HEALTH&STATUS, UPDATECONFIG, and SLEEP.
Test Procedure
Analog Sensors Module Analog Sensors (Level 1) Inputs - Raw I2C Analog Sensor Data Outputs - Processed Sensor Data Functionality Takes in raw I2C data and processes the data to a nice output. Test Procedure
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Display System Overview
Blake Orth
Use DVI for easy interface to screens of various sizesDVI prioritized over VGA to allow for future
expandabilityCustom display hardware will allow for a simple
embedded solutionRemoves the need to interface and power a full
rendering graphics cardCurrent image stored to on-board SRAM for fast
accessWill be implemented using TFP410 DVI
Trasmitter, Altera MaxII CPLD and 6MB SRAM
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Display Functional Decomposition
Blake Orth
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CPLD
Blake Orth
Programmed using Verilog through JTAGClocked at 165MHzTakes care of all Video memory Operations
Reads pixel data from SRAM chips and presents it at 24-bit DVI chip input
Write new image data to SRAM chipsReceives new image data from the
microcontroller via SPIManage all SRAM and DVI control lines
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EPM570T144C5N
Blake Orth
Max II – 570 Series 144-TQFPSelected for fast pin-to-pin propagation delay
( down to 4.5ns)440 macro-cells allows for reasonably
complex logicGood performance for current draw – at most
draws 250mADevelopment board being used to develop
Verilog code
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Display System Hardware
Blake Orth
Use TI TFP410 PanelBus DVI Transmitter
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TI TFP410 DVI Transmitter
Blake Orth
Basic configuration through I2CAllows settings for resolution, DE generator,
and data de-skewTakes 24-bit True Color pixel data and
control signalsEncodes and serializes pixel data to
PanelBus DVI and outputs to a standard Single Link DVI Connector
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SRAM
Blake Orth
Stores current image data (1 image)24-bit True Color for each pixel
8-bits for each color part (RGB)
Three SRAM units will be usedRGB pixel data stored in parallelOne unit for each color
Shared 20-bit address busAll parts of a single pixel will have a shared
addressShared 8-bit data bus
Bus control handled with output/write enable pins
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SRAM Selection
Blake Orth
ISSI IS61WV1024161M x 16b SRAM8 ns access timeUsing 3 modules totals to 6MB of storage
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SRAM Modes
Blake Orth
SRAM has ability for 16-bit data busWe are using in 8-bit data bus mode20-bit address selects a 16-bit wordUses /LB and /UB pins to select upper or
lower byte
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Read Cycle Timing Diagram
Blake Orth
Notes: - Upper/Lower byte selection control pins not shown here - /CE will be tied active
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Brian
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COM Functional Decomposition
Andrew Gunn
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GPS
Andrew Gunn
Primary ObjectiveGPS location used to provide optimal
advertisement RS232 Interface
GPS Handler script Input a character string Outputs global variables taken from the char string
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GPS Handler
Andrew Gunn
$GPGGA,184149.00,4000.43877,N,10515.72492,W,1,05,1.68,01633,M,-020,M,,*5C
Type = GPGGATime = 18hr 41min 49secs Zulu Time4000.43877 North Latitude10515.72492 West LongitudeGPS Quality 0=No GPS, 1=GPS, 2=DGPSNumber of Satellites 5Altitude in Meters 01633
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GPS
Andrew Gunn
Status UpdateFull Circle & Fully Functional
GPS Module Receives Data From SatellitesMicroprocessor Receives Data StringGPS Handler Parses & Saves Information
Where From HereImplement Position LogicIf in this Location -> Display This Ad
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Wifi
Andrew Gunn
Used to update the Display Module with new advertisements & information
Initial Wifly utilizes telnet exclusivelyTelnet is completely unsecureTelnet is Great for sending small strings across local
network but not so great at sending large files over internet.
Breakdown, Encrypt, Pack, Transmit, Decrypt, Unpack In addition to writing the serial and wifi drivers
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Wiport Wifi Module
Andrew Gunn
Interface RS 232 to UART or Ethernet Wiport - Breakdown, Encrypt, Pack,
Transmit, Decrypt, Unpack Serial and Wifi Drivers
Wifi Software Input a character string to change
networks Outputs information or files through
Ethernet
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Bluetooth
Andrew Gunn
Tertiary objectiveRS232 thus we can reuse serial driver from
GPSMilestone 2 objective
Overall COM BoardConnects module headers to board stacksBoard Designed in Altium in progress
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Power Functional Decomposition
Wade Pentz
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Power System
Wade Pentz
Each board has its own power stageAllows each board to be tested separately
Uses linear regulator to provide needed voltage railsAll IC’s use 3.3V
If time allows, a power board will be createdRoute IC powerProvide DVI display power using boost
converter
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Power Stage
Wade Pentz
Power switch for each boardBridge rectifier IC (DF10S)
1.5 Amp average current rating1.1 Volt forward drop
LM317 adjustable linear regulator1.5 Amp average current ratingUses voltage divider to set output voltageExtremely accurate regulation
Additional protection diodes
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Power Stage
Wade Pentz
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LM317 Linear Regulator Circuit
Brian
For 3.3V:R1 = 220 OhmsR2 = 330 Ohms
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Base Station
Andrew Gunn
Current StatusImage_Handler
Converts input to JPGMultiple Copies based on ResolutionPlaces in Outbox
Auto SSH with RSAPushing configurations & images to display units
Where we want to goOptimize and increase functionalityGUI if time allows
Ad Uploaded
Base Station
Image_handler
Hi Res. Display
Low Res. Display
Outbox
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CDH
Display
Comm
Power
Milestone 1 Milestone 2System
CDH
Display
COM
Power
• Serial Driver• I2C Driver• GPS Driver• Wifi Driver• Skeleton framework
• Board populated• CPLD programmable• Initial CPLD code written• Write to and read from SRAM
• Wifi working•GPS working• Board populated
• Individual board power functional
• CPLD SPI interface• JPEG conversion and display• Wireless image download
• Interface with DVI chip• Update image based on location
• Bluetooth working• Receive image updates through wifi• Send updates to basestation
• Power board (tentative)
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Expo
Brian Weinstein
Complete system workingDisplay images through DVIChange images based on locationAll devices talking with CDHFull communication with base station over
wirelessBluetooth communication functionalPower board if necessary and time allowsSecond module if time allows
User’s manual
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Division of Labor
Brian Weinstein
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Schedule
Brian Weinstein
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Schedule Highlights
Brian Weinstein
CPLD Code Development BeginsGoal: Monday February 28th
Order Display and Com BoardsGoal: March 1st
Schedule Multitasking and DependenciesIntegration of Hardware and Software
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Budget
Brian Weinstein
Item Cost
NGW100 Dev Board $120
Board Fabrication $120
DVI Chip (TFP410) $7.50
GPS with Breakout Board
$116.90
Bluetooth $74.95
Wiport $123
SRAM x 3 $75
CPLD $6
Miscellaneous Components
$100
Printing Expenses $100
Sub-Total $738.35
UROP Funding $-960
Sparkfun Donation $-150
Total $-371.65
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Risk Management
Brian Weinstein
(303) 55-RILEY
Risk
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Thank you!
Questions?