toshiba satellite c850 c855 - inventec dakar10f
TRANSCRIPT
DAKAR10F/FG
681
21-OCT-2002
1310xxxxx-0-0XXX
X01
MODEL,PROJECT,FUNCTION
2011.09.02
Everest Main Board
CSC
REVDATE CHANGE NO.
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
8
FF
P/N
VER:
DATEDATEEE
DESIGN
DRAWER
CHECK
8
INVENTECTITLE
SIZE CODE
SHEET of
DOC.NUMBER REV
1
POWER
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED.
HSF Property:ROHS or Halogen-Free(5L3?)
RESPONSIBLE
SIZE=
FILE NAME:
2
9. POWER VCCIO10. POWER VCCSA11. POWER VCORE
13. POWER VCORE_DGPU37. HDMI CEC
PAGE
TABLE OF CONTENTS
PAGE
52. PCH 6 MISC53. PCH 7 POWER54. PCH 8 POWER55. PCH 9 GND56. VGA 157. VGA 258. VGA 359. VGA 4
51. PCH 5 USB
19. LED
12. POWER VGFX
24. AUDIO CODEC
21. EC22. LAN
39. DDR3 DIMM1
41. CPU 1
43. CPU 3 DRAM42. CPU 2
40. FAN & THERMAL SENSOR
6. POWER +V3LA/+V3A/+5A
44. CPU 4 POWER45. CPU 5 POWER46. CPU 6 GND47. PCH 148. PCH 249. PCH 3
8. POWER +V1.8S7. POWER +V1.5/+V0.75
3. BLOCK DIAGRAM4. POWER MAP
23. RJ45 & TRANSFORMER
5. POWER CHARGER 30. USB 2.0 CONN
38. DDR3 DIMM0
50. PCH 4 AXG
34. LCM CONN
26. CARDREADER27. MINI1 WLAN/DEBUG CARD28. MINI2 3G/LTE29. SATA HDD/ODD CONN
31. USB 3.0 CONTROLLER32. USB 3.0 CONN W/ S&C33. USB 3.0 CONN
60. VGA 5
64. VRAM 365. VRAM 466. POWER BUTTON BOARD67. EMI
2. INDEX
35. CRT CONN36. HDMI CONN
63. VRAM 262. VRAM 1
PAGE
1. COVER PAGE
61. VGA 6
25. SPEAKER/HP JACK/MIC JACK
20. K/B & TP/B CONN
18. HALL SENSOR17. PCB SCREW16. LOAD SWITCH-215. LOAD SWITCH-114. ENABLE PIN
682
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
A3 CS
Block Diagram
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
PCIE_3:USB3.0PCIE
PCIE_2:WLANPCIE
SATA
SLEEP & CHARGE
204-PIN SODIMM1
(1333/1600 MHZ)
[email protected]/0.75V
204-PIN SODIMM0
(1333/1600 MHZ)
[email protected]/0.75V
DMI 2.0
37.5 X 37.5 X 5 mm
SOCKET-RPGA989
DC 35W
IVY BRIDGE
RJ45
ENE-P2809ATHERMAL SENSOR
PCH
AUDIO CODEC
USB2.0
SATA1: HDDSATA6: ODD
SATA0:ESATA
NPCE885LA0DX
EC WINDBOND
USB2.0
25 X 25 X 2.3 mm
PANTHER POINT
BATTERY CHARGER &
DC/DC & IMVP 7
6-CellLI-ION BATTERY
FDI
SPI
DDR3 INTERFACE
DDR3 INTERFACE
TOUCH PADKEYBOARD
SPI
PCIE
USB_8:
HDA REA_ALC269Q_VB6
USB_10:WEBCAM
USB_1: USB3.0 CONN
REA_RTS5129
CARD READER
INTERNAL MIC IN
EXT MIC IN
HEADPHONE
USB_0: USB CONN
USB_2: USB CONNUSB_8: CARD READERUSB_9: MINICARD WLAN
USB3.0
SPI FLASH 8MBMXIC_MX25L3206EM2I
LCM
HDMI
W/ POWER EXPRESS
AMD
THAMES
29X 29 MM
PEG
ATHEROS_AR8161/8162
PCIE_1:LAN
LVDS
CRT
683
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
A3 CS
Block Diagram
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
AO6402L
POWER BUDGET 4.711A
+V0.75S
INRUSH 0.9AVDD_CORE
+VCORE1_+-0.5%
+VCORE_+-0.5%
F 340KOCP 29.1A R=75K
TPS51217
OCP 53AF 280K
TI_TPS61640
POWER BUDGET 53A
PEAK 53A AVG 28.822A1880UF_1.1M£[ // 2276UF_0.203M£[
POWER BUDGET 20.070A
560UF_25M£[ // 80UF_0.93M£[PEAK 20.070A AVG 11.531A
65W-75W 8A 6036A0003401
90W 10A 6036A0002901
120W 12A 6036A0006001
FUSE
CHG_ENBATT_IN
EC_SMB2
CHARGER
ACPRES
BQ24725RGRR
BATTERY PACK
+VBAT
TPS51123
POWER BUDGET 12.139 A
220UF_25M£[ // 53.92UF_1.529M£[PEAK 7.283A AVG 2.363AOCP 10.4A R=120KF 300K
560UF_25M£[ // 1274.8UF_0.214M£[
PEAK 5.695A AVG1.048 A
TPS51216
OCP 10.7A R=130K
220UF_25M£[ //10.6UF_5.924M£[
POWER BUDGET 9.429 A
TPS51123
F 375K
POWER BUDGET 13.7 A
PEAK 17.107A AVG4.835 AOCP 10.1A R=115KF 340KPOWER BUDGET 13.7 A
TPS51216
+VTT_+-5%
AON7410
V1.5_+-5%
+V3LA_+-5%
PEAK2.592A
AON7410
PEAK2.592A
AO6402L
+V3S
+V3A
POWER BUDGET 4.711A100.82UF_0.842M£[
100.82UF_0.842M£[
INRUSH 0.9A
TPS51216
+V1.5_CPU
PEAK2.592A
+V1.5S
PEAK2.592A
POWER BUDGET 4.711A
POWER BUDGET 4.711A
GMT_AT1530F11U
100.82UF_0.842M£[
100.82UF_0.842M£[
AM2321P
INRUSH 0.9A
+V1.8S
+V3_LAN
INRUSH 0.9A
+V5A_+-5%
OCP 6AF 340K
PEAK2.592A
AO6402L
TSP51461
POWER BUDGET 6A
INRUSH 0.9A100.82UF_0.842M£[
POWER BUDGET 4.711A
PEAK 6A AVG 1.262A
+V5S
+V0.85S_+-0.5%
ADAPTOR
V3_V5 IS NEW IC TPS51123V0.85 IS NEW IC TPS 51641VTT IS NEW IC TPS51219VCC CORE IS NEW IC TPS51640CHARGE IS NEW IC BQ24725+V1.8S IS NEW IC GMT_AT1530F11UTPS51217 SAME AS 2010 PROJECTTPS51218 SAME AS 2009 PROJECT OCP 10.1A R=115K
PEAK 17.107A AVG4.835 A
F 340K
560UF_25M£[ // 1274.8UF_0.214M£[
POWER BUDGET ~~IC SPEC (MAX CURRENT )PEAK CURRENT ~~RATIO OF INTERNAL PREDICTIONAVG CURRENT ~~TEST RESULT(MAX CURRENT)INRUSH ~~L/S TURN NO
CHANGING POINTS~~
684
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
Block Diagram
CSA3
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
NEAR EC
NEAR EC
FUSE600065W-75W 8A(6036A0003401)90W 10A(6036A0002901)
120W 12A(6036A0006001)
NEAR IC
685
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
CSC0402_DY
SYN_200045GR009G18TZR_9P
LITTLEFUSE_R451015_15A_65V
1000PF_50V_2
P3V3AL
RSC_0603_DY
33K_5%_2_DY
220K_1%_2
PVPACK
EZJZ0V500AA_DY
10PF_50V_21000PF_50V_2
0.1UF_25V_3
RS
C_1206_D
Y
AO
N7410
PVADPTR
0.1UF_16V_2
PVADPTR
NFE31PT222Z1E9L
Block Diagram
CSA3
TP30
0.1UF_16V_2_DY
ACES_50315_0047N_002_4P
TP30
PVADPTR4.7K_5%_3
SHORT_0402
POWERPAD_2_0610
0.1UF_25V_3
PVBAT
3.32K_1%_3
100PF_50V_2
20.5K_1%_2
10K_5%_3
ETQP3W4R7WFN
4.7UF_25V_5
SB
R3U
40P
1_D
Y
10_5%_5470PF_50V_2 4.7UF_25V_5
BAT54C_30V_0.2A
TPCA8065_H
EZJZ0V500AA_DY
8A_125V
TP30
RSC_0603_DY
CSC0603_DY
110K_5%_2
1UF_10V_2
30K_5%_2
AM4410NC
2200PF_50V_2
P3V3AL
100PF_50V_2
4.3K_5%_24.3K_5%_2
RSC_0603_DY
0.1UF_25V_3
33_5%_2
33_5%_2
1M_5%_2
PVBAT
RSC_0603_DY
PVPACK
CSC0805_DY
0.01_1%_6
CS
C0805_D
Y
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
0.1
UF
_25V
_3
0.1UF_16V_2
0.1
UF
_25V
_3
RSC_0603_DY
CSC0402_DY
1UF_25V_3
0.047UF_16V_2
BAT54C_30V_0.2A
SHORT_0402
6.98_1%_2
4.3K_5%_2
0.01_1%_6
0.1UF_25V_3
DIODES_BAV99
SHORT_0402
AM4410NC
CS
C0805_D
YR
SC
_1206_D
Y
AO
N7410
TI_BQ24725RGRR_QFN_20P
EZJZ0V500AA_DY
1K_5%_2
P3V3AL
0.1UF_16V_2
CSC0402_DY
CN6050
CN6000
R6003
L6000
TP6003 TP6004 TP6005
C7602
R6019
R6018
C6014
R6015
R6017
R6016
R6009
R6010
R6011
C6004
C6050
R6052
R6054 R6053
R6051
R6050
D6703D6702D6701
FUSE6050
PAD6000
C6013
C6012
C6011
C6010
C7600
C6027
C6026
C6028
C6023
C6025
C6024
C6020
C6022C6021
C6032
C6034
C6035
C6036C6037
C6029
C6031C6030
C6001 C6002 C6003
C6033
R6802
C6800
C7601
L7600FUSE6000
R6801
R6800
R7600
R6012
R6008
R6007
R6005R6004
R6006
R6013
R6014
R6002
R6001
R6000
D6700
D6001
D6000D6002
Q6001
Q6000
Q6012Q6011Q6010
U6000
37C3 21D2
21E8
56C8
56D8
21E6
21D3
21D3 21D2
21E6
21D2
21D2
21E8 21E6
37C6
21D3
21D3 EC_SMB1_CLK
EC_SMB1_DATA
BATT_IN
VRCHARGER_PH
ACPRES
HW_I_ADC
HW_V_ADC
EC_SMB2_DATA
EC_SMB2_CLK
VRCHARGER_HG
VRCHARGER_LG
G4G3G2G1
987654321
G2G1
4321
21
21
1 1 1
21
21
21
21
21
21
21
21
2 1
21
21
21
21
21 21
2121
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2121
21
21
21
21
21
21
21
4 3
2121
21
21
21
21
21
21
21
21
21
21
21
21
4321
4321
21
3
21
3
21
3
21
3 2 145 6 7 8
3 2 145 6 7 8
321
45678
321
4 5678
321
45678
20
21
13
12
89
16
19
15
7
10
18
14
3
17
11
25 14
6
BIC
A2A1
BI
OUT
12
NM
OS
_4D
3S
D
G S
NM
OS
_4
D3
S
D
G S
NMOS_4D3S
D
G
S
OUT
NMOS_4D3S
D
G
S
NMOS_4D3S
D
G
S
G
G
G
G
GND
GND
SMC
SMD
TS
B-I
ID
BATT+
BATT+
6
5
4
3
2
1
BIBI
OUT
OUT
C
A2A1
VCC
TML
SR
P
SR
N
SDA
SCL
REGN
PHASE
LO
DR
V
IOUT
ILIM
HIDRV
GN
D
CM
SR
C
BTST
BA
TD
RV
AC
P
AC
OK
AC
N
AC
DR
V
ACDET
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
VOUT=((R6100/R6101)+1)*2
VO=(( R6150/R6151)+1)*2
686
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
TI_TPS51123RGER_QFN_24P
0.1UF_16V_2
10K_1%_2
RSC_0603_DYA
ON
7702A
CSC0402_DY
1UF_6.3V_2
330UF_6.3V
RSC_0402_DY
6.8K_1%_2
PVBAT
0.1UF_16V_2
2.2_5%_3
POWERPAD_2_0610
15.4K_1%_2
10K_1%_2
330UF_6.3V
Block Diagram
CSA3
0.22UF_6.3V_2
10UF_6.3V_3
1U
F_25V
_3
120K
_1%
_2
4.7UF_25V_54.7UF_25V_5
4.7UF_25V_5
ETQP3W3R3WFN
CSC0402_DYA
ON
7410
AO
N7410
ETQP3W3R3WFN
RSC_0603_DY
4.7UF_25V_5
AO
N7702A
2.2_5%_3
130K_1%_2
Q6151Q6101
L6100 L6150
C6110
R6150
R6151
C6150
C6161C6160
R7615
Q6150
C6155R6155
C6123
C7615
C6120
C6122
R6160
R6110
U6100
R6114C6115
Q6100
C6111
R7610
R6113C6121
C7610
PAD6110
R6100
C6100
R6101
14C7
14C8 14C6
14D4 14C8 14D6
6C6 14C8
6D3
14D6
6B3 14D5
14D7
14C7
14C7
6C3 14C8
14D6 VRP3V3A_LGVRP3V3A_PHVRP3V3A_HG
VRP3V3A_LDO
VRP5V0A_LGVRP5V0A_PHVRP5V0A_HG
VRP5V0A_VIN
SKIP_3V_5V
VRP3V3A
VRP5V0A_PH2VREF
VBATP
5V_PG
VRP5V0A_LDO
VRP5V0A_LG
EN_5V
EN_3V
VBATP
EN_3V_5V
VRP5V0A
3 2 145 6 7 8
321 45678
21 21
21
21
21
21
21
21
21
3 2 145 6 7 8
2121
21
21
21
21
21
21
17
8
3
7 24
16
5 2
9 22
14
25
14
23
11 20
15
6
18
13
12 19
10 212121
321 45678
21
21
21
21
21
21
21
21
21
12
OUT
SG
D
S G
D
OUT
+
OUT
OUT
IN
NM
OS
_4
D3
S
D
G S
OUT
OUT
+
OUT
OUT
IN
IN
IN
VF
B1
VF
B2
GN
D
SK
IPS
EL
VR
EG
5
EN
C
TM
L
TO
NS
EL
VIN
TR
IP2
TR
IP1
EN
0
VR
EF
DRVL2
VBST2
VREG3
VO2 VO1
PGOOD
VBST1
DRVH1
LL1
DRVL1
LL2
DRVH2
OUT
NM
OS
_4
D3
S
D
GS
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
MODE=100KOHM:TRACKING DISCHARGE
VOUT=REFIN=1.8*(R6201/(R6200+R6201))
687
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P0V75M_VREF
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
PCMC104T_1R0MN
0.2
2U
F_6.3
V_2
FD
MS
0310A
S
RS
C_0603_D
Y
TI_TPS51216RUKR_QFN_20P
10U
F_6.3
V_3
PO
WE
RP
AD
1X
1M
560U
F_2.5
V
2.2_5%_3
PVBAT
PO
WE
RP
AD
_2_0610
Block Diagram
CSA3
CS
C0402_D
Y
FD
MC
8884
0.1UF_16V_2
P0V75S
P5V0A
2.2
UF
_6.3
V_3
100K
_5%
_2
75K
_1%
_2
10K_1%_2
0.1
UF
_16V
_2
0.0
1U
F_50V
_2
52.3
K_1%
_2
L6200
C6220
Q6201
Q6200
U6200
PA
D6220
PA
D6210
C6200
C6212
C6211
C6210
R7620
C7620
C6215R6215
C6216
C6221
R6202
C6218
R6200
C6217
R6201
R6203
14C2
14C2
14D1
14D1
VRP1V5_LG
VRP1V5_PH
VRP1V5_HG
VRP1V5
1V5_PG
EN_0V75
EN_1V5
DDR3L_SEL
4321
21
3 2 145 6 7 8
3 2 145 6 7 8
1
5
4
3
6
2
9
1512
18
21
13
16
17
8
20
10
19
7
11
14
21
21
21
21
21
21
21
21
2121
21
21
21
21
21
212
1
21
IN
IN
SG
D
NM
OS
_4
D3
S
D
G S
IN
VTTSNS
VTTREF
VTTGND
VTT
VREF
VLDOIN
VDDQSNS
VBSTV5IN
TRIP
TML
SW
S5
S3
REFIN
PGOOD
PGND
MODE
GND
DRVL
DRVH
12
OUT
12
+
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
VOUT=((13K+10K)+1)*0.8OCP=4.5AMP
688
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
22U
F_6.3
V_5
CS
C0402_D
Y
13K
_1%
_2
10K
_1%
_2
10U
F_6.3
V_3
PAN_ELL5PR2R2N
Block Diagram
CSA3
GMT_AT1530F11U_SOP8_8P
0.1
UF
_16V
_2
P3V3SP5V0A
10_5%
_2
0.1
UF
_16V
_2
C6970
U6970
C6973
C6974
R6973
R6972
L6970
C6971
R6970
C6972
14A2
14B1
VRP1V8SVRP1V8S_PH
EN_1V8 21
8
1
9
2
6
7
3
4
5
21
21
21
21
21
21
21
21
IN
VIN
VCC
TML
REF
PG
ND
LX
GN
D
FB
EN
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND
689
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
22U
F_6.3
V_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
0_5%_2_DY
10K_5%_2
100K
_5%
_2
P3V3A
FD
MS
0310A
S
0.1UF_16V_2
4.7
UF
_25V
_5
2.2
UF
_6.3
V_3
86.6
K_1%
_20.01UF_50V_2
TI_TPS51219RTER_QFN_16P
2.2_5%_3
2.2
UF
_6.3
V_3
P5V0A
PO
WE
RP
AD
_2_0610
CYN_PCMB063T_R68MS_4P
A3 CS
Block Diagram
560U
F_2.5
V
PVBAT
RS
C_0603_D
YC
SC
0402_D
Y
FD
MC
8884
R6307
Q6301
Q6300
U6300
C6301
C6300
PA
D6310
C6312
L6300
C6311
C6310
R7630
C6315
C6316
C7630
R6303
R6315
C6319
R6306
R6302
C6318
44A3
46B4
44A3
14A8 14B6
14B7
14A8 VRP1V05S
VRP1VO_VCCP_HG
VRP1V0_VCCP_LGVSS_SENSE_VCCIO
VCCIO_SEL
VCCP_PG
VCC_SENSE_VCCIO
EN_VCCP
VRP1VO_VCCP_PH
21
3 2 145 6 7 8
3 2 145 6 7 8
4
1
9
6
12
2
17
16
8
15
3
7
14
10
11
5
13
21
21
21
21
4321
21
21
21
21
21
21
21
21
2 1
21
21
21
IN
SG
D
IN
NM
OS
_4
D3
S
D
G S
VSNS
VREF
V5
TR
IP
SW
REFIN
PW
PD
PG
OO
D
PG
ND
MO
DE
GSNS
GN
D
EN
DL
DH
CO
MP
BS
T
OUT
+
12
IN
43
21
IN
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6810
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
22UF_6.3V_5
CSC0402_DY
RSC_0603_DY
CYN_PCMB063T_R33MS_4P
0.1UF_16V_2
TI_TPS51461RGER_QFN_24P
1U
F_6.3
V_2
P5V0A
0.01UF_50V_2
22UF_6.3V_5_DY22UF_6.3V_5
Block Diagram
CSA3
22UF_6.3V_5
SHORT_0402
SHORT_0402
RSC_0402_DY
5.11K_1%_2
0.22UF_6.3V_2
3300PF_50V_2
0.1UF_16V_2
1U
F_6.3
V_2
22UF_6.3V_5
R6525
R6524
L6500
C6522
C6503C6502C6501C6500
R7650
C6515
C7650
R6521
R6520
C6521
C6520
U6500
C6524
C6523
C6511C6510
14A6
45A2
14B5
45A2
45A2
14A6 21B6
VRPVCCSA
VCCSA_SENSE
EN_SA
VCCSA_VID0
VCCSA_VID1
VRPVSA_PH
SA_PG
21
21
4321
21
21
21
21
21
21
21
21
21
21
21
21
2 5
242322
15
14
17
18
25
987
1110
416
212019
61
13
3
12
21
21
21
21
43
21 OUT
IN
IN
IN
IN
VR
EF
VO
UT
VID
1
VID
0
V5F
ILT
V5D
RV
TML
SLE
W
PG
OO
D
MO
DE
GN
D
EN
CO
MP
BST
SW
SW
SWVIN
VIN
VIN
PGND
PGND
PGND
SW
SW
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
R6627
DNP
R6638
R6723 DNP 0
R6719
R6711
R6714
R6716
R6712
R6626
200K
30K
DNP
DNP
DNP 0
0
0
DNP
DNP
DNP56K
3.3K
2+1 2+0
6811
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
2.2UF_10V_3
2.2_5%_3
P5V0A
0.1UF_16V_2
10_5%_3
P3V3A
4.7UF_10V_3
FD
MS
7692
P5V0A
100K_5%_NTC
15.4K_1%_2
FD
MS
0306A
S
0.1UF_16V_2
TI_TPS51650RSLR_QFN_48P0.033UF_16V_2
162K_1%_2
PVCORE
PVCORE
PVBAT
P3V3A
PVBAT
P3V3A P1V05S
P3V3A
28.7K_1%_2
PAN_ETQP4LR36ZFC_4P
28.7K_1%_2
CSC0402_DY
3.3K_1%_2
CSC0402_DY
15.4K_1%_2
100K_5%_NTC
8.66K_1%_2
20K_5%_2
0_5%_2_DY
30K_1%_2
200K_1%_2
20K_1%_2
0_5%_2_DY
0_5%_2_DY
56K_1%_2
4.12K_1%_2
100PF_50V_2
8.45K_1%_2
100PF_50V_2
43K_1%_2
24K_1%_2
39K_1%_2
FD
MS
7692
RSC_0603_DY
A3 CS
Block Diagram
470UF_2V
100K_5%_NTC
162K_1%_2
470UF_2V
0.1UF_16V_2_DY
POWERPAD_2_0610
68UF_25V
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
0.033UF_16V_2
470UF_2V
470UF_2V
0.1UF_16V_2_DY
RSC_0603_DY
FD
MS
0306A
S
100K_5%_2
0_5%_2
90.9K_1%_2
0_5%
_2
0_5%
_2
0_5%_2_DY
0_5%_2_DY
0.1
UF
_16V
_2
130_1%
_2
54.9
_1%
_2
2K
_5%
_2
2K
_5%
_2
RSC_0402_DY
0_5%_2
2.2UF_6.3V_3
2.2UF_6.3V_3
PAN_ETQP4LR36ZFC_4P
100K_5%_NTC17.8K_1%_2
17.8K_1%_2
2.2_5%_3
10K_5%_3
P3V3A
C6629
C6622
C6630
R6617
R6601
R6618
U6600
R6602
R6607
C6635
R6729
Q6621
Q6611
Q6620
Q6610
C6603
C6617
C6623
R6605
C6616
C6615
C6614
C6613
C6612
C6611
C6610
C6000
PAD6610
R6619
C6631
C6601C6600
R6604
L6610
R6603
C6625
R6610
R6609
L6620
R6608
C6602
R6633
R6632
R7661
C7661
C6624R6606
R6616
R7662
C7662
R6732
R6634
R6622R6620
R6623R6621
C6632
R6625
R6626
R6731
R6730
C6727
R6719
R6723
R6724
R6720
C6726
R6718
R6728
R6627
C6634
R6713
C6633
R6628
R6629
R6711
R6712
R6715
R6716R6714
R6630
R6631
11C4
11D5
11C
3
11D
3
11D
3
11C
3
40B4 11A4
11D1 11D3
11D5
11D6 11D4
11D5
11A3
40B4
41D6 21C3
11A3
21D3
11C7
11D7 11D6 11D4 11C8
11B7
11A7 11A4
45C3
45C3
11A4
11A7
11D7 11D6 11D4 11C8 11B7 11A4
12C
5
11D7 11D6
11D4
11C8
11A7 11A4
12C
5
44B
3
44B
3
11C8 11B7 11A7 11A4
11D7 11D4 11C8 11B7 11A7 11A4
11D6 11D4 11C8 11B7 11A7
11B7
49B7 11C7
44C2 11C7
44C2
11D7 11D6 11C8 11B7 11A7 11A4
11D1 11B3
11D5
11D3 11B3
12B
8
11D7
11C7
12C8
44C2
49B7
44C2
44C2
CP
U_
CS
N2
CP
U_
CS
N1
CP
U_
CS
P1
V5_CPU
V5_CPU
EN_PVCORE
CP
U_
CS
P2
PVCORE_PG
PVBAT_CPU
CPU_CSN2
CPU_CSP2VR_SVID_ALERT#
VR_SVID_CLK
VR_ON
VREF_CPU
GFX_VSS_SENSE
GFX_VCC_SENSE
VREF_CPU
VR_ON
VREF_CPU
GP
U_C
SN
1
VREF_CPU
GP
U_C
SP
1
VS
SS
EN
SE
VC
CS
EN
SE
VREF_CPU
VREF_CPU
VREF_CPU
PVAXG_PG
PVCORE_PG
VR_SVID_DATA
PVBAT_CPU
CPU_CSP1
CPU_CSN1
PVBAT_CPU
CP
WM
3
GSKIP#
VR_SVID_CLK
VREF_CPU
GP
WM
1
GP
WM
2
PVAXG_PG
CPU_PROCHOT#
VR_SVID_DATA
49
48
44
4
1 2
2
47
1
5 76
21
21
21
21
1
3 2 145 6 7 8
3 2 145 6 7 8
3 2 145 6 7 8
3 2 14
8
321
13
15
20
19
17
36
43
14
41
42
23
31
32
33
34
21
30
24
22
28
27
29
26
25
10
1
39
45
35
16
211
12
40
37
7 6 38 5938
46
18
21
21
21
21
21
21
21
21
21
21
21
21
21
21
321
321
21
4321
21
21
21
21
4321
21
321
21
21
21
21
212
2121
21
21
21
21
21
2121
2121
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
IN
BIOUT
OUT
OUT
ININININ
IN
IN
IN
IN
IN
OU
T
OU
T
OUT
IN
OU
T
ININ
IN
OUT
IN
OUT
IN
OUT
IN
BI
OUT
OUT
IN
SG
DSG
D
NM
OS
_4
D3
S
D
G S
NM
OS
_4
D3
S
D
G S
+
IN
V3R3
VDIO
GOCP-R
ALERT#
CPGOOD
CP
WM
3
V5DRV
V5
VREF
CDL2
PGND
GPGOOD
GC
SN
2
GT
HE
RM
GS
KIP
#
GP
WM
1
VR_HOT#
GC
SP
2
GND
GF_IMAX
SLEW
GC
SN
1
GC
OM
P
GC
SP
1
GV
FB
GG
FB
CC
OM
P
CT
HE
RM
CBST2
CSW1
GP
WM
2
VR_ON
CO
CP
-R
CV
FB
CG
FB
CSW2
CDL1
VBAT
CDH1
CC
SP
2
CC
SN
2
CF
-IMA
X
CC
SP
3
CC
SN
1
CC
SP
1
CC
SN
3
CDH2
CBST1
VCLK
OUT
OUT
OUT
IN
+
1 2
IN
+
++
OUT
IN
OUT
IN
OUT
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6812
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
PAN_ETQP4LR36WFC_4P
28.7K_1%_217.8K_1%_2
TI_TPS51601DRBR_SON_8P
0.1UF_16V_2
CSC0402_DY
RSC_0603_DY
560UF_2.5V_DY470UF_2V_DY
162K_1%_2
100K_5%_NTC
470UF_2V
FD
MS
7692
2.2_5%_3
PVAXG
0.033UF_16V_2
4.7
UF
_25V
_5
1U
F_6.3
V_2
P5V0A
FD
MS
0306A
S
A3 CS
Block Diagram
POWERPAD_2_0610
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5
PVBATR6702
C6702
L6710
C6701
Q6711
Q6710
U6710
C6713
C6712
C6711
PAD6710
C6710C6700
C6722
R6705
R6704R6703
R7671
C7671
C6721
C6720R6701
11A6
11A6
11B5
11A4
12C5
12B1 PVBAT_AXG
GSKIP#GPWM1
GPU_CSP1
GPU_CSN1
PVBAT_AXG
21
21
4321
3 21
3 2 145 6 7 8
3 2 145 6 7 8
672
3
9
4 5
81
21
21
21
21
21
321
21
21
2121
21
21
21
2121
++
SG
D
NM
OS
_4
D3
S
D
G S
VDD
SWSKIP#
PWM
PAD
GND DRVL
DRVHBST
OUT
12
+
IN
OUT
OUT
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
P.S. R6750(R1)R6751(R2)R6753(R3)R6754(R4)
6813
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P3V3S_DGPU
P1V5S_DGPU
16.2
K_1%
_2 470U
F_2V
10K
_5%
_2
P5V0A
PVBAT
PVCORE_DGPU
68P
F_50V
_2
CS
C0402_D
Y
1U
F_6.3
V_2
1U
F_6.3
V_2
21K_1%_2
8.66K_1%_2
240K_5%_2
9.53K_1%_2
1U
F_10V
_5
REA_RT8208BGQW_WQFN_16P
10K
_1%
_2
2.7
K_1%
_2
22U
F_6.3
V_5
1U
F_10V
_5
CSA3
Block Diagram
10K_5%_2
POWERPAD_2_0610
0.1
UF
_16V
_2
10_5%_2
0_5%_2_DY
P5V0A
PO
WE
RP
AD
_2
_0
61
0
2.2_5%_3 0.1UF_16V_2
FD
MS
0308A
S
4.7
UF
_25V
_5
4.7
UF
_25V
_5
4.7
UF
_25V
_5F
DM
S7692
470UF_2V
470UF_2V
RS
C_0603_D
Y
PAN_ETQP4LR36WFC_4P
2K
_1%
_2
POWERPAD_2_0610
GMT_G9731AF11U_SOP_8P
0_5%_2_DY
22U
F_6.3
V_5
100K_5%_2_DY
1K_5%_2
P1V5S_DGPU
1U
F_6.3
V_2
PVPCIE
POWERPAD_2_0610
C6752
Q6751
Q6750
C6751
C6750
R7030
C7010
R7020
R7016
PAD6751
PAD6750
C6762
C6761
R6750
R6751
L6750
R7017
R7018
R7019
C7011
PAD6950C6951
C6950
R6950
C6952
R6951
PA
D6760
C6760
C6753
R7675
C7675
R6752
R6755
R6753
R6754
U6750
R6758
R6756
C6757
C6754
C6955
U6950
C6954
56F7
13C2
13D1
13B1
13B2 52C6
13A2
52C6
13A3
13A6
13C8
13C8
13B2 16A1 16A8
13D2
49A1
45D3 21D6
14D2 14B8 14A6 13A2
16C4
16C4
49A1
45D3
56D5
56C5 56F7
13C3
14D2 14A6 13D2 14B8 21D6
16A8 16A1
VRPVCORE_DGPU
VRPVCORE_DGPU
DGPU_PWRGD
PWRCNTL_1
PWRCNTL_0
EN_VPCIE
DGPU_PWRGD
EN_DGPU
EN_DGPU
SLP_S3#_3R
DGPU_PWR_EN
EN_VPCIE
SLP_S3#_3R
VRPVPCIE
VRPVCORE_DGPU_PH
VRPVCORE_DGPU_LG
VRPVCORE_DGPU_HG
DGPU_PWR_EN
VRPVPCIE
321
3 2 145 6 7 8
3 2 145 6 7 8
321
321
21
21
21
21
21
21
21
21
21
21
4321
21
2
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1
9
2
12
16
11
4
8
17
14
7
3
15 5
6
10
13
21
21
21
21
21
6
5
89
7
1
2
4
3
21
+
SG
D
NM
OS
_4
D3
S
D
G S
+
+
IN
IN
IN
OUTIN
1 2
1 2IN
OUT
VPP
VIN
VEN
TML
POK
GND
ADJ
VO_2
VO_1
OUT
OUT
1 2
IN
IN
OUT
12
IN
IN
IN
VOUT
VDDP
VDD
UGATE
TON
PHASE
PGOOD
LGATE
GND
G1
G0
FB
EN_DEM D1
D0
CS
BOOT
OUT
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
DGPUVCCSA
3V & 5VDDR_P1V5
P1V8SVCCIO
6814
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P3V3_LDORSC_0402_DY
POWERPAD_2_0610
DIODE-BAT54-TAP-PHP
POWERPAD_2_0610
POWERPAD_2_0610
P3V3S
CSC0402_DY
47K_5%_2
0_5%_2
BAT54C_30V_0.2A_DY
0.0
47U
F_16V
_2
SSM3K7002BFU
POWERPAD_2_0610
POWERPAD_2_0610
RSC_0402_DY
0_5%_3
10K_5%_2
0_5%_2
P1V05S
PVSA
A3 CS
Block Diagram
P1V8S
47K_5%_2
DIODES_BAV99
0.1UF_16V_2
0.1
UF
_16V
_2
POWERPAD_2_0610
DIODES_BAV99
P3V3S
1UF_25V_3
10K
_5%
_2
P3V3S
10K_5%_2
0_5%_2
P3V3S
10K_5%_2
P1V5
CSC0402_DY
0.1UF_16V_2
0.01UF_50V_2
0.1UF_16V_2
0.1UF_16V_2
P15V0A
POWERPAD1X1M
P5V0A
POWERPAD_2_0610
P3V3AL
P5V0AL
POWERPAD1X1M
POWERPAD_2_0610
PAD6121
R7000
Q7000
C7006
C7005
C7020
R7021
R7010
D7000
R7012
C7003
C7001 D7001
C7002
R7013
PAD6200
PAD6201
R7050
C7050
PAD6900
C7040
C7004
D7002
R7040
R7041
D7040
PAD6500
PAD6150
PAD6100
C7000
PAD6120
R7002
R7001
R7003
R7022
PAD6300
PAD6301
49A1
49A1
49A1
6B4
6B5
14C8
10B4
6B4
14C6 6B6
14D6
6C6 6C3
6B3
6B5
15D6
6D6
7C1
14D2 13A2
14A8 9C6
14D4 6C1
14B6 14A8 9C6
9B1
45D3
21D6
14D2
14A6
13D2 13A2
21B6 14A6 10A5
14D6 14C8 6C1
8C2
21F6
15D6 14D8
21F6 14C8
6D6
9D6
14D4 6C1
14C2 7B3
45D3
21D6
14B8
14A6
13D2 13A2 7C7
10C1
49B3 21D3
45D3 21D6 14B8 13D2
7C7
8B6
15D4 21C3
6C8
6B6
14C8
VRP1V5
VRP1V8S
VRPVCCSA
EN_3V
SLP_S3#_3R
EN_3V_5V
VRP5V0A_VIN
VRP3V3A_LDO
VRP5V0A SKIP_3V_5V
EN_SA
EC_PW_ON#
VCCP_PG
VRP1V05S
VCCP_PG
1V5_PG
VBATP
VCCP_PG
SLP_S3#_3R
SA_PGSA_PG
VRP5V0A
P5VAUXON
EN_5V
EN_VCCP
VRP5V0A_LG
1V5_PG
SLP_S3#_3R EN_0V75
SLP_S5#_3R EN_1V5
EN_1V8
VRP3V3A_LDO
P5VAUXON
VRP5V0A_LDO
VRP5V0A
VRP3V3A
21
21
2
1
3
21
21
21
21
21
3
21
21
21
2 13
21
2 1
21
21
21
21
21
21
21
21
3
21
21
21
2
13
21
21
21
21
21
21
21
21
21
21
21
IN
IN
IN
OUT
OUT
OUT
1 2
1 2
IN
IN
1 2IN
OUTIN
OUT
NC
IN
IN
1 2IN
1 2
1 2
IN
IN
OUT
IN
IN
1 2
1 2IN
1 2
OUT
OUT
OUT
OUT
OUT
IN 1 2
IN
G
DS
IN
IN
IN
IN
IN
C
A2
A1
OUT
OUT
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6815
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
POWERPAD_2_0610
SSM3K7002BFU
P5V0S
POWERPAD_2_0610
POWERPAD_2_0610
TI_TPS3801_01_SC70_5P
SSM3K7002BFU
SSM3K7002BFU
SSM3K7002BFU
200_5%
_2
P0V75S
22U
F_6.3
V_5
22U
F_6.3
V_5
SSM3K7002BFU
200_5%
_2
SSM3K7002BFU
22U
F_6.3
V_5
2200PF_50V_2
SSM3K7002BFU
P5V0A
0_5%_2
CS
C0402_D
Y
470K
_5%
_2
P1V5
2200P
F_50V
_2
0_5%_2
680P
F_50V
_2
10K_5%_2
P3V3AL
100K_5%_2
100K_5%_2_DY
P3V3AL
200_5%
_2
AO6402AL
P15V0A
AO6402AL
P1V5S
DIODE-BAT54-TAP-PHP
510K_1%_2
120K_1%_2
PVBAT P3V3_LDO
P15V0A
AO6402AL
POWERPAD_2_0610
200_5%
_2
A3 CS
Block Diagram
200_5%_2
P3V3A
P3V3AL
0_5%_2
CS
C0402_D
Y
AON7410
AON7410
P3V3S
Q7104
Q7111
Q7110
Q7108
Q7106
Q7103
Q7101
C7101
C7100
R7104
R7100
Q7102
D7490
R7492
U7490
Q7112
Q7105
R7108
Q7107
R7106
PAD7100
R7105
R7109
R7111
R7114
R7113
R7491
PAD7101
C7103
C7102
PAD7102
C7105
C7104
PAD7103
C7107
C7106
Q7109
R7110
R7112
R7107
49B1
49B1
49B1
49B1
15B8
56D6
16A7
15B4
15B8 16A7 15B4
15B8 15A4 15B4 16A7
16A7 15B4 15A4
21C3
14C8
14D8
14D8
21F6 40A8 40B1
15A4 SLP_S3_3R
SLP_S3_3R
SLP_S3_3R
SLP_S3_3R
P5VAUXON
EC_PW_ON#
THRM_SHUTDWN#2
1
3
2
1
3
2
1
32
1
32
1
3
2
1
3
2
1
3
21
21
21
21
4
36521
213
21
4
5 3
21
321
45678
4
36521
21
4
36521
21
21
21
21
21
21
21
21
2 1
21
21
2 1
21
21
21
21
21
321
45678
21
21
21
VD
D
SENSE RESET#
GN
D
GN
D
NMOS_4D3S
D
G
S
D
G
S
NMOS_4D1S
D
G
S
NMOS_4D1S
1 2
IN
IN
IN
IN
OUT
12
12
1 2
NMOS_4D3S
D
G
S
G
DS
G
DS
G
DS
G
DS
G
DS
G
DS
G
DS
D
G
S
NMOS_4D1S
OUTN
C
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
POWER EXPRESS
DGPU_PWR_EN#
DGPU_PWRGD
DGPU_HOLD_RST#
AFTER RESET
HIGH
DURING RESET
HIGH
LOW
0 : DGPU POWER SWITCH TURNED ON
0 : DGPU POWER IS NOT STABLE
1 : DGPU POWER IS STABLE
0 : KEEP DGPU IN RESETLOW
1 : POWER SWITCH TURNED OFF
1 : RESET IS RELEASED
6816
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
680PF_50V_2
SSM3K7002BFU
0_5%_2
CS
C0402_D
Y 0_5%_2_DY
SSM3K7002FU
CS
C0402_D
Y
DIODES_DMP2305U_SOT23_3P
0_5%_2_DY
P1V8S
0_5%_6_DY
AO6402AL
10K
_5%
_2
CS
C0402_D
Y
SSM3K7002BFU
SSM3K7002FU
Block Diagram
CSA3
200_5%_2
0_5%_2
P3V3S
SSM3K7002BFU
10K_5%_2
CS
C0402_D
Y
AON7410
220K_5%_2
P3V3S
P3V3S P3V3S_DGPU
200_5%_2
AON7410
P1V8S_DGPU
P1V5 P1V5S_DGPU
680PF_50V_2
220K_5%_2
1M
_5%
_2
P15V0A
P3V3_LDO
10K
_5%
_2
SSM3K7002BFU
R7047
R7038
R7042
R7121
C7024
C7023
Q7018
R7034
Q7019
R7033
C7022
R7035
Q7002
Q7003
R7031
R7039
C7021
Q7120
Q7113
Q7114
R7115
Q7115
C7108
Q7118
R7119
Q7119
C7110
R7120
R7116
16C7 16A6
16B7 16A6
13D2
13B2
51C7
16A1 16C4 13B2
16A8 16A1 13D2 13B2
16D7
13D2 16A8 16C4
51B6
16A5 16B7
16A5
16D7 16B7 16B7
16C7
SLP_S3_3R
DGPU_PWR_EN_3R
DGPU_PWR_EN
DGPU_PWR_EN
DGPU_PWR_EN
DGPU_PWR_EN_15R
DGPU_PWR_EN#
DGPU_PWR_EN_15R
DGPU_PWR_EN_3R
DGPU_PWR_EN_15R
DGPU_PWR_EN_3R
21
21
21
21
21
21
2
1
3
21
2
1
3
21
21
21
2
1
3
S
G
D
21
21
21
2
1
3
321
45678
321
45678
21
2
1
3
21
4
36521
21
2
1
321
21
21
IN
IN
IN
G
DS
OUT
G
DS
IN
IN
G
DS
G
S D
IN
G
DS
OUT
IN
NMOS_4D3S
D
G
S
NMOS_4D3S
D
G
S
IN G
DS
D
G
S
NMOS_4D1S
G
DS
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 0~49(PCB SCREW)
PCB
BOUNDARY SCAN TEST POINT
3G
CPU WLANGPU
FAN
6817
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SCREW220_700_1P
SCREW300_1000_1P
SCREW540_1000_NP_1P
SCREW300_1000_1P
SCREW300_1000_1P
SCREW330_600_1PSCREW300_1000_1P
SCREW300_1000_1P
FIX_MASK
SCREW300_1000_1P
SCREW300_1000_1P
PVCORE_DGPU
PVADPTR
SCREW330_600_1P
Block Diagram
1.6MMSTDPAD_1.15_6-TOP
SCREW120_0_600_1P
TP30
TP30 TP30TP30
FIX_MASK
FIX_MASK
TP30
TP30
FIX_MASK
TP30
TP30
PVCORE
TP30
PVBAT
PVAXG
TP30
CSA3
FIX_MASK
FIX_MASK
FIX_MASK
FIX_MASK
SCREW330_600_1P
SCREW330_600_1P
SCREW330_600_1P
SCREW330_600_1P
STDPAD_1.15_6-TOP1.6MM
1.6MMSTDPAD_1.15_6-TOP
SCREW330_600_1P
SCREW330_600_1P
S18
S20
S8
S7
S6
S5
S3
S2
S1
S23
S24
STD18
STD17
STD16
TP9TP8 TP10
TP1
TP6
TP5
TP7
TP4TP3
TP2
S21
S15
S14
S13
S10
S11
S12
FIX5
FIX6
FIX7
FIX1
FIX2
FIX3
FIX8FIX4
1
1
1
1
1
1
1
1
1
1
11
1
1
11 1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 50-99(HALL SENSOR)
6818
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
100K_5%_2
VARISTOR_DY
P3V3AL
1000PF_50V_2
MAG_MH248BESO_SOT23_3P
Block Diagram
CSA3
R50
D50
C50
U50
21D3 LID_SW#_3
21
21
21
1
23
OUTGND
OUT
VDD
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
WIFI/WIMAX/3G/LTE LED
POWER ON LED
SUSPEND LED
REFERENCE 100~199(LED)
BLINK:LOW BATTERYD155 BRIGHT:WHILE CHARGING BATTERY FROM AC-ADAPTER
D152 BRIGHT:BOTH AC-ADAPTER IS PLUGGED IN AND BATTERY IS FULL CHARGED
DC IN / BATTERY CHARGE LED
6819
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
TP30
150_5%_2
19_217_T1D_CP1Q2QY_3T
19_217_T1D_CP1Q2QY_3T220_5%_2
150_5%_2
Block Diagram
CSA3
HT_191UY
P3V3A
TP30
TP30
HT_191UY
P5V0S
HT_191UY
P3V3AL
150_5%_2TP30
P5V0A
220_5%_2TP30
P3V3S
TP104
TP103
TP102
TP101
TP100
D155R154
D156R155
D152R152
D159R150
D154R160
21B6
21D6
21B6
21B6
21D6
WL_OLED#
PWR_WLED#
PWR_OLED#
BAT_OLED#
DCIN_WLED#
1
1
1
1
1
21 21
21 21
21 21
21 21
21 21IN
IN
IN
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
KEYBOARD CONN
TOUCHPAD CONN
REFERENCE 250~299(KB/TP CONN)
REFERENCE 200~249(POWER CONN)
POWER CONN
6820
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
200_5%_2200_5%_2
200_5%_2
ACES_50224_0020N_001_2P
Block Diagram
CSA3
0
1
VARISTOR_DY
16
5043
7
0_5%_2_DY
P3V3S
3
1281410
6
95
11
011513
24
17
16
2
7
PTWO_AFF340_A2G1V_P _34P
2
3
6
7
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY
VARISTOR_DY5
4
VARISTOR_DY VARISTOR_DY
VARISTOR_DY
P5V0S
ACES_50503_0044N_001_4P
PHP_PESD5V2S2UT_SOT23_3P_DY
CN200
D257
D256
D255
D254
D253
D252
D251
D250
CN250
CN280
D280
D200
D260D259D258
R252R251
R250
R253
21D2
21B3 20C6
21D6
21D6
21B6
21B3
21B3 20D3
21D3
21D3
21D3
21D2
PWR_SWIN#_3
IM_DAT_5
SCAN_IN<7..0>
NUM_LED#_3SCROLL_LED#_3
CAPS_LED#_3
SCAN_OUT<17..0>
SCAN_IN<7..0>
SCAN_IN<1>SCAN_IN<6>
SCAN_IN<5>SCAN_IN<0>
SCAN_IN<3>
SCAN_IN<2>SCAN_IN<7>SCAN_OUT<3>SCAN_OUT<7>
SCAN_OUT<12>SCAN_OUT<8>SCAN_OUT<14>SCAN_OUT<10>
SCAN_OUT<6>SCAN_OUT<5>
SCAN_OUT<0>SCAN_OUT<1>SCAN_OUT<15>SCAN_OUT<13>
SCAN_OUT<2>SCAN_OUT<4>
SCAN_OUT<17>
SCAN_OUT<16>
SCAN_OUT<11>SCAN_OUT<9> SCAN_IN<0>
SCAN_IN<2>
SCAN_IN<3>
SCAN_IN<4>
SCAN_IN<7>
SCAN_IN<6>
SCAN_IN<5>
SCAN_IN<1>
SCAN_IN<4>
IM_CLK_5 43
21
21
21
21
21
21
21
21
21
G2
G1
987
654
34333231
30
3
292827
26252423
222120
2
19
18171615
14131211
10
1
G2G1
4321
32 1
21
21
21
21
2121
21
21
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
G1
G2
G
G
4
3
2
1
IN
OUT
BIBI
ININ
IN
IN
OUT
G
G
2
1
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
1.CHARGE
2.GPU THERMAL
1.BATTERY
EC_SMB1
3.CEC
FOR ESD PROTECT
CLOSE PIN4
REFERENCE 300~389(KBC)
EC_SMB2 EC_SMB3
PM: 10KGM: 100K
21 68
MODEL,PROJECT,FUNCTION
X01
XXX 21-OCT-2002
1310xxxxx-0-0
10K_5%_2
TP30
WINB_NPCE885LA0DX_LQFP_128P
POWERPAD1X1M
TP30
P3V3AL
TP30
TP30
AGND_KBC
4.7K_5%_210K_5%_210K_5%_2_DY
0_5%_1
TP30
TP30
10K_5%_2
TP30
TP30
TP30
TP30
TP30
TP30
TP30
100K_5%_2
TP30
TP30
TP30
TP30
P3V3S
TP30
TP30
1.8K_5%_2
1.8K_5%_2
1.8K_5%_2
1.8K_5%_2
10K_5%_2
47K_5%_2
TP30
33_5%_2
P3V3AL
0.1
UF
_1
6V
_2
_D
Y0
.1U
F_
16
V_
2
P3V3AL
4.7
UF
_6
.3V
_3
680PF_50V_2
0.1
UF
_1
6V
_2
0.1
UF
_1
6V
_2
0.1
UF
_1
6V
_2
0.1
UF
_1
6V
_2
10K
_5%
_2
100K_5%_2
76
345
210
17
1516
14
1213
1011
9
78
54
6
23
01
WINB_NPCE885LA0DX_LQFP_128P
100K_5%_2
DIODE-BAT54-TAP-PHP
2.2_5%_3
CSC
Block Diagram
10K
_5%
_2
3.3K_5%_2
3.3K_5%_2
P3V3S
P3V3AL
P3V3AL_R
P3V3AL
P3V3ALP3V3AL P3V3AL_R
P5V0S
SSM3K7002BFU
0.1
UF
_1
6V
_2
10
UF
_6
.3V
_5
_D
Y
0.1
UF
_1
6V
_2
1UF_6.3V_2
P3V3AL
3.3K_5%_2
10K_5%_2
P3V3AL
3.3K_5%_2_DY
MXIC_MX25L3206EM2I_12G_SOP_8P_DY
MXIC_MX25L3206EM2I_12G_SOP_8P
P3V3AL_EC
AGND_KBC
0.1
UF
_1
6V
_2
0.1
UF
_1
6V
_2
33_5%_2
33_5%_2
47K_5%_2
FBM_11_160808_121T
P3V3AL
10K_5%_2_DY
10K_5%_2_DY
TP30
P3V3AL_EC
P3V3S
P3V3S
0.1
UF
_1
6V
_2
10
UF
_6
.3V
_5
_D
Y
P3V3AL_EC
100K_5%_2
0_5%_1
P1V05S
43_5%_2
R303
TP326
TP325
TP324
TP323TP322
TP321
TP320
TP319
TP318
TP317
TP316
TP315
TP314TP313
TP311
TP310
R335R334
U302
C318
R319
R315
R345R344
R302
R301
Q300
R339
U301
U301
R300
R346
R326
R312
R324
TP307
TP306
TP305TP304TP303
R333
C311
R320
D300
C309
R314
R313
U300
C317
C315
L300
C314
C305
C306
C312
C304
C303
C302
C301
C300
C313
R318
R311R308
R321R322
R317R316
R336
R332 R323
PAD319
C310
R342
R341R340
5B8
20B7
49A5
49B8
49A8
20B7
37B1
13A2
21E6
21F4
22B5
49B3
19C7
47A6
45D3
40C8
18C4
47B7
27B2
52D6 51C7
20A4
40C6
49B7 49A6
21B6
32A8
21C8
32C1
19B4
14A6
34B5
21E8
21E8 5B7
5D3
49C2
20A8 21D2
11A8
21D1
30A3
20A8
20D3
19D7
20C7
31A5
32A8
31D4
36B2
22D7
49A6
37C6 56D8
56C8
21D3 27B2
21D3
21D3 5D3
5D3
21D3
21D3
21D3
21D3
5A7
51A8 57A6
10A5
14D2
21C7
21C6
21C7
21D6
14D8
21C8
21C7
21C7
27C2
5A7
49B7
20A8
20D6
5D3
21D2
52C2
21D3
14D8
21D2
5D3
47C2 27B7
47C3 27C3
47C3 27C3
47C3 27C3
47C3 27C3
47C3 27C3
51A7
27C7 27C3
21D2
21E6 5B7
21E6 5D3
21B6
49A5 49B3
49B7 49C2 21D3
28C3
52C2
20A8
27C2
21D2
15D4
21D2
56D8
56C8 37C3
49B3
11B7 41D6
21B6
47A6
47A6
47A6
14C8 15D6
21C6
47A6
21C7
21C6
21C8
21C8
47A6 21D6
21C6
21C7
21D6
47A6
47A6
47A6
47A6
47A6
47A6
32C3
32A8
21B1
30B6
14D2
32A8
32A6
13D2
24A2
40C8
14A6
19A7
19A7
47B8
14B8
21D3
49A1
33C6
33D8
21E6 56D6
50D7
20C6
41D5 52C2
SLP_S3#_3RHDMI_HPD_EC
SCROLL_LED#_3
NUM_LED#_3ACPRESENTEC_PWRSW#LOW_BAT#_3WL_OLED#USB_OC#_1EC_MUTE#WOL_AUX_ON#
LCM_BKLTENACPRES
SLP_S5#_3RH_PROCHOT_ECSB_USB_2
RSMRST#PWR_SWIN#_3
EC_BKLTEN
EC_SPI_SO_REC_SPI_SI_R
USB30_PWR_ENEC_ILIM_SELEC_CTL2PWR_WLED#
SB_USB_1EC_CTL1
EC_PW_ON#
LID_SW#_3FLASH_OVERRIDE
EN_PVCORE
IM_DAT_5USB_OC#_2
IM_CLK_5
BATT_IN
HW_I_ADC
P3V3AL_EC_VREF
EC_SPI_CS0#EC_SPI_CLK_R
WLON#
EC_SMB2_DATA
EC_SMB1_DATA
AOAC_ON#
EC_SMB2_CLK
EC_SMB1_CLK
RUNSCI0#_3
KBRST#EC_3S_A20GATE
PCI_3S_SERIRQ
BUF_PLT_RST#CLK_KBPCI
LPC_3S_FRAME#
LPC_3S_AD<0>LPC_3S_AD<1>LPC_3S_AD<2>LPC_3S_AD<3>
PCI_3S_CLKRUN#
EC_PECI
VCC_POR#
EC_32KHZLAN_RST#
CPU_PROCHOT#
FAN1_PWM
DCIN_WLED#
CAPS_LED#_3PWR_OLED#
FAN_TACH1
PCH_PWROKBAT_OLED#
EC_SPI_SOEC_SPI_SI
EC_SPI_CLK
AOAC_ON#WLON#
SCAN_OUT<8>
SCAN_OUT<5>
SA_PG
EC_SPI_SI
FAN_TACH1
RSMRST#
SCAN_OUT<14>SCAN_OUT<13>
SCAN_OUT<17..0>
SCAN_OUT<7>SCAN_OUT<6>
SCAN_IN<7>SCAN_IN<6>
SCAN_IN<3>SCAN_IN<4>SCAN_IN<5>
SCAN_IN<2>SCAN_IN<1>SCAN_IN<0>
SCAN_OUT<17>
SCAN_OUT<15>SCAN_OUT<16>
SCAN_OUT<12>
SCAN_OUT<10>SCAN_OUT<11>
SCAN_OUT<9>
SCAN_OUT<4>
SCAN_OUT<2>SCAN_OUT<3>
SCAN_OUT<0>SCAN_OUT<1>
P5VAUXON VCC_POR#
IM_CLK_5
H_PROCHOT_EC
EC_SPI_CLKEC_SPI_SI
EC_SPI_CLK
EC_SPI_SOEC_SPI_CS0#
EC_SPI_SO
HW_I_ADC
IM_DAT_5
EC_SMB1_CLKEC_SMB1_DATAEC_SMB2_CLKEC_SMB2_DATA
EC_SPI_CS1#
BATT_IN
VGA_LCM_BKLTEN
PCH_LCM_BKLTEN
LCM_BKLTEN
SCAN_IN<7..0>
H_PECI
21
1
1
1
11
1
1
1
1
1
1
1
11
1
1
2 12 1
3
82
567
4
1
21
21
21
21
21
21
21
2
1
3
2112
85
13
4142434748495051
353637383940
5253
6160595857565554
111113
81
3433
31
30
22
1666
65
11832
63
62
64
77
104
4
44
115
88
76
46
19
125
7
32
1128127126
122
112110
107106105101
100999897
121
91
8483
82
6867
757473
123
9
28
27
26
25
24
23212017
8072157114
120
1091110
6
119
69
117
70
114
8
124
94
93
1089695
79
511689
78
45
18
8786
9290
29
102
103
2 1
2 1
21
21
21
1
1
111
21
21
21
2
13
21
21
21
3
82
567
4
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2 12 1
2 12 1
2 12 1
21
21
21
2 1
21
21
2121
IN
12
OUT
BIBI
INOUT
OUTOUT
OUT
IN
IN
BIBI
BIBI
OUT
OUT
IN
OUT
OUTIN
IN
WP#_ACC
VCC
SO_SIO1
SI_SIO0
SCLK
HOLD#
GND
CS#
OUT
OUTIN
ININ
OUT
IN
OUTIN
OUT
G
DS
OUTOUT
BIBI
BIBI
BIBI
BIBI
KBSOUT11_P80_DAT/GPIOC3
KBSOUT10_P80_CLK/GPIOC2
GPIO55/CLKOUT/IOX_DIN_DIO
VTT
PECI
GPIO87/CIRRXM/SIN_CR
GP(I)O83/SOUT_CR/TRIST#
GPIO00/EXTCLK
VCC_POR#
GPIO40/F_PWM
GPIO45/E_PWM
GPIO33/H_PWM
GPIO66/G_PWM
GPIO32/D_PWM
GPIO13/C_PWM
GPIO21/B_PWM
GPIO15/A_PWM
GPIO01/TB2
GPIO14/TB1
GPIO56/TA1
KBSIN7/GPIOA7
KBSIN6/GPIOA6
KBSIN5/GPIOA5
KBSIN4/GPIOA4
KBSIN3/GPIOA3
KBSIN2/GPIOA2
KBSIN1/GPIOA1/N2TMS
KBSIN0/GPIOA0/N2TCK
GPIO57/KBSOUT17
GPIO60/KBSOUT16
KBSOUT15/GPIO61/XOR_OUT
KBSOUT14/GPIO62
KBSOUT13/GPIO63
KBSOUT12/GPIO64
KBSOUT9/GPOC1/SDP_VIS#
KBSOUT8/GPIOC0
KBSOUT7/GPIOB7
KBSOUT6/GPIOB6/RDY#
KBSOUT5/GPIOB5/TDO
KBSOUT4/GPOB4/JEN0#
KBSOUT3/GPIOB3/TDI
KBSOUT2/GPIOB2/TMS
KBSOUT1/GPIOB1/TCK
KBSOUT0/GPOB0/JENK#
F_SDIO_F_SDIO0
F_SDI_F_SDIO1
GPIO51/N2TCK
GPIO36
GPIO20/TA2/IOX_DIN_DIO
GPIO34/CIRRXL
GPIO02
VCORF
GPIO16
GP(I)O84/IOX_SCLK/XORTR#
GPO82/IOX_LDSH/TEST#
GPIO30/F_WP#
GPIO05/AD4
GPIO97/DA3
GPIO04/AD5
GPIO03/AD6
GPIO07/AD7
GPIO06/IOX_DOUT
GPIO81/F_WP#
GPIO77/SPI_DI
GPIO76/SPI_DO
GPIO75/SPI_SCK
GPIO41/F_WP#
GPIO72
GPIO71
GPIO70
GPIO53/SDA4A
GPIO52/PSDAT3/RDY#
GPIO50/PSCLK3/TDO
GPIO47/SCL4A
GPIO46/SDA4B/CIRRXM/TRST#
GPIO44/SCL4B/TDI
GPIO43/SDA3B/TMS
GPIO42/SCL3B/TCK
GPIO24 GPIO27/PSDAT2
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO37/PSCLK1
GPIO96/DA2
GPIO95/DA1
GPIO94/DA0
GPIO93/AD3
GPIO92/AD2
GPIO91/AD1
GPIO90/AD0
VREF
F_CS0#
F_SCK
GPIO31/SDA3A
GPIO74/SDA2
GPIO22/SDA1/N2TMS
GPIO23/SCL3A
GPIO73/SCL2
GPIO17/SCL1/N2TCKGPIO67/N2TMS
GPIO10/LPCPD#
GPIO65/SMI#
ECSCI#/GPIO54
KBRST#/GPIO86
GPIO85/GA20
SERIRQ/GPIOF0
LRESET#/GPIOF7
LCLK/GPIOF5
LFRAME#/GPIOF6
LAD0/GPIOF1
LAD1/GPIOF2
LAD2/GPIOF3
LAD3/GPIOF4
GPIO11/CLKRUN#
AG
ND
GN
D6
GN
D5
GN
D4
GN
D3
GN
D2
GN
D1
VD
D
AV
CC
VC
C5
VC
C4
VC
C3
VC
C2
VC
C1
OUT
OUT
OUT
OUTOUT
OUT
OUT
OUT
IN
OUT
IN
BI
OUT
IN
BI
IN
IN
OUT
OUTIN
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUTBI
BIBIBIBI
BI
IN
IN
IN
BI
OUT
IN
IN
OUT
OUTIN
NC
OUT
ININ
OUTIN
OUT
WP#_ACC
VCC
SO_SIO1
SI_SIO0
SCLK
HOLD#
GND
CS#
OUT
IN
IN
DOC.NUMBER
of
INVENTECTITLE
DATE
CODE
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
FF
8
CHANGE by
8
REV
2 1
SHEET
SIZE
FOR LDO MODE
REFERENCE 400~499(LAN)
FOR SW MODE
C417:8161 STUFF 8162 OPEN
6822
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
CS
C0402_D
Y
DIODES_DMP2305U_SOT23_3PP3V3A
1U
F_6.3
V_2
0.1
UF
_16V
_2
10K_5%_2_DY
10K_5%_2
PAVDDH_LAN
0.1
UF
_16V
_2
RSC_0603_DY
1000P
F_50V
_2_D
Y
10U
F_6.3
V_5_D
Y
PDVDDL_LAN
1U
F_6.3
V_2
0.1
UF
_16V
_2_D
Y
P3V3A_LAN
PDVDDL_LAN
1U
F_6.3
V_2
30K_5%_2
P3V3S
PAVDDL_LAN
10U
F_6.3
V_5_D
Y
1U
F_6.3
V_2
4.7
UF
_6.3
V_3
P3V3A_LAN
0.1
UF
_16V
_2
PVLX_LAN
100K_5%_2
ATHEROS_AR8161_AL3A_R_QFN_40P
0.1UF_16V_21UF_10V_2_DY
0.1UF_16V_2
0.1
UF
_16V
_2
1U
F_10V
_2_D
Y
PAVDDL_LAN
PAVDDH_LAN
0.0
47U
F_16V
_2
0.1UF_16V_20.1UF_16V_2
2.37K_1%_2
0.1UF_16V_2 0.1UF_16V_2
33P
F_50V
_2
LQM21PN2R2MC0D_DY
PAVDDVCO_LAN
P3V3A_LAN
PAVDDL_LAN
POWERPAD_2_0610
PVLX_LAN
25MHZ
33P
F_50V
_2
Block Diagram
CSA3
0.1
UF
_16V
_2
0_5%_3
0.1UF_16V_2
Q400
R404
C427
C414
C412
C403
U400
R402
R406L400
C424C
405
C418
C407
C406
R403
C408
C402
R401C421C422
C420
C425
C423
C419
C417C416
C404
PAD400
C401
R400
C400
C426
R405
C415
C413
C410
X400
C409
22A5
31C6 27C7 49A5 49B3
22A5
48C7
21B6
48C7
23B7
23B7
48D8
22B5
48D7 48D8
48D8
48D8
23B7
23B7 23C6
23C6
22B5
23C6
23B7
21D6
23C6
23B7
23B7
23B7
48C7
48D8
LAN_X1LAN_X2
CLKREQ_LAN#
PCIE_LAN_RX_C_DPPCIE_LAN_RX_C_DN
PCIE_LAN_TX_DP
CLK_PCIE_LAN_DNCLK_PCIE_LAN_DP
PCIE_LAN_TX_DN
LAN_TRD0_DP
PCIE_LAN_RX_DPPCIE_LAN_RX_DN
LAN_X2
LAN_RST#PCIE_WAKE#
LAN_TRD3_DN
LAN_X1
LAN_TRD0_DN
LAN_TRD1_DN
WOL_AUX_ON#
LAN_TRD1_DP
LAN_TRD2_DPLAN_TRD2_DNLAN_TRD3_DP
S
G
D
2 1
21
21
21
21
78
3
13029
14
11
15
12
272625
35
36
33
32
10
24
2
28
40
23
39
38
5
41
37
4
6
13
9
16
34
31
2221
20
19
18
17
21
2121
21
21
21
21
21
2 1
21
21
21
2121
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1 2
G
S D
TX_P
TX_N
TESTMODE
SMDATA
SMCLK
PPS
NC
LED_2
AVDDH
TRXN3
XTLO
XTLI
WAKEN
VDD33
TR
XP
1
TR
XP
0
TR
XN
1
TR
XN
0
RX
_P
RX
_N
RE
FC
LK
_P
RE
FC
LK
_N
RBIAS
PERSTN
LX
LE
D_
1
LE
D_
0
ISOLATN
GN
D
DV
DD
L_
RE
G
CLKREQN
AVDDL_REG
AV
DD
L
AVDDH_REG
AV
DD
33
AV
DD
L
AV
DD
LT
RX
P3
AV
DD
L
TR
XN
2
TR
XP
2
OUT
ININININOUT
BI
IN
INOUT
ININ
OUT
OUT
OUT
BIBIBIBIBIBIBI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 400~499(LAN)
6823
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SANTA_13045_8P
BOTH_TS21C_HF_SOP_16P
CS
C0402_D
Y
PAVDDL_LAN
CS
C0402_D
Y
BOTH_GST5009_RA_SOP_24P
1U
F_6.3
V_2
1000PF_2000V_6
0.1
UF
_16V
_2
CS
C0402_D
Y
CS
C0402_D
Y
0.1
UF
_16V
_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
100P
F_50V
_2
CS
C0402_D
Y
75_5%
_3
75_5%
_3
75_5%
_3
75_5%
_3
75_5%
_3
RSC_0603_DY
RSC_0402_DY
RSC_0402_DY
RSC_0603_DY
75_5%
_3
Block Diagram
CSA3
JACK470
U470
R470
C475
R476
R478
R479
R477
R475
R474
R473
R472
R471
C477
C476
U471
C479
C478
C474
C473
C483
C472
C482
C471
C481
C470
C480
23C3
23B3
23B3
22B5
22B5
22B5
22B5
23C6 22B5
23C6 22B5
23C6 22B5
23C6 22B5
23B7 22B5
23B7 22B5
23B7 22B5
23B7 22B5
23C2 23B3
23C3 23B3
23C2 23B3
23C2 23B3
23C2 23B3
23C3
23C3 23B3
23D5 23C2
23D5 23B3
23D5 23B3
23D5 23B3
23D5 23B3
23D5 23C2
23D5 23C2
23D5 23C2
23D5 23C3
23D5 23C3
23D5 23C3
23D5 23C3
23D5 23B3
23D5 23B3
23D5 23B3
23D5 23B3
LAN_TRD0_DP
LAN_TD_DP
LAN_C_DPLAN_C_DN
LAN_D_DNLAN_D_DPLAN_RD_DN
LAN_RD_DPLAN_TD_DN
LAN_TD_DN
LAN_D_DP
LAN_C_DP
LAN_RD_DP
LAN_TD_DP
LAN_D_DN
LAN_C_DN
LAN_RD_DN
LAN_TD_DN
LAN_TRD3_DP
LAN_TRD2_DP
LAN_TRD1_DP
LAN_TRD3_DN
LAN_TRD2_DN
LAN_TRD1_DN
LAN_TRD0_DN
LAN_TRD1_DPLAN_TRD1_DN
LAN_TRD0_DPLAN_TRD0_DN
LAN_RD_DNLAN_RD_DP
LAN_TD_DP
LAN_D_DN
LAN_C_DN
LAN_D_DP
LAN_C_DP
G2G1
87654321
1211
98
65
32
10
7
4
1
1314
1617
1920
2223
15
18
21
24
21
21
2 1
2 1
2 1
2 1
21
21
21
21
21
21
21
1416
31
911
86
7
54
2 15
1312
10
21
21
21
21
21
21
21
21
21
21
21
IN
G
G
P8
P7
RX-
P5
P4
RX+
TX-
TX+
MX4+
MX3+
MX2+
MX1+
MX4-
MX3-
MX2-
MX1-
MCT4
MCT3
MCT2
MCT1
TD4+
TD3+
TD2+
TD1+
TD4-
TD3-
TD2-
TD1-
TCT4
TCT3
TCT2
TCT1
OUT
OUT
OUT
OUT
IN
OUTOUT
OUTOUT
OUTOUT
IN
OUT
OUTOUT
OUTOUT
OUT
IN
INININ
IN
IN
ININ
ININ
TX-
TX+
TD-
TD+
RX-
RX+
RD-
RD+
RCT
NC
NC
TCT TCT
NC
NC
RCT
IN
ININ
ININ
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
(THERMAL PAD 4X4 VIAS)RESERVE FOR EMI
DIGITAL
ANALOG
BLM18PG121SN1(6014B0041601_0603)
CLOSE TO PIN13
BLM18PG121SN1(6014B0041601_0603)
REFERENCE 500~549(AUDIO CODEC)
TIED UNDER OR NEAR CODEC
CLOSE TO PIN27
6824
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P5V0S_AUDIO_AVDD
P5V0S P5V0S_AUDIO_AVDD
P3V3A
P3V3S
AGND_AUDIO
AGND_AUDIO
P5V0S
P5V0S_AUDIO_AVDD
AGND_AUDIO
AGND_AUDIO
AGND_AUDIO
AGND_AUDIO
AGND_AUDIO
2.2UF_6.3V_3 10UF_6.3V_3
REA_ALC269Q_VB6_CGT_QFN_48P
4.7K_1%_2
100PF_50V_2
47K_1%_2
0.1
UF
_16V
_2
0_5%_3
0.1UF_16V_2
100_5%_222P
F_50V
_2_D
Y
0.1
UF
_16V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
22_5%_2
0_5%_2
39.2K_1%_2
20K_1%_2
20K_1%_2
10U
F_6.3
V_3_D
Y
0.1
UF
_16V
_2_D
Y
0_5%_3
4.7
UF
_6.3
V_3
0.1
UF
_16V
_2
4.7
UF
_6.3
V_3
0.1
UF
_16V
_2
0_5%_3
0_5%_3
0_5%_3
0_5%_3
4.7
UF
_6.3
V_3
2.2UF_6.3V_3
0.1
UF
_16V
_2
4.7
UF
_6.3
V_3
Block Diagram
CSA3
2.2UF_6.3V_3 0.1UF_16V_2
1000PF_50V_2
1000PF_50V_2
1000PF_50V_2
POWERPAD1X1M
1000PF_50V_2
C512
U500
R505
R516
R515
PAD500
C517
C516
C515
C514
C518
C510
C522
C508
C509
C529
C531
R510
R509
R511
R512
C532
C506
C507
C505
C500
C536
R503
R502
R506
C521
R507C520
R501
R500
R514
C504
C501
C513C519
C502
C503
25D3
21D6
47B7
47C7
47C7
47C7
47B7
47C8
34B3
34B3
25B2
25C5
25C2
25C2 25B8
25B8
25B8
25B8
25B3
25D3
25A3
HDA_R_BITCLK
HP_R
HP_L
MIC_REF_L
MIC_REF_R
MIC_R
MIC_L
HDA_3S_RST#
HDA_3S_SYNC
HDA_R_SDIN0
HDA_3S_SDOUT
EC_MUTE#
MIC_IN_CLK_R
MIC_IN_DATA
MIC_IN_CLK
HDA_3S_SDIN0
HDA_3S_BITCLK
PCSPKR_PCH_3
HPS
MICS
SPK_OUT_R_N
SPK_OUT_R_P
SPK_OUT_L_P
SPK_OUT_L_N
P5V0S_PVDD
21
27
10
44
45
41
40
48
18
13
5 8
11
43
42
46
39
4
12
20
29
17
16
30
31
22
21
15
14
24
23
28
19
33
32
32
49
47
71 9
34
36
35
6
37
26
38
25
21
21
21
21
2 1
2 1
2 1
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2 1
2121
21
21
21
21
21
21
21
21
21
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
GND
SPDIFO
EAPD
PVDD2
SPK-R+
SPK-R-
PVSS2
PVSS1
SPK-L-
SPK-L+
PVDD1
AVDD2
AVSS2
CB
P
CB
N
CP
VE
E
HP
-OU
T-R
HP
-OU
T-L
MIC
1-V
RE
FO
-L
MIC
1-V
RE
FO
-R
MIC
2-V
RE
FO
LD
O-C
AP
VR
EF
AV
SS
1
AV
DD
1
LINE1-R
LINE1-L
MIC1-R
MIC1-L
MONO-OUT
JDREF
Sense-B
MIC2-R
MIC2-L
LINE2-R
LINE2-L
Sense A
PC
BE
EP
RE
SE
T#
SY
NC
DV
DD
-IO
SD
AT
A-I
N
DV
SS
2
BIT
-CLK
SD
AT
A-O
UT
PD
#
GP
IO1/D
MIC
-CLK
GP
IO0/D
MIC
-DA
TA
DV
DD
1
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
1 2
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
NOTE:SPK TRACE SHOULD 30~40 MILS WIDTH
RESERVE FOR EMI
RESERVE FOR EMI
MICPHONE
RESERVE FOR EMI
REFERCE 600~649(JACK/MIC/SPEAKER)
RESERVE FOR EMI
AUDIO JACKS
HEADPHONEINTERNAL SPEAKERS
6825
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
470P
F_50V
_2_D
Y
470P
F_50V
_2_D
Y
SINGA_2SJ_T351_019_6P
TP30
TP30
AGND_AUDIO
AGND_AUDIO
AGND_AUDIO
A3 CS
Block Diagram
75_5%_2
0_5%_3
1K_5%_2
1K_5%_2
2.2K_5%_2 2.2K_5%_2
CSC0402_DY
2.2UF_6.3V_3
2.2UF_6.3V_3
470P
F_50V
_2_D
Y
PHP_PESD5V2S2UT_SOT23_3P_DY
CSC0402_DY
470P
F_50V
_2_D
Y
ACES_50224_0040N_001_4P TP30
470P
F_50V
_2_D
Y
0_5%_3
75_5%_2
0_5%_3
TP30
AGND_AUDIO
470P
F_50V
_2_D
Y
0_5%_3
SINGA_2SJ_T351_019_6P
TP30
TP30
TP30TP30
AGND_AUDIO470P
F_50V
_2_D
Y
470P
F_50V
_2_D
Y
JACK601
JACK600 TP607
TP606
TP605
TP604
TP603
TP602
TP601
TP600
C607
C606
C605
C602
C603
C604
C609
C608
C611
C610
CN600
D600
R600
R601 R609
R608
R607
R606
C601C600
R604R605
R603
R602
24D3
24D3
24C7
24C2
24C2
24D3
24D3
24B2
24C7
24C7
24C7
24B2 SPK_OUT_L_NSPK_OUT_R_NSPK_OUT_R_P
HPS
HP_L
MIC_REF_L
MIC_REF_R
MIC_L
MIC_R
HP_R
SPK_OUT_L_P
MICS
G2G1
6
543
21
G2G1
6
543
21
1
1
1
1
1
1
1
1
21
21
21
21
21
21
21
21
21
21
G2G1
4321
32
1
21
21 21
21
21
21
21
21
21
21
21
21
IN
OUT
OUT
ININ
ININ
G1
1
2
3
4 G2
IN
BI
IN
BI
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERNCE 900~999(CARDREADER)
RESERVE FOR EMI
6826
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
REA_RTS5129_QFN_24P
1UF_6.3V_2
0.1UF_16V_22.2UF_6.3V_3
P3V3S_CR
A3 CS
Block Diagram
P3V3S
POWERPAD_2_0610
4.7UF_6.3V_30.1UF_16V_2
6.2K_1%_2
1UF_6.3V_2
0.1UF_16V_2
P3V3S_CR
0_5%_2
TAI_PSDAT0_09GLBS1ZZ4H1_11P
CN900
C901
U900
C905 C906
R901
C904
C902
C903C900
PAD900
R900
26C5
26C5
26C7
26C5
26B5
26C7
26C5
26B3
26B3
26B3
26B3
26B3
26B3
51B2
51B2
26B3
26B3
26D5
P3V3S_CARD
CARD_REF
SD_D2
SD_D3
SD_CMD
SD_CD#
SD_R_CLK SD_CLK
SD_D0
USB_CR_DN
USB_CR_DP
SD_WP
SD_D1
SD_D3
SD_CD#
SD_CMD
SD_D0SD_D1SD_D2
SD_WP
SD_CLK
11
6
34
G2G1
987
2
5
1
10
21
23
724
25
16
15
14
13
12
11
10
922
21
20
19
18
861
17
32 54
21
21
21
21
21
21
21
21
21
BI
WRIT_PROTECT
VSS2
VSS1
VDD
G2
G1
DAT2
DAT1
DAT0
CMD
CLK
CD-DAT3
CARD_DETECT
BI
BIBI
BI
XD_D7
XD_CD#V18
TML
SP
9
SP
8
SP
7
SP
6
SP5
SP4
SP3
SP2SP14
SP13
SP12
SP11
SP
10
SP1S
DR
EG
RR
EF
GP
IO0
DP
DM
CA
RD
_3V
3
3V
3_IN
BIBI
BIBI
BI
BI
BI
BI
BI
BI
BIBI
1 2
BI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
SUPPORT AOAC:OPEN
MINI CARD 1(WLAN)
SUPPORT AOAC:STUFF
REFERENCE 1300~1349(WLAN)
6827
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
0_5%_5
AM3423P_DY
BELLW_80003_4021_52P
0_5%_2_DY
0_5%_2
SSM3K7002BFU
P3V3S
CSC0402_DY
CSC0402_DY10UF_6.3V_3
0.1UF_16V_2
P1V5S
10UF_6.3V_3
0.1UF_16V_2
P3V3AP3V3S
Block Diagram
CSA3
0_5%_2
0_5%_2
CN1300
Q1301
Q1300
C1306
C1307
R1304
C1302
C1301
R1300
C1304
C1305
R1302
R1303
R1301
48D8
27C7
47C3 21E3
21E3
47C3 21E3
51A8 28C3
47C3 21E3
48D2 48D8
21D2
47C3
21E3 47C3
21E3
57A6
51B2
48D3
48D2 48D3
48B7 48D7 48D8
51B2
21D2
48B7
48D8
51A7
21E3 27C3 28C3 51A8 57A6
48B7
48D8
27C7 52B6
21E3
27B7 52B6
22B5 31C6 49A5 49B3
21D3
21D3
47C2
AOAC_ON#
LPC_3S_AD<0>
PCH_3A_ALERT_CLKPCH_3A_ALERT_DAT
CLK_PCIE_WLAN_DN
CLK_PCI_DEBUGBUF_PLT_RST#
CLKREQ_WLAN#
BUF_PLT_RST#
LPC_3S_FRAME#LPC_3S_AD<3>LPC_3S_AD<2>LPC_3S_AD<1>
PCI_3S_SERIRQ
BTIFON#
WLON#
CLK_PCIE_WLAN_DP
PCIE_WLAN_RX_DNPCIE_WLAN_RX_DP
BTIFON#
PCIE_WLAN_TX_DNPCIE_WLAN_TX_DP
PCIE_WAKE#
USB_WLAN_DNUSB_WLAN_DP
1
20
3638
3230
1113
47
3331
22
2523
49
19
8
17
10121416
42
4644
G2G1
7
35
51
9
6
525048
4341
40
4
393735
34
29282726
21
2
1815
45
24
2
1
3
4
36521
21
21
21
21
21
21
21
21
21
21
21
IN
IN
W_DISABLE#
WAKE#
USB_D-
USB_D+
SMB_DATA
SMB_CLK
REFCLK-
REFCLK+
PWR_LED#
PETP0
PETN0
PERP0
PERN0
PERST#
NUM_LED#
LPC_PCI_CLK
LPC_FRAME#
LPC_DEBUG_RST#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LED_WWAN#
LED_WPAN#
LED_WLAN#
GG
CLKREQ#
CH_DATA
CH_CLK
CAPS_LED#
GND
1.5V
3.3V
GND
1.5V
Reserved
Reserved
GND
GND
Reserved
Reserved
GND
GND
GND
1.5VGND
GND
GND
3.3V
GND
GND
+V3AL
+3.3VAUX
G
DS
IN
S
PMOS_4D1SG
D
IN
IN
IN
BI
BI
BIBI
BIBI
IN
IN
ININ
ININ
BI
IN
OUTOUT
ININ
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 1400~1499(3G)
CLOSE TO CONN SIDE
6828
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
BELLW_80003_4021_52P
P3V3S
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2TP24
SSM3K7002BFU
NXP_IP4223CZ6_SOT457_6P_DY
P1V5S
22U
F_6.3
V_5
0.1
UF
_16V
_2
0.1
UF
_16V
_2
22UF_6.3V_50.1UF_16V_2
TP24
P3V3S
0.1UF_16V_2
0.1
UF
_16V
_2
4.7
UF
_6.3
V_3
TAI_PMPAT5_06GLBS7NI4H1_6P
Block Diagram
CSA3
TP24
CN1400
C1407C1408
C1406C1405
Q1400
C1412
C1411
C1410
TP1402
TP1401TP1400
C1404
C1403
U1400
CN1401
C1400C1401C1402
47B3
47B3
47B3
47B3
51B2
57A6
52D6
21E3 27C3 27C7 51A8
28A4
28A4
28A6
28A4 28B6
51B2
28D3
28A4 28D3
28B6 28D3
28C3
28C3
SATA_MINICARD_C_TX_DPSATA_MINICARD_C_TX_DN
3G_OFF#
USB_3G_DNUSB_3G_DP
BUF_PLT_RST#
UIM_PWRUIM_DATAUIM_CLKUIM_RST
SATA_MINICARD_C_RX_DNSATA_MINICARD_C_RX_DP
UIM_CLKUIM_RSTUIM_PWR
SATA_MINICARD_TX_DNSATA_MINICARD_TX_DP 3G_ON#
UIM_DATA
UIM_PWR
SATA_MINICARD_RX_DNSATA_MINICARD_RX_DP
1
20
3638
3230
1113
47
3331
22
2523
49
19
8
17
10121416
42
4644
G2G1
7
35
51
9
6
525048
4341
40
4
393735
34
29282726
21
2
1815
45
24
2121
2121
2
1
3
21
21
21
1
11
21
21
4
6
3
1
52
P6P1P2
P7
P5
G2 G1
P3
21
21
21
OUT
W_DISABLE#
WAKE#
USB_D-
USB_D+
SMB_DATA
SMB_CLK
REFCLK-
REFCLK+
PWR_LED#
PETP0
PETN0
PERP0
PERN0
PERST#
NUM_LED#
LPC_PCI_CLK
LPC_FRAME#
LPC_DEBUG_RST#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LED_WWAN#
LED_WPAN#
LED_WLAN#
GG
CLKREQ#
CH_DATA
CH_CLK
CAPS_LED#
GND
1.5V
3.3V
GND
1.5V
Reserved
Reserved
GND
GND
Reserved
Reserved
GND
GND
GND
1.5VGND
GND
GND
3.3V
GND
GND
+V3AL
+3.3VAUXBIBI
OUT
BIBI G
DS
IN VIO
VBUSGND
VIO
VIO VIO
BI BIININ
G
I_O
VPP
VCC
RST
CLK
G
GND
IN
IN
BIBI
BIBI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
PLACE CLOSE TO CONNECTOR(<100MILS)
REFERENCE 1750~1799(ODD)
SATA HDD
REFERENCE 1700~1749(HDD)
40MIL
PLACE CLOSE TO CONNECTOR(<100MILS)
SATA ODD
6829
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SSM3K7002BFU_DY
10K_5%_2_DY
0.01UF_50V_20.01UF_50V_2
0.01UF_50V_20.01UF_50V_2
SANTA_194911_1_22P
22U
F_6.3
V_5
0.1
UF
_16V
_2
P5V0S
22U
F_6.3
V_5
22U
F_6.3
V_5
A3 CS
Block Diagram
0.1
UF
_16V
_2
0.01UF_50V_20.01UF_50V_2
0.01UF_50V_20.01UF_50V_2
SYN_127382FR013G212ZR_13P
P5V0S
TPC6111_DY
0_5%_6
22U
F_6.3
V_5
CSC0402_DY
CSC0402_DY
P3V3S
100K_5%_2_DY
1M_5%_2_DY
R1750
Q1750
R1752
R1751
C1758
R1754
Q1751
CN1750
CN1700
C1754
C1702
C1755
C1703
C1706
C1756
C1757
C1753C1752
C1751C1750
C1701
C1700
C1705
C1704
47C3
47C3
47C3
47C3
52D2
47B3
47B3
47B3
52B6 52D7
51C7
47B3
51B6
SATA_ODD_PWREN
SATA_HDD_RX_C_DPSATA_HDD_RX_C_DN
SATA_HDD_TX_C_DNSATA_HDD_TX_C_DP
SATA_HDD_RX_DPSATA_HDD_RX_DN
SATA_HDD_TX_DNSATA_HDD_TX_DP
SATA_ODD_TX_DP
SATA_ODD_DA#
SATA_ODD_PRSNT#
SATA_ODD_RX_C_DPSATA_ODD_RX_C_DN
SATA_ODD_TX_C_DNSATA_ODD_TX_C_DP
SATA_ODD_TX_DN
SATA_ODD_RX_DNSATA_ODD_RX_DP
21
2
1
32
1
21
2 12
1
436 5 2 1
S7S6S5S4S3S2S1
P6P5P4P3P2P1
G2G1
G2G1
9876543
222120
2
19181716151413121110
1
21
21
21
21
21
21
21
2121
2121
2121
2121
OUT
G
DS
S
PM
OS
_4
D1
SG
D
GND
A+
A-
GND
B-
B+
GND
DP
+5V
+5V
MD
GND
GND
G
G
G2
G1
V12
V12
V12
GND
RESERVED
GND
V5
V5
V5
GND
GND
GND
V3.3
V3.3
V3.3
GND
B+
B-
GND
A-
A+
GND
OUT
IN
OUT
OUT
OUT
OUT
ININ
ININ
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 2000~2099(USB)
6830
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
POWERPAD_2_0610
1UF_6.3V_2
P5V0A_USB3
ACES_50224_0040N_001_4P
22UF_6.3V_5RSC_0402_DY
RICH_RT9711APF_MSOP_8P
P5V0A
22UF_6.3V_5_DY
CSC0402_DYP3V3AL
A3 CS
Block Diagram
10K_5%_2
P5V0A_USB3
0.1UF_16V_2
CN2002
C2002
PAD2000
R2001
R2000C2003
C2000 C2001
C2004
U2000
51C2 66C6
51C2 66C6
21D3
21D3
P5V0A_USB_PW1
USB_P2_DPUSB_P2_DN
USB_OC#_2
SB_USB_2
G2G1
4321
21
21
21
21
21
21
21
21
87654
321
BIBI
G1
1
2
3
4 G2
VOUT
VOUT
VOUT
FLG#EN_EN#
VIN
VIN
GND
OUT
IN
1 2
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 2400~2499(USB3.0)
TRACE WIDTH>20MILS
6831
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P1V05_USB3 P3V3_USB30_AVDD
0.1
UF
_16V
_2
P3V3_USB3
0.1
UF
_16V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
10U
F_6.3
V_3
0.1UF_16V_2
SSM3K7002BFU
220K_5%_2
CS
C0402_D
Y
DIODES_DMP2305U_SOT23_3P
P3V3A
10K_5%_2
CS
C0402_D
Y
0.1
UF
_16V
_2
P3V3_USB3
Block Diagram
CSA3
12PF_50V_2
ANPEC_APL5930KAI_TRG_SOP_8P10K_1%_2
31.6K_1%_2
P3V3_USB3
10K_5%_2
10K_5%_2
DIODE-BAT54-TAP-PHP
0.1UF_16V_2
0.1UF_16V_2
P3V3_USB3
10K_5%_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
P3V3_USB30_AVDD
0.1
UF
_16V
_2
0.1
UF
_16V
_2
10U
F_6.3
V_3
BLM21PG600SN1D_3A
47K_5%_2
MAC_MX25L5121EMC_20G_SOP_8P
P3V3_USB3
P3V3_USB3
P5V0A
22UF_6.3V_5
RENESAS_UPD720202K8_BAA_A_QFN_48P
1.6K_1%_2
1UF_6.3V_2
1UF_6.3V_2
P3V3_USB3
10K_5%_2
P3V3_USB3
10K_5%_2
12PF_50V_2
24MHZ
0.0
1U
F_50V
_2
P1V05_USB3
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
150PF_50V_2
22UF_6.3V_5
POWERPAD1X1M
P1V05_USB3
0.0
1U
F_50V
_2
0.0
1U
F_50V
_2
P1V5
0_5%_2
10K_5%_2
C2471
C2473
C2472
Q2402
Q2403
R4955
C2425
C2424
C2423
C2410
C2409
C2414
C2408
C2401
C2400
C2480
C2435
C2406
R2405
U2400
R4754
C2416
C2415
C2470
C2405
C2404
C2403
C2402
R2416R2415
PAD2400
U2403
C2438
R2423
C2433
R2422
C2434
R2424
R2480 R2481
U2480
C2417
C2422
C2421
C2420
C2418
C2419
C2411
D2400
R2406
X2400
C2412C2413
L2400
R2400
R2427
21D6 31A5
32B8
48B7
31B8 48B7 22B5 27C7 49A5 49B3
48D8
51B6 31C6
48D8
48D8
41C7 51A7
31B6
31C7
51B6
48B7
31B6
31C6
31D4 21D6
33B5
33C5
31A6
33B5
33B5
33B5
31B6
48D8
31B6
31B6
32A8
32D7
32B8
32D7
32D7
32D7
31A6
31A8
36B2
31A8
48B7
31C7
33C5 USB2_IC_TX2_DN
USB30_PWR_EN
USB2_IC_TX2_DP
USB30_PWR_EN
USB3_SMI#
CLKREQ_USB3#
PCIE_USB3_TX_DP
PLT_RST#PCIE_WAKE#CLKREQ_IC_USB3#
CLK_PCIE_USB3_DN
PCIE_USB3_RX_DPPCIE_USB3_RX_DN
PCIE_USB3_TX_DN
PCIE_USB3_RX_C_DP
USB3_SMI#
PCIE_USB3_RX_C_DN
USB3_SCLK
USB3_SI
USB3_IC_TX2_DP
USB3_IC_RX2_DN
USB3_IC_RX1_DN
USB2_IC_TX1_DN
USB2_IC_TX1_DPUSB3_IC_RX1_DP
USB3_IC_TX1_DP
USB3_CS#
USB3_XT1
USB3_IC_TX1_DN
USB3_SOUSB3_SIUSB3_CS#
USB3_IC_TX2_DN
CLKREQ_IC_USB3#
CLK_PCIE_USB3_DP
USB3_SCLK
CLKREQ_USB3#
USB3_SO
USB3_XT2
USB3_IC_RX2_DP
21
21
21
2
1
3
S
G
D
21
21
21
21
2121
21
21
21
21
21
21
21
21
2324
34
43
12
22
42
6 9 21
30
33
39
37
28
38
29
40
31
41
32
44
35
45
36
1316
1514
46
26
1820
11
48
45
78
47
10
12
1719
27
49
3 25
2 1
21
21
21
21
21
21
21
2121
21
4
3
9
5
6
7
1
28
21
21
21
21
21
21
21
21
3
8
2
5
6
7
4
1
21
21
21
21
21
21
21
2
13
21
21
21
21
21
21
21
BI
NC
IN
IN
ININ
OUTOUT
ININ
INOUTOUTOUT
IN
BI
OUT
IN G
DS
G
S D
OUTIN
PERXN
PETXP
XT2
XT1
PONRSTB
PERSTB
PEWAKEB
PECREQB
AV
DD
33
AV
DD
33
PECLKP
PECLKN
PETXN
PERXP
SPISCK
SPICSB
IC(L)
VD
D33
VD
D33
VD
D10
VD
D10
VD
D10
VD
D10
VD
D10
VD
D10
VD
D33
VD
D33
GN
D
SPISI
SPISO
VD
D10
SMIB
RREF
U3TXDP2
U3TXDN2
U3RXDP2
U3RXDN2
U2DP1
U2DM1
U3TXDP1
U3TXDN1
U3RXDP1
U3RXDN1
U2DP2
U2DM2
OCI2B
OCI1B
PPON2
PPON1OUT
BI
BI
BI
BI
1 2
VIN
VCNTL
POK
EN
VIN
VOUT
VOUT
FB
GND
IN
IN
BI
BI
BI
BI
BI
OUT
IN
IN
INWP#
VCC
SO
SI
SCLK
NC
GND
CS#
BI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
USB3.0
USB3.0 FROM PCH
USB3.0 FROM CONTROLLLER
USB3.0 FROM CONTROLLLER
USB3.0 FROM PCH
CURRENT LIMIT 2.5A
REFERENCE 2400~2499(USB3.0)
USB 3.0 CONNECTOR
6832
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
LOTES_AUSB0026_P001_9P
WCM_2012_900T
10K_5%_2
P5V0A_USB1
100K_5%_2_DY
0_5%_20_5%_2
47UF_6.3V_5
20K_5%_2 0_5%_2_DY
P3V3ALTI_TPS2540A_QFN_16P
1000PF_50V_2
P5V0A
0_5%_2GMT_G547E1P81U_MSOP_8P
P5V0A_USB1
0_5%_2
0_5%_2
0_5%_2
0.1UF_16V_2
0_5%_2
0.1UF_16V_20.1UF_16V_2
0.1UF_16V_20.1UF_16V_2
0_5%_20_5%_2
22UF_6.3V_5
100UF_6.3V
P3V3AL
10K_5%_2
Block Diagram
CSA3
0_5%_20_5%_2
P5V0A_USB1
0.1UF_16V_2
P5V0A
P5V0A
0_5%_2
CN2401
R2436R2435
U2401
R2458
R2504
R2503
C2447C2448
C2441C2440
C2427
C2426
C2429
R2456
R2457
R2454
R2455
R2408
R2447
R2446
R2433R2432
R2431R2430
L2404
C2442
R2434
C2432C2428
U2402
31B2
32D5
32D5
32D5
51C2
21C3
21D6
32C8
51C2
31B2
31B2
32C8
31B2 32A8
32B8
32B8
32B8
51C2
21D6
21C3
21C3
32C8
51C2
32A8
32A8
32B8
32B8
32C7
32C7
31B2
51C6
51C6
31B2
32B7
32B7
31B2
31B2
51C6
51C6
21D6
32D5
32C8
32A6
32A8
32C1
32C3
33C6
33D8
33C6
33D8
21D6
USB3_SSTX1_DPUSB3_SSTX1_DN
USB3_SSRX1_DPUSB3_SSRX1_DN
USB_P0_L_DPUSB_P0_L_DN
USB_P0_R_DPUSB_P0_R_DN
USB_IC_DN
USB2_IC_TX1_DP
USB_IC_DP
USB_OC#_1
USB_OC#_1
SB_USB_1
USB2_IC_TX1_DN
USB_P0_DP
USB_P0_DP
USB_IC_DNUSB_IC_DP
USB3_PCH_TX1_DPUSB3_PCH_TX1_DN
USB3_IC_TX1_DPUSB3_IC_TX1_DN USB3_SSTX1_DN
USB3_SSRX1_DNUSB3_SSRX1_DP
USB3_PCH_RX1_DNUSB3_PCH_RX1_DP
USB3_SSTX1_DP
USB3_IC_RX1_DPUSB3_IC_RX1_DN
SB_USB_1EC_CTL1EC_CTL2EC_CTL3
EC_ILIM_SEL
USB2_IC_TX1_DP
USB_P0_DN
USB2_IC_TX1_DN
USB_P0_DN
G4G3G2G1
987654321
21
21
17
129
14
1516
1413
5
310
211
876
21
2121
2121
2121
21
21
21
21
21
2121
21
2121
2121
2121
2134
21
21
21
21
678
5321
4
ININININ
BIBI
OUT
IN EN OC#
OUT
OUT
OUT
IN
IN
GND
G
G
G
G
SSTX+
SSTX-
GND
SSRX+
SSRX-
PGND
D+
D-
VBUS
PWPD
OU
T
NC
INILIM
_S
EL
ILIM1
ILIM0
GND
FAULT#
EN
DP
_O
UT
DP
_IN
DM
_O
UT
DM
_IN
CTL3
CTL2
CTL1
BIBI
+
BI
BI
OUT
BIBI
BIBI
BI
BI
BIBI
BI
BIBI
BIBI
BI
BI
BIBI
BI
BI
BI
BI
BI
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
CURRENT LIMIT 2.5A
REFERENCE 2400~2499(USB3.0)
USB 3.0 CONNECTOR
USB3.0
USB3.0 FROM PCH
USB3.0 FROM CONTROLLLER
USB2.0 FROM PCONTROLLER
USB2.0 FROM PCH
USB3.0 FROM PCH
USB3.0 FROM CONTROLLLER
6833
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
LOTES_AUSB0026_P001_9P
0_5%_20_5%_2
0_5%_2
0_5%_20_5%_2
22UF_6.3V_5_DY0.1UF_16V_2 1000PF_50V_2
0_5%_2
A3 CS
Block Diagram
0_5%_20_5%_2
WCM_2012_900T
P5V0A_USB2
P5V0A
GMT_G547E1P81U_MSOP_8P
100UF_6.3V
P5V0A_USB2
P3V3AL
10K_5%_2
47UF_6.3V_5
0.1UF_16V_20.1UF_16V_2
0.1UF_16V_20.1UF_16V_2
CN2402
U2404
R2410
C2449
C2454
C2445C2446
C2444C2443
C2452
R2453R2452
R2451R2450
L2405
C2453C2451
R2437R2438
R2440R2439
51C6
51C6
51C2
31C2
33C3
33C3
33B3
33B2
33B3
33B2
51C6
51C6
21C3
21D6
33C3
33C3
32C1 32A6
32C3 32A8
USB_P1_L_DNUSB_P1_L_DP
USB3_SSRX2_DNUSB3_SSRX2_DP
USB3_SSTX2_DNUSB3_SSTX2_DP
USB_P1_DPUSB_P1_DN
USB2_IC_TX2_DPUSB2_IC_TX2_DN
USB3_IC_TX2_DN
USB3_SSRX2_DPUSB3_SSRX2_DN
USB3_IC_TX2_DP USB3_SSTX2_DPUSB3_SSTX2_DN
USB3_PCH_RX2_DPUSB3_PCH_RX2_DN
USB3_IC_RX2_DPUSB3_IC_RX2_DN
USB_P1_R_DPUSB_P1_R_DN
USB_OC#_1
SB_USB_1
USB3_PCH_TX2_DNUSB3_PCH_TX2_DP
G4G3G2G1
987654321
678
5321
4
21
21
21
2121
2121
21
2121
2121 21
34
21
21
2121
2121
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
G
G
G
G
SSTX+
SSTX-
GND
SSRX+
SSRX-
PGND
D+
D-
VBUS
EN OC#
OUT
OUT
OUT
IN
IN
GND
OUT
+
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFFERENCE 3000~3049(LCM)
PM:4.7KGM:2.2K
(60130B4720ZT)
PM: 10KGM:OPEN
6834
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
PVBAT_LCD
100_5%_2
10K_5%_2
100_5%_2
1000PF_50V_2
680PF_50V_2
10U
F_6.3
V_3
POWERPAD_2_0610
100_5%_2
2.2
K_5%
_2
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_10_5%_1
0_5%_1
0_5%_1
0_5%_1
100_5%_2
100K_5%_2 CSC0402_DY
4.7
UF
_25V
_5
0.1
UF
_16V
_2
Block Diagram
CSA3
ACES_50203_03001_001_30P
PVBAT
POWERPAD_2_0610
0.1
UF
_25V
_3
0.1
UF
_16V
_2
P3V3S
47K
_5%
_2
0.0
1U
F_50V
_2
0.1
UF
_16V
_2
P3V3S
SSM3K7002BFU
470K_5%_2
P3V3S
2.2
K_5%
_2
SSM3K7002BFU
0_5%_1
0_5%_1
0_5%_1
P3V3S
DIODES_DMP2305U_SOT23_3P
C3002
R3018R3017
R3016R3015
R3014
R3034R3033
R3032R3031
R3030R3029
R3028R3027
R3026R3025
R3024R3023
R3021R3022
R3020R3019
R3013
R3012
R3011
R3035
Q3002
Q3001
Q3000
R3006
CN3000
C3006
R3001
R3000
C3000 C3003
R3004
C3001
PAD3003
R3002
R3005 C
3004
C3007
R3003
R3009
R3010
C3011
C3010
C3009
PAD3001
24A6
24A6
34B3
34B3
34C3
34C3
34C3
34C3
50D7
34C3
34C3 57A6
57A6
57A6
57A6
50C6
50C6
50C6
50C6
50C6
50C6
34A6
34A6
34A6
34A6
34A6
34A6
34A6
34A6
50C6
51B2
51B2
50C6
57A6
57A6
57A6
57A6
57B6
50C7
50D7
56D6
56D6
50D7
21E6
57B6
MIC_IN_CLKMIC_IN_DATA
USB_CAM_DN
MIC_IN_DATA_R
P3V3S_MOS_LCM P3V3S_LCM
LCM_VDDEN
LVDS_DDCCLKPCH_LVDS_DDCCLKPCH_LVDS_DDCDATA
VGA_LVDS_DDCDATAVGA_LVDS_DDCCLK
VGA_LVDS_TXDL1_DP
VGA_LVDS_TXDL0_DP
PCH_LVDS_TXCL_DP
VGA_LVDS_TXDL0_DN
PCH_LVDS_TXDL1_DN
PCH_LVDS_TXDL0_DP
PCH_LVDS_TXCL_DN
PCH_LVDS_TXDL2_DNPCH_LVDS_TXDL2_DP
PCH_LVDS_TXDL1_DP
PCH_LVDS_TXDL0_DN
LVDS_TXCL_DPLVDS_TXCL_DN
LVDS_TXDL2_DPLVDS_TXDL2_DN
LVDS_TXDL1_DPLVDS_TXDL1_DN
PCH_LCM_VDDEN
VGA_LCM_VDDEN
LVDS_TXDL0_DPLVDS_TXDL0_DN
LVDS_TXDL0_DNLVDS_TXDL0_DP
LVDS_TXDL1_DP
LVDS_TXDL2_DN
LVDS_TXCL_DN
LVDS_TXDL1_DN
LVDS_TXCL_DP
LVDS_TXDL2_DP
INV_PWM_3_REC_BKLTEN_R
USB_CAM_DP
LVDS_DDCDATA
EC_BKLTENPCH_INV_PWM_3
VGA_INV_PWM_3
VGA_LVDS_TXCL_DPVGA_LVDS_TXCL_DN
VGA_LVDS_TXDL2_DPVGA_LVDS_TXDL2_DN
PCH_LCM_VDDEN#
VGA_LVDS_TXDL1_DN
21
2121
2121
21
2121
2121
2121
2121
2121
2121
2121
2121
21
21
21
21
2
1
3
2
1
3
S
G
D
21
G2G1
987654
30
3
29282726252423222120
2
19181716151413121110
1
21
21
21
21
2 1
21
21
21
21
21
21
21
2121
21
21
21
21
21
IN
ININ
ININ
ININ
BIBI
BIBI
IN
IN
IN
IN
G
DS
G
DS
G
S D
BIBI
1 2
G
G
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
1 2
ININ
ININ
IN
IN
IN
IN
IN
BIBI
OUTOUT
OUTOUT
OUTOUT
OUTOUT
IN
ININ
ININ
ININ
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
(60130B2020ZT)
GM:2.2K
(60130B1030ZT)PM:10KGM:2.2K
PM:2K
REFERENCE 3050~3099(CRT)
RESERVE CAP FOR EMI
6835
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SUYIN_070546HR015M25KZR_15P
P5V0S_CRTVDD
0.22UF_6.3V_2
P5V0S_CRTVDD
2.2K_5%_2
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
P3V3S
30_5%_2
30_5%_2
2.2K_5%_2
P3V3S
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0_5%_1
0.22UF_6.3V_2
0.22UF_6.3V_2
P5V0S
0.1UF_16V_2_DY
A3 CS
Block Diagram
TP24
TP24
0.1UF_16V_2_DY
100_5%_2
100_5%_2
2.2K_5%_2
P5V0S
SBR3U40P1
SMD1812P110TF
TI_TPD7S019_15DBQR_SSOP_16P
15P
F_50V
_2
15P
F_50V
_2
120NH,5%
120NH,5%
120NH,5%
150_1%
_2
150_1%
_2
150_1%
_2
15P
F_50V
_2
2.2K_5%_2
CN3051
R3077
R3076
R3070
R3071
R3072
R3073
R3074
R3075
R3069
R3068
R3065
R3064
R3066
R3067
FUSE3050
D3050
C3052
C3054C3053
R3050 R3051
R3052
R3053 TP3051
TP3050
R3063
R3062
R3061R3060
C3057
C3055
C3056
U3050
C3051
C3050
R3056
R3055
R3054
L3050
L3051
L3052
35D4 35A7
35D4
56D3 56F7
56D3 56F7
35D4
35D4
35A3
56A3
50A6
50A6
56A3
35A4
50A6
50A6
35A4
35A4
35A4
56D3 56E2
56D3 56E2
56D3 56E2
50B7
50B7
50B7
35C3
35B4
35B4
35A4
35A4
35C3
35D4 35C3
35C5
35C5
35C3
35A3
35C3
35D4 35A7
35A7
35A3
35A3
35C3
35C3
35C3
35A7
35A7
35A7
CRTB_LCRTG_L
CRT_DDCCLK_R_OUT
CRT_DDCDATA_R_OUT
CRTR_L
VGA_CRT_VSYNC
PCH_CRT_VSYNC
CRT_DDCDATA_OUT
CRT_HSYNC_R_OUT
CRT_VSYNC_R_OUT
CRT_HSYNC
CRT_VSYNC
CRTB
CRTG
CRTR
PCH_CRTB
CRT_DDCCLK_OUT
VGA_CRT_DDCCLK
VGA_CRT_HSYNC
PCH_CRT_DDCCLK
PCH_CRT_DDCDATA
VGA_CRT_DDCDATA
PCH_CRT_HSYNC
CRT_DDCCLK
CRT_DDCDATA
CRT_VSYNC
CRT_HSYNC
CRT_DDCDATACRT_DDCCLK
CRT_HSYNC_OUT
CRT_VSYNC_OUT
CRTG_LCRTB_L
CRTR_L
CRT_VSYNC_R_OUTCRT_HSYNC_R_OUT
P5V0S_CRT2
P5V0S_CRT1
CRTR_L
CRTG_L
CRTB_L
VGA_CRTR
VGA_CRTG
VGA_CRTB
PCH_CRTR
PCH_CRTG
CRT_DDCDATA_OUT
CRT_DDCCLK_OUT
G2G1
98765432
151413121110
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
211
1
21
21
21
21
21
21
21
1 1615
98765432
1413121110
21
21
21
21
21
21
21
21
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BIININ
IN
IN
ININ
IN
IN
IN
VCC-SYNC SYNC_OUT2
SYNC_IN2
DDC_OUT1BYP
VCC-DCC
GND
VIDEO_3
VIDEO_2
VIDEO_1
VCC-VIDEO
SYNC_OUT1
SYNC_IN1
DCC_OUT2
DDC_IN2
DDC_IN1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
G2
G1
9
8
7
6
5
4
3
2
15
14
13
12
11
10
1
IN
IN
IN
OUT
OUT
OUT
OUT
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
(60130B1030ZT)
REFERENCE 3150~3199(HDMI)
GM: 2.2KPM:10K
40MIL
CLOSE TO CONNECTOR
PLACE CLOSE TO CONNECTOR
(60130B1030ZT)PM:10KGM: 2.2K
PM:499_5%GM:680_5%
(6013A0076801)
6836
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
680_5%_2
0.1UF_6.3V_1
SYN_100042GR019M26DZL_19PSMD1812P110TF
2.2K_5%_2
0_5%_2
0_5%_1
0_5%_1
0_5%_1
0_5%_1
SSM3K17FU
P3V3S
0_5%_2
0_5%_2
P5V0AL
P5V0AL
SBR3U40P1
0_5%_2
0_5%_2
0_5%_2
0_5%_2
1K_5%_2
470K_5%_222PF_50V_2_DY
TP24
0_5%_2
Block Diagram
CSA3
680_5%_2
2.2K_5%_2
DIODE-BAT54-TAP-PHP
680_5%_2
680_5%_2
680_5%_2
P3V3S
TC7SZ08FU
P3V3S
SSM3K17FU
2.2K_5%_2
100K_5%_2
P3V3S
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
100PF_50V_2
0_5%_1
0_5%_1
680_5%_2
680_5%_2
680_5%_2
SSM3K7002BFU
2.2K_5%_2
CN3150
R3180
R3181
C3156
C3154
C3152
C3157
C3155
C3153
C3159C3158
R3177
R3176
R3175
R3174
R3179R3178
C3161C3160
C3163
C3165
C3167
C3164
C3162
C3166
Q3152
D3150
C3151
TP3151
R3169
R3168
R3167
R3166
R3173
R3172
R3171
R3170
R3152R3153
Q3150
Q3151
R3159
R3157
R3158
R3160
R3161
R3162
R3163
R3164
R3165
U3150
C3150
D3155FUSE3150
R3154
R3150
36A2
56F3
37D6
56B3
56B3
50B3
50B3
36D6
36D6
37C3 36C3
36C3 37D3
36A2 36D5
36C6 37D3
36C6 37C3
36A2 36A7
36B7
36A2
37C1
36A2 36A7
36A2 36A7
36A2
36D5
36A2 36A7
36A2 36A7
36A2 36C5
36A2 36D5
36A2 36D5
36A2 36D5
36A2 36D5
37B1 21D6
31C6 41C7 51A7
36D5
36D5
36D5
36D5
36D5
36D5
36C5
36C5
36A7
36A7
36A7
36B7
36A7
36B7
36B7
36A7
36C8
36C8
56F3
56F3
56F3
56F3
56F3
56F3
56F3
50B3
50B3
50B3
50B3
50B3
50B3
50B3
50B3
50B3
56C5
36A2 36B7
36B7
36A2
36C5
HDMI_TX1_C_DN
PCH_HDMI_TX2_DN
P5V0AL_HDMI_VDD2
HDMI_CEC
HPDET_IC
HDMI_TX1_R_DN
HDMI_TX0_R_DP
VGA_HDMI_DDCCLK
VGA_HDMI_DDCDATA
PCH_HDMI_DDCCLK
PCH_HDMI_DDCDATA
HDMI_DDCCLK
HDMI_DDCDATA
HDMI_CN_DDCCLK
HDMI_CN_DDCDATA
HDMI_CN_DDCCLK
P5V0AL_HDMI_VDD1
HDMI_CN_DDCDATA
HDMI_TXC_R_DN
HDMI_TX1_C_DP
HDMI_TXC_R_DP
HDMI_TX0_R_DN
HDMI_TX1_C_DN
HDMI_TX2_R_DP
HDMI_TX2_R_DN
HDMI_TX1_R_DP
HDMI_TX2_C_DP
HDMI_TX2_C_DN
HDMI_TX1_C_DP
HDMI_TX2_C_DN
HDMI_TXC_C_DP
HDMI_TX2_C_DP
HPDETHDMI_HPD_EC
PLT_RST#
HDMI_TX0_C_DP
HDMI_TXC_C_DP
HDMI_TX2_C_DN
HDMI_TX1_C_DPHDMI_TX1_C_DNHDMI_TX2_C_DP
VGA_HDMI_TX1_DNVGA_HDMI_TX2_DPVGA_HDMI_TX2_DN
HDMI_TX0_C_DN
HDMI_TXC_C_DN
PCH_HDMI_TX2_DPPCH_HDMI_TX1_DNPCH_HDMI_TX1_DP
VGA_HDMI_TXC_DP
HDMI_TX0_C_DP
VGA_HDMI_TXC_DNVGA_HDMI_TX0_DPVGA_HDMI_TX0_DNVGA_HDMI_TX1_DP
PCH_HDMI_TX0_DNPCH_HDMI_TX0_DPPCH_HDMI_TXC_DNPCH_HDMI_TXC_DP
PCH_HPDET
HDMI_TX0_C_DP
HDMI_TXC_C_DP
HDMI_TX0_C_DN
HDMI_TXC_C_DN
VGA_HPDET
HDMI_DDCDATA
HDMI_DDCCLK
HDMI_TXC_C_DN
HDMI_TX0_C_DN
G4G3G2G1
98765432
19181716151413121110
1
21
21
21
21
21
21
21
21
2121
21
21
21
21
21
21
2121
21
21
21
21
21
21
2
1
3
2
13
21
1
21
21
21
21
21
21
21
21
21
21
S
G
D
S
G
D
21
21
21
21
21
21
21
21
21
5
4
3
2
1
21
2 1 21
21
21
ININ
ININ OUT
OUTOUTOUTOUTOUTOUTOUT
G
D S
IN
NC
BI
IN
IN
IN
IN
IN
IN
IN
IN
BIBI
BI BI
BI BI
G
DS
G
DS
IN
IN
IN
IN
IN
IN
IN
IN
OUTIN
+-
G4
G3
G2
G1
TMDS Data0-
TMDS Data0 Shield
TMDS Data0+
TMDS Data1-
TMDS Data1 Shield
TMDS Data1+
TMDS Data2-
TMDS Data2 Shield
Hot Plug Detect
+5V Power
DDC/CEC GND
DDC Data
DDC Clock
Reserved
CEC
TMDS Clock-
TMDS Clock Shield
TMDS Clock+
TMDS Data2+
IN
ININ
ININ
IN
OUT
ININ
OUT
BI
BI
BI
BI
BI
BI
ININ
ININ
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6837
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SSM3K17FU
P3V3AL
SSM3K17FU
4.02K_1%_2
SSM3K7002BFU
74LVC1G14GV
22K_5%_2
P3V3AL
A3 CS
Block Diagram
P3V3AL
RS
C_0402_D
Y
P3V3AL
4.02K_1%_2
68_5%_2
P3V3AL
P3V3AL
DIODE-BAT54-TAP-PHP
27K_5%_2
100K_5%_2
4.7K_5%_2
4.7
K_5%
_2
4.7
K_5%
_2
4.7K_5%_2
RENESAS_R5F211B4D61SP_LSSOP_20P
47K
_5%
_2
47K
_5%
_2
P3V3AL
P3V3AL
P3V3AL
33_5%_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
PHP_74LVC1G17_SOT753_5P
0.1
UF
_16V
_2
Q3203
C3202
C3200
U3203R
3212
R3211
R3205
R3206
D3200
R3204
R3214
R3213R3210
R3202
U3200R3227
C3205
R3208
R3209
R3200Q3200
R3201 Q3201
U3202
36C3
56D8 56C8
37B3 37B6
36C6 36C3 37B3
36C4
21D6
37B6
21D2 5A7
37A8
37C5
21D2 5A7
37D5
36C6 36C3
37C6
37D8
37A6
37B6 37B6
21D3 21D3
36B2
HDMI_CN_DDCCLK
HDMI_CN_DDCDATA
HDMI_CEC
CEC_OUT
HDMI_DDCCLK_CEC
HPDET_IC
HDMI_HPD_EC
CEC_IN
CEC_XOUTHDMI_DDCDATA_CECHDMI_DDCCLK_CEC
CEC_OUTCEC_IN
CEC_XIN
CEC_XOUT CEC_XIN
HDMI_DDCDATA_CEC
EC_SMB2_CLK EC_SMB2_DATA
2
1
3
21
21
5
4
1
2
3
21
21
21
21
2
13
21
21
21
21
21
5
4
1
2
3
21
21
21
21
21
S
G
D
21
S
G
D
4
65
7
3
9
16
21 20
19
10 1112131415
1718
8
INOUT
OUT
IN
BI
BI
BI
BI
BIBI
BI
IN
IN
OUT
OUT
BI
BI
OUT
IN
G
DS
NC
+
-
NC
-
NC
+
G
DS
G
DS
XOUT-P4_7
XIN-P4_6
VSS-AVSS
VCC-AVCC
RESET#
P4_5-INT0#-RXD1
P4_2-VREF
P3_7-CNTR0#-SSO-TXD1
P3_5-SSCK-SCL-CMP1_2 P3_4-SCS#-SDA-CMP1_1
P3_3-TCIN-INT3#-SSI00-CMP1_0
P1_7-CNTR00-INT10# P1_6-CLK0-SSI01
P1_5-RXD0-CNTR01-INT11#
P1_4-TXD0
P1_3-KI3#-AN11-TZOUT
P1_2-KI2#-AN10-CMP0_2
P1_1-KI1#-AN9-CMP0_1
P1_0-KI0#-AN8-CMP0_0
MODE
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN
CHA
IF SA0_DIM0=0 , SA1_DIM0=0
SO-DIMMA TS ADDRESS IS 0X30SO-DIMMA SPD ADDRESS IS 0XA0
NOTE:
1.5A
NOTE:PLACE C4100 ON COMMON PATH FOR BOTH DIMM'S
ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH
SO-DIMMA TS ADDRESS IS 0X32SO-DIMMA SPD ADDRESS IS 0XA2IF SA0_DIM0=1 , SA1_DIM0=0
REFERENCE 4100~4299(DDR)
PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
6838
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
BELLW_80001_1021_204P
BELLW_80001_1021_204P
Block Diagram
CSA3
P3V3S
0.1UF_16V_2
01
32
4
65
789
1110
12
15
181920212223242526272829
32
3433
353637383940
42
4443
4645
47484950
5251
5354
5756
5859
6263
10K_5%_2_DY
10K_5%_2
10K_5%_2_DY
10K_5%_2
1314
1UF_6.3V_2
10K_5%_2
55
P3V3S
10UF_6.3V_3 10UF_6.3V_3
0123456789101112131415
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
1UF_6.3V_21UF_6.3V_21UF_6.3V_21UF_6.3V_2
P0V75S
0.1UF_16V_2
30
10UF_6.3V_3
6061
P0V75M_VREF
P0V75M_VREF
2.2UF_6.3V_3 0.1UF_16V_2
2.2UF_6.3V_3
2.2UF_6.3V_3
P3V3S
41
P1V5
330UF_2.5V_DY16
31
17
CN4100
CN4100
C4100
R4103
R4101
R4102
R4100
R4104
C4119 C4120 C4121 C4122
C4117 C4118
C4150 C4116
C4114 C4115
C4102C4101 C4103 C4104
C4110 C4108C4109
C4105 C4107C4106
43D8
38C8
38C8
43B5
43B5
43B5
43B5
43B5
43B5
43B5
43B5
43A4
43A8
43A8
43C5
43A8
43D4
43A8
43B5
43B5
43B5
43B5
43B5
43B5
43B5
43D4
43D4
43D4
43D4
43D4
43A8
43A8
48A8 39C8
38A6
38A6
43C5
48A8 39C8
43C5
41A5 39C3
39C3 38B5
43B5
39C3 38C3
43C5
DDR3_DRAMRST#PM_EXTTS#1_R
M_A_A<3>M_A_A<2>M_A_A<1>M_A_A<0>
M_A_A<15..0>
M_A_DQ<63>M_A_DQ<62>
M_A_DQS7_DNM_A_DQS6_DNM_A_DQS5_DNM_A_DQS4_DNM_A_DQS3_DNM_A_DQS2_DN
M_A_DQS0_DN
M_A_DQS0_DP
M_ODT1M_ODT0
PCH_3S_SMCLKSA1_DIM0SA0_DIM0
M_A_WE#M_A_RAS#M_A_CAS#M_CKE1M_CKE0M_CLK_DDR1_DN
M_CLK_DDR0_DPM_CS#1M_CS#0M_A_BS2M_A_BS1M_A_BS0
M_A_A<15>M_A_A<14>M_A_A<13>M_A_A<12>M_A_A<11>M_A_A<10>M_A_A<9>M_A_A<8>M_A_A<7>M_A_A<6>M_A_A<5>M_A_A<4>
M_A_DQ<61>M_A_DQ<60>M_A_DQ<59>M_A_DQ<58>M_A_DQ<57>M_A_DQ<56>M_A_DQ<55>M_A_DQ<54>M_A_DQ<53>M_A_DQ<52>M_A_DQ<51>M_A_DQ<50>M_A_DQ<49>M_A_DQ<48>M_A_DQ<47>M_A_DQ<46>M_A_DQ<45>M_A_DQ<44>M_A_DQ<43>M_A_DQ<42>M_A_DQ<41>M_A_DQ<40>M_A_DQ<39>M_A_DQ<38>M_A_DQ<37>M_A_DQ<36>M_A_DQ<35>M_A_DQ<34>M_A_DQ<33>M_A_DQ<32>M_A_DQ<31>M_A_DQ<30>M_A_DQ<29>M_A_DQ<28>M_A_DQ<27>M_A_DQ<26>M_A_DQ<25>M_A_DQ<24>M_A_DQ<23>M_A_DQ<22>M_A_DQ<21>M_A_DQ<20>M_A_DQ<19>M_A_DQ<18>M_A_DQ<17>M_A_DQ<16>M_A_DQ<15>M_A_DQ<14>M_A_DQ<13>M_A_DQ<12>M_A_DQ<11>M_A_DQ<10>M_A_DQ<9>M_A_DQ<8>M_A_DQ<7>M_A_DQ<6>M_A_DQ<5>M_A_DQ<4>M_A_DQ<3>M_A_DQ<2>M_A_DQ<1>M_A_DQ<0>
M_A_DQ<63..0>
SA0_DIM0
SA1_DIM0
M_A_DQS1_DP
M_A_DQS5_DPM_A_DQS4_DPM_A_DQS3_DPM_A_DQS2_DP
M_A_DQS6_DP
M_A_DQS1_DN
M_A_DQS7_DP
M_CLK_DDR0_DNM_CLK_DDR1_DP
PCH_3S_SMDATA
PM_EXTTS#1_R
20420325
201914
196195190
13
189185184179178173172168167162
9
161156155151150145144139138134
8
13312812772716665616055
3
54494844
433837323126
2
1126
199
9994938887828176
124123118117112111106105100
75
30
125122
77
G2G1
198
113
200202201197
121114
110
120116
186
188
169
171
152
154
135
137
62
64
45
47
27
29
10
12
232118
194192182180
16
193191183181176174166164177175
6
165163160158148146159157149147
4
1421401321301431411311297068
17
58566967595752504240
15
53514139363424223533
75
187170153136
63462811
7473
104102103101
115
79108109
8589869091929596
7880
1198384
107
9798
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
IN
IN
ININ
OUTOUT
INININ
ININ
INININ
IN
INININ
IN
IN
INININININ
IN
OUTOUT
G2
G1
VTT2
VTT1
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VREF_CA
VREF_DQ
RESET#
EVENT#
NCTEST
NC2
NC1
VDDSPD
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD12
VDD11
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
DQS7#
DQS6#
DQS5#
DQS4#
DQS3#
DQS2#
DQS1#
DQS0#
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
ODT1
ODT0
SDA
SCL
SA1
SA0
WE#
RAS#
CAS#
CKE1
CKE0
CK1#
CK1
CK0#
CK0
S1#
S0#
BA2
BA1
BA0
A15
A14
A13
A12/BC#
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
IN
+
IN
ININ
ININININININ
BI
BI
IN
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
SO-DIMMB SPD ADDRESS IS 0XA4SO-DIMMB TS ADDRESS IS 0X34
CHB
PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN
ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH
NOTE:
1.5A
REFERENCE 4100~4299(DDR)
6839
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
10K_5%_2_DY
63
10K_5%_2
61605958575655
5354
5251
4950
474645
4344
4241403938
34333231
2928272625242322212019181716
15
1314
1112
10
89
765
34
210
1110
9
765
3210
0.1UF_16V_2
10UF_6.3V_3
10UF_6.3V_3
0.1UF_16V_2
10UF_6.3V_3
A3
1UF_6.3V_2
CS
Block Diagram
1UF_6.3V_2
P0V75S
10UF_6.3V_3
353637
4
P3V3S
62
30
1UF_6.3V_2 1UF_6.3V_2
10UF_6.3V_3
48
2.2UF_6.3V_3
P0V75M_VREF
P0V75M_VREF
P3V3S
1UF_6.3V_2
10K_5%_2_DY
2.2UF_6.3V_3
1UF_6.3V_2 1UF_6.3V_2
8
12
151413
10UF_6.3V_3
0.1UF_16V_2
10K_5%_2
BELLW_80001_5021_204P
2.2UF_6.3V_3
P1V5
1UF_6.3V_2
BELLW_80001_5021_204P
CN4101
CN4101
R4108
R4106R4105
R4107
C4145C4144C4143C4142
C4130
C4131
C4129
C4132
C4128
C4133
C4141C4140
C4127C4126C4125
C4137
C4139C4151
C4124
C4138
43B1
43B1
43B1
43B1
43D1
43D1
43A1
43B1
43B1
48A8 38C8
39C8 39C8
43A4
43A4
43A4
43A4
43D1
43D1
43D1
43D1
43B1
43B1
43B1
43B1
43B1
43B1
43B1
43B1
43C1
43C1
43C1
43C1
39A7
39A6
48A8 38C8
43A4
43D4
43B1
43B1
41A5 38C3
38C3 38B5
43A4
M_B_DQ<54>M_B_DQ<53>M_B_DQ<52>M_B_DQ<51>M_B_DQ<50>M_B_DQ<49>
M_B_DQ<63>M_B_DQ<62>M_B_DQ<61>M_B_DQ<60>M_B_DQ<59>M_B_DQ<58>
M_B_DQ<48>
M_B_DQ<46>M_B_DQ<45>
M_B_DQ<43>
M_B_DQS1_DN
M_B_DQS7_DP
M_B_DQS3_DP
M_CLK_DDR3_DPM_CLK_DDR2_DN
M_B_A<15..0>
M_B_DQS2_DPM_B_DQS1_DP
PCH_3S_SMDATA
M_B_DQ<63..0>
M_B_DQS6_DPM_B_DQS5_DPM_B_DQS4_DP
SA1_DIM1SA0_DIM1
M_B_A<1>
M_B_A<15>
M_B_A<2>M_B_A<3>M_B_A<4>M_B_A<5>M_B_A<6>
M_B_BS0M_B_BS1M_B_BS2
M_B_CAS#
M_CLK_DDR2_DP
M_CLK_DDR3_DNM_CKE2M_CKE3
M_B_DQ<0>M_B_DQ<1>
M_B_DQ<10>M_B_DQ<11>M_B_DQ<12>M_B_DQ<13>
M_B_DQ<16>M_B_DQ<17>
M_B_DQ<2>
M_B_DQ<23>M_B_DQ<24>M_B_DQ<25>
M_B_DQ<27>M_B_DQ<28>M_B_DQ<29>
M_B_DQ<3>
M_B_DQ<30>
M_B_DQ<35>M_B_DQ<36>M_B_DQ<37>M_B_DQ<38>M_B_DQ<39>
M_B_DQ<4>
M_B_DQ<40>M_B_DQ<41>M_B_DQ<42>
M_B_DQ<44>
M_B_DQ<47>
M_B_DQ<5>
M_B_DQ<55>M_B_DQ<56>M_B_DQ<57>
M_B_DQ<6>M_B_DQ<7>M_B_DQ<8>M_B_DQ<9>
M_B_DQS0_DN
M_B_DQS3_DNM_B_DQS4_DNM_B_DQS5_DNM_B_DQS6_DNM_B_DQS7_DN
M_B_DQS0_DP
M_ODT2M_ODT3
M_B_RAS#
M_CS#2M_CS#3
SA0_DIM1SA1_DIM1
PCH_3S_SMCLK
M_B_WE#
M_B_A<0>
M_B_DQ<14>M_B_DQ<15>
M_B_A<7>M_B_A<8>M_B_A<9>M_B_A<10>M_B_A<11>M_B_A<12>M_B_A<13>M_B_A<14>
M_B_DQS2_DN
M_B_DQ<34>M_B_DQ<33>M_B_DQ<32>M_B_DQ<31>
M_B_DQ<26>
M_B_DQ<18>M_B_DQ<19>M_B_DQ<20>M_B_DQ<21>M_B_DQ<22>
PM_EXTTS#1_RDDR3_DRAMRST#
204203
25201914
196195190
13
189185184179178173172168167162
9
161156155151150145144139138134
8
13312812772716665616055
3
54494844
433837323126
2
1126
199
9994938887828176
124123118117112111106105100
75
30
125122
77
G2G1
198
113
200202201197
121114
110
120116
188171154137
64472912
186169152135
62452710
232118
194192182180
16
193191183181176174166164177175
6
165163160158148146159157149147
4
1421401321301431411311297068
17
58566967595752504240
15
53514139363424223533
75
187170153136
63462811
7473
104102103101
115
79108109
8589869091929596
7880
1198384
107
9798
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
ININ
ININ
IN
IN
INININININ
INININ
IN
IN
INININININ
ININ
IN
VTT2
VTT1
VSS9
VSS8
VSS7
VSS6
VSS52
VSS51
VSS50
VSS5
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS4
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS3
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS2
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS1
VREF_DQ
VREF_CA
VDDSPD
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD12
VDD11
VDD10
VDD1
RESET#
NCTEST
NC2
NC1
G2
G1
EVENT#
WE#
SDA
SCL
SA1
SA0
S1#
S0#
RAS#
ODT1
ODT0
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
DQS#7
DQS#6
DQS#5
DQS#4
DQS#3
DQS#2
DQS#1
DQS#0
DQ9
DQ8
DQ7
DQ63
DQ62
DQ61
DQ60
DQ6
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ5
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ4
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ3
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ2
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ1
DQ0
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
CKE1
CKE0
CK1#
CK1
CK0#
CK0
CAS#
BA2
BA1
BA0
A9
A8
A7
A6
A5
A4
A3
A2
A15
A14
A13
A12
A11
A10_AP
A1
A0
IN
IN
IN
IN
ININ
OUTOUT
INININ
BI
ININ
OUT
BI
OUT
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
FAN CN
REFERENCE 4300~4349(FAN)
REFERENCE 4411~4449(THERMAL )
6840
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
ENE_P2809A2_SOT23_8P13.3K_1%_2
13.3K_1%_2
100K
_1%
_N
TC
26.7
K_1%
_2
P5V0AL
100K
_1%
_N
TC
26.7
K_1%
_2
P5V0AL
ACES_50273_0047N_001_4P
4.7
UF
_6.3
V_3
10K
_5%
_2
CS
C0402_D
Y
SSM3K7002BFU
CSC0402_DY
100K_5%_2
P5V0AL
0.1
UF
_16V
_2
10K
_5%
_2
TP30
TP30
220pF
_50V
_2
CS
C0402_D
Y
P5V0S
KC_FBM_11_160808_101_T_2P_DY
POWERPAD_2_0610
0.1
UF
_16V
_2
330_5%_2MMBT4401
2M_5%_2
A3 CS
Block Diagram
22U
F_6.3
V_5_D
Y
P3V3S
P3V3S
R4441
R4447
R4446
CN4300
Q4411R4445
TP4301
TP4300
R4413
R4306
R4300
C4305
C4300
C4441
R4442
U4441
R4444
R4443
C4302
C4412
R4414
Q4412
C4301
C4307
PAD4300
L4300
C4306
56D6
56D6
21B6
40B1 15D8
11A4 11C7 49B7
41D5 52C1
15D8 40A8
21B6
THRM_SHUTDWN#
PVCORE_PG
FAN1_PWM
PM_THRMTRIP#
THRM_SHUTDWN#
P5V0S_FAN
FAN_TACH1
21
21
21
G2G1
4321
2
1
3
21
1
1
21
21
21
21
21
21
21
1
6
8
5
7
4
3
2
21
21
21
21
21
EC
B
21
21
21
21
21
G
G
4
3
2
1
G
DS
VCC
TMSNS2
TMSNS1
RHYST2
RHYST1
OT2
OT1
GND
OUT
OUT
IN
IN
IN
B
CEIN
1 2
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
CAD NOTE: ALL DDR_COMP SIGNALS SHOULD BE ROUTED SUCH TAHT
- TRACE WIDTH = 15MILS AND
LOW IN C6/C7
- MAX LENGTH = 500 MILS
(WORST CASE RESISTANCE)
- MB TRACE IMPEDANCE < 68 MOHMS
REFERENCE 4500~4699(CPU)
PLACE CLOSE TO CPT AND NVRAM CONNECTOR
STUFF R4500/R4501
(DEFAULT)NV_CLE
SANDY BRIDGE ONLY
SET TOVCC WHEN HIGH
SET TOVSS WHEN LOW
SANDY BRIDGE/IVY BRIDGE
STUFF R4502
PROCESS STRAP SETTING
DMI&FDI TERMINATIONVOLTAGE
S3 CIRCUIT: DRAM_RST# TO MEMORY SHOULD BE HIGH DURING S3
6841
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
TP30TP30
LOTES_ACA_ZIF_069_P01_989P
0.047UF_16V_2
51_5%_2
1K_5%_2
56_5%_2
1K_5%_2
1.5K_5%_2
130_1%_2
200_5%_2
P1V5S
1K_5%_2
SSM3K7002BFU
750_1%_2
4.99K_1%_2
0_5%_2
62_5%_2
Block Diagram
CSA3
2.2K_5%_2
P1V8S
P1V05S
140_1%_2
25.5_1%_2
200_1%_2
1K_5%_2
1K_5%_2
P1V05S
51_5%_2_DY
51_5%_2
51_5%_2
51_5%_2
TP30
TP30TP30
TP30
TP30
TP30
TP24
TP24
P1V05S
2.2K_5%_2_DY
10K_5%_2
CSC0402_DY
1K_5%_2
P1V5P3V3A
CN4500
Q4600
C4620
R4601
R4604
R4602
R4603
R4600
R1418
R4520
R4519
R4517
R4516
TP4509
TP4506
TP4507TP4508
TP4505TP4504
TP4503TP4502
R4514R4513R4512
R4510R4511
R4505
R4506
R4508
R4507
C4500
R4503
R4504
TP4501
TP4500
R4509
R4501
R4502R4500
38C3
52C1
41D8
40A4
52C2
51A7
45D6 45D8
48D3
11B7 21C3
49B7
41D5
48B3
48B3
41A5
41B2
41B2
41B2
41B2
49B8
41B2
41C1
41C1
41C1
41C1
41C1
21A6 52C2
52B2
49A3
31C6 36B2
39C3
41D2
SM_RCOMP2SM_RCOMP1SM_RCOMP0
PM_DRAM_PWRGD_R
H_SNB_IVB#
H_PM_SYNC
PM_THRMTRIP#
CPU_PROCHOT#_R
H_PECI
CLK_DMI_PCH_DPCLK_DMI_PCH_DN
CPU_DRAMRST#
H_CPUPWRGD
CPU_PROCHOT#
DRAMRST_CNTRL_PCH
DRAMRST_CNTRL
PM_DRAM_PWRGD
H_SNB_IVB#
H_PRDY#H_PREQ#
H_TCKH_TMSH_TRST#
SYS_RESET#
H_TDIH_TDO
H_TMS
H_TCK
H_TDI
H_PREQ#
H_TRST#
NV_CLE
PLT_RST#
DDR3_DRAMRST#
CPU_DRAMRST#
AP33
AP30AR27
AN32
AP26AR28
AR26
A4A5AK1
R8
V8
AN34
AR33
AL32
C26
AP27AP29
AM34
AN33
A15A16
AL35
AL33
AR32AT31AR31AP32AT30AR30AR29AT28
A27A28
2
1
3
21
21
21
21
21
21
21
21
21
21
21
1
1
11
11
11
212121
2121
21
21
21
21
21
21
21
1
1
21
21
212
1
JTA
G &
BP
MM
ISC
DD
R3
PW
R M
AN
AG
EM
EN
TT
HE
RM
AL
MIS
C
CLO
CK
S
UNCOREPWRGOOD
PROC_SELECT#
SKTOCC#
PM_SYNC
BPM#[7]
BPM#[6]
BPM#[5]
BPM#[4]
BPM#[3]
BPM#[2]
BPM#[1]
BPM#[0]
DBR#
TDO
TDI
TRST#
TMS
TCK
PREQ#
PRDY#
RESET#
SM_DRAMPWROK
THERMTRIP#
PROCHOT#
PECI
CATERR#
DPLL_REF_CLK
DPLL_REF_CLK#
BCLK
BCLK#
SM_RCOMP[0]
SM_DRAMRST#
SM_RCOMP[2]
SM_RCOMP[1]
G
DS
OUTOUT
IN
IN
IN
IN
IN
IN
IN
OUT
OUTIN
INININ
INOUT
OUT
ININ
IN
OUT
IN
IN
BI
OUT
OUT
OUT
OUT
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
SHOULD BE SHORTED NEAR BALLS AND ROUTED WITH
- TYPICAL IMPEDANCE < 25 MOHMS
CAD NOTE: DP_COMPIO AND ICOMPO SIGNALS
- TYPICAL IMPEDANCE = 43 MOHMS
REFERENCE 4500~4699(CPU)
- TYPICAL IMPEDANCE = 14.5 MOHMS
- MAX LENGTH = 500 MILS
PEG_ICOMPO SIGNALS SHOULD BE ROUTED WITH
- MAX LENGTH = 500 MILS
SHOULD BE SHORTED AND ROUTED WITH
CAD NOTE: PEG_ICOMPI AND RCOMPO SIGNALS
CLOSE TO CPU
6842
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
LOTES_ACA_ZIF_069_P01_989P
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
0.22UF_6.3V_1
P1V05S
24.9_1%_2
Block Diagram
CSA3
P1V05S
24.9_1%_2
CN4500
C4604
C4605
C4606
C4607
C4608
C4609
C4610
C4611
C4596
C4597
C4598
C4599
C4600
C4601
C4602
C4603
C4595
C4594
C4593
C4592
C4591
C4590
C4589
C4588
C4584
C4585
C4586
C4587
C4583
C4582
C4581
C4580
R4522
R4521
49C6
57B1
57B1
57B1
42C4
42B4
42C4
42A4
42B4
42C4
42B4
42B4
42B4
42B4
42B4
42B4
42B4
42B4
42B4
57C6
57D6
42B4
42B4
57B1
57B1
57B1
57C1
57C1
57C1
57D1
57C1
57D1
57D1
57D1
42D3
42D3
42D3
42A3
57B6
42B4 57B6
42B4 57B6
42B4 57B6
42B4 57B6
42B4
42B4 57C6
42B4 57C6
42B4 57C6
42A4 57C6
42A4 57D6
42A4 57D6
42A4 57D6
42A4 57D6
57D6
57D6
57C6
57C6
57C6
57B6
57B6
57B6
57B6
57B6
57C6
57C6
57C6
57D6
57D6
57D6
57D6
42B4
42B3
42B3
42C3
42C3
42C3
49D3
49D3
49D3
49D3
49C3
49C3
49C3
57B1
57B1
57C1
57C1
57C1
57C1
57C1
57C1
42A4
57D1
57D1
57D1
57D1
57B1
57D1
57B1
57C1
57D1
57D1
42C3
42C3
42C3
42C3
42C3
42C3
42C3
42C3
42A3
42A3
42A3
42A3
42B3
42A3
42B3
42B3
42B3
42B3
42B3
42B3
42B3
42B3
42B3
49D6
49D6
49D6
49C6
49C6
49C6
49C6
49D6
49D6
49D6
49D6
49D3
49D6
49D6
49D6
49D6
49D3
49D3
49D3
49D3
49D3
49D3
49D3
49C3
49C3
49C3
49C3
49C3
49C3
P1V0S_VCCP_PEG_ICOMPI
DMI_RX3_DP
P1V0S_VCCP_EDP_COMPIO
DMI_TX2_DN
PEG_TX0_DPPEG_TX1_DPPEG_TX2_DPPEG_TX3_DPPEG_TX4_DPPEG_TX5_DPPEG_TX6_DPPEG_TX7_DPPEG_TX8_DPPEG_TX9_DPPEG_TX10_DPPEG_TX11_DPPEG_TX12_DPPEG_TX13_DPPEG_TX14_DPPEG_TX15_DP
PEG_TX0_DNPEG_TX1_DNPEG_TX2_DNPEG_TX3_DNPEG_TX4_DNPEG_TX5_DNPEG_TX6_DNPEG_TX7_DNPEG_TX8_DNPEG_TX9_DNPEG_TX10_DNPEG_TX11_DNPEG_TX12_DNPEG_TX13_DNPEG_TX14_DNPEG_TX15_DN
PEG_C_RX0_DPPEG_C_RX1_DPPEG_C_RX2_DPPEG_C_RX3_DPPEG_C_RX4_DPPEG_C_RX5_DPPEG_C_RX6_DPPEG_C_RX7_DPPEG_C_RX8_DPPEG_C_RX9_DPPEG_C_RX10_DPPEG_C_RX11_DPPEG_C_RX12_DPPEG_C_RX13_DPPEG_C_RX14_DPPEG_C_RX15_DP
PEG_C_RX0_DNPEG_C_RX1_DNPEG_C_RX2_DNPEG_C_RX3_DNPEG_C_RX4_DNPEG_C_RX5_DNPEG_C_RX6_DNPEG_C_RX7_DNPEG_C_RX8_DNPEG_C_RX9_DNPEG_C_RX10_DNPEG_C_RX11_DNPEG_C_RX12_DNPEG_C_RX13_DNPEG_C_RX14_DNPEG_C_RX15_DN
FDI_LSYNC1FDI_LSYNC0
FDI_INT
FDI_FSYNC1FDI_FSYNC0
FDI_TX7_DPFDI_TX6_DPFDI_TX5_DPFDI_TX4_DPFDI_TX3_DPFDI_TX2_DPFDI_TX1_DPFDI_TX0_DP
FDI_TX7_DNFDI_TX6_DNFDI_TX5_DNFDI_TX4_DNFDI_TX3_DNFDI_TX2_DNFDI_TX1_DNFDI_TX0_DN
DMI_RX2_DPDMI_RX1_DPDMI_RX0_DP
DMI_RX3_DNDMI_RX2_DNDMI_RX1_DNDMI_RX0_DN
DMI_TX3_DPDMI_TX2_DPDMI_TX1_DPDMI_TX0_DP
DMI_TX3_DN
DMI_TX1_DNDMI_TX0_DN
PEG_TX13_DN
PEG_TX12_DN
PEG_TX14_DN
PEG_TX0_DP
PEG_TX15_DP
PEG_TX15_DN
PEG_TX4_DN
PEG_TX11_DN
PEG_TX10_DN
PEG_TX9_DN
PEG_TX8_DN
PEG_TX7_DN
PEG_TX6_DN
PEG_TX5_DN
PEG_TX3_DN
PEG_C_TX10_DP
PEG_C_TX0_DN
PEG_TX1_DN
PEG_TX2_DN
PEG_C_TX15_DP
PEG_TX14_DP PEG_C_TX14_DP
PEG_TX13_DP PEG_C_TX13_DP
PEG_TX12_DP PEG_C_TX12_DP
PEG_TX11_DP PEG_C_TX11_DP
PEG_TX10_DP
PEG_TX9_DP PEG_C_TX9_DP
PEG_TX8_DP PEG_C_TX8_DP
PEG_TX7_DP PEG_C_TX7_DP
PEG_TX6_DP PEG_C_TX6_DP
PEG_TX5_DP PEG_C_TX5_DP
PEG_TX4_DP PEG_C_TX4_DP
PEG_TX3_DP PEG_C_TX3_DP
PEG_TX2_DP PEG_C_TX2_DP
PEG_C_TX1_DP
PEG_C_TX0_DP
PEG_C_TX8_DN
PEG_C_TX9_DN
PEG_C_TX10_DN
PEG_C_TX11_DN
PEG_C_TX12_DN
PEG_C_TX13_DN
PEG_C_TX14_DN
PEG_C_TX15_DN
PEG_C_TX7_DN
PEG_C_TX6_DN
PEG_C_TX5_DN
PEG_C_TX4_DN
PEG_C_TX3_DN
PEG_C_TX2_DN
PEG_C_TX1_DN
PEG_TX0_DN
PEG_TX1_DP
E25F26D28F27E29G27H29J28J30K28K31L29L32M31M32M29
D25E26D27F28E28G28H28J27J29K27K30L28L31M30M33M28
C32B33D31D33E32E34F35G30G33H31H34J32J35L34M35K33
B32C33E31D34F32E33E35F30F33G31G34H32H35K34L35J33
H22J21J22
H20
E17D18C20B21
F17D19C19B20
H17
J17
F18E19H19A21
G18E20G19A22
J19
J18
F15D16E16C18
G15C16F16C17
A17B16
A18
D15C15
D21F21E22G21
C21F20D22G22
B24A25B25B27
B23A24B26B28
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
OUTOUTOUTOUTOUTOUTOUTOUTOUT
OUTOUTOUTOUTOUTOUTOUTOUT
OUTOUT
OUTOUTOUTOUTOUTOUT
OUTOUTOUTOUTOUTOUTOUT
OUTOUT
OUTOUT
OUT
OUTOUT
OUT
OUTOUT
OUTOUT
OUTOUT
OUTOUT
OUTOUTOUTOUT
OUT
OUTOUT
OUT
ININ
IN
ININ
OUT
eD
PIn
tel(R
) F
DI
DM
I
PC
I E
XP
RE
SS
* -
GR
AP
HIC
S
eDP_ICOMPO
eDP_HPD
eDP_COMPIO
eDP_TX#[3]
eDP_TX#[2]
eDP_TX#[1]
eDP_TX#[0]
eDP_TX[3]
eDP_TX[2]
eDP_TX[1]
eDP_TX[0]
eDP_AUX#
eDP_AUX
PEG_TX[15]
PEG_TX[14]
PEG_TX[13]
PEG_TX[12]
PEG_TX[11]
PEG_TX[10]
PEG_TX[9]
PEG_TX[8]
PEG_TX[7]
PEG_TX[6]
PEG_TX[5]
PEG_TX[4]
PEG_TX[3]
PEG_TX[2]
PEG_TX[1]
PEG_TX[0]
PEG_TX#[15]
PEG_TX#[14]
PEG_TX#[13]
PEG_TX#[12]
PEG_TX#[11]
PEG_TX#[10]
PEG_TX#[9]
PEG_TX#[8]
PEG_TX#[7]
PEG_TX#[6]
PEG_TX#[5]
PEG_TX#[4]
PEG_TX#[3]
PEG_TX#[2]
PEG_TX#[1]
PEG_TX#[0]
PEG_RX[15]
PEG_RX[14]
PEG_RX[13]
PEG_RX[12]
PEG_RX[11]
PEG_RX[10]
PEG_RX[9]
PEG_RX[8]
PEG_RX[7]
PEG_RX[6]
PEG_RX[5]
PEG_RX[4]
PEG_RX[3]
PEG_RX[2]
PEG_RX[1]
PEG_RX[0]
PEG_RX#[15]
PEG_RX#[14]
PEG_RX#[13]
PEG_RX#[12]
PEG_RX#[11]
PEG_RX#[10]
PEG_RX#[9]
PEG_RX#[8]
PEG_RX#[7]
PEG_RX#[6]
PEG_RX#[5]
PEG_RX#[4]
PEG_RX#[3]
PEG_RX#[2]
PEG_RX#[1]
PEG_RX#[0]
PEG_RCOMPO
PEG_ICOMPO
PEG_ICOMPI
FDI1_LSYNC
FDI0_LSYNC
FDI_INT
FDI1_FSYNC
FDI0_FSYNC
FDI1_TX[3]
FDI1_TX[2]
FDI1_TX[1]
FDI1_TX[0]
FDI0_TX[3]
FDI0_TX[2]
FDI0_TX[1]
FDI0_TX[0]
FDI1_TX#[3]
FDI1_TX#[2]
FDI1_TX#[1]
FDI1_TX#[0]
FDI0_TX#[3]
FDI0_TX#[2]
FDI0_TX#[1]
FDI0_TX#[0]
DMI_TX[2]
DMI_TX[3]
DMI_TX[1]
DMI_TX[0]
DMI_TX#[3]
DMI_TX#[2]
DMI_TX#[1]
DMI_TX#[0]
DMI_RX[3]
DMI_RX[2]
DMI_RX[1]
DMI_RX[0]
DMI_RX#[3]
DMI_RX#[2]
DMI_RX#[1]
DMI_RX#[0]
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
ININ
INININ
IN
ININININ
INININ
ININ
ININININ
INININ
IN
INININ
INININININ
OUTOUTOUTOUTOUTOUTOUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 4500~4699(CPU)
SOCKET,CPU,989P,TIN,3.0MM,STR,SMD,TR
6843
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
LOTES_ACA_ZIF_069_P01_989P
151413121110
987654321
636261
45
43
41403938373635343332313029282726252423222120
1413
11
A3 CS
Block Diagram
109876
2
5
44
42
12
575859
56
52535455
51
47484950
46
60
18171615
43
1
0
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
19
0
15
1314
12
1011
9
23
01
87654
LOTES_ACA_ZIF_069_P01_989P
CN4500
CN4500
39B8
38D8
38B8
38B8
38B8
38B8
38C8
38D8
38C8
39C8
39C8
39C8
39C8
38B8
38B8
38B8
38B8
38B8
38B8
38B8
38B8
38B8
38B8
38B8
38C8
39D8
39D8
38B8
38C8
38C8
38C8
38C8
38C8
38D5
38D8
38D8
38D8
38C8
38C8
38C8
38C8
39D5
39C8
39C8
39C8
39C8
39B8
39B8
39B8
39B8
39B8
39B8
39B8
39B8
39B8
39B8
39C8
39C8
39C8
39C8
39B8
39B8
39B8
39C8
39C8
39B8
39B8
M_A_DQ<6>
M_B_DQS4_DNM_B_DQS5_DNM_B_DQS6_DN
M_B_DQS3_DNM_B_DQS2_DNM_B_DQS1_DN
M_B_DQS7_DN
M_B_DQS0_DP
M_B_DQ<27>M_B_DQ<26>
M_B_DQ<31>M_B_DQ<32>
M_B_DQ<30>M_B_DQ<29>M_B_DQ<28>
M_B_DQ<55>M_B_DQ<54>M_B_DQ<53>
M_B_DQ<51>
M_B_A<1>
M_B_DQ<56>
M_A_DQ<63>M_A_DQ<62>M_A_DQ<61>M_A_DQ<60>M_A_DQ<59>M_A_DQ<58>M_A_DQ<57>M_A_DQ<56>M_A_DQ<55>M_A_DQ<54>M_A_DQ<53>M_A_DQ<52>M_A_DQ<51>M_A_DQ<50>M_A_DQ<49>M_A_DQ<48>M_A_DQ<47>M_A_DQ<46>M_A_DQ<45>M_A_DQ<44>M_A_DQ<43>M_A_DQ<42>M_A_DQ<41>M_A_DQ<40>M_A_DQ<39>M_A_DQ<38>M_A_DQ<37>M_A_DQ<36>M_A_DQ<35>M_A_DQ<34>M_A_DQ<33>M_A_DQ<32>M_A_DQ<31>M_A_DQ<30>M_A_DQ<29>M_A_DQ<28>M_A_DQ<27>M_A_DQ<26>M_A_DQ<25>M_A_DQ<24>M_A_DQ<23>M_A_DQ<22>M_A_DQ<21>M_A_DQ<20>M_A_DQ<19>M_A_DQ<18>M_A_DQ<17>M_A_DQ<16>M_A_DQ<15>M_A_DQ<14>M_A_DQ<13>M_A_DQ<12>M_A_DQ<11>M_A_DQ<10>M_A_DQ<9>M_A_DQ<8>M_A_DQ<7>
M_A_DQ<5>M_A_DQ<4>M_A_DQ<3>M_A_DQ<2>M_A_DQ<1>M_A_DQ<0>
M_A_A<15>M_A_A<14>M_A_A<13>M_A_A<12>M_A_A<11>M_A_A<10>M_A_A<9>M_A_A<8>M_A_A<7>M_A_A<6>M_A_A<5>M_A_A<4>M_A_A<3>M_A_A<2>M_A_A<1>M_A_A<0>
M_A_DQS7_DN
M_A_DQS7_DP
M_A_DQS6_DN
M_A_DQS6_DP
M_A_DQS5_DN
M_A_DQS5_DP
M_A_DQS4_DN
M_A_DQS4_DP
M_A_DQS3_DN
M_A_DQS3_DP
M_A_DQS2_DN
M_A_DQS2_DP
M_A_DQS1_DN
M_A_DQS1_DP
M_A_DQS0_DN
M_A_DQS0_DP
M_ODT1M_ODT0
M_CS#1M_CS#0
M_CKE1
M_CKE0
M_CLK_DDR1_DN
M_CLK_DDR0_DN
M_CLK_DDR1_DP
M_CLK_DDR0_DP
M_A_WE#M_A_RAS#M_A_CAS#
M_A_BS2M_A_BS1M_A_BS0
M_A_A<15..0>
M_B_DQ<63..0>
M_B_A<15..0>
M_B_BS0M_B_BS1M_B_BS2
M_B_CAS#M_B_RAS#M_B_WE#
M_B_DQ<0>M_B_DQ<1>M_B_DQ<2>M_B_DQ<3>M_B_DQ<4>M_B_DQ<5>M_B_DQ<6>M_B_DQ<7>M_B_DQ<8>M_B_DQ<9>M_B_DQ<10>M_B_DQ<11>M_B_DQ<12>M_B_DQ<13>M_B_DQ<14>M_B_DQ<15>M_B_DQ<16>M_B_DQ<17>M_B_DQ<18>M_B_DQ<19>M_B_DQ<20>M_B_DQ<21>M_B_DQ<22>M_B_DQ<23>M_B_DQ<24>M_B_DQ<25>
M_B_DQ<33>M_B_DQ<34>M_B_DQ<35>M_B_DQ<36>M_B_DQ<37>M_B_DQ<38>M_B_DQ<39>M_B_DQ<40>M_B_DQ<41>M_B_DQ<42>M_B_DQ<43>M_B_DQ<44>M_B_DQ<45>M_B_DQ<46>M_B_DQ<47>M_B_DQ<48>M_B_DQ<49>M_B_DQ<50>
M_B_DQ<52>
M_B_DQ<57>M_B_DQ<58>M_B_DQ<59>M_B_DQ<60>M_B_DQ<61>M_B_DQ<62>M_B_DQ<63>
M_CLK_DDR2_DP
M_CLK_DDR3_DP
M_CLK_DDR2_DN
M_CLK_DDR3_DN
M_CKE2
M_CKE3
M_ODT2M_ODT3
M_B_DQS4_DPM_B_DQS5_DPM_B_DQS6_DPM_B_DQS7_DP
M_B_DQS0_DN
M_B_DQS1_DPM_B_DQS2_DPM_B_DQS3_DP
M_B_A<0>
M_B_A<2>M_B_A<3>M_B_A<4>M_B_A<5>M_B_A<6>M_B_A<7>M_B_A<8>M_B_A<9>M_B_A<10>M_B_A<11>M_B_A<12>M_B_A<13>M_B_A<14>M_B_A<15>
M_CS#2M_CS#3
M_A_DQ<63..0>
AF9AD9
AG3AH3
V7V5AF8W4V4AD8W5V1W6W3V2V3W7W2W1AD10
AM15AR12AM8AL6M6J3G6C4
AM14AR11AM9AL5N6K3F6D4
AH15AJ15AK14AL14AK15AL15AH14AJ14AN12AP12AL11AM11AM12AL12AN11AP11
AL8AL9AH9AH8AK9AJ9AK8AJ8AJ6AJ5AH6AH5AK5AK6AG5AG6
M7N9M9
M10N7N8
N10M8K2J2J4J5J1K1K5K4G7G8F7F9G9
G10F8
F10C3C2C6D6D2D3D5C5
AL3AK3
AB5
AA6
AA5
AB6
V10
V9
AE8
V6AF10AE10
AH2AG2
AH1AG1
W10AA3AB3
W9AA4AB4
AB9AB8
AD4AE4
R4R5AB10T1R1AB7R3T5R2T3T4T2T6R7T7AA8
AP15AK12AP9AN5N3K6F3D7
AP14AK11AP8AN6M3J6G3C7
AT15AR15AN15AT12AT14AR14AN14AT11AH12AJ12
AR8AH11
AT9AT8
AJ11AR9AR5AR6AN8AP6AT6AT5AN9AP5AP2AN1AN2AN3AP3AR3AM6AM5
M1M2N5M4N1N2N4M5K7K8
J10J9K9
K10J8J7G2F2F5G5G1F1F4G4D8D9A8A9C8
D10A7C9
AE3AD3
AD1
AD2
AE1
AE2
R10
R9
AA10
R6AA7AA9
AE5AD5
AE6AD6
T10AB1AA1
T9AA2AB2
BIBI
DD
R S
YS
TE
M M
EM
OR
Y A
RSVD_TP[10]
RSVD_TP[9]
RSVD_TP[8]
RSVD_TP[7]
RSVD_TP[6]
RSVD_TP[3]
RSVD_TP[5]
RSVD_TP[4]
RSVD_TP[2]
RSVD_TP[1]
SA_DQ[63]
SA_DQ[62]
SA_DQ[61]
SA_DQ[60]
SA_DQ[59]
SA_DQ[58]
SA_DQ[57]
SA_DQ[56]
SA_DQ[55]
SA_DQ[54]
SA_DQ[53]
SA_DQ[52]
SA_DQ[51]
SA_DQ[50]
SA_DQ[49]
SA_DQ[48]
SA_DQ[47]
SA_DQ[46]
SA_DQ[45]
SA_DQ[44]
SA_DQ[43]
SA_DQ[42]
SA_DQ[41]
SA_DQ[40]
SA_DQ[39]
SA_DQ[38]
SA_DQ[37]
SA_DQ[36]
SA_DQ[35]
SA_DQ[34]
SA_DQ[33]
SA_DQ[32]
SA_DQ[31]
SA_DQ[30]
SA_DQ[29]
SA_DQ[28]
SA_DQ[27]
SA_DQ[26]
SA_DQ[25]
SA_DQ[24]
SA_DQ[23]
SA_DQ[22]
SA_DQ[21]
SA_DQ[20]
SA_DQ[19]
SA_DQ[18]
SA_DQ[17]
SA_DQ[16]
SA_DQ[15]
SA_DQ[14]
SA_DQ[13]
SA_DQ[12]
SA_DQ[11]
SA_DQ[10]
SA_DQ[9]
SA_DQ[8]
SA_DQ[7]
SA_DQ[6]
SA_DQ[5]
SA_DQ[4]
SA_DQ[3]
SA_DQ[2]
SA_DQ[1]
SA_DQ[0]
SA_MA[15]
SA_MA[14]
SA_MA[13]
SA_MA[12]
SA_MA[11]
SA_MA[10]
SA_MA[9]
SA_MA[8]
SA_MA[7]
SA_MA[6]
SA_MA[5]
SA_MA[4]
SA_MA[3]
SA_MA[2]
SA_MA[1]
SA_MA[0]
SA_DQS#[7]
SA_DQS[7]
SA_DQS#[6]
SA_DQS[6]
SA_DQS#[5]
SA_DQS[5]
SA_DQS#[4]
SA_DQS[4]
SA_DQS#[3]
SA_DQS[3]
SA_DQS#[2]
SA_DQS[2]
SA_DQS#[1]
SA_DQS[1]
SA_DQS#[0]
SA_DQS[0]
SA_ODT[1]
SA_ODT[0]
SA_CS#[1]
SA_CS#[0]
SA_CKE[1]
SA_CKE[0]
SA_CLK#[1]
SA_CLK#[0]
SA_CLK[1]
SA_CLK[0]
SA_WE#
SA_RAS#
SA_CAS#
SA_BS[2]
SA_BS[1]
SA_BS[0]
DD
R S
YS
TE
M M
EM
OR
Y B
RSVD_TP[20]
RSVD_TP[19]
RSVD_TP[18]
RSVD_TP[17]
SB_CS#[1]
SB_CS#[0]
RSVD_TP[16]
RSVD_TP[15]
RSVD_TP[14]
RSVD_TP[13]
RSVD_TP[12]
RSVD_TP[11]
SB_DQ[63]
SB_DQ[62]
SB_DQ[61]
SB_DQ[60]
SB_DQ[59]
SB_DQ[58]
SB_DQ[57]
SB_DQ[56]
SB_DQ[55]
SB_DQ[54]
SB_DQ[53]
SB_DQ[52]
SB_DQ[51]
SB_DQ[50]
SB_DQ[49]
SB_DQ[48]
SB_DQ[47]
SB_DQ[46]
SB_DQ[45]
SB_DQ[44]
SB_DQ[43]
SB_DQ[42]
SB_DQ[41]
SB_DQ[40]
SB_DQ[39]
SB_DQ[38]
SB_DQ[37]
SB_DQ[36]
SB_DQ[35]
SB_DQ[34]
SB_DQ[33]
SB_DQ[32]
SB_DQ[31]
SB_DQ[30]
SB_DQ[29]
SB_DQ[28]
SB_DQ[27]
SB_DQ[26]
SB_DQ[25]
SB_DQ[24]
SB_DQ[23]
SB_DQ[22]
SB_DQ[21]
SB_DQ[20]
SB_DQ[19]
SB_DQ[18]
SB_DQ[17]
SB_DQ[16]
SB_DQ[15]
SB_DQ[14]
SB_DQ[13]
SB_DQ[12]
SB_DQ[11]
SB_DQ[10]
SB_DQ[9]
SB_DQ[8]
SB_DQ[7]
SB_DQ[6]
SB_DQ[5]
SB_DQ[4]
SB_DQ[3]
SB_DQ[2]
SB_DQ[1]
SB_DQ[0]
SB_MA[15]
SB_MA[14]
SB_MA[13]
SB_MA[12]
SB_MA[11]
SB_MA[10]
SB_MA[9]
SB_MA[8]
SB_MA[7]
SB_MA[6]
SB_MA[5]
SB_MA[4]
SB_MA[3]
SB_MA[2]
SB_MA[1]
SB_MA[0]
SB_DQS#[3]
SB_DQS[3]
SB_DQS#[2]
SB_DQS[2]
SB_DQS#[1]
SB_DQS[1]
SB_DQS#[0]
SB_DQS[0]
SB_DQS#[7]
SB_DQS[7]
SB_DQS#[6]
SB_DQS[6]
SB_DQS#[5]
SB_DQS[5]
SB_DQS#[4]
SB_DQS[4]
SB_ODT[1]
SB_ODT[0]
SB_CKE[1]
SB_CKE[0]
SB_CLK#[1]
SB_CLK#[0]
SB_CLK[1]
SB_CLK[0]
SB_WE#
SB_RAS#
SB_CAS#
SB_BS[2]
SB_BS[1]
SB_BS[0]
OUT
OUTOUT
OUTOUT
OUTOUTOUTOUT
OUTOUT
OUT
OUTOUT
OUTOUTOUT
OUTOUT
OUTOUT
OUTOUTOUT
OUTOUTOUT
OUTOUT
OUTOUT
OUTOUTOUT
OUTOUTOUT
OUTOUTOUT
OUTOUTOUT
OUTOUT
OUTOUT
OUTOUT
OUT
OUTOUTOUT
OUTOUTOUT
OUTOUTOUT
OUT
OUTOUTOUT
OUTOUTOUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 4500~4699(CPU)
SVID SIGNAL TO VR
PLACE CLOSE TO CPU
44
MODEL,PROJECT,FUNCTION
X01
68XXX 21-OCT-2002
1310xxxxx-0-0
LOTES_ACA_ZIF_069_P01_989P
100_1%_2
0_5%_243_5%_2
P1V05S
75_5%_2130_1%_2
PVCORE
P1V05S
10_1%_2
10_1%_2
100_1%_2
0_5%_2
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_5
P1V05S
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_5
22U
F_6.3
V_522UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
CSC
Block Diagram
22UF_6.3V_5 22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5 22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5 22UF_6.3V_5
PVCORE
22UF_6.3V_5 22UF_6.3V_5
CN4500
R4535
R4534
R4533
R4532
R4527R4528
R4531R4530R4529
C4542
C4541
C4540
C4535
C4536
C4537
C4533
C4534
C4531
C4532
C4522 C4523 C4524 C4525
C4518 C4519 C4520 C4521
C4514 C4515 C4516 C4517
C4513C4512C4511C4510
11D6
11D6
11A3 11C7
11C7
9B7
9B7
11A3 11C7
VCCSENSE
H_CPU_SVIDDATH_CPU_SVIDCLKH_CPU_SVIDALRT#
VR_SVID_DATAVR_SVID_CLKVR_SVID_ALERT#
VCC_SENSE_VCCIOVSS_SENSE_VCCIO
VSSSENSE
A10
AJ34
AJ28AJ30AJ29
B10
J14L10P10U10Y10
J23
AC10
A11A12A13A14B12B14C11C12C13C14
AG10
D11D12D13D14E11
E12E14F11F12F13
AH10
F14G12G13G14H11H12H14J11J12J13
AH13
AJ35
P27P28P29P30P31P32P33P34P35R26
AG27
R27R28R29R30R31R32R33R34R35U26
AG28
U27U28U29U30U31U32U33U34U35V26
AG29
V27V28V29V30V31V32V33V34V35Y26
AG30
Y27Y28Y29Y30Y31Y32Y33Y34Y35
AA26
AG31
AA27AA28AA29AA30AA31AA32AA33AA34AA35AC26
AG32
AC27AC28AC29AC30AC31AC32AC33AC34AC35AD26
AG33
AD27AD28AD29AD30AD31AD32AD33AD34AD35AF26
AG34
AF27AF28AF29AF30AF31AF32AF33AF34AF35
P26
AG26
AG35
21
21
21
21
21
21
212121
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
SV
IDS
EN
SE
LIN
ES
PE
G A
ND
DD
R
CO
RE
SU
PP
LY
POWER
VCCIO40
VCCIO_SENSE
VCCIO31
VCCIO30
VCCIO29
VCCIO28
VCCIO27
VCCIO26
VCCIO39
VCCIO38
VCCIO37
VCCIO36
VCCIO35
VCCIO34
VCCIO33
VCCIO32
VCCIO25
VCCIO17
VCCIO16
VCCIO15
VCCIO14
VCCIO13
VCCIO11
VCCIO10
VCCIO9
VCCIO8
VCCIO7
VCCIO6
VCCIO5
VCCIO4
VCCIO3
VCCIO2
VCCIO24
VCCIO23
VCCIO22
VCCIO21
VCCIO20
VCCIO19
VCCIO18
VCCIO12
VCCIO1
VCC100
VCC99
VCC98
VCC97
VCC96
VCC95
VCC94
VCC93
VCC92
VCC91
VCC90
VCC89
VCC88
VCC87
VCC86
VCC85
VCC84
VCC83
VCC82
VCC81
VCC80
VCC79
VCC78
VCC77
VCC76
VCC75
VCC74
VCC73
VCC72
VCC71
VCC70
VCC69
VCC68
VCC67
VCC66
VCC65
VCC64
VCC63
VCC62
VCC61
VCC60
VCC59
VCC58
VCC57
VCC56
VCC55
VCC54
VCC53
VCC52
VCC51
VCC50
VCC49
VCC48
VCC47
VCC46
VCC45
VCC44
VCC43
VCC42
VCC41
VCC40
VCC39
VCC38
VCC37
VCC36
VCC35
VCC34
VCC33
VCC32
VCC31
VCC30
VCC29
VCC28
VCC27
VCC26
VCC25
VCC24
VCC23
VCC22
VCC21
VCC20
VCC19
VCC18
VCC17
VCC16
VCC15
VCC14
VCC13
VCC12
VCC11
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
VSSIO_SENSE
VIDSOUT
VIDSCLK
VIDALERT#
VSS_SENSE
VCC_SENSE
OUTOUT
OUTOUT
OUTOUTOUT
DOC.NUMBER
of
INVENTECTITLE
DATE
CODE
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
FF
8
CHANGE by
8
REV
2 1
SHEET
SIZE
ROUTE WITH MIN. TRACE WIDTH OF 10 MILS
PROCESSOR DRIVEN VREF PATH WAS STUFFED BY DEFAULT:
5A
1.2A
IVB:1K OHM
SNB:0 OHM
R4547
NOTE : DDR_WR_VREF SHOULD HAVE 20/20 MIL WHEREVER POSSIBLE
6845
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
1UF_6.3V_210UF_6.3V_3
100UF_6.3V
1UF_6.3V_2
22UF_6.3V_5
AM2302N
PVSA
10UF_6.3V_3
A3 CS
Block Diagram
10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
470PF_50V_2
220UF_2.5V
AM2302N
PVAXG0_5%_2
AM2302N
P0V75M_VREF P0V75M_VREF_H
P1V5S
100K_5%_2
PVAXG
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5
MPZ1608S221AT
P1V8S
P0V75M_VREF_H
22UF_6.3V_5 22UF_6.3V_5
P0V75M_VREFP0V75M_VREF
PVSA
10UF_6.3V_3
10UF_6.3V_310UF_6.3V_3
10_1%_2
10_1%_2
10UF_6.3V_3 10UF_6.3V_3
100_5%_2
1K_5%_2 1K_5%_2
22UF_6.3V_5
LOTES_ACA_ZIF_069_P01_989P
CN4500
R4547R4556
R4540
R4539
C4577
R4544
C4578
R4541
R4538
Q4500
Q4502Q4501
L4500
C4573
C4576C4575C4574
C4572C4571C4570C4569C4568C4567
C4562 C4563 C4564C4565
C4651 C4545 C4550C4546 C4547 C4548 C4549
21D6 14D2 14B8
46C4
45D6 41A8
46C4
11B8
11B8
45D8 41A8
14A6 13A2 13D2
10B4
10B4
10C4
49A1 SLP_S3#_3R
CPUDDR_WR_VREF1
DRAMRST_CNTRL
CPUDDR_WR_VREF2
DRAMRST_CNTRL
GFX_VSS_SENSEGFX_VCC_SENSE
VCCSA_SENSE
VCCSA_VID1VCCSA_VID0
P1V8S_VCCPLL
AK34
Y1Y4Y7AC1AC4AC7AF1AF4
P1P4P7U1U4U7
AF7
C24
H23
H25H26J24J25J26L26M26M27
A2A6B6
AK35
AR21AR23AR24AT17
AH17AH18AH20AH21AH23
AT18
AH24AJ17AJ18AJ20AJ21AJ23AJ24AK17AK18AK20
AT20
AK21AK23AK24AL17AL18AL20AL21AL23AL24AM17
AT21
AM18AM20AM21AM23AM24AN17AN18AN20AN21AN23
AT23
AN24AP17AP18AP20AP21AP23AP24AR17AR18AR20
AT24
AL1
C22
21
21
21
21
21
21
21
21
21
2
1
32
1
32
1
3
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
OUTOUT
OUT
OUTOUT
IN
IN
ININ
IN
G
D S
G
DS
G
DS
+
MIS
CV
RE
FS
A R
AIL
1.8
V R
AIL
LIN
ES
SE
NS
ED
DR
3 -
1.5
V R
AIL
S
GR
AP
HIC
S
POWER
FC_C22
VCCPLL3
VCCSA_VID1
VCCSA_SENSE
VCCSA8
VCCSA7
VCCSA6
VCCSA5
VCCSA4
VCCSA3
VCCSA2
VCCSA1
VCCPLL2
VCCPLL1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ15
VDDQ14
VDDQ13
VDDQ12
VDDQ11
VAXG54
VAXG53
VAXG52
VAXG51
VAXG50
VAXG49
VAXG48
VAXG47
VAXG46
VAXG45
VAXG44
VAXG43
VAXG42
VAXG41
VAXG40
VAXG39
VAXG38
VAXG37
VAXG36
VAXG35
VAXG34
VAXG33
VAXG32
VAXG31
VAXG30
VAXG29
VAXG28
VAXG27
VAXG26
VAXG25
VAXG24
VAXG23
VAXG22
VAXG21
VAXG20
VAXG19
VAXG18
VAXG17
VAXG16
VAXG15
VAXG14
VAXG13
VAXG12
VAXG11
VAXG10
VAXG9
VAXG8
VAXG7
VAXG6
VAXG5
VAXG4
VAXG3
VAXG2
VAXG1 VAXG_SENSE
VSSAXG_SENSE
SM_VREF
+
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
0 : EDP ENABLED
0 : LANE REVERSEDCFG(2)
CFG(7)
LOW EDP ENABLE
CFG(4)
PEG DEFER TRAINING
STRAP PIN
PEG STATIC LAN REVERSAL
LOW EDP ENABLE
PCIE PORT BIFURCATION
PEG DEFER TRAINING CFG[6:5]
PEG STATIC LANE REVERSAL
CLK_XDP_CLKGEN_DPCLK_XDP_CLKGEN_DN
00 : X8,X4,X4 - DEVICE 1 FUNCTION 1 AND 2 ENABLED01 : RESERVED - (DEVICE 1 FUNCTION 1 DISABLED ; FUNCTION 2 ENABLED)10 : X8, X8 - DEVICE 1 FUNCTION 1 ENABLE ; FUNCTION 2 DISABLED11 : (DEFAULT) X16 - DEVICE 1 FUNCTION AND 2 DISABLED
PCIE PORT BIFURCATION STRAPS
0 : PEG WAIT FOR BIOS FOR TRAINING1 : (DEFAULT) PEG TRAIN IMMEDIATELY FOLLOWING XXRESETB DE ASSERTION
1 : (DEFAULT) EDP DISABLED
1 : (DEFAULT) NORMAL OPERATION
REMOVE
6846
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
LOTES_ACA_ZIF_069_P01_989P
LOTES_ACA_ZIF_069_P01_989P
1K_1%_2_DY
1K_1%_2_DY
1K_1%_2_DY
1K_1%_2
1K_1%_2_DY
A3 CS
Block Diagram
LOTES_ACA_ZIF_069_P01_989P
10K
_5%
_2_D
Y
R4555
CN4500CN4500
CN4500
R4553
R4554
R4552
R4551
R4550
45D8
45D6
46D4
46D4
46D4
46A6
46A6
46A6
46A6
46A6
9C7
CFG<7>
CFG<2>
CFG<5>
CFG<4>
CFG<6>
CFG<0>CFG<1>CFG<2>CFG<3>CFG<4>CFG<5>CFG<6>CFG<7>CFG<8>CFG<9>CFG<10>
CFG<12>CFG<13>CFG<14>CFG<15>
CFG<17>
CFG<11>
CFG<16>
VCCIO_SEL
CPUDDR_WR_VREF1CPUDDR_WR_VREF2
21
AH31
AH33
A19
AJ33
AH27
AJ31
F24F25
D1B4
AR1AT1AT2
AM35AN35
AK32AJ32
C35
AJ26
B35A34A33B34
AR34AP35AT33AT34AR35
G16H16J16T8
AJ27AM33AT26
W8AK2AE7AG7L7
J15
B18J20
C29A30B31D30B29B30A31C30D23E23G24G25D24F23
B1
AN29AK31AM27AN26AN31AN28AM26AM28AM30AM32AM31AL30AL29AK26AL27AL26AK29AK28
A3A20A23A26A29A32A35B2B3B5B7B8B9B11B13B15B17B19B22C1C10C23C25C27C28C31C34D17D20D26D29D32D35E1E2E3E4E5E6E7E8E9E10E13E15E18E21E24E27E30F19F22
F29F31F34G11G17G20G23G26G29G32G35
H1H2H3H4H5H6H7H8H9
H10H13H15H18H21H24H27H30H33J31J34K26K29K32K35
L1L2L3L4L5L6L8L9
L27L30L33M34N26N27N28N29N30N31N32N33N34N35
P2P3P5P6P8P9
T26T27T28T29T30T31T32T33T34T35
AH22AH25AH26AH28AH29AH30AH32AH34AH35AJ1
AT13 AJ2AJ3AJ4AJ7AJ10AJ13AJ16AJ19AJ22
AJ25
AT16
AK4AK7
AK10AK13AK16AK19AK22AK25AK27AK30
AT19
AK33AL2AL4AL7
AL10AL13AL16AL19AL22AL25
AT22
AL28AL31AL34
AM1AM2AM3AM4AM7
AM10AM13
AT25
AM16AM19AM22AM25AM29
AN4AN7
AN10AN13AN16
AT27
AN19AN22AN25AN27AN30
AP1AP4AP7
AP10AP13
AT29
AP16AP19AP22AP25AP28AP31AP34
AR2AR4AR7
AT32
AR10AR13AR16
U2
AR19
U3U5U6U8U9W26W27W28W29W30
AR22
W31W32W33W34W35Y2Y3Y5Y6Y8
AR25
Y9AB26AB27AB28AB29AB30AB31AB32AB33AB34
AT3
AB35AC2AC3AC5AC6AC8AC9AD7AE9AE26
AT4
AE27AE28AE29AE30AE31AE32AE33AE34AE35AF2
AT7
AF3AF5AF6AG4AG8AG9AH4AH7AH16AH19
AT10
AT35
21
21
21
21
21
ININ
OUT
RE
SE
RV
ED
RSVD55
RSVD54
VCCIO_SEL
VCC_DIE_SENSE
KEY
VSS_VAL_SENSE
VCC_VAL_SENSE
VSSAXG_VAL_SENSE
VAXG_VAL_SENSE
RSVD5
RSVD10
RSVD44
RSVD25
RSVD33
RSVD32
RSVD14
RSVD13
RSVD12
RSVD11
RSVD9
RSVD8
RSVD7
RSVD6
RSVD37
RSVD24
RSVD23
RSVD21
RSVD22
RSVD19
RSVD20
RSVD18
RSVD17
RSVD15
RSVD16
RSVD27
RSVD29
RSVD28
RSVD31
RSVD30
RSVD52
RSVD51
RSVD50
RSVD49
RSVD48
RSVD47
RSVD46
RSVD58
RSVD57
RSVD56
RSVD45
RSVD43
RSVD41
RSVD40
RSVD39
RSVD42
RSVD38
RSVD35
RSVD34
CFG[17]
CFG[16]
CFG[15]
CFG[14]
CFG[13]
CFG[12]
CFG[11]
CFG[10]
CFG[9]
CFG[8]
CFG[7]
CFG[6]
CFG[5]
CFG[4]
CFG[3]
CFG[2]
CFG[1]
CFG[0]
VSS_1
VSS285
VSS284
VSS283
VSS282
VSS281
VSS280
VSS279
VSS278
VSS277
VSS276
VSS275
VSS274
VSS273
VSS272
VSS271
VSS270
VSS269
VSS268
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
IN
IN
IN
IN
IN
OUTOUTOUT
OUTOUT
OUTOUTOUT
OUTOUTOUT
OUTOUT
OUTOUTOUTOUTOUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
STRAPPING
HDA_3S_SYNC_R(PLL ODVR VOLTAGE)
1 : VCC VRM = 1.6V0 : VCC VRM = 1.8V(DEFAULT)
0:DISABLE : (DEFAULT INTERNAL PULL-DOWN)
FLASH DESCRIPTOR SECURITY OVERIDE
0:ENABLE EXTERNAL VRS
STRAP
STRAPPING
0 : (DEFAULT) NO REBOOT DISABLED1 : NO REBOOT ENABLEDPCSPKR_PCH_3(NO REBOOT)
1:ENABLE
FLASH OVERRIDE
REFERENCE 4700~4949(PCH)
STRAPPING
STRAPPINGINTVRMEN-INTEGRATE (SUS 1.05V VRM ENABLE1:ENABLE INTERNAL VRS
6847
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
TP30
1K_5%_2
33_5%_2
33_5%_2
33_5%_2
Block Diagram
CSA3
LOTES_AAA_BAT_063_P02_A_2P
BAT54C_30V_0.2A
1K_5%_2
0_5%_2_DY
1UF_6.3V_2
20K_1%_2
P3V3_RTC
330K_5%_3
10K_5%_2_DY
TP30
32.768KHZ10M_5%_2
18PF_50V_2
P3V3_RTC
1U
F_6.3
V_2
1M
_5%
_2
P1V05S
37.4_1%_2TP30
RSC_0402_DY
1U
F_6.3
V_2
18PF_50V_2
P1V05S
P1V05S
P3V3AL
P3V3A
RSC_0402_DY
RSC_0402_DY
RSC_0402_DY
RSC_0402_DY
RSC_0402_DY
RSC_0402_DY
0_5%_2_DY
RSC_0402_DY
P3V3A
10K_5%_2
10K_5%_2
P3V3S
49.9_1%_2
20K_1%_2
TP30
TP30
1K_5%_2
10K_5%_210K_5%_2
P3V3S
750_1%_2
P3V3_RTC
ITL_PANTHERPOINT_FCBGA_989P
RSC_0402_DY
33_5%_2
CN4700
R4700
X4700
TP4705
R4750
D4700
R4718
R4743R4741R4739
TP4723
TP4722
TP4721
TP4720
C4701
C4702
C4700
C4704
C4703
R4708
R4707
R4705
R4704
R4703
R4714
R4720
R4734
R4706
R4711
R4709
R4712
R4715
R4716
R4736
R4737
R4742R4740R4738
R4749
R4748
R4747
R4744
R4752R4751
U4700
28C7
28C7
28C7
28C7
29D5
29D5
29D5
29D5
47D3
47D3
24B2
24B1
21C8
21C7
21C8
21C7 21C6
21D6
21D6
24A2
47D3
21C6
29A7
29A7
29A7
27C3 21E3
27C3 21E3
27C3 21E3
27C3 21E3
27C3 21E3
24A2
47B6
47A6
47A6
47B7 21D3
29A7
27B7 21E3
21D3
47B8
24B2
21C8
24A2
SATA_HDD_TX_DNSATA_HDD_TX_DP
SATA_MINICARD_RX_DN
SATA_MINICARD_TX_DPSATA_MINICARD_TX_DNSATA_MINICARD_RX_DP
SATA_HDD_RX_DPSATA_HDD_RX_DN
HDA_3S_SDOUT
HDA_3S_RST#
HDA_3S_SDIN0
HDA_3S_RST#_R
HDA_3S_SYNC_R
HDA_3S_BITCLK_R
HDA_3S_SYNC
FLASH_OVERRIDE
HDA_3S_BITCLK
PCSPKR_PCH_3
EC_SPI_SI
EC_SPI_CS1#
RTCX2
RTCX1
PCH_TMSPCH_TDI
PCH_TDO
FLASH_OVERRIDE
HDA_3S_SYNC_R
PCH_TDO
PCH_TDI
PCH_TMS
PCH_TCK
EC_SPI_CS0#
EC_SPI_CLK
SATA_ODD_TX_DPSATA_ODD_TX_DNSATA_ODD_RX_DPSATA_ODD_RX_DN
EC_SMI
LPC_3S_FRAME#
LPC_3S_AD<3>LPC_3S_AD<2>LPC_3S_AD<1>LPC_3S_AD<0>
P1V05S_SATARCOMPO
PCI_3S_SERIRQ
P1V05S_SATA3RCOMPO
EC_SPI_SO
21
21
432 1
1
21
3
21
21
21
21
21
1
1
1
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
G22
T10
V4
U3
T1
Y14
T3
V5
P3
Y11
Y10
AB1AB3Y1Y3
AD1AD3Y5Y7
AF1AF3AB10AB8
AB12
AH1
AB13
AH4AH5AD5AD7
AP10AP11AM8AM10
P1
AP5AP7AM1AM3
V14
C20
A20
D20
K36E36
H7
H1
K5
J3
C17
K22
L34
A36
A34
C34
G34
E34
K34
N32
C36
N34
D36
C37B37A38C38
BI
BI
OUT
OUT
IN
OUTOUTOUT
BI
BIBIBIBI
OUT
ININ
ININ
OUT
OUT
IN
IN
OUT
OUTOUTOUT
OUTOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
-+
OUTOUTININ
C
A2
A1
SA
TA
6G
JTA
GS
PI
LP
CS
AT
A
IHD
AR
TC
SATA3RBIAS
SATA3RCOMPO
SATA3COMPI
SATAICOMPO
SPKR
SERIRQ
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
SATA1GP/GPIO19
SATA0GP/GPIO21
SPI_MISO
SPI_MOSI
SPI_CS1#
SPI_CS0#
SPI_CLK
SATAICOMPI
SATA5TXP
SATA5TXN
SATA5RXP
SATA5RXN
SATA4TXP
SATA4TXN
SATA4RXP
SATA4RXN
SATA3TXP
SATA3TXN
SATA3RXP
SATA3RXN
SATA2TXP
SATA2TXN
SATA2RXP
SATA2RXN
SATA1TXP
SATA1TXN
SATA1RXP
SATA1RXN
SATA0TXP
SATA0TXN
SATA0RXP
SATA0RXN
SRTCRST#
HDA_DOCK_RST#/GPIO13
HDA_DOCK_EN#/GPIO33
HDA_SDIN3
RTCRST#
LDRQ0#
FWH4/LFRAME#
LDRQ1#/GPIO23
FWH3/LAD3
FWH2/LAD2
FWH1/LAD1
FWH0/LAD0
SATALED#
HDA_SDO
HDA_SDIN2
HDA_SDIN1
HDA_SDIN0
HDA_RST#
HDA_SYNC
HDA_BCLK
INTRUDER#
INTVRMEN
RTCX2
RTCX1
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
CLOSE TO PCH
CLOCK TERMINATION FOR FICM
REFERENCE 4700~4949(PCH)
STUFF FOR INTEGRATED CLK
6848
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P3V3A
0.1UF_16V_2
10K_5%_2
P3V3A
P1V05S
10K_5%_2
10K_5%_2
0.1UF_16V_2
0.1UF_16V_20.1UF_16V_2
10K_5%_2
10K_5%_2
P3V3A
10K_5%_2
2.2K_5%_2
1M_5%_2
25MHZ
Block Diagram
CSA3
ITL_PANTHERPOINT_FCBGA_989P
P5V0S
10K_5%_2
10K_5%_2
2.2K_5%_2
10K_5%_2
0.1UF_16V_2
10K_5%_2_DY
TP24
P3V3A
2.2K_5%_2
2.2K_5%_2
P3V3S
PASSWORD_0805
18PF_50V_218PF_50V_2
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY2.2K_5%_2
2.2K_5%_2
2.2K_5%_2
2.2K_5%_2
P3V3A
SSM3K7002FU_DY
SSM3K7002FU_DY
P3V3S
90.9_1%_2
TP24
TP24
TP24
TP24
10K_5%_2_DY
P3V3A
10K_5%_2
10K_5%_2_DY
0.1UF_16V_2
10K_5%_2
SSM3K7002BFU
SSM3K7002BFU
10K_5%_2
10K_5%_2_DY
P3V3A
10K_5%_2_DY
10K_5%_2
Q4700
Q4701TP4701
R4753
TP4702
TP4700
R4794
R4793
R4792
R4791
R4790
R4789
C4793C4794
TP4703TP4704
R4800
R4799
R4798
R4797
R4796
Q4703
Q4702
R4801
C4729C4728
X4701
B500
R4802
R4837
R4784 R4785
R4786
R4787
R4783
R4782
R4781
R4780
R4779
R4778
R4777
R4772
R4773
R4776
R4775
R4795
C4727C4726
C4725C4724
U4700
48D7
48C7 22C5 48D8
22C5
48C3
41D2
48C8
48B3
22C2
31C7
31C7
22C2
48B3
48D3
48B2
48A8
48A8
41A8
48A3
22B1
48B3
48B3
48B3
48A3
39C8 38C8
48D3
48D3
39C8 38C8
48B3
41D2
57B6
27B7
27B7
27B7
27B7
31C7
31C7
48D7
48B7 27C7
31C7
31C7 31B8
48A3
48D3
48D2 27B3
48D2 27B3
48D3
27C7
31C7
48D8
48D7 27C7
27C7
48D8
48D7 22C5
22C2
22C2
48C8
48B8
48B8
51A7
48C1
48B1
48C7
48D2
48D2
48C2
48D3 27B3
48D3 27B3
48D3
57B6
48B8
22B1
48B7 27C7 48D8
48C8
48C8
48C3
CLKREQ_LAN#
PCIE_USB3_TX_C_DN
CLKREQ_GPU#
SML1_CLK
SML1ALERT#
CLKIN_DMI_PCH_DN
PCIE_LAN_TX_DP
PCIE_WLAN_TX_C_DPPCIE_WLAN_TX_C_DN
PCIE_LAN_TX_C_DPPCIE_LAN_TX_C_DN
PCIE_USB3_TX_DN
PCIE_LAN_TX_DN
CLKIN_SATA1_DP
SML1ALERT#
PCH_3A_ALERT_CLK
PCH_3A_ALERT_DAT
PCH_3A_SMCLK
PCH_3A_SMDATA
XTAL25_OUT
PCIE_LAN_RX_DNPCIE_LAN_RX_DP
CLKIN_DMI_PCH_DP
CLKIN_BUF_DOT96_DN
CLKIN_BUF_DOT96_DP
CLKIN_PCH14
PCH_3A_SMDATA
CLKIN_SATA1_DN
PCIE_USB3_TX_DP
CLKREQ_WLAN#
XTAL25_IN
SMB_ALERT#
SML1_CLK
EC_SMB3_CLK
EC_SMB3_DATA
SML1_DATA
CLKIN_BUF_DOT96_DNCLKIN_BUF_DOT96_DP
CLKIN_SATA1_DNCLKIN_SATA1_DP
CLKIN_PCH14
XTAL25_OUTXTAL25_IN
PCH_3A_ALERT_DAT
SMB_ALERT#
DRAMRST_CNTRL_PCH
PCH_3A_ALERT_CLK
CLKIN_PCI_FB
CLKREQ_USB3#
CLK_PCIE_USB3_DPCLK_PCIE_USB3_DN
CLK_PCIE_LAN_DP
PCIE_USB3_RX_DPPCIE_USB3_RX_DN
PCIE_WLAN_TX_DPPCIE_WLAN_TX_DNPCIE_WLAN_RX_DPPCIE_WLAN_RX_DN
CLKREQ_WLAN#
CLK_PCIE_WLAN_DPCLK_PCIE_WLAN_DN
CLKREQ_LAN#
CLK_PCIE_LAN_DN
CLKREQ_LAN#
PCH_3A_SMCLK
PCH_3S_SMCLK
PCH_3S_SMDATA
CLKREQ_WLAN#
PCIE_USB3_TX_C_DP
SML1_DATA
CLKIN_DMI_PCH_DPCLKIN_DMI_PCH_DN
CLK_DMI_PCH_DPCLK_DMI_PCH_DN
CLK_PEG_REF_DPCLK_PEG_REF_DN
CLKREQ_GPU#
2
1
32
1
3
1
21
1
1
21
21
21
21
21
21
2121
11
21
21
21
21
21
2
1
32
1
3
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2121
2121
V49V47
Y47
M16
E14
C13
G12
C8
A12
C9
H14
E12
K45
AY38
BB40
AV36
BB36
BB34
AU34
AY32
AU32
AW38
AY40
AU36
AY36
AY34
AV34
BB32
AV32
BC38
BJ40
BG38
BH37
BE36
BJ36
BF34
BJ34
BE38
BG40
BJ38
BG37
BF36
BG36
BE34
BG34
E6
M10
K12
T13
L14
L12
A8
V10
M1
J2
K49
H47
F47
K43
AB40AB42
AB38AB37
V37V38
V42V40
V46V45
Y45Y43
Y36Y37
AA47AA48
AB47AB49
Y39Y40
AK13AK14
AM13AM12
AU22AV22
AK5AK7
H45
BG30BJ30
E24G24
BE18BF18
P10
T11
M7
OUTOUT
BI
BI
BI
OUTOUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
ININ
G
DS
G
DS
OUT
BI
OUT
Lin
k
Contr
olle
r
SM
BU
S
FL
EX
CL
OC
KS
CLO
CK
S
PC
I-E
*
PCIECLKRQ6#/GPIO45
CL_RST1#
CL_DATA1
CL_CLK1
SML1DATA/GPIO75
SML1CLK/GPIO58
SML1ALERT#/PCHHOT#/GPIO74
SML0DATA
SML0CLK
SML0ALERT#/GPIO60
SMBDATA
SMBCLK
SMBALERT#/GPIO11
CLKOUT_ITPXDP_P
CLKOUT_ITPXDP_N
CLKOUT_PCIE7P
CLKOUT_PCIE7N
PCIECLKRQ7#/GPIO46
CLKOUT_PCIE6P
CLKOUT_PCIE6N
CLKOUT_DP_N
CLKOUT_DP_P
XCLK_RCOMP
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ#/GPIO56
CLKOUT_DMI_P
CLKOUT_DMI_N
CLKOUTFLEX3/GPIO67
CLKOUTFLEX2/GPIO66
CLKOUTFLEX1/GPIO65
CLKOUTFLEX0/GPIO64
PCIECLKRQ5#/GPIO44
PCIECLKRQ4#/GPIO26
PCIECLKRQ3#/GPIO25
PCIECLKRQ2#/GPIO20
PCIECLKRQ1#/GPIO18
PCIECLKRQ0#/GPIO73
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_P
CLKOUT_PEG_A_N
CLKIN_PCILOOPBACK
REFCLK14IN
XTAL25_OUT
XTAL25_IN
CLKIN_SATA_P
CLKIN_SATA_N
CLKIN_DOT_96P
CLKIN_DOT_96N
CLKIN_DMI_P
CLKIN_DMI_N
CLKIN_GND1_P
CLKIN_GND1_N
CLKOUT_PCIE5P
CLKOUT_PCIE5N
CLKOUT_PCIE4P
CLKOUT_PCIE4N
CLKOUT_PCIE3P
CLKOUT_PCIE3N
CLKOUT_PCIE2P
CLKOUT_PCIE2N
CLKOUT_PCIE1P
CLKOUT_PCIE1N
CLKOUT_PCIE0P
CLKOUT_PCIE0N
PETP8
PETN8
PETP7
PETN7
PETP6
PETN6
PETP5
PETN5
PETP4
PETN4
PETP3
PETN3
PETP2
PETN2
PETP1
PETN1
PERP8
PERN8
PERP7
PERN7
PERP6
PERN6
PERP5
PERN5
PERP4
PERN4
PERP3
PERN3
PERP2
PERN2
PERP1
PERN1
OUT
OUTOUT
IN
OUTOUT
OUTOUTIN
OUT
IN
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUTOUT
OUTOUT
BI
BI
BI
BI
IN
IN
IN
BI
G
DS
G
DS
OUT
OUT
BI
OUT
IN
IN
ININ
ININ
ININ
OUTOUT
OUT
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
INT. PU 20K
STRAPPING
INT. PU 20K
INT. PD 20K
DSWVRMEN - DEEP S4/S5 WELL ON-DIE VOLTAGE REGULATOR ENABLE
STRAPPING
LOW-DISABLEDHIGH-ENABLED(DEFAULT)
6849
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
330K_5%_2_DY
1K_5%_2_DY
100K_5%_2
750_1%_2
P3V3A
10K_5%_2
10K_5%_2
P3V3S
P3V3ABAT54_30V_0.2A
10K_5%_2
P3V3_LDO
P3V3A
8.2K_5%_2
10K_5%_2_DY
P3V3A
10K_5%_2
8.2K_5%_2
10K_5%_2
10K_5%_2
A3 CS
Block Diagram
P3V3A
49.9_1%_2
0_5%_2
ITL_PANTHERPOINT_FCBGA_989P
0_5%_2_DY
P1V05S
P3V3_LDO
P3V3_RTC
330K_5%_2
P3V3S
10K_5%_2
10K_5%_2_DY
TC7SZ08FU
SSM3K7002BFU
SSM3K7002FU_DY
BAT54_30V_0.2A
U4704
R4710
Q4714
R4883
Q4713
R4832
R4830
R4827
R4826
R4825
R4824
R4823
R4822
D4707
D4706
R4820
R4815R4816
R4812
R4814
R4828
R4834
R4831
R4829
U4700
42B7
42D7
15B8
15A4
42C7
42C7
42B7
42B7
42C7
21D6
21D6
41C1
49A5
41C7
49C2
21D3 21D1
21D6
49A6
42D7
42D7
42D7
42D7
42D7
42D7
42D7
42C7
42D7
42D7
42D7
42D7
42D7
49B3 21E3
42B7
42B7
42C7
42C7
21B6
42C7
42C7
42C7
42C7
42C7
42C7
42C7
42C7
49A5 31C6 27C7 22B5
42C7
49A5
49B7
42D7 42C7
42C7
42B7
49B7
21D6 49A6
27C7
22B5 31C6
49B3
49B7
21B6
49A5
49A5
49A6 21B6
11C7
11A4
40B4
14D2 21D3
21D3 21D1
21E3
15B4
41C5
14D2 14B8 13A2
45D3 21D6 14A6 13D2
16A7
SLP_S3#_3R
RSMRST#
FDI_TX6_DN
SUS_PWR_ACK
PM_DRAM_PWRGD
RSMRST#
PM_RI#
ACPRESENT
PCIE_WAKE#
ACPRESENT
DMI_TX2_DPDMI_TX3_DP
DMI_RX0_DPDMI_RX1_DP
DMI_RX3_DNDMI_RX2_DNDMI_RX1_DNDMI_RX0_DN
PCI_3S_CLKRUN#
SUS_PWR_ACK
FDI_INT
FDI_TX7_DP
FDI_TX5_DPFDI_TX4_DPFDI_TX3_DP
FDI_TX1_DP
EC_32KHZ
FDI_TX0_DP
FDI_TX7_DN
FDI_TX4_DNFDI_TX5_DN
FDI_TX2_DNFDI_TX3_DN
FDI_TX0_DNFDI_TX1_DN
PCIE_WAKE#
PCH_PWROK
SUSACK#
PVCORE_PG PCI_3S_CLKRUN#
FDI_TX2_DP
FDI_FSYNC0
DMI_TX1_DPDMI_TX0_DP
DMI_TX2_DNDMI_TX1_DN
DMI_RX2_DPDMI_RX3_DP
DMI_TX0_DN
DMI_TX3_DN
FDI_TX6_DP
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
PM_RI#
PCH_PWROK
SLP_S5#_3R
SLP_S5_3R
SLP_S3_3R
H_PM_SYNC
SLP_SUS#
SLP_S3#_IC_3R
SYS_RESET#
LOW_BAT#_3
EC_PWRSW#
5
4
3
2
1
21
2
1
3
21
2
1
3
21
21
21
21
21
21
21
21
2
13
2
13
21
21
21
21
21
21
21
21
21
B9K3
P12
K16
N14
C12
G8
G16
D10
H4
F4
K14
G10
C21
A10
L22
E20
AP14
BH9BJ10BG12BE12BG13BF14BB14BG14
BG9BG10BJ12BC12BH13BE14AY14BJ14
BB10
AV14
AW16
BC10
AV12
A18
B13
E22
BJ24
BG25
AU18
AV18
BJ20
BG20
AY18
BB18
BJ18
BG18
BH21
AY20
AW20
BC20
BE20
AY24
AW24
BE24
BC24
N3
E10
L10
H20
IN
IN
IN
NC
NC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
BI
IN
IN
INININ
ININ
ININ
ININ
IN
IN
IN
ININ
ININININ
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUTOUT
OUT
OUT
OUT
+-
G
DS
OUT
G
DS
IN
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
Sys
tem
Pow
er
Managem
ent
FD
I
DM
I
SUSACK#
DSWVRMEN
SLP_A#
DMI2RBIAS
DPWROK
APWROK
SLP_LAN#/GPIO29
DRAMPWROK
RSMRST#
SUSWARN#/SUSPWRDNACK/GPIO30
CLKRUN#/GPIO32
PWROK
BATLOW#/GPIO72
ACPRESENT/GPIO31
SUSCLK/GPIO62
SUS_STAT#/GPIO61
WAKE#
RI#
PWRBTN#
SYS_PWROK
SYS_RESET#
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_SUS#
PMSYNCH
FDI_INT
FDI_LSYNC1
FDI_LSYNC0
FDI_FSYNC1
FDI_FSYNC0
FDI_RXP7
FDI_RXP6
FDI_RXP5
FDI_RXP4
FDI_RXP3
FDI_RXP2
FDI_RXP1
FDI_RXP0
FDI_RXN7
FDI_RXN6
FDI_RXN5
FDI_RXN4
FDI_RXN3
FDI_RXN2
FDI_RXN1
FDI_RXN0
DMI_IRCOMP
DMI_ZCOMP
DMI3TXP
DMI2TXP
DMI1TXP
DMI0TXP
DMI3TXN
DMI2TXN
DMI1TXN
DMI0TXN
DMI3RXP
DMI2RXP
DMI1RXP
DMI0RXP
DMI3RXN
DMI2RXN
DMI1RXN
DMI0RXN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
CLOSE TO PCH
REFERENCE 4700~4949(PCH)
WHEN ¡¥1¡¦- LVDS IS DETECTED
HIGH-LVDS ENABLED
PCH_LVDS_DDCDATA - LVDS DETECT
LOW-LVDS DISABLED (DEFAULT)
6850
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
150_1%_2
ITL_PANTHERPOINT_FCBGA_989P
2.37K_1%_2
1K_1%_2
Block Diagram
CSA3
100K_5%_2
P3V3S
2.2K_5%_22.2K_5%_2
150_1%_2
150_1%_2
R4857R4856
R4858
R4855
R4861
R4860
R4859
R4862
U4700
35D8
35B2
35B2
35D8
35D8
35A2
35A2
36B5
36A5
36A5
34D7
34B5
21E7
34B8
34C5
34B8
34B8
34B8
34C5
34B8
34B8
34B8
34B8
36A5
36A5
36A5
36A5
36A5
36A5
36D8
36D8
PCH_CRT_VSYNCPCH_CRT_HSYNC
PCH_CRT_DDCCLKPCH_CRT_DDCDATA
PCH_CRTRPCH_CRTGPCH_CRTB
PCH_HDMI_DDCDATA
PCH_LVDS_DDCCLKPCH_LVDS_DDCDATA
PCH_LVDS_TXCL_DNPCH_LVDS_TXCL_DP
PCH_LVDS_TXDL0_DN
PCH_LVDS_TXDL0_DPPCH_LVDS_TXDL1_DPPCH_LVDS_TXDL2_DP
PCH_LCM_VDDEN
PCH_INV_PWM_3
PCH_LCM_BKLTEN
PCH_LVDS_TXDL1_DNPCH_LVDS_TXDL2_DN
PCH_HDMI_DDCCLK
PCH_HPDET
PCH_HDMI_TX2_DPPCH_HDMI_TX1_DNPCH_HDMI_TX1_DPPCH_HDMI_TX0_DNPCH_HDMI_TX0_DPPCH_HDMI_TXC_DNPCH_HDMI_TXC_DP
PCH_HDMI_TX2_DN
21
21
21
21
21
21
21
21
AP45AP43
AM40AM42
AP40AP39
M39P38
AF43AF47AH49AH43
AF45AF49AH47AH45
AF40AF39
AJ47AK49AM49AN47
AJ48AK47AM47AN48
AK39AK40
AE47AE48
AF36AF37
M45
K47T40
P39T45
J47
P45
BH41
M36M43
AT43AT45
BG42BJ42BE42BF42BE44BF44BB45BB43
AT38
P42P46
AP49AP47
BB49BB47BA48BA47AY45AY43AY49AY47
AT40AT47AT49
AV49AV47AU47AU48AV46AV45AV40AV42
T43
M49
T49
T42
M47
P49
M40T39
N48
OUTOUTOUT
IN
OUTOUT
OUT
OUTOUT
BI
OUT
OUTOUTOUT
OUT
BI
OUT
OUTOUT
OUTOUTOUT
OUTOUT
OUTOUT
OUTOUTOUT
OUTOUT
CR
T
Dig
ital D
ispla
y In
terf
ace
LV
DS
SDVO_INTN
SDVO_INTP
SDVO_STALLN
SDVO_STALLP
SDVO_TVCLKINN
SDVO_TVCLKINP
DDPD_HPD
DDPC_HPD
DDPB_HPD
DDPD_AUXP
DDPC_AUXP
DDPB_AUXP
DDPD_AUXN
DDPC_AUXN
DDPB_AUXN
DDPD_CTRLDATA
DDPD_CTRLCLK
DDPC_CTRLDATA
DDPC_CTRLCLK
SDVO_CTRLDATA
SDVO_CTRLCLK
DAC_IREF
CRT_VSYNC
CRT_RED
CRT_IRTN
CRT_HSYNC
CRT_GREEN
CRT_DDC_DATA
CRT_DDC_CLK
CRT_BLUE
DDPD_1P
DDPD_0P
DDPC_3P
DDPC_2P
DDPC_0P
DDPC_1P
LVD_VBG
LVD_IBG
LVDSB_DATA3
LVDSB_DATA2
LVDSB_DATA1
DDPB_3P
DDPB_2P
DDPD_3P
DDPD_2P
DDPB_1P
DDPB_0P
DDPD_1N
DDPD_0N
DDPC_3N
DDPC_2N
DDPC_1N
DDPC_0N
DDPB_3N
DDPB_2N
DDPD_3N
DDPD_2N
LVD_VREFL
LVD_VREFH
DDPB_1N
DDPB_0N
LVDSB_DATA0
LVDSB_DATA#3
LVDSB_DATA#2
LVDSB_DATA#1
LVDSB_DATA#0
LVDSB_CLK
LVDSB_CLK#
LVDSA_DATA3
LVDSA_DATA2
LVDSA_DATA1
LVDSA_DATA0
LVDSA_DATA#3
LVDSA_DATA#2
LVDSA_DATA#1
LVDSA_DATA#0
LVDSA_CLK
LVDSA_CLK#
L_VDD_EN
L_DDC_DATA
L_DDC_CLK
L_CTRL_DATA
L_CTRL_CLK
L_BKLTEN
L_BKLTCTL
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
TOP-BLOCK SWAP OVERRIDE
LOW=A16 SWAP OVERRIDE
STP_A16OVR
USED AS GPIO ONLY.INT. PU 20K
INT. PU 20K
TO BE USED AS GPIO
HIGH=DEFAULT
BBS STRAPING
WEBCAM
P0.P1 RESERVER FOR USB3.0
USB2.0/3.0 COMBO-USB2.0 PORT 0,1 MAPPEDUSB3.0 PORT 1,2
DEBUG PORT
NOTE:10K_5%(60130B1030ZT)NOTE:10K_5%(60130B1030ZT)
------
BOOT BIOSDESTINATION
LPC
1
1 0
00
RESERVED(NAND)
BBS_BIT0GPIO19
0
BBS_BIT1GPIO51
REFERENCE 4700~4949(PCH)
1 1 SPI (DEFAULT)
ROUTE WITH 90 OHMS IMPEDANCE
TOTAL LENGTH NO LONGER THAN 11 INCHES
NOTE:
3G
CLOSE TO PCH
CARD READER
WLAN
6851
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
ITL_PANTHERPOINT_FCBGA_989P
100K_5%_2
22_5%_2
22_5%_222_5%_2
22.6_1%_3
P3V3A
P3V3A
P3V3S
TC7SZ08FU
10K_5%_2
TP24
10K_5%_2_DY
1K_5%_2_DY
8.2K_5%_2
8.2K_5%_2
8.2K_5%_2
10K_5%_2_DY10K_5%_2_DY
1K_5%_2_DY
10K_5%_2_DY10K_5%_2_DY
10K_5%_2_DY10K_5%_2_DY
10K_5%_2_DY10K_5%_2_DY
10K_5%_2_DY10K_5%_2_DY10K_5%_2_DY10K_5%_2_DY
10K_5%_2_DY10K_5%_2_DY10K_5%_2_DY10K_5%_2_DY
A3 CS
Block Diagram
10K_5%_2
8.2K_5%_2
10K_5%_2
8.2K_5%_2
10K_5%_2
P3V3A
10K_5%_2
10K_5%_2R4838
R4882
R4881
R4880
R4879
R4956
R4897R4896R4895R4894R4893R4892
R4899R4898
TP4717U4705
R4887
R4888
R4891
R4890R4889
R4885 R4886
R4878
R4877
R4876
R4875
R4874
R4907R4906R4905R4904R4903R4902R4901R4900
R4835
U4700
66C6
66C6
57A6
57A6
34B3
34B3
27B3
27B3
26A8
26A8
28C3
51A2
31C6
32D7
51B6
51B6
36B2
21E3 28C3
27C7
51B7
51B6
52D6 21E3
16A3
51C7
51C7
51A5
51A5
51A5
51A5
51A5
51A5
51A5
32B8
32B8
33C5
32D7
51B6
51C7
51B6
51C7
32D7
51A5 51A2
51D7
32C8
32C8
27C7
28C3
33C5
30C5
51A4
33B5
33B5
32D7
48A3
21E3
51A2 51A4
51A2 51A4
51A2 51A4
51A2 51A4
51A2 51A4
51A2 51A4
51A2 51A4
51A4
51A2 51A5
51A2 51A5
51A2 51A5
51A2 51A5
30C5
51A4
51A4
51A4
51A4
51A4 51A5
51A4
51A4
31C6
41C7
31C7
51C7
51B6
29A5 51C7 51C7
16A3
51C7
57A6 27C3
29A5
33B5
33B5
51B6
51B6
51B6
51B6
MACHINE_ID2
CLK_PCI_DEBUG_R
USB_CAM_DNUSB_CAM_DP
USB_CR_DNUSB_CR_DPUSB_WLAN_DNUSB_WLAN_DP
USB_P2_DPUSB_P2_DN
USB_3G_DPUSB3_SMI#
BUF_PLT_RST#
MACHINE_ID0MACHINE_ID1MACHINE_ID2
MACHINE_ID6MACHINE_ID5MACHINE_ID4MACHINE_ID3
CLK_KBPCICLKIN_PCI_FB
CLK_PCI_DEBUG
SATA_ODD_DA#
CLK_PCI_FB_R
P3V3A_PME#
PLT_RST#
CLK_KBPCI_RMACHINE_ID4MACHINE_ID3
SATA_ODD_DA#
USB_P0_DN
USB3_PCH_RX1_DNUSB3_PCH_RX2_DN
USB3_PCH_RX2_DP
USB3_PCH_TX2_DP
USB3_PCH_RX1_DP
USB_P1_DP
MACHINE_ID0
BBS_BIT1
USB_P0_DPUSB_P1_DN
RUNSCI0#_3
PCI_3S_INTD#
PCI_3S_INTC#
PCI_3S_INTB#
PCI_3S_INTA#
MACHINE_ID1_DB
MACHINE_ID0
MACHINE_ID4MACHINE_ID5MACHINE_ID6MACHINE_ID1_DB
MACHINE_ID1MACHINE_ID2MACHINE_ID3
MACHINE_ID1_DBMACHINE_ID6MACHINE_ID5
MACHINE_ID1
USB_3G_DN
PCI_3S_REQ2#
DGPU_PWR_EN#
PCI_3S_PIRQG#
STP_A16OVR
PCI_3S_PIRQH#
USB3_PCH_TX1_DP
USB3_PCH_TX1_DNUSB3_PCH_TX2_DN
DGPU_HOLD_RST#
PCI_3S_INTA#PCI_3S_INTB#PCI_3S_INTC#PCI_3S_INTD#
DGPU_HOLD_RST#PCI_3S_REQ2#DGPU_PWR_EN#
PCI_3S_PIRQH#
PCI_3S_PIRQG#
21
21
21
21
21
21
212121212121
2121
15
4
3
2
1
21
21
21
2121
21
21
21
21
21
21
21
2121212121212121
21C33
B33
E30G30K30L30M28N28B29C29A28C28D28E28H28K28A26C26B25C25
A32C32E32G32K32L32A30C30
A24C24
AK45AK43AH37AH38BG16
AW30
BJ16
AV28AY26AU26AY30AU28BB26AV26BG32BF32BE30
BH25
BC28BJ32BE32BC30BE28
BG46AY16
M20B21
AB45
BJ26
AB46L24K24Y13AM5AM4
AH12H3
N30C18
BG26
AT3AT4AU2
BC8AT10
BG4AU3
BF3AT12
BA2AY5
AT8
AV10
AV5
BF6BD4BE8
AV7
BB7BB3BB5BA3BB1AV1AV3AT5AY3AT1
AY7
E40C44C46
K10
C6
D44C42G40G42
G38H38K38K40
C14D14A16L16C16B17K20A14
F46E42D47
H40K42J48H43H49
IN
IN
IN
IN
IN
BI
BI
BI
BI
BIBI
OUTOUTOUT
BI
BIBI
BIBIBIBI
BI
OUT
OUTOUT
OUTOUT
OUT
OUTOUT
BI
BI
BI
OUTOUTOUTOUT
BI
OUTOUT
OUTOUT
ININ
ININ
ININ
BI
ININ
BI
BIBI
BI
BI
BI
BI
BI
IN
IN
BI
BI
BI
BIBI
+-
OUT
OUTOUT
BI
BI
BI
BI
US
BPC
I
NV
RA
M
RS
VD
TP24
TP10
TP11
TP12
TP13
TP14
TP15
TP5
TP4
USB3TP4
USB3TP3
USB3TP2
USB3TP1
USB3TN4
USB3TN3
USB3TN2
USB3TN1
USB3RP4
USB3RP3
USB3RP2
USB3RP1
USB3RN4
USB3RN3
USB3RN2
USB3RN1
TP23
TP22
TP21
TP20
TP19
TP18
TP17
TP16
TP9
TP8
TP7
TP6
TP3
TP2
TP1
PLTRST#
CLKOUT_PCI3
CLKOUT_PCI4 OC7#/GPIO14
OC6#/GPIO10
OC5#/GPIO9
OC4#/GPIO43
OC3#/GPIO42
OC2#/GPIO41
OC1#/GPIO40
OC0#/GPIO59
USBRBIAS
USBRBIAS#
CLKOUT_PCI2
CLKOUT_PCI1
CLKOUT_PCI0
PME#
USBP13P
USBP13N
USBP12P
USBP12N
USBP11P
USBP11N
USBP10P
USBP10N
USBP9P
USBP9N
USBP8P
USBP8N
USBP7P
USBP7N
USBP6P
USBP6N
USBP5P
USBP5N
USBP4P
USBP4N
USBP3P
USBP3N
USBP2P
USBP2N
USBP1P
USBP1N
USBP0P
USBP0N
PIRQH#/GPIO5
PIRQG#/GPIO4
PIRQF#/GPIO3
PIRQE#/GPIO2
GNT3#/GPIO55
GNT2#/GPIO53
GNT1#/GPIO51
REQ3#/GPIO54
REQ2#/GPIO52
REQ1#/GPIO50
PIRQD#
PIRQC#
PIRQB#
PIRQA#
RSVD29
RSVD28
RSVD27
RSVD26
RSVD24
RSVD25
RSVD16
RSVD15
RSVD14
RSVD13
RSVD12
RSVD11
RSVD10
RSVD9
RSVD22
RSVD21
RSVD20
RSVD19
RSVD18
RSVD17
RSVD8
RSVD7
RSVD6
RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
RSVD23
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
FDI_OVRVLTG(GPIO37)
LOW- TX,RXTERMINATED TO SAME VOLTAGE
GFX_CRB_DET(GPIO39)
STRAPPING
INTERNAL GFX :100K PD
EXTERNAL GFX :10K PU
PLL_ODVR_EN(PLL ON DIE VR ENABLE)(GPIO28)
(DC COUPLING MODE) DEFAULT
STRAP
BOTH THESE SHOULD BE CLOSE TO PCH
STRAPPING
STRAPPING
INT. PU 20K
INT. PU 20K
INT. PU 20K
INT. PU 20K
INT. PD 20K
LOW-DISABLEDHIGH-ENABLED (DEFAULT)
STRAPPING
FOLLOW EDS1.0
STRAPPING
INT.PD 20K
INT. PD 20K
STRAPPING
REFERENCE 4700~4949(PCH)
6852
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
10K_5%_2_DY
P3V3S
10K_5%_2_DY
10K_5%_2
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
1K_5%_2_DY
10K_5%_2
P3V3A
10K_5%_2_DY
10K_5%_2_DY
100K_5%_2
56_5%_2
0_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
TP24
P1V05S
ITL_PANTHERPOINT_FCBGA_989P
P3V3S
P1V05S
56_5%_2
0_5%_2_DY390_5%_2
Block Diagram
CSA3
10K_5%_2_DY
100K_5%_2
P3V3S
10K_5%_2
P3V3A
1K_5%_2_DY
P3V3S
10K_5%_2_DY
P3V3S
33K_5%_2_DY
10K_5%_2_DY
P3V3S
R4909
R4721
R4919
R4727
R4726
R4725
R4724
R4917
R4929
R4927
R4916
R4915
R4908
R4935
R4950
R4932
TP4907
R4936
R4934
R4926
R4920
R4910
R4944
R4943
R4942
R4941
R4940
R4930
R4928
U4700
52C6
29A5
52B6
52C6
52B6
52C7
13B2
52D7
52C6
51C7
52D7
52C7
52D7
52D7
52D7
52A7
52D7
52C6
52D6
52D6
52C6
13C8
52D7
52D7 29A5
27B7
28C2
52B6
52C6
52B6
29B8
21E2
41D5 40A4
41D5 21A6
21D2
41C5
41D6
52B7
52B7
27C7
52D7
21E3
PCH_GPIO37
SATA_ODD_PRSNT#
PCH_GPIO16
PCH_GPIO38
PCH_GPIO22
PCH_GPIO22
KBLED_ID
DGPU_PWRGD
PCH_GPIO16
PCH_GPIO15
PCH_GPIO12
PCH_GPIO8
RUNSCI0#_3
PCH_GPIO6
3G_ON#
MSATA_DET
PLL_ODVR_EN
PCH_GPIO39
PCH_GPIO8
PCH_GPIO15
PCH_GPIO12
PCH_GPIO6
PCH_GPIO22
SATA_ODD_PRSNT#
BTIFON#
NV_CLE
H_CPUPWRGD
KBRST#
H_PECI
EC_3S_A20GATE
PCH_GPIO38
PCH_PECI
THRMTRIP#_R
SATA_ODD_PWREN
PM_THRMTRIP#
PCH_GPIO39
PCH_GPIO37
PLL_ODVR_EN
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1
21
21
21
21
21
21
21
21
21
21
21
21
BD1
B47
B3
A6
A5
A46
F49
F1
E49
A45
E1
D49
D1
C48
C2
BJ6
BJ5
BJ46
BJ45
BJ44A44
BJ4
BH47
BH3
BG48
BG2
BF49
BF1
BE49
BE1
BD49
A4
AK10
AH10
AK11
AH8
AY10
A40
C41
B41
C40
E38
H36
A42
D40
K1
N2
V13
M3
T5
V3
U2
M5
V8
P5
AY11
AU16
AY1
P37
C4
T14
C10
D6
K4
P8
E16
E8
G2
T7
P4
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
GP
IO
NC
TF
CP
U/M
ISC
DF_TVS
VSS_NCTF_16
VSS_NCTF_15
VSS_NCTF_14
VSS_NCTF_13
NC_1
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
VSS_NCTF_31
VSS_NCTF_30
VSS_NCTF_29
VSS_NCTF_28
VSS_NCTF_27
VSS_NCTF_26
VSS_NCTF_25
VSS_NCTF_24
VSS_NCTF_23
VSS_NCTF_22
VSS_NCTF_21
VSS_NCTF_20
VSS_NCTF_19
VSS_NCTF_18
VSS_NCTF_17
TACH5/GPIO69
TACH7/GPIO71
TACH6/GPIO70
TACH4/GPIO68
A20GATE
VSS_NCTF_32
SATA4GP/GPIO16
GPIO35
STP_PCI#/GPIO34
INIT3_3V#
SATA2GP/GPIO36
TACH1/GPIO1
GPIO15
BMBUSY#/GPIO0
GPIO8
THRMTRIP#
PECI
RCIN#
PROCPWRGD
SDATAOUT1/GPIO48
SDATAOUT0/GPIO39
SLOAD/GPIO38
SCLOCK/GPIO22
SATA5GP/GPIO49/TEMP_ALERT#
SATA3GP/GPIO37
TACH3/GPIO7
TACH0/GPIO17
TACH2/GPIO6
VSS_NCTF_12
VSS_NCTF_11
VSS_NCTF_10
VSS_NCTF_9
VSS_NCTF_8
VSS_NCTF_7
VSS_NCTF_6
VSS_NCTF_5
VSS_NCTF_4
VSS_NCTF_3
VSS_NCTF_2
VSS_NCTF_1
LAN_PHY_PWR_CTRL/GPIO12
GPIO57
GPIO24
GPIO28
GPIO27
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
3A
20MIL
15MIL
15MIL
15MIL
15MIL
15MIL
15MIL
15MIL
15MIL
40MIL
1.3A
REFERENCE 4700~4949(PCH)
15MIL
20MIL
15MIL
15MIL
15MIL
6853
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
P3V3S
P1V8S
P3V3S
P3V3S
P1V05S
P1V8S
P1V5S_VCCAFDI_VRM
P1V05S
P3V3AP3V3AL
P1V5SP1V5S_VCCAFDI_VRM
P1V05S
P1V05S
P1V05S
P1V5S_VCCAFDI_VRM
P3V3S
P1V05S
P1V05S
P1V05S
P1V05S
FBM_11_160808_121T
0.1UF_16V_20.01UF_50V_210UF_6.3V_3
FBM_11_160808_121T
22UF_6.3V_5
1UF_6.3V_2
Block Diagram
CS
0.1UF_16V_2
0_5%_2
A3
0.01UF_50V_20.01UF_50V_2
0.1UF_16V_2
1UF_6.3V_2
1UF_6.3V_2_DY
0_5%_2_DY
0_5%_3
ITL_PANTHERPOINT_FCBGA_989P
1UF_6.3V_21UF_6.3V_21UF_6.3V_210UF_6.3V_3
0_5%_2_DY
1UF_6.3V_2
0_5%_2_DY
1UF_6.3V_21UF_6.3V_21UF_6.3V_2
0.1UF_16V_2
10UF_6.3V_3
R4949
C4792
R4948R4947
C4791
C4790
C4789
C4788
C4785 C4786 C4787
L4701
C4782 C4783C4784
L4700
R4946
C4781
C4780C4776
C4777 C4778 C4779
R4945
C4775C4774C4773C4772
U4700
P1V05S_VCCAPLLEXP
P1V8S_VCCTX_LVDS
P3V3S_VCCADAC
P1V05S_VCCAFDIPLL
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
AK37
U47
AT16
AP16
AP37
AP36
AM38
AM37
V1
AN19
AP17
AN34
AN33
AT24
AP26
AP24
AP23
AP21
AN27
AN26
AN21
AN17
AN16
AU20
AT20
AJ17
AJ16
AG17
AG16
AG24AG23AG21AF23AF21AD23AD21AC23
AJ31AJ29AJ27AJ26AJ23AG29AG27AG26
AA23
AB36
BJ22
AK36
BG6
U48
V34
V33
BH29
LV
DS
FD
I
POWER
VC
C C
OR
E CR
TD
MI
HV
CM
OS
VC
CIO
NA
ND
/ S
PI
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCIO[28]
VCCIO[15]
VCCCORE[17]
VCCCORE[16]
VCCCORE[11]
VCCCORE[10]
VCCCORE[9]
VCCCORE[8]
VCCCORE[7]
VCCCORE[6]
VCCCORE[5]
VCCCORE[4]
VCCCORE[2]
VCCCORE[1]
VCCCORE[3]
VCCSPI
VCCVRM[2]
VccAFDIPLL
VCCDFTERM[4]
VCCDFTERM[3]
VCCADAC
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCALVDS
VCCVRM[3]
VCCAPLLEXP
VCCTX_LVDS[4]
VCCTX_LVDS[3]
VSSADAC
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCC3_3[3] VCCDFTERM[2]
VCCDFTERM[1]
VCCDMI[1]
VCCCLKDMI
VCCDMI[2]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
20MIL
10MIL
20MIL
20MIL
10MIL
20MIL
10MIL
10MIL
15MIL
15MIL
1.1A
15MIL
20MIL
15MIL
20MIL
20MIL
REFERENCE 4700~4949(PCH)3A
10MIL
20MIL
10MIL
10MIL
15MIL
15MIL
10MIL
20MIL
10MIL
6854
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
10_5%_5
P3V3A
1UF_6.3V_21UF_6.3V_2
P1V05S
1UF_6.3V_2_DY
0_5%_2_DY
22UF_6.3V_5
1UF_6.3V_2
BAT54_30V_0.2A
BAT54_30V_0.2A
1UF_6.3V_2
P3V3S
P3V3S
P3V3S
1UF_6.3V_2
P1V05S
P3V3A
1UF_6.3V_2
P3V3A
P1V05S
1UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
P1V05S
4.7UF_6.3V_3 0.1UF_16V_2 0.1UF_16V_2
1UF_6.3V_2_DY
P1V05S
10UF_6.3V_322UF_6.3V_5_DY 1UF_6.3V_2
P1V05S
FBM_11_160808_121T
FBM_11_160808_121T
22UF_6.3V_5_DY 1UF_6.3V_2 10UF_6.3V_3
P1V05S
0.1UF_16V_2
P3V3_RTC
22UF_6.3V_5
1UF_6.3V_2 0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
P1V5S_VCCAFDI_VRM
0.1UF_16V_2
0.1UF_16V_2
P3V3S
10UF_6.3V_3
P1V05S
P1V05S
0.1UF_16V_2
0.1UF_16V_2_DY
P1V05S
0_5%_2_DY
0_5%_2
ITL_PANTHERPOINT_FCBGA_989P
P3V3A
0.1UF_16V_2
P1V05S
1UF_6.3V_2
0603_DY
1UF_6.3V_2_DY
P3V3A
A3
P1V05S
P1V05S
P1V5S_VCCAFDI_VRM
CS
Block Diagram
P1V05S
P5V0S
P3V3S
0.1UF_16V_2
10_5%_5
P3V3A
P5V0A
P3V3A
C4835
C4834
C4829
C4841
C4840
L4708
C4839
C4838
C4837
C4836
R4870
D4709C4832
C4833
R4869
D4708
C4831
C4830
C4827C4826 C4828
C4825C4824C4823
C4822
C4821
C4820
C4819
C4818
C4812
C4815
L4707
C4816 C4817
C4814C4813
L4706
C4811
C4810C4809C4808
C4807C4806
C4805
R4867
C4802C4801
R4866C4803
C4804
R4865U4700
P1V05S_VCCAPLLDMI2
V5REF_SUS
V5REF
P1V05S_VCCADPLLB
P1V05S_VCCADPLLA
P1V05S_VCCACLK
P1V05S_VCCAPLLSATA
21
21
21
21
21
21
21
21
21
21
21
2
132 1
21
21
2
13
21
21
21
21
21
21
21
21
21
2 1
2 1
2 1
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
212 1
2 1
21
Y49
AF11
P32
V23
T24
T23
P24
P22
P20
N22
N20
V24
AN24
AG33
A22
AF17
AF14
AF13
AD17
T26
T29
T27
P28
P26
AC17
N26
AC16
AL29
AH14
AH13
T16
AG34AF34AF33
AC27
AC26
AA31
AA29
AA27
AA26
AA24
V21
T21
T19
W33
AA21
W31
W29
W26
W24
W23
W21
AD31
AD29
AC31
AC29
AA19
AK1
BH23
BF47
BD47
AD49
W16
T38
T34
AJ2
AA16
BJ8
M26
P34
V12
AN23
AL24
V19T17
V16
N16
NC
NC
HD
A
CP
UR
TC
PC
I/G
PIO
/LP
CM
ISC
POWER
US
B
Clo
ck a
nd M
isce
llaneous
SA
TA
VCCVRM[4]
DCPRTC
VCCASW[20]
VCC3_3[2]
VCCASW[18]
VCCASW[15]
VCCASW[19]
VCCIO[5]
VCCASW[17]
VCCASW[16]
VCCASW[1]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
VCCASW[2]
VCCIO[29]
VCCAPLLDMI2
VCCASW[4]
DCPSUSBYP
VCCASW[3]
VCCASW[5]
VCCASW[6]
VCCSUSHDA
VCCSUS3_3[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
V5REF
VCC3_3[4]
VCCRTC
VCCSUS3_3[10]
VCCSUS3_3[9]
VCCSUS3_3[8]
VCCSUS3_3[7]
VCCADPLLB
VCCDIFFCLKN[1]
DCPSUS[1]
VCCSSC
VCCADPLLA
VCCACLK
VCCDIFFCLKN[2]
DCPSST
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCC3_3[1]
VCC3_3[8]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
V_PROC_IO
VCCDIFFCLKN[3]
VCCASW[13]
VCCASW[14]
VCCVRM[1]
VCCAPLLSATA
DCPSUS[3]
DCPSUS[2]
VCCDSW3_3
VCC3_3[5]
VCCIO[14]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCIO[7]
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 4700~4949(PCH)
6855
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
Block Diagram
CSA3
ITL_PANTHERPOINT_FCBGA_989P
ITL_PANTHERPOINT_FCBGA_989P
U4700
U4700
BJ28BG28BC16BE16AP1AP3M14AP13C22BG24BG22T36H16G14BG41BE10B43AD47AJ3N24BG29Y8Y46Y42Y4Y38Y12W48W27W2W19W17V7V43V39V36V31V29V27V26V17V11T8T47T46W34T4T37T31T12R48R2P7P47P43P40T33P18P11N47P30N18M8M46M42M4M38M34M32M30M24M22M18P16M12L48L36L28L26L20L2L18K7K46K39K26K18H46
F3H34H32H30H26H24H22H18H12G48G36G28G26G20G18E26E18
D8D42D38D34D32D30D26D24D22D18D16D12
D3BH7
BH43BH39BH35BH33BH31BH27
H10BH19BH17BH15BH11
BG8BG44BG33BG21BG17
BF8BF40BF38BF30
BD3BF28BF26BF24BF22BF20BF16BF12BF10BE40BE26BE22
BD5BD46BC48BC42BC40BC36BC34BC32BC26BC22
BC2BC18BC14BB46
BB4BB38BB30BB28BB24BB22BB20BB16BB12
F45B7
B39B35B31B27B23B19B15B11AY8
AY46AY42
AY4
AM36AM14AM11AL48AL34AL33AL31AL27AL26AL23
AB4AL21AL2AL19AL17AL16AK8AK46AK42AK4AK38
AB39
AK3AK12AJ34AJ33AJ24AJ21AJ19
AH7AH46AH42
AB14
AH40AH39AH36
AH3AH11AG48AG31
AG2AG19
AF8
AB11
AF7AF5
AF46AF42
AF4AF38AF31AF29AF27AF26
AA34
AF24AF19AF16AD16AD14AF12AF10
AE3AE2AD8
AA33
AD46AD45AD43AD42AD40
AD4AD39AD38AD37AD36
AA3
AD34AD33AD27AD26AD24AD19AD13AD12AD11AD10
AA2
AC48AC34AC33AC24
AY28AY22AY12AV11AW48AW40AW36AW34AW32
AC21
AW28AW26AW22AW2AW18AW14AV8AV43AV4AV38
AC2
AV30AV24AV20AV16AU30AU24AT7AT46AT42AT39
AC19
AT34AT32AT30AT28AT26AT22AT18AT13AT11AR48
AB7
AR2AP8AP46AP42AP4AP38AP32AP30AP28AP19
AB5
AP12AN31AN3AN29AN2AM7AM46AM45AM43AM39
AB43
AA17
H5
VSS[352]
VSS[351]
VSS[350]
VSS[349]
VSS[348]
VSS[347]
VSS[346]
VSS[345]
VSS[344]
VSS[343]
VSS[342]
VSS[340]
VSS[338]
VSS[337]
VSS[335]
VSS[334]
VSS[333]
VSS[331]
VSS[330]
VSS[329]
VSS[328]
VSS[325]
VSS[324]
VSS[323]
VSS[322]
VSS[321]
VSS[320]
VSS[319]
VSS[318]
VSS[317]
VSS[316]
VSS[315]
VSS[314]
VSS[313]
VSS[312]
VSS[311]
VSS[310]
VSS[309]
VSS[308]
VSS[307]
VSS[306]
VSS[305]
VSS[304]
VSS[303]
VSS[302]
VSS[301]
VSS[300]
VSS[299]
VSS[298]
VSS[297]
VSS[296]
VSS[295]
VSS[294]
VSS[293]
VSS[292]
VSS[291]
VSS[290]
VSS[289]
VSS[288]
VSS[287]
VSS[286]
VSS[285]
VSS[284]
VSS[283]
VSS[282]
VSS[281]
VSS[280]
VSS[279]
VSS[278]
VSS[277]
VSS[276]
VSS[275]
VSS[274]
VSS[273]
VSS[272]
VSS[271]
VSS[270]
VSS[269]
VSS[268]
VSS[267]
VSS[266]
VSS[265]
VSS[264]
VSS[263]
VSS[262]
VSS[261]
VSS[260]
VSS[259]
VSS[258]
VSS[257]
VSS[256]
VSS[255]
VSS[254]
VSS[253]
VSS[252]
VSS[251]
VSS[250]
VSS[249]
VSS[248]
VSS[247]
VSS[246]
VSS[245]
VSS[244]
VSS[243]
VSS[242]
VSS[241]
VSS[240]
VSS[239]
VSS[238]
VSS[237]
VSS[236]
VSS[235]
VSS[234]
VSS[233]
VSS[232]
VSS[231]
VSS[230]
VSS[229]
VSS[228]
VSS[227]
VSS[226]
VSS[225]
VSS[224]
VSS[223]
VSS[222]
VSS[221]
VSS[220]
VSS[219]
VSS[218]
VSS[217]
VSS[216]
VSS[215]
VSS[214]
VSS[213]
VSS[212]
VSS[211]
VSS[210]
VSS[209]
VSS[208]
VSS[207]
VSS[206]
VSS[205]
VSS[204]
VSS[203]
VSS[202]
VSS[201]
VSS[200]
VSS[199]
VSS[198]
VSS[197]
VSS[196]
VSS[195]
VSS[194]
VSS[193]
VSS[192]
VSS[191]
VSS[190]
VSS[189]
VSS[188]
VSS[187]
VSS[186]
VSS[185]
VSS[184]
VSS[183]
VSS[182]
VSS[181]
VSS[180]
VSS[179]
VSS[178]
VSS[177]
VSS[176]
VSS[175]
VSS[174]
VSS[173]
VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
VSS[0]
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
I=125MA TRACE WIDTH>=15MIL
I=70MA TRACE WIDTH>=15MIL
PIN BASE STRAPS
TRANSMITTER POWER SAVING ENABLEGPIO_0
0
MEM_ID0
10 : AUDIO FOR DP AND HDMI IF DONGLE IS DETECTED
MEMORY APERTURE SIZE
0
0 : 50% TX OUTPUT SWING (DEFAULT)1 : FULL TX OUTPUT SWING
11 : AUDIO FOR BOTH DP AND HDMI
0 : DISABLE (DEFAULT)ENABLE EXTERNAL BIOS ROM DEVICE1 : ENABLE
00 : NO AUDIO FUNCTION
01 : AUDIO FOR DP ONLY
1
0
00
MEMORY APERTURE SIZE
GPIO_9
GPIO_8GPIO_21
VGA DISABLE
1
GPIO_12GPIO_13
0
1
1
GPIO_[11:13]
I=20MA TRACE WIDTH>=15MIL
32M
128M
256M64M
I=75MA TRACE WIDTH>=15MIL
GPIO_1 PCIE TRANSMITTER DE-EMPHASIS 0 : DE-EMPHASIS DISABLED (DEFAULT)1 : DE-EMPHASIS ENABLED
GPIO_11
0
0
0
MUST BE LOW DURING RESET
GEN1/GEN2 ENABLE
LEFT UNCONNECTED
GPIO_2
0 : ENABLE (DEFAULT)
AUDIO[1:0]VSYNC[0]HSYNC[1]
GPIO_22
1 : DISABLE
0 : GEN1 (DEFAULT)1 : GEN2
GPIO11:MEMORY APERTURE SIZE 256M 0
MEM_ID3
0
SAMSUNG
HYNIX0
MEM_ID1
1
0
0
0
MEM_ID2
PLACE CLOSE TO ASIC
I=100MA TRACE WIDTH>=15MIL
THAMES (6019B0917601)
56 68
MODEL,PROJECT,FUNCTION
X01
XXX 21-OCT-2002
1310xxxxx-0-0
P1V8S_DGPU
FBM_11_160808_121T
150_1%_2
150_1%_2
150_1%_2
10UF_6.3V_3
AMD_216_0833002_FCBGA_962P
10K
_5%
_2
P3V3S_DGPU
10K_5%_2_DY
249_1%_2
12P
F_50V
_2
10K
_5%
_2_D
Y
10K
_5%
_2_D
Y
10K
_5%
_2_D
Y
10K
_5%
_2
SSM3K7002BFU
P1V8S_DGPU
1UF_6.3V_2
499_1%_2
P1V8S_DGPU
10K_5%_2
FBM_11_160808_121T
P1V8S_DGPU
FBM_11_160808_121T
10UF_6.3V_3
P1V8S_DGPU
P1V8S_DGPU
10UF_6.3V_3
FBM_11_160808_121T
1UF_6.3V_210K
_5%
_2_D
Y
0.1UF_16V_2
499_1%_2
FBM_11_160808_121T
1UF_6.3V_2
0.1
UF
_16V
_2
10K
_5%
_2
TP30
TP30
10UF_6.3V_3
PVPCIE
10UF_6.3V_3
TP30
TP30
C CS
10K
_5%
_2
27MHZ
TP30
1U
F_6.3
V_2
0.1UF_16V_2
1UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
SSM3K7002BFU
Block Diagram
P3V3S_DGPU
P3V3S_DGPU
SSM3K7002BFU
12P
F_50V
_2
1M_5%_2
10K
_5%
_2
TP30
0.1
UF
_16V
_2
P3V3S_DGPU
10K_5%_2
10K_5%_2
RSC_0402_DY
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
RSC_0402_DY
10K_5%_2_DY
10K_5%_2
R5031
R5030
R5010
R5016
R5074
R5073
R5072
U5001
R5017
R5056
L5000
R5000
C5005C5000C5001
L5001
C5004C5002C5003
R5009
R5008
R5007
R5006
C5212
TP12
TP14
TP11TP15
TP16
R5060
Q5000
R5015
R5063
R5005
C5010
R5004
R5003
R5061
C5012
C5011
R4
X5000
TP5000
C5211
C5018
C5015
C5017C5019
R5011
R5028
R5037
R5014
R5027
R5094
Q5001
R5095
Q5002
L5004
C5013
L5005
C5014C5016
L5006
56F7
56D5
56C5
34C5
56F7
21D3 21D2 5A7 37C3 56D5
21D3 21D2 5A7 37C6 56D5
15D8
35B2
56C5
13C6
56D5
56D5
56D3
56D3 35B2
13C6
56D5
56D5
56D5
56D5
36B5
35D8
56F7
56F7
35D8
56E2
56E2
56E2
35B2
36A5
36A5
56D7
36D8
35B2
35A2
21E7
34C5
36A5
36A5
36A5
36A5
36A5
36A5
35D8
35D8
56D3
35D8 56D3
35D8 56D3
36D8
56F7
40B1
13C6 56F7
35B2
56F7
56F7
56C7
56F7
56F7
40A8
VGA_CRTR
VGA_CRTG
VGA_CRTB
GPIO9
GPU_SIC
GPIO2
VGA_LVDS_DDCCLK
PWRCNTL_1
PWRCNTL_0
EC_SMB2_DATA GPU_SID
EC_SMB2_CLK GPU_SIC
VGA_CRT_VSYNC
VGA_CRT_HSYNC
GPIO11
GPIO22
GPIO9
GPIO2
GPIO5
GPIO11
VGA_LCM_BKLTEN
PVPCIE_DPLL_VDDC
PWRCNTL_1
GPIO22
MEM_ID3MEM_ID2MEM_ID1MEM_ID0
VGA_LVDS_DDCDATA
VGA_CRT_HSYNC
VGA_CRTB
VGA_CRTG
VGA_CRT_VSYNC
VGA_HDMI_TX1_DNVGA_HDMI_TX1_DP
VGA_HDMI_TX0_DNVGA_HDMI_TX0_DP
VGA_HDMI_TXC_DNVGA_HDMI_TXC_DP
P0V6S_VREFG
VGA_HDMI_TX2_DNVGA_HDMI_TX2_DP
PWRCNTL_0
GPIO5
GPU_SID
GPIO1GPIO0
P1V8S_VDD1DI
P1V8S_DPLL_PVDD
VGA_CRTR
P1V8S_AVDDTHRM_SHUTDWN#
P1V8S_TSVDD
GPIO0
GPIO1
VGA_HPDET
VGA_HDMI_DDCCLKVGA_HDMI_DDCDATA
VGA_CRT_DDCCLKVGA_CRT_DDCDATA
21
21
21
21
21
21
21
AD32
AU34AV33
AW35
AW34
AC38
AG32
AC34
AH13
AG31
AC33
AC29
AU20AT19
AU14AV13
AR30AT29
AU24AV23
AT23
AT33
AR22
AU32
AU22
AR32
AV21
AT31
AT21
AV31
AR20
AU30
AT17
AT27
AR16
AR26
AU16
AU26
AV15
AV25
AT15
AT25
AR14
AR24
AJ33AJ32
AK32
AL31
AK21AJ21
AJ26AK26
AB34
AD37
AA29
AC31AC30
AD39
AM23
AL24AM24
AN23AK23
AC36
AK24
AD29
AH15AJ13AK17AJ17AH17AJ23AH23
AN13AK13AJ14AL13
AN16
AM17AN14AG30AK14AM13AM14AM16AL16AK16AJ16
AH18AH20
AH24AH26AJ24AK20AJ20AK19AJ19
AD35
AD31AD30
AE36
AT7AU6AW6AR6AU5AW5AP6
AP12AU12AW12AR12
AW3
AT11AV11AP10AU10AW10AR10
AT9AV9AN7AV7
AU3AU1
AU8AR8
AR3AW8AP8
AR1
AF29
AN31
AN32AM32
AG29
AK29
AM21
AM29
AM30
AK30
AN21
AL29
AL30
AJ31AJ30
AL19AM19
AN26AM26
AF32
AC32
AE38
AF31AF30
AF37
AE34AD34
AN20AM20
AM27AL27
AF33
AD33
AG33
21
21
2 1
21
21
21
21
2 1
21
21
21
21
21
21
21
21
1
1
11
1
21
2
1
3
212
1
21
21
21
21
21
21
21
21
21
1
21
21
21
21
21
21
21
21
21
2 1
21
2
1
3
21
2
1
3
21
21
21
21
21
21
BI
BI
OUT
OUT
IN
G
DS
BIBI
BIBI
IN
IN
IN
OUT
OUT
OUT
IN
OUT
BIBI
OUTOUT
OUTOUT
OUTOUT
OUTOUT
PLL/CLOCK
THERMAL
DDC/AUX
DAC2
DAC1
GENERAL PURPOSE I/O
I2C
MUTI GFX
DPD
DPC
DPB
DPA
SWAPLOCKB
SWAPLOCKA
XO_IN2
XO_IN
TS_A/NC
Y/NC
VSYNC
VDD2DI/NC
VDD1DI
V2SYNC/GENLK_VSYNC
TXCDP_DPD3P
TXCDM_DPD3N
TXCCP_DPC3P
TXCCM_DPC3N
TXCBP_DPB3P
TXCBM_DPB3N
TXCAP_DPA3P
TXCAM_DPA3N
TX5P_DPD0P
TX5P_DPB0P
TX5M_DPD0N
TX5M_DPB0N
TX4P_DPD1P
TX4P_DPB1P
TX4M_DPD1N
TX4M_DPB1N
TX3P_DPD2P
TX3P_DPB2P
TX3M_DPD2N
TX3M_DPB2N
TX2P_DPC0P
TX2P_DPA0P
TX2M_DPC0N
TX2M_DPA0N
TX1P_DPC1P
TX1P_DPA1P
TX1M_DPC1N
TX1M_DPA1N
TX0P_DPC2P
TX0P_DPA2P
TX0M_DPC2N
TX0M_DPA2N
SDA
SCL
RSET
RB
R2SET/NC
R2B/NC
R2/NC
R
GB
G2B/NC
G2/NC
G
DDCCLK_AUX5P
DDCDATA_AUX5N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX3P
DDCDATA_AUX3N
DDC6DATA
DDC6CLK
DDC2DATA
DDC2CLK
DDC1DATA
DDC1CLK
COMP/NC
C/NC
BB
B2B/NC
B2/NC
B
AVSSQ
AVDD
AUX2P
AUX2N
AUX1P
AUX1N
A2VSSQ/TSVSSQ
A2VDDQ/NC
A2VDD/NC
XTALOUT
XTALIN
VSS2DI/NC
VSS1DI
VREFG
TSVSS
TSVDD
TS_FDO
DDCCLK_AUX7P
DDCDATA_AUX7N
JTAG_TRSTB
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
HSYNC
HPD1
H2SYNC/GENLK_CLK
GPIO_9_ROMSI
GPIO_8_ROMSO
GPIO_7_BLON
GPIO_6
GPIO_5_AC_BATT
GPIO_4_SMBCLK
GPIO_3_SMBDATA
GPIO_23_CLKREQB
GPIO_22_ROMCSB
GPIO_21_BB_EN
GPIO_20_PWRCNTL_1
GPIO_2
GPIO_19_CTF
GPIO_18_HPD3
GPIO_17_THERMAL_INT
GPIO_16
GPIO_15_PWRCNTL_0
GPIO_14_HPD2
GPIO_13
GPIO_12
GPIO_11
GPIO_10_ROMSCK
GPIO_1
GPIO_0
GENERICG_HPD6
GENERICF_HPD5
GENERICE_HPD4
GENERICD
GENERICC
GENERICB
GENERICA
DVPDATA_9
DVPDATA_8
DVPDATA_7
DVPDATA_6
DVPDATA_5
DVPDATA_4
DVPDATA_3
DVPDATA_23
DVPDATA_22
DVPDATA_21
DVPDATA_20
DVPDATA_2
DVPDATA_19
DVPDATA_18
DVPDATA_17
DVPDATA_16
DVPDATA_15
DVPDATA_14
DVPDATA_13
DVPDATA_12
DVPDATA_11
DVPDATA_10
DVPDATA_1
DVPDATA_0
DVPCNTL_MVP_1
DVPCNTL_MVP_0
DVPCNTL_2
DVPCNTL_1
DVPCNTL_0
DVPCLK
DPLUS
DPLL_VDDC
DPLL_PVSS
DPLL_PVDD
DMINUS
OUTOUT
BI
BI
G
D S
IN
G
D S
ININBIBIIN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DOC.NUMBER
of
INVENTECTITLE
DATE
CODE
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
FF
8
CHANGE by
8
REV
2 1
SHEET
SIZE
6857
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
TC7SZ08FU
P3V3S_DGPU
0_5%_2_DY
AMD_216_0833002_FCBGA_962P
A3 CS
Block Diagram
0.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
PVPCIE
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_10.1UF_6.3V_1
0.1UF_6.3V_1
1.27K_1%_2
2K_1%_2
10K_5%_210K_5%_2
AMD_216_0833002_FCBGA_962P
1K_5%_2
R5013
U5005
R5071R5070
U5001
U5001
C5052C5053
C5050C5051
C5048C5049
C5046C5047
C5044C5045
C5042C5043
C5040C5041
C5038C5039
C5036C5037
C5034C5035
C5032C5033
C5030C5031
C5028C5029
C5026C5027
C5024C5025
C5023C5022
R5034
R5035
R5039
34A8
34A8
42A1
42C4
42C4
42C4
42C4
42C4
42D4
42D4
42C4
42C4
42D4
42C4
42D4
42C4
42D4
42C4
42D4
42D4
42C4
42C4
42D4
42C4
42D4
42C4
42D4
42C4
42D4
42C4
42D4
42B1
42D1
42D1
42B1
42D1
42B1
42B1
42C1
42B1
42C1
42B1
42C1
42B1
42C1
42C1
42B1
42B1
42C1
42B1
42C1
42C1
42A1
42C1
42A1
42C1
42B1
42B1
42A1
48C3
42C1
48C3
42C4
42D4
42D4
42C4
42A1
42A1
34D7
34B5
34A8
34A8
21E3 51A8 27C7
34A8
34A8
51B6
27C3
51C7
28C3 34A8
34A8
VGA_LVDS_TXCL_DP
BUF_PLT_RST#
DGPU_HOLD_RST#DGPU_PERST
PEG_C_TX10_DP
PEG_RX15_DP
PEG_C_RX0_DPPEG_RX0_DPPEG_C_RX0_DNPEG_RX0_DN
PEG_C_RX1_DPPEG_RX1_DPPEG_C_RX1_DNPEG_RX1_DN
PEG_C_RX2_DPPEG_RX2_DPPEG_C_RX2_DNPEG_RX2_DN
PEG_C_RX3_DPPEG_RX3_DPPEG_C_RX3_DNPEG_RX3_DN
PEG_C_RX4_DPPEG_RX4_DPPEG_C_RX4_DNPEG_RX4_DN
PEG_C_RX5_DPPEG_RX5_DPPEG_C_RX5_DNPEG_RX5_DN
PEG_C_RX6_DPPEG_RX6_DPPEG_C_RX6_DNPEG_RX6_DN
PEG_C_RX7_DPPEG_RX7_DPPEG_C_RX7_DNPEG_RX7_DN
PEG_C_RX8_DNPEG_RX8_DNPEG_C_RX8_DPPEG_RX8_DP
PEG_C_RX9_DPPEG_RX9_DPPEG_C_RX9_DNPEG_RX9_DN
PEG_C_RX10_DPPEG_RX10_DPPEG_C_RX10_DNPEG_RX10_DN
PEG_C_RX11_DPPEG_RX11_DPPEG_C_RX11_DNPEG_RX11_DN
PEG_C_RX12_DPPEG_RX12_DPPEG_C_RX12_DNPEG_RX12_DN
PEG_C_RX13_DPPEG_RX13_DPPEG_C_RX13_DNPEG_RX13_DN
PEG_RX14_DPPEG_RX14_DN
PEG_RX15_DN
GPU_PCIE_CALRP
GPU_PCIE_CALRN
PEG_C_TX0_DPPEG_C_TX0_DN
PEG_C_TX1_DNPEG_C_TX1_DP
PEG_C_TX2_DNPEG_C_TX2_DP
PEG_C_TX3_DPPEG_C_TX3_DN
PEG_C_TX4_DPPEG_C_TX4_DN
PEG_C_TX5_DPPEG_C_TX5_DN
PEG_C_TX6_DPPEG_C_TX6_DN
PEG_C_TX7_DNPEG_C_TX7_DP
PEG_C_TX8_DPPEG_C_TX8_DN
PEG_C_TX9_DPPEG_C_TX9_DN
PEG_C_TX10_DN
PEG_C_TX11_DPPEG_C_TX11_DN
PEG_C_TX13_DPPEG_C_TX13_DN
PEG_C_TX14_DN
PEG_C_TX15_DNPEG_C_TX15_DP
CLK_PEG_REF_DN
PEG_C_RX15_DNPEG_C_RX15_DP
PEG_C_RX14_DNPEG_C_RX14_DP
PEG_C_TX12_DNPEG_C_TX12_DP
PEG_C_TX14_DP
VGA_LCM_VDDENVGA_INV_PWM_3
VGA_LVDS_TXDL1_DN
VGA_LVDS_TXCL_DN
VGA_LVDS_TXDL2_DPVGA_LVDS_TXDL2_DN
VGA_LVDS_TXDL0_DN
VGA_LVDS_TXDL1_DP
CLK_PEG_REF_DP
VGA_LVDS_TXDL0_DP
21
5
4
3
2
1
21
21
AK27
AF35AG36
AG38AH37
AH35AJ36
AJ38AK37
AN36AP37
AP35AR35
AR37AU39
AW37AU35
AK35AL36
AP34AR34
AJ27
AH16
AA30
N30N29
N33N32
P30P29
P33P32
T30T29
T33T32
U30U29
U33U32
W33W32
H33H32
K30K29
J33J32
K33K32
L30L29
L33L32
Y33Y32
M35L36
N38M37
P35N36
R38P37
T35R36
U38T37
V35U36
W38V37
Y35W36
F35E37
G38F37
H35G36
J38H37
K35J36
L38K37
AA38Y37
AB35AA36
Y30
Y29
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
2121
21
21
21
BI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
IN
IN
+-
OUTOUT
BIBI
BIBI
BIBI
BIBI
LVDS CONTROL
LVTMDP
VARY_BL
TXOUT_U3P
TXOUT_U3N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_L3P
TXOUT_L3N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
DIGON
CALIBRATION
CLOCK
PC
I EX
PR
ES
S IN
TE
RF
AC
E
PCIE_TX9P
PCIE_TX9N
PCIE_TX8P
PCIE_TX8N
PCIE_TX7P
PCIE_TX7N
PCIE_TX6P
PCIE_TX6N
PCIE_TX5P
PCIE_TX5N
PCIE_TX4P
PCIE_TX4N
PCIE_TX3P
PCIE_TX3N
PCIE_TX2P
PCIE_TX2N
PCIE_TX1P
PCIE_TX1N
PCIE_TX15P
PCIE_TX15N
PCIE_TX14P
PCIE_TX14N
PCIE_TX13P
PCIE_TX13N
PCIE_TX12P
PCIE_TX12N
PCIE_TX11P
PCIE_TX11N
PCIE_TX10P
PCIE_TX10N
PCIE_TX0P
PCIE_TX0N
PERSTB
PCIE_RX9P
PCIE_RX9N
PCIE_RX8P
PCIE_RX8N
PCIE_RX7P
PCIE_RX7N
PCIE_RX6P
PCIE_RX6N
PCIE_RX5P
PCIE_RX5N
PCIE_RX4P
PCIE_RX4N
PCIE_RX3P
PCIE_RX3N
PCIE_RX2P
PCIE_RX2N
PCIE_RX1P
PCIE_RX1N
PCIE_RX15P
PCIE_RX15N
PCIE_RX14P
PCIE_RX14N
PCIE_RX13P
PCIE_RX13N
PCIE_RX12P
PCIE_RX12N
PCIE_RX11P
PCIE_RX11N
PCIE_RX10P
PCIE_RX10N
PCIE_RX0P
PCIE_RX0N
PCIE_REFCLKP
PCIE_REFCLKN
PCIE_CALRP
PCIE_CALRNPWRGOOD
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BIBI
BI
BIBI
BI
BI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
R5022 OPENR5048 OPEN
SEYMOUR
THAMES
R5048 STUFFR5022 STUFF
6858
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
240_1%_2240_1%_2
240_1%_2
RSC_0402_DY
240_1%_2RSC_0402_DY
0.1
UF
_16V
_2
100_1%
_2
6263
P1V5S_DGPU
40.2
_1%
_2
1K
_5%
_2
5.11K_1%_2_DY
P3V3S_DGPU
AMD_216_0833002_FCBGA_962PAMD_216_0833002_FCBGA_962P
26
1
12
0.1
UF
_16V
_2
100_1%
_2
TP30
100_1%
_2
0.1
UF
_16V
_2
61
40.2
_1%
_2
P1V5S_DGPU
5554 54
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
120P
F_50V
_2
0.1
UF
_16V
_2
012345678
109
1112
10
2
43
5
76
8
109
11
13
1514
1716
18
51_5%_2
Block Diagram
CS
10_5%_2
5.1
K_1%
_2
A3
2019
2221
23
2524
2728
3029
31
3332
3534
36
3837
4039
41
4342
4544
46
4847
49
5150
5352
5655
5857
40.2
_1%
_2
5960
6362
0
2345678
109
1211
01234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253
565758
40.2
_1%
_2
59
100_1%
_2
6061
U5001U5001
R5012
R5029
C5200
R5032
R5025
R5001
C5201
TP13
R5002
R5020
C5202
R5021
R5024
R5052
R5022R5033
R5058
R5048R5047R5050
C5204
R5045
C5205
R5053
R5023
63C8
63D1
64D4 64D7 65D4
64D4 65D4
62C4
63C8
62C7
62C7
62D1
62D4 62D8 63D8
63C8
62D4 62D7
63D8
63D8
62C4
63C8
64D7 65D8
64D4 64D7 65D4 65D8
64D4 64D7 65D4 65D8
65D8
64C7
64C4
64C7
64C4
65C4
65C4
65C8
65C8
64C4
64C7
65C4
64C4
64C7
65C4
65C8
65C8
64C7
64C4
64C4
64C7
65C4
65C4
65C8
65C8
65C4 65C8
64C4 64C7
64B3 64D4 64D7
64B5 64C4 64C7
65B4 65D4 65D8
65B5 65C8 65D4
64C4 64C7
65C4 65C8
65C4 65C8
64C4 64C7
64C4 64C7
64C4 64C7
65C4 65C8
64C4 64C7
65C4 65C8
65C4 65C8
64D4 64D7 65D4 65D8
62D4 62D7 63D4
62D4 62D7 63D4
63D4 63D8
62C7
62D5 63D5
62C7
62C4
63C4
63C4
63C8
62C4
62C4
63C4
63C4
63C8
63C8
62C7
62C7
62C4
62C4
63C4
63C4
63C8
63C8
62B3 62D4 62D7
62B5 62C4 62C7
63B5 63C8 63D4
63B4 63D4 63D8
62C4 62C7
63C4 63C8
62C7
63C4
63C4
62C4 62C7
62C4 62C7
63C4 63C8
63D4
62C4 62C7
63C4 63C8
62C4 62C7
63C4
P1V05_REFSA_GPUP1V05_REFDA_GPU
DQA<63>DQA<62>DQA<61>
DQA<47>
DQA<36>
DQA<24>DQA<25>DQA<26>
DQMA<6>
DQB<27>
DQB<18>DQB<17>
MAA<1>
DQB<5>
MAB<13>
WEB1#WEB0#
DQSB7_DNDQSB6_DNDQSB5_DNDQSB4_DNDQSB3_DNDQSB2_DNDQSB1_DNDQSB0_DN
DQSB7_DPDQSB6_DPDQSB5_DPDQSB4_DPDQSB3_DPDQSB2_DPDQSB1_DPDQSB0_DP
RASB1#RASB0#
ODTB1ODTB0
MAB<9>MAB<8>MAB<7>MAB<6>MAB<5>MAB<4>MAB<3>MAB<2>
MAB_BA<1>MAB_BA<0>MAB_BA<2>MAB<12>MAB<11>MAB<10>
MAB<1>MAB<0>
DQMB<7>DQMB<6>DQMB<5>DQMB<4>DQMB<3>DQMB<2>DQMB<1>DQMB<0>
CSB1#_0
CSB0#_0
CLKB1_DNCLKB1_DP
CLKB0_DNCLKB0_DP
CKEB1CKEB0
CASB1#CASB0#
P1V05_REFSB_GPU
DQB<9>DQB<8>DQB<7>
DQB<63>DQB<62>DQB<61>DQB<60>
DQB<6>
DQB<59>DQB<58>DQB<57>DQB<56>DQB<55>DQB<54>DQB<53>DQB<52>DQB<51>DQB<50>DQB<49>DQB<48>DQB<47>DQB<46>DQB<45>DQB<44>DQB<43>DQB<42>DQB<41>DQB<40>
DQB<4>
DQB<39>DQB<38>DQB<37>DQB<36>DQB<35>DQB<34>DQB<33>DQB<32>DQB<31>DQB<30>
DQB<3>
DQB<29>DQB<28>
DQB<26>DQB<25>DQB<24>DQB<23>DQB<22>DQB<21>DQB<20>
DQB<2>
DQB<19>
DQB<16>DQB<15>DQB<14>DQB<13>DQB<12>DQB<11>DQB<10>
DQB<1>DQB<0>
DQA<52>
WEA1#WEA0#
DQSA7_DNDQSA6_DNDQSA5_DNDQSA4_DNDQSA3_DNDQSA2_DNDQSA1_DNDQSA0_DN
MAA<13>
DQSA7_DPDQSA6_DPDQSA5_DPDQSA4_DPDQSA3_DPDQSA2_DPDQSA1_DPDQSA0_DP
RASA1#RASA0#
ODTA1ODTA0
MAA<9>MAA<8>MAA<7>MAA<6>MAA<5>MAA<4>MAA<3>MAA<2>
MAA_BA<1>MAA_BA<0>MAA_BA<2>MAA<12>MAA<11>MAA<10>
MAA<0>
DQMA<7>
DQMA<5>DQMA<4>DQMA<3>DQMA<2>DQMA<1>DQMA<0>
CSA1#_0
CSA0#_0
CLKA1_DNCLKA1_DP
CLKA0_DNCLKA0_DP
CKEA1CKEA0
CASA1#CASA0#
DQA<9>DQA<8>DQA<7>
DQA<60>
DQA<6>
DQA<59>DQA<58>DQA<57>DQA<56>DQA<55>DQA<54>DQA<53>
DQA<51>DQA<50>
DQA<5>
DQA<49>DQA<48>
DQA<46>DQA<45>DQA<44>DQA<43>DQA<42>DQA<41>DQA<40>
DQA<4>
DQA<39>DQA<38>DQA<37>
DQA<35>DQA<34>DQA<33>DQA<32>DQA<31>DQA<30>
DQA<3>
DQA<29>DQA<28>DQA<27>
DQA<23>DQA<22>DQA<21>DQA<20>
DQA<2>
DQA<19>DQA<18>DQA<17>DQA<16>DQA<15>DQA<14>DQA<13>DQA<12>DQA<11>DQA<10>
DQA<1>DQA<0>
P1V05_REFDB_GPU
MAB<12..0>DQB<63..0>
VM_RESET
MAA<12..0>DQA<63..0>
AB11N10
AK5
AF5AK6
AE4T5
H1T3
H3
AD28
Y10T10
AA12Y12
W8
AA9Y8AA8AA7AC9AC8W9Y9
T8
U8U9N9N8N7P9T9P8
AM5AJ9AH1AB5V5P3K3F6
AH11
AF3AF1AD5AD3AD1AD6
AP5AP1
AB3
AP3AN4AM1AM6AL4AK1AM7AM8AL7AK9
AB1
AG7AG8AF9AF8AK3AJ4AH6AH5AG4AF6
AB6AA4
H6H5G4F5F3F1
Y5Y3
E1
Y1Y6V3V1V6U4T1T6R4P5
E3
P6N4M5M3M1M6L4K5K6J4
C3C5
AM3AJ8AH3AC4W4P1K1G7
AC10AD10
L10P10
AL10AK10
AD7AD8
L8L9
AA11U10
AA10W10
W7T7
L15K26
D9
A14E10
C14E22
C32D23
A32
K19K23
L20L18
AH12
M12M27
AG12N12L27
J19
H17J17H16J16G16L13H20H19
H23
G21H21J26H26J24H24J23G24
D7J10E12E16E20D25D29C34
D13F14E14D15F16A16
A5E6
D17
C6A6E8C8A8G9
K10K9G8
G10
F18
H11J13H13G13C10A10F10D11A12F12
A18C18
F30D31E32F32D33G32
E18D19
E34
F20A20D21F22A22C22E24A24C24F24
A35
A26C26F26D27E28A28C28F28A30C30
C35C37
F8J11C12C16C20E26E30A34
K16M13
K27K24
H14J14
G27H27
J20K21
K17K20
G19J21
21
21
21
21
21
21
21
1
21
21
21
21
21
21
2121
21
212121
21
21
21
21
21
BIBIBI
BIBIBIBI
BI
BI
BIBI
BIBI
BIBI
BIBI
OUTOUT
OUTOUT
OUTOUT
OUTOUT
OUT
OUT
OUTOUT
OUTOUT
OUT
GDDR5/DDR2/GDDR3
GD
DR
5
DDR3GDDR3/GDDR5DDR2
DDR3GDDR5/GDDR3DDR2
ME
MO
RY
IN
TE
RF
AC
E B
MAB1_8
MAB0_8
WEB1B
WEB0B
DDBIB1_3/QSB_7B/WDQSB_7
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_0/QSB_0B/WDQSB_0
EDCB1_3/QSB_7/RDQSB_7
EDCB1_2/QSB_6/RDQSB_6
EDCB1_1/QSB_5/RDQSB_5
EDCB1_0/QSB_4/RDQSB_4
EDCB0_3/QSB_3/RDQSB_3
EDCB0_2/QSB_2/RDQSB_2
EDCB0_1/QSB_1/RDQSB_1
EDCB0_0/QSB_0/RDQSB_0
RASB1B
RASB0B
ADBIB1/ODTB1
ADBIB0/ODTB0
MAB1_1/MAB_9
MAB1_0/MAB_8
MAB0_7/MAB_7
MAB0_6/MAB_6
MAB0_5/MAB_5
MAB0_4/MAB_4
MAB0_3/MAB_3
MAB0_2/MAB_2
MAB1_7/BA1
MAB1_6/BA0
MAB1_5/BA2
MAB1_4/MAB_12
MAB1_3/MAB_11
MAB1_2/MAB_10
MAB0_1/MAB_1
MAB0_0/MAB_0
DRAM_RST
WCKB1B_1/DQMB_7
WCKB1_1/DQMB_6
WCKB1B_0/DQMB_5
WCKB1_0/DQMB_4
WCKB0B_1/DQMB_3
WCKB0_1/DQMB_2
WCKB0B_0/DQMB_1
WCKB0_0/DQMB_0
CSB1B_1
CSB1B_0
CSB0B_1
CSB0B_0
CLKTESTB
CLKTESTA
CLKB1B
CLKB1
CLKB0B
CLKB0
CKEB1
CKEB0
CASB1B
CASB0B
TESTEN
MVREFSB
MVREFDB
DQB0_9/DQB_9
DQB0_8/DQB_8
DQB0_7/DQB_7
DQB1_31/DQB_63
DQB1_30/DQB_62
DQB1_29/DQB_61
DQB1_28/DQB_60
DQB0_6/DQB_6
DQB1_27/DQB_59
DQB1_26/DQB_58
DQB1_25/DQB_57
DQB1_24/DQB_56
DQB1_23/DQB_55
DQB1_22/DQB_54
DQB1_21/DQB_53
DQB1_20/DQB_52
DQB1_19/DQB_51
DQB1_18/DQB_50
DQB0_5/DQB_5
DQB1_17/DQB_49
DQB1_16/DQB_48
DQB1_15/DQB_47
DQB1_14/DQB_46
DQB1_13/DQB_45
DQB1_12/DQB_44
DQB1_11/DQB_43
DQB1_10/DQB_42
DQB1_9/DQB_41
DQB1_8/DQB_40
DQB0_4/DQB_4
DQB1_7/DQB_39
DQB1_6/DQB_38
DQB1_5/DQB_37
DQB1_4/DQB_36
DQB1_3/DQB_35
DQB1_2/DQB_34
DQB1_1/DQB_33
DQB1_0/DQB_32
DQB0_31/DQB_31
DQB0_30/DQB_30
DQB0_3/DQB_3
DQB0_29/DQB_29
DQB0_28/DQB_28
DQB0_27/DQB_27
DQB0_26/DQB_26
DQB0_25/DQB_25
DQB0_24/DQB_24
DQB0_23/DQB_23
DQB0_22/DQB_22
DQB0_21/DQB_21
DQB0_20/DQB_20
DQB0_2/DQB_2
DQB0_19/DQB_19
DQB0_18/DQB_18
DQB0_17/DQB_17
DQB0_16/DQB_16
DQB0_15/DQB_15
DQB0_14/DQB_14
DQB0_13/DQB_13
DQB0_12/DQB_12
DQB0_11/DQB_11
DQB0_10/DQB_10
DQB0_1/DQB_1
DQB0_0/DQB_0
GD
DR
5
DDR3GDDR5/GDDR3DDR2
GDDR5/DDR2/GDDR3
DDR3GDDR3/GDDR5DDR2
ME
MO
RY
IN
TE
RF
AC
E A
WEA1B
WEA0B
DDBIA1_3/QSA_7B/WDQSA_7
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_0/QSA_0B/WDQSA_0
MAA1_8
MAA0_8
EDCA1_3/QSA_7/RDQSA_7
EDCA1_2/QSA_6/RDQSA_6
EDCA1_1/QSA_5/RDQSA_5
EDCA1_0/QSA_4/RDQSA_4
EDCA0_3/QSA_3/RDQSA_3
EDCA0_2/QSA_2/RDQSA_2
EDCA0_1/QSA_1/RDQSA_1
EDCA0_0/QSA_0/RDQSA_0
RASA1B
RASA0B
ADBIA1/ODTA1
ADBIA0/ODTA0
MAA1_1/MAA_9
MAA1_0/MAA_8
MAA0_7/MAA_7
MAA0_6/MAA_6
MAA0_5/MAA_5
MAA0_4/MAA_4
MAA0_3/MAA_3
MAA0_2/MAA_2
MAA1_7/MAA_A15_BA1
MAA1_6/MAA_14_BA0
MAA1_5/MAA_13_BA2
MAA1_4/MAA_12
MAA1_3/MAA_11
MAA1_2/MAA_10
MAA0_1/MAA_1
MAA0_0/MAA_0
WCKA1B_1/DQMA_7
WCKA1_1/DQMA_6
WCKA1B_0/DQMA_5
WCKA1_0/DQMA_4
WCKA0B_1/DQMA_3
WCKA0_1/DQMA_2
WCKA0B_0/DQMA_1
WCKA0_0/DQMA_0
CSA1B_1
CSA1B_0
CSA0B_1
CSA0B_0
CLKA1B
CLKA1
CLKA0B
CLKA0
CKEA1
CKEA0
CASA1B
CASA0B
MEM_CALRP2
MEM_CALRP0
MEM_CALRN2
MEM_CALRN1
MEM_CALRN0
MVREFSA
MVREFDA
MEM_CALRP1
DQA0_9/DQA_9
DQA0_8/DQA_8
DQA0_7/DQA_7
DQA1_31/DQA_63
DQA1_30/DQA_62
DQA1_29/DQA_61
DQA1_28/DQA_60
DQA0_6/DQA_6
DQA1_27/DQA_59
DQA1_26/DQA_58
DQA1_25/DQA_57
DQA1_24/DQA_56
DQA1_23/DQA_55
DQA1_22/DQA_54
DQA1_21/DQA_53
DQA1_20/DQA_52
DQA1_19/DQA_51
DQA1_18/DQA_50
DQA0_5/DQA_5
DQA1_17/DQA_49
DQA1_16/DQA_48
DQA1_15/DQA_47
DQA1_14/DQA_46
DQA1_13/DQA_45
DQA1_12/DQA_44
DQA1_11/DQA_43
DQA1_10/DQA_42
DQA1_9/DQA_41
DQA1_8/DQA_40
DQA0_4/DQA_4
DQA1_7/DQA_39
DQA1_6/DQA_38
DQA1_5/DQA_37
DQA1_4/DQA_36
DQA1_3/DQA_35
DQA1_2/DQA_34
DQA1_1/DQA_33
DQA1_0/DQA_32
DQA0_31/DQA_31
DQA0_30/DQA_30
DQA0_3/DQA_3
DQA0_29/DQA_29
DQA0_28/DQA_28
DQA0_27/DQA_27
DQA0_26/DQA_26
DQA0_25/DQA_25
DQA0_24/DQA_24
DQA0_23/DQA_23
DQA0_22/DQA_22
DQA0_21/DQA_21
DQA0_20/DQA_20
DQA0_2/DQA_2
DQA0_19/DQA_19
DQA0_18/DQA_18
DQA0_17/DQA_17
DQA0_16/DQA_16
DQA0_15/DQA_15
DQA0_14/DQA_14
DQA0_13/DQA_13
DQA0_12/DQA_12
DQA0_11/DQA_11
DQA0_10/DQA_10
DQA0_1/DQA_1
DQA0_0/DQA_0
BI
OUT
OUTOUT
BI
OUT
BIBI
BIBI
BI
BIBIBI
BI
BIBIBI
BI
BI
BIBI
BI
BI
BIBI
BIBIBIBI
BIBI
OUTOUT
OUTOUT
OUTOUT
OUT
OUTOUT
OUT
OUT
OUTOUT
OUTOUT
OUT
OUT
OUTOUT
BI
OUT
BIBIBI
BI
BIBIBI
BI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
1.8V_504MA
1.8V_110MA
59 68
MODEL,PROJECT,FUNCTION
X01
XXX 21-OCT-2002
1310xxxxx-0-0
P1V8S_DGPU
AMD_216_0833002_FCBGA_962P
1U
F_6.3
V_2
FBM_11_160808_121T
0.1
UF
_16V
_2
P1V8S_DGPU
P1V8S_DGPU
P1V8S_DGPU
FBM_11_160808_121T
1U
F_6.3
V_2
10U
F_6.3
V_3 BLM18PG221SN1D
P1V8S_DGPU
0.0
1U
F_50V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
10U
F_6.3
V_3
1U
F_6.3
V_2
0.1
UF
_16V
_2
10U
F_6.3
V_3
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
PVCORE_DGPU
PVPCIE
PVCORE_DGPU
PVDDCORE_DGPU
P3V3S_DGPU
P1V5S_DGPU
PVPCIE
0.1
UF
_16V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
Block Diagram
CSC
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
10U
F_6.3
V_3
FBM_11_160808_121T
10U
F_6.3
V_3
FBM_11_160808_121T
10U
F_6.3
V_3
FBM_11_160808_121T
10U
F_6.3
V_3
U5001
L5013
C5115
C5114
C5113
C5112
C5111
C5110
C5126
C5136
C5135
C5125
C5124
C5134
C5146
C5133
C5123
C5122
C5132
C5130
C5121
C5120
C5129
C5145
C5144
C5143
C5154
C5153
C5152
C5165
C5164
C5197
C5195
C5193
C5192
C5151
C5150
C5148
C5163
C5161
C5160
C5147
C5159
C5191
C5190
C5166
C5189
C5188
C5169
C5168
C5167
C5119
C5086
C5085
C5084
C5083
C5082
C5081
C5080
C5092
C5091
C5090
C5089
C5097
C5096
C5101
C5100
C5095
C5094
C5099
C5098
C5266
C5265
C5108
C5208
C5103
C5102
C5106
L5010
L5015
C5207
C5206
C5213
C5210
C5209
C5079
C5078
C5077
C5088
C5087
L5009
C5093
C5107
C5105
C5104
L5016
L5014
P1V8S_PCIE_VDDR
PVPCIE_SPV10
P1V8S_VDDCT
P1V8S_VDDR4
P1V8S_SPV18
P1V8S_MPV
AG15AG13
AG11
AF15AF13
AF12AF11AD12
AG24AG23AF24AF23
G14G11AL9AK8AJ7
AG10
Y7Y11
U7U11R11
AF7
P7N11M11
L7L26L23L21L16L12
K8
AD11
K13K11
J9J7
H10G29G26G23G20G17
AC7
M18M16M15AD16AD13AC15AC12
Y13V15T15
AB13
T12R16R13R12N22N20N17N15N13M23
AA13
T27
N27
AB21AB18AB16AA27
Y28Y26Y23Y21Y18Y16V27V24V22
AA24
V20V17U26U23U21U18U16
T24T22
AA22
T20T17R26R23R21R18
N24M26AH28
AA20
AH27AH22AG21AG18AG16AF22AF20AF17AD26AD23
AA17
AD21AD18AC27AC24AC22AC20AC17AB28AB26AB23
AA15
AG27AG26AF27AF26
AN10
AM10
AN9
AB37Y31W30W29V28AA34AA33AA32AA31
N28M28L28J30J29H30H29G31
U28T28R28
G30
U12
M21
V12
M20
H8H7
AG28
AF28
AH29
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
SENESEVOLTAGE
CORE I/OISOLATED
TRANSLATIONLEVEL
I/O
MEM I/O
CORE
PCIE
PLL
PO
WE
R
FB_GND
FB_VDDCI
FB_VDDC
VDDC#30
VDDC#29
VDDCI#22
VDDCI#1
VDDCI#19
VDDCI#16
VDDCI#11
VDDCI#7
VDDC#8
VDDC#7
VDDC#58
VDDC#57
VDDC#56
VDDCI#2
VDDC#55
VDDC#54
VDDC#53
VDDC#52
VDDC#51
VDDC#50
VDDC#49
VDDC#48
VDDCI#21
VDDC#47
VDDC#6
VDDC#46
VDDC#45
VDDC#44
VDDC#43
VDDC/BIF_VDDC#42
VDDC#41
VDDC#40
VDDC#39
VDDC#38
VDDCI#20
VDDC#5
VDDC#37
VDDC#36
VDDC#35
VDDC#34
VDDCI#18
VDDCI#17
VDDC/BIF_VDDC#33
VDDC#32
VDDCI#15
VDDCI#14
VDDC#4
VDDCI#13
VDDCI#12
VDDC#31
VDDCI#10
VDDCI#9
VDDCI#8
VDDC#28
VDDC#27
VDDC#26
VDDC#25
VDDC#3
VDDC#24
VDDC#23
VDDC#22
VDDC#21
VDDC#20
VDDC#19
VDDC#18
VDDCI#6
VDDCI#5
VDDC#17
VDDC#2
VDDC#16
VDDC#15
VDDC#14
VDDC#13
VDDCI#4
VDDCI#3
VDDC#12
VDDC#11
VDDC#10
VDDC#9
VDDC#1
VDD_CT#4
VDD_CT#3
VDD_CT#2
VDD_CT#1
NC_VSSRHB
NC_VSSRHA
NC_VDDRHB
NC_VDDRHA
VDDR4#6
VDDR4#3
VDDR4#2
VDDR4#1
VDDR4#8
VDDR4#7
VDDR4#5
VDDR4#4
VDDR3#4
VDDR3#3
VDDR3#2
VDDR3#1
VDDR1#9
VDDR1#8
VDDR1#7
VDDR1#6
VDDR1#5
VDDR1#4
VDDR1#34
VDDR1#33
VDDR1#32
VDDR1#31
VDDR1#30
VDDR1#3
VDDR1#29
VDDR1#28
VDDR1#27
VDDR1#26
VDDR1#25
VDDR1#24
VDDR1#23
VDDR1#22
VDDR1#21
VDDR1#20
VDDR1#2
VDDR1#19
VDDR1#18
VDDR1#17
VDDR1#16
VDDR1#15
VDDR1#14
VDDR1#13
VDDR1#12
VDDR1#11
VDDR1#10
VDDR1#1
SPVSS
SPV10
PCIE_VDDR#8
PCIE_VDDR#7
PCIE_VDDR#6
PCIE_VDDR#5
PCIE_VDDR#4
PCIE_VDDR#3
PCIE_VDDR#2
PCIE_VDDR#1
PCIE_VDDC#9
PCIE_VDDC#8
PCIE_VDDC#7
PCIE_VDDC#6
PCIE_VDDC#5
PCIE_VDDC#4
PCIE_VDDC#3
PCIE_VDDC#2
PCIE_VDDC#12
PCIE_VDDC#11
PCIE_VDDC#10
PCIE_VDDC#1
SPV18
MPV18#2
MPV18#1
PCIE_VDDR/PCIE_PVDD
DOC.NUMBER
of
INVENTECTITLE
DATE
CODE
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
FF
8
CHANGE by
8
REV
2 1
SHEET
SIZE
6860
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
150_1%_2
AMD_216_0833002_FCBGA_962P150_1%_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
150_1%_2
0.1
UF
_16V
_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
1U
F_6.3
V_2
10U
F_6.3
V_3
P1V8S_DGPU
FBM_11_160808_121T
P1V8S_DGPU
P1V8S_DGPU
PVPCIE
10U
F_6.3
V_3
1U
F_6.3
V_2
FBM_11_160808_121T
1U
F_6.3
V_2
FBM_11_160808_121T
Block Diagram
CSA3
0.1
UF
_16V
_2
10U
F_6.3
V_3
1U
F_6.3
V_2
PVPCIE
PVPCIE
10U
F_6.3
V_3
FBM_11_160808_121T
10U
F_6.3
V_3
FBM_11_160808_121T
FBM_11_160808_121T
10U
F_6.3
V_3
0.1
UF
_16V
_2
L5022
C5235
C5236
C5237
L5021
C5232
C5233
C5234
L5020
C5229
C5230
C5231
C5227
C5226
L5019
C5228
C5223
C5225
L5018
C5224
L5017
C5220
C5221
C5222
U5001
R5040R5041
R5042
60C6
60C6
60B6
60B3
60C3
60B3
60B6
60B3 60C3
DPAB_VDD10
DPAB_VDD18
DPAB_VDD18
DPEF_VDD18
DPCD_VDD18
DPEF_VDD18
DPCD_VDD10
DPCD_VDD18
DPEF_VDD10
DPCD_VDD18
DPEF_VDD18
DPAB_VDD18
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
AL38
AM37
AM39
AG34AF34
AK34AK33
AJ34AH34
AM33AL33
AV19
AU18
AW18
AP23AP22
AP15AP14
AP21AP20
AT13AP13
AV29
AU28
AW28
AP26AP25
AP33AN33
AP24AN24
AP32AP31
AM35
AN38
AR18
AV17
AR28
AV27
AM34AL34AK39AH39AF39
AU37AR39AP39AN34
AW22AW20AP19AP18AN19
AW16AW14AP17AP16AN17
AW32AW30AP30AP29AN29
AW26AW24AP28AP27AN27
2121
21
IN
IN
IN
IN
IN
IN
DP E/F POWER
DP C/D POWER DP A/B POWER
DP PLL POWER
DP/DPF_VSSR#5
DP/DPF_VSSR#4
DP/DPF_VSSR#3
DP/DPF_VSSR#2
DP/DPF_VSSR#1
DPEF/DPF_VDD18#2
DPEF/DPF_VDD18#1
DPEF/DPF_VDD10#2
DPEF/DPF_VDD10#1
DP_VSSR/DPF_PVSS
DPEF_VDD18/DPF_PVDD
DPEF_CALR
DP/DPE_VSSR#4
DP/DPE_VSSR#3
DP/DPE_VSSR#2
DP/DPE_VSSR#1
DPEF/DPE_VDD18#2
DPEF/DPE_VDD18#1
DPEF/DPE_VDD10#2
DPEF/DPE_VDD10#1
DP_VSSR/DPE_PVSS
DPEF_VDD18/DPE_PVDD
DP/DPD_VSSR#5
DP/DPD_VSSR#4
DP/DPD_VSSR#3
DP/DPD_VSSR#2
DP/DPD_VSSR#1
DPCD/DPD_VDD18#2
DPCD/DPD_VDD18#1
DPCD/DPD_VDD10#2
DPCD/DPD_VDD10#1
DP_VSSR/DPD_PVSS
DPCD_VDD18/DPD_PVDD
DPCD_CALR
DP/DPC_VSSR#5
DP/DPC_VSSR#4
DP/DPC_VSSR#3
DP/DPC_VSSR#2
DP/DPC_VSSR#1
DPCD/DPC_VDD18#2
DPCD/DPC_VDD18#1
DPCD/DPC_VDD10#2
DPCD/DPC_VDD10#1
DP_VSSR/DPC_PVSS
DPCD_VDD18/DPC_PVDD
DP/DPB_VSSR#5
DP/DPB_VSSR#4
DP/DPB_VSSR#3
DP/DPB_VSSR#2
DP/DPB_VSSR#1
DPAB/DPB_VDD18#2
DPAB/DPB_VDD18#1
DPAB/DPB_VDD10#2
DPAB/DPB_VDD10#1
DP_VSSR/DPB_PVSS
DPAB_VDD18/DPB_PVDD
DPAB_CALR
DP/DPA_VSSR#5
DP/DPA_VSSR#4
DP/DPA_VSSR#3
DP/DPA_VSSR#2
DP/DPA_VSSR#1
DPAB/DPA_VDD18#2
DPAB/DPA_VDD18#1
DPAB/DPA_VDD10#2
DPAB/DPA_VDD10#1
DP_VSSR/DPA_PVSS
DPAB_VDD18/DPA_PVDD
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
61 68
MODEL,PROJECT,FUNCTION
X01
XXX 21-OCT-2002
1310xxxxx-0-0
AMD_216_0833002_FCBGA_962P
C CS
Block Diagram
U5001
PX_EN
AW39AW1A39
H39H34H31G34G33F39
Y39Y34W34W31V39V34
F34
U34U31T39T34T31R34P39P34P31N34
E39
N31M39M34L34L31K39K34K31J34J31
AB39
AL21
F13F11E5E35C39C1B9B7B33
AA28
B31B29B27B25B23B21B19B17B15B13
AA26
B11AR5AP9AP7AP11AN8AN6AN30AN2AN11
AA23
AM9AM31AM11AL8AL6AL32AL26AL23
AL20
AA21
AL2AL17AL14AL11AK7AK31AK11AJ6AJ28AJ2
AA2
AJ11AJ10AH21AG9AG6AG22AG20AG2AG17AF21
AA18
AF18AF16AF10AE6AE2AD9AD27AD24AD22AD20
AA16
AD17AD15AC6AC28AC26AC23AC21AC2AC18AC16
A37
AC13AC11
Y27Y24Y22Y20Y17Y15
AB27
W6W2
V26V23V21V18V16
V13
V11U6
AB24
U27U24U22U20
U2U17U15
U13
T26T23
AB22
T21T18T16T13T11
R6R27R24R22R20
AB20
R2R17R15
N6N26N23N21
N2N18N16
AB17
M24M22M17
L6L24L22
L2L17L11
K7
AB15
K14J8J6
J27J2H9G6G2F9F7
AB12
F33F31F29F27F25F23F21F19F17F15
AA6
A3
GND
GND#162
GND#152
GND#97
GND#96
GND#95
GND#94
GND#93
GND#92
GND#91
GND#90
GND#89
GND#88
GND#9
GND#87
GND#86
GND#85
GND#84
GND#83
GND#82
GND#81
GND#80
GND#79
GND#8
GND#78
GND#77
GND#76
GND#75
GND#74
GND#73
GND#72
GND#71
GND#70
GND#69
GND#7
GND#68
GND#67
GND#66
GND#65
GND#64
GND#63
GND#62
GND/PX_EN#61
GND#60
GND#59
GND#6
GND#58
GND#57
GND#56
GND#55
GND#54
GND#53
GND#52
GND#51
GND#50
GND#49
GND#5
GND#48
GND#47
GND#46
GND#45
GND#44
GND#43
GND#42
GND#41
GND#40
GND#4
GND#39
GND#38
GND#37
GND#36
GND#35
GND#34
GND#33
GND#32
GND#31
GND#30
GND#3
GND#29
GND#28
GND#27
GND#26
GND#25
GND#24
GND#23
GND#22
GND#21
GND#20
GND#2
GND#19
GND#18
GND#175
GND#174
GND#173
GND#172
GND#171
GND#17
GND#170
GND#169
GND#168
GND#167
GND#166
GND#165
GND#164
GND#163
GND#161
GND#160
GND#16
GND#159
GND#158
GND#157
GND#156
GND#155
GND#154
GND#153
GND#151
GND#150
GND#149
GND#15
GND#148
GND#147
GND#146
GND#145
GND#144
GND#143
GND#142
GND#141
GND#140
GND#139
GND#14
GND#138
GND#137
GND#136
GND#135
GND#134
GND#133
GND#132
GND#131
GND#130
GND#129
GND#13
GND#128
GND#127
GND#126
GND#125
GND#124
GND#123
GND#122
GND#121
GND#120
GND#119
GND#12
GND#118
GND#117
GND#116
GND#115
GND#114
GND#113
GND#112
GND#111
GND#110
GND#109
GND#11
GND#108
GND#107
GND#106
GND#105
GND#104
GND#103
GND#102
GND#101
GND#100
GND#98
GND#10
GND#1
VSS_MECH#3
VSS_MECH#2
VSS_MECH#1
PCIE_VSS#9
PCIE_VSS#8
PCIE_VSS#7
PCIE_VSS#6
PCIE_VSS#5
PCIE_VSS#4
PCIE_VSS#35
PCIE_VSS#34
PCIE_VSS#33
PCIE_VSS#32
PCIE_VSS#31
PCIE_VSS#30
PCIE_VSS#3
PCIE_VSS#29
PCIE_VSS#28
PCIE_VSS#27
PCIE_VSS#26
PCIE_VSS#25
PCIE_VSS#24
PCIE_VSS#23
PCIE_VSS#22
PCIE_VSS#21
PCIE_VSS#20
PCIE_VSS#2
PCIE_VSS#19
PCIE_VSS#18
PCIE_VSS#17
PCIE_VSS#16
PCIE_VSS#15
PCIE_VSS#14
PCIE_VSS#13
PCIE_VSS#12
PCIE_VSS#11
PCIE_VSS#10
PCIE_VSS#1
IN
DOC.NUMBER
of
INVENTECTITLE
DATE
CODE
E
D
C
B
A
7 6 5 4 3 2 1
7 6 5 4 3
E
D
C
B
A
FF
8
CHANGE by
8
REV
2 1
SHEET
SIZE
6862
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SAM_K4B1G1646D_HCF7_FBGA_100P
13
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
1
A3 CS
Block Diagram
P1V5S_DGPU
0
1U
F_6.3
V_2
1U
F_6.3
V_2
4.9
9K
_1%
_2
P1V5S_DGPU
243_1%_2
13
8
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
P1V5S_DGPUP1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
0.1
uF
_16V
_2
0.0
1U
F_50V
_2
0.1
uF
_16V
_2
0.1
uF
_16V
_2
2.2
UF
_6.3
V_2
0.1
uF
_16V
_2
23456789101112
4.9
9K
_1%
_2
4.9
9K
_1%
_2
10UF_6.3V_310UF_6.3V_3
243_1%_2
56_5%_256_5%_2
4.9
9K
_1%
_2
4.9
9K
_1%
_2
012345
76
9101112
4.9
9K
_1%
_2
4.9
9K
_1%
_2
10UF_6.3V_3
SAM_K4B1G1646D_HCF7_FBGA_100P
10UF_6.3V_3
4.9
9K
_1%
_2
U5501U5500
R5506
R5507
C5503
C5534C5533
R5508
R5541
C5516
R5540
R5504
R5505
C5502
C5532
C5531
C5530
C5529
C5528
R5509
R5502
R5503
C5527
C5501
C5526
C5525
C5524
R5500
R5501
C5500
C5523
C5522
C5521
C5520
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8 58D8
58D8
58D8
58D8
58D8
58B5 62C7
58C5 62C7
58C5
58C5
58D5
58C5
58C5
58D5
58C5
58D5
58B5 62C7
58B5 62B5 62C7
58B5 62B3 62D7
58A5 62C4
58B5 62C4
58C5
58D5 62D4 63D4 63D8
58D5 62D4 63D4 63D8
58D5 62D4 63D4 63D8
58B5 62D4 62D7
58C5
58A5 62C7
58B5 62C7
58B5 62C7
58C5
58D5
58A5 58D4 62D8 63D4 63D8
58B5 62C4
58B5 62C4
62D7
58C5 62C4
58B5 62C4
58B5 62B5 62C4
58B5 62B3 62D4
58A1 62C4 63C4 63C8 64C4 64C7 65C4 65C8
62B2
62B4
62D4
58A1 62C7 63C4 63C8 64C4 64C7 65C4 65C8
62D4
58B5 62C4 62C7
62A7
62A8
58A5 58D4 62D4 63D4 63D8
62D7
58D5 62D7 63D4 63D8
58D5 62D7 63D4 63D8
58D5 62D7 63D4 63D8
CLKA0_DPCLKA0_DN
DQA<27>DQA<30>
DQA<28>DQA<24>
MAA<0>
VRAM_VREFD_A<1>VRAM_VREFC_A<2>
VM_RESET
DQMA<2>
DQSA3_DN
CKEA0
ODTA0CSA0#_0
DQA<23>
RASA0#
MAA<1>MAA<2>MAA<3>MAA<4>MAA<5>MAA<6>MAA<7>MAA<8>MAA<9>MAA<10>MAA<11>MAA<12>MAA<13>
MAA_BA<0>MAA_BA<1>MAA_BA<2>
CASA0#WEA0#
DQSA3_DPDQSA2_DP
DQMA<3>
DQSA2_DN
DQA<26>DQA<31>DQA<29>DQA<25>
DQA<19>DQA<18>DQA<21>DQA<16>
DQA<17>DQA<22>DQA<20>DQA<11>
DQA<10>DQA<14>
DQA<12>DQA<13>DQA<9>
DQA<8>DQA<15>
DQA<7>DQA<5>
DQA<6>
DQA<4>
DQA<1>
DQA<3>
DQA<2>
DQA<0>
DQSA0_DPDQSA1_DP
DQMA<0>
DQSA0_DN
DQMA<1>
WEA0#CASA0#
DQSA1_DN
MAA_BA<0>MAA_BA<1>MAA_BA<2>
CLKA0_DP
MAA<13..0>
RASA0#CSA0#_0
VRAM_VREFC_A<0>
MAA<13>
MAA<11>
ODTA0
CKEA0CLKA0_DNCLKA0_DP
MAA<5>
VM_RESET
MAA<6>MAA<7>
MAA<3>MAA<2>
VRAM_VREFD_A<1>VRAM_VREFC_A<2>
CLKA0_DN
VRAM_VREFD_A<3>VRAM_VREFC_A<0>
MAA<0>MAA<1>
MAA<4>
MAA<8>MAA<9>MAA<10>
MAA<12>
MAA<13..0>
VRAM_VREFD_A<3>
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
212
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
212
1
21
21
21
21
IN
BI
BI
BI
BI
BI
BI
BI BIBI
BI
BIBIBIBIBI
BI
IN
BIBI
IN
BI
IN
IN IN
BI
BIBI
BIBI
IN
ININ
ININ
IN
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
ININ
IN
BIBI
BI
BIBI
BIBI
BI
IN
BI
BI
BIBIBIBIBIBI
IN
IN
IN
BI
BIBI
BI
IN
BI
BI
INININ
IN
ININ
BI BI
BI BI
BI BI
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6863
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
1U
F_6.3
V_2
12
243_1%_2
67
4.9
9K
_1%
_2
4.9
9K
_1%
_2
SAM_K4B1G1646D_HCF7_FBGA_100P
10UF_6.3V_3 10UF_6.3V_3
4.9
9K
_1%
_2
4.9
9K
_1%
_2
1312111098
67
5
34
12
0
56_5%_2
4.9
9K
_1%
_2
4.9
9K
_1%
_2
56_5%_2
243_1%_2
SAM_K4B1G1646D_HCF7_FBGA_100P
10UF_6.3V_3
A3
4.9
9K
_1%
_2
4.9
9K
_1%
_2
10UF_6.3V_3
CS
Block Diagram
13
11
98
10
543210
0.1
uF
_16V
_2
2.2
UF
_6.3
V_2
0.1
uF
_16V
_2
0.1
uF
_16V
_2
0.0
1U
F_50V
_2
0.1
uF
_16V
_2
P1V5S_DGPU
P1V5S_DGPU P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU P1V5S_DGPU
P1V5S_DGPU
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
P1V5S_DGPU P1V5S_DGPU
U5503U5502
R5517
C5549
R5516
C5548
C5507
C5547
C5546
R5518
R5543R5542
C5517
R5514
R5515
C5506
C5545
C5544
C5543
C5542
R5519
R5512
R5513
C5505
C5541
C5540
C5539
C5538
R5510
R5511
C5504
C5537
C5536
C5535
58D8
58D8
58D8
58D8
63D8
58D8
58D8
58D8
58D8
58D8
58D8 58D8
58D8
58C5
58C5
58C5
58C5
58C5
58C5
58D8
58D8
58D8
58D8
58D8
58D8
58A5 63C4
58B5 63C4
58B5 63C4
58D8
58A5 63C8
63A4
58D8
58D8
58D5 62D4 62D7 63D8
63A3
63D8
58A1 62C4 62C7 63C4 64C4 64C7 65C4 65C8
58B5 63C4
58B5 63C4
63D8
58A5 58D4 62D4 62D8 63D4
63A6
63A8
63D4
58B5 63D4 63D8
58A1 62C4 62C7 63C8 64C4 64C7 65C4 65C8
58C5
58C5
58C5
58D5
58C5
63D4
58A5 58D4 62D4 62D8
58D5 62D4 62D7 63D8
58D5 62D4 62D7 63D8
58B5 63C8 63D4
58B5 63C4
58D5 62D4 62D7 63D4
58D5 62D4 62D7 63D4
58D5 62D4 62D7 63D4
58B5 63B4 63D4
58B5 63B5 63D4
58B5 63C8
58C5
58B5 63C8
58B5 63C8
58B5 63B4 63D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58D8
58B5 63C8
58B5 63C8
58B5 63B5 63C8
58D8
DQA<50>
DQA<49>DQA<52>
DQA<55>DQA<48>
DQA<53>
DQA<47>
DQA<45>DQA<41>
DQA<40>DQA<46>DQA<42>
DQA<44>
MAA<5>
DQA<59>DQA<57>DQA<56>
VM_RESET
MAA<12>MAA<11>
DQA<60>MAA<7>
DQA<43>
MAA<11>MAA<12>
MAA<4>
DQA<63>
DQMA<6>DQMA<7>
DQSA6_DNDQSA7_DN
DQSA7_DPDQSA6_DP
DQA<61>DQA<58>
DQA<62>
WEA1#CASA1#RASA1#
DQA<51>
WEA1#
MAA<0>
VRAM_VREFC_A<6>
MAA<0>MAA<1>
MAA_BA<0>
VRAM_VREFD_A<5>
VRAM_VREFC_A<4>
ODTA1
CKEA1
VRAM_VREFD_A<7>
MAA<13>
MAA<10>MAA<9>MAA<8>MAA<7>MAA<6>MAA<5>MAA<4>MAA<3>MAA<2>MAA<1>
MAA<13..0>
VRAM_VREFD_A<7>VRAM_VREFC_A<4>
VRAM_VREFC_A<6>
CLKA1_DP
VM_RESET
DQMA<5>
DQSA4_DN
DQSA5_DP
DQMA<4>
DQSA5_DN
VRAM_VREFD_A<5>
MAA<13..0>
MAA_BA<2>MAA_BA<1>
MAA<13>
MAA<10>MAA<9>MAA<8>
MAA<6>
MAA<3>MAA<2>
CLKA1_DN
CSA1#_0
MAA_BA<0>MAA_BA<1>MAA_BA<2>
CLKA1_DPCLKA1_DN
RASA1#
DQSA4_DP
CASA1#
CSA1#_0
CLKA1_DP
DQA<35>DQA<38>DQA<33>DQA<37>DQA<32>
DQA<36>DQA<34>DQA<39>
ODTA1
CKEA1CLKA1_DN
DQA<54>
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
21
21
21
21
21
21
21
2121
21
21
212
1
21
21
21
21
21
21
212
1
21
21
21
21
21
212
1
21
21
21
IN
BIBIBI
BIBI
BI
BI
BI
BI
BI
BI
BI
BIBIBIBI
ININ
BI
BIBI
BI
IN
IN
ININ
IN
ININ
ININ
IN
BI
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
BI
BI
BIBI
BIBI
BI
BI
BIBIBI
BIBIBIBI
BIBI
BI
BIBI
ININ
BI
BI
BIBIBI
IN
IN
ININ
IN
ININ
ININ
IN
BI
BIBI
BI
BIBI
IN
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6864
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SAM_K4B1G1646D_HCF7_FBGA_100P
12
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPUP1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
109
4.9
9K
_1%
_2
243_1%_2
SAM_K4B1G1646D_HCF7_FBGA_100P
4.9
9K
_1%
_2
4.9
9K
_1%
_2
1312111098
67
5
34
12
0
4.9
9K
_1%
_2
4.9
9K
_1%
_2
56_5%_2 56_5%_2
243_1%_2
10UF_6.3V_3
A3 CS
Block Diagram
4.9
9K
_1%
_2
4.9
9K
_1%
_2
13
11
87654
210
0.1
uF
_16V
_2 0
.1uF
_16V
_2
0.0
1U
F_50V
_2
0.1
uF
_16V
_2
0.1
uF
_16V
_2
4.9
9K
_1%
_2
10UF_6.3V_3 10UF_6.3V_310UF_6.3V_3
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
2.2
UF
_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
3
C5558
C5559
C5560
C5561
C5562
C5554
C5552
C5553
C5551
C5550
U5504
R5526
R5527
C5511
U5505
C5564C5563
R5528
R5545
C5518
R5544
R5524
R5525
C5510
R5529
R5522
R5523
C5557
C5509
C5556
C5555
R5520
R5521
C5508
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D1
58D1
58D1
58B1
58C1
58B1
58B1
58A1
58D4
58D4
58D4
58D4
58D4
58D4
58C1
58D1
58C1
58C1
58C1
58D1
64C4
58B1 64C4
64C4
64C4
64B3 64D4
58B1 64B5 64C4
58B1 64C4
64C4
58A1 62C4 62C7 63C4 63C8 64C4 65C4 65C8
64D7
58A1 58D1 64D4 65D4 65D8
64D4 65D4 65D8
64D4 65D4 65D8
64D4 65D4 65D8
64A7
64A8
58B1 64C4 64C7
64D4
58B1 64D4 64D7
58A1 62C4 62C7 63C4 63C8 64C7 65C4 65C8
58C1
58D1
58C1
58C1
58A1 64C7
58B1 64C7
58B1 64C7
58B1 64B5 64C7
58B1 64B3 64D7
58B1 64C7
58C1 64C7
58B1 64C7
58C1
58D1
64D4
58D1 64D7 65D4 65D8
58D1 64D7 65D4 65D8
58D1 64D7 65D4 65D8
58A1 58D1 64D7 65D4 65D8
64B4
64B2
64D7
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
DQB<9>
DQB<12>DQB<14>DQB<8>
DQB<15>
DQB<11>
DQB<20>
MAB<0>
VRAM_VREFD_B<1>VRAM_VREFC_B<2>
VM_RESET
DQMB<2>
DQSB1_DN
CKEB0
ODTB0CSB0#_0
CLKB0_DPCLKB0_DN
DQB<21>
RASB0#
MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>
MAB_BA<0>MAB_BA<1>MAB_BA<2>
CASB0#WEB0#
DQSB1_DPDQSB2_DP
DQMB<1>
DQSB2_DN
DQB<13>DQB<10>
DQB<19>DQB<23>DQB<16>
DQB<17>DQB<22>DQB<18>
DQB<25>
DQB<24>DQB<28>
DQB<1>
MAB<13>
DQB<6>DQB<3>
DQB<29>DQB<27>DQB<31>
DQSB0_DN
DQMB<0>
DQSB3_DN
DQSB3_DPDQSB0_DP
DQMB<3>
WEB0#
CKEB0
ODTB0CSB0#_0
CLKB0_DPCLKB0_DN
RASB0#CASB0#
VM_RESET
VRAM_VREFD_B<3>
MAB<13..0>
MAB_BA<1>MAB_BA<2>
MAB_BA<0>
MAB<12>MAB<11>MAB<10>MAB<9>MAB<8>MAB<7>MAB<6>MAB<5>MAB<4>MAB<3>MAB<2>MAB<1>MAB<0>
VRAM_VREFD_B<3>VRAM_VREFC_B<0>
CLKB0_DN
VRAM_VREFC_B<2>
CLKB0_DP
VRAM_VREFD_B<1>
MAB<13..0>
VRAM_VREFC_B<0>
DQB<30>
DQB<5>
DQB<26>
DQB<0>DQB<4>
DQB<7>DQB<2>
21
21
21
21
21
21
21
21
21
21
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
212
1
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
212
1
IN
BI
BI
BIBI
BIBI
BI
BI
BI
BI
BIBI
BI
BI
BI
BI
ININ
BI
BI
BIBI
IN
IN
IN
ININ
IN
IN
ININ
ININ
BIBI
BI
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BIBI
BI
BI
BI
BI
BI
IN
BIBIBI
ININ
BI
BI
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
IN
ININ
IN
INININININ
BIBI
BI
IN
BI
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6865
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
6
P1V5S_DGPU
P1V5S_DGPU P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU P1V5S_DGPU
P1V5S_DGPU
P1V5S_DGPU
A3 CS
Block Diagram
2.2
UF
_6.3
V_2
10UF_6.3V_3
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
1U
F_6.3
V_2
0.1
UF
_16V
_2
0.0
1U
F_50V
_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
0.1
UF
_16V
_2
56_5%_2
0
21
345
7
10
89
111213
10UF_6.3V_3
4.9
9K
_1%
_2
4.9
9K
_1%
_2
10UF_6.3V_3
243_1%_2
56_5%_2
4.9
9K
_1%
_2
4.9
9K
_1%
_2
0
21
43
5
76
8910111213
4.9
9K
_1%
_2
4.9
9K
_1%
_2
10UF_6.3V_3
SAM_K4B1G1646D_HCF7_FBGA_100P
243_1%_2
4.9
9K
_1%
_2
4.9
9K
_1%
_2
SAM_K4B1G1646D_HCF7_FBGA_100P
C5573
C5574
C5575
C5576
C5577
C5569
C5568
C5567
C5566
C5565
U5506
R5536
R5537
C5579
C5515
U5507
C5578
R5538
R5547
C5519
R5546
R5534
R5535
C5514
R5532
R5533
C5513
C5572C5571
C5570
R5539
R5530
R5531
C5512
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
64D7
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58B1 65D4 65D8
58B1 65C8 65D4
58A1 58D1 64D4 65D8
65D4 65D4
65A6
65A8
58A1 58D1 64D4 64D7 65D4
58D1 64D4 64D7 65D4
58D1 64D4 64D7 65D4
58D1 64D4 64D7 65D4
65D8
58C1
58C1
58B1 65C4
58B1 65C4
58B1 65C4
58B1 65B4 65D4
58B1 65B5 65D4
58B1 65C4
58B1 65C4
58A1 65C4
58C1
58C1
58C1
58C1
58A1 62C4 62C7 63C4 63C8 64C4 64C7 65C4
65D8
65A4
58A1 62C4 62C7 63C4 63C8 64C4 64C7 65C8
58C1
58C1
58B1 65C8
58B1 65C8
58B1 65C8
58B1 65B4 65D8
58B1 65B5 65C8
58B1 65C8
58D1 64D4 64D7 65D8
58D1 64D4 64D7 65D8
58D1 64D4 64D7 65D8
58B1 65C8
58A1 65C8
58C1
58C1
58D1
58C1
58D4
58D4
58D4
58D4
58D4
58D4
58D4
58D4
65A3
DQB<62>DQB<63>
DQB<58>DQB<60>
DQB<57>
DQB<55>
DQB<54>DQB<48>DQB<50>
DQB<53>DQB<49>
DQB<52>DQB<51>
DQB<39>
DQB<37>DQB<36>
DQB<34>DQB<33>
DQB<32>
MAB<6>
DQB<59>
DQB<56>DQB<61>
CLKB1_DPCLKB1_DN
MAB<13..0>
VRAM_VREFD_B<5>VRAM_VREFC_B<6>
VRAM_VREFD_B<7>VRAM_VREFC_B<4>
MAB<0>MAB<13..0>MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>
MAB<13>MAB<12>MAB<11>
MAB_BA<1>MAB_BA<2>
MAB_BA<0>
VRAM_VREFD_B<7>
DQMB<7>
DQSB6_DN
CKEB1
ODTB1CSB1#_0
CLKB1_DPCLKB1_DN
RASB1#CASB1#WEB1#
DQSB6_DPDQSB7_DP
DQMB<6>
DQSB7_DN
VM_RESET
VRAM_VREFC_B<4>
MAB<0>
VRAM_VREFC_B<6>
VM_RESET
DQMB<5>
DQSB4_DN
CKEB1
ODTB1CSB1#_0
CLKB1_DPCLKB1_DN
RASB1#
MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>
MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>
MAB_BA<0>MAB_BA<1>MAB_BA<2>
CASB1#WEB1#
DQSB4_DPDQSB5_DP
DQMB<4>
DQSB5_DN
DQB<35>
DQB<46>DQB<43>DQB<47>DQB<40>DQB<45>DQB<42>DQB<44>DQB<41>
DQB<38>
VRAM_VREFD_B<5>
21
21
21
21
21
21
21
21
21
21
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
21
21
21
L9
L4
G2G10
F10E9E3D9D2
B2B10
T2T10
P2P10
M2M10
J9J3G9E2B4A10
H2M9
H3H10
F2E10D3
C2C10
A9A2
R2R10
N2N10
K9K3G8D10B3
T3
J4
K2
L10
J2L2
J10
T11T1
A11A1
A4B9A3A8C3C9C4D8
B8
C8
G4
F4
H8G3H9H4F9F3F8E4
D4E8
L3
K10K8J8
K4
M4N9M3
R4T9R3R9P3P9N3P4
M8T8T4N8R8L8
P8N4
21
21
21
21
21
21
212
1
21
212
1
21
21
21
21
21
212
1
IN
BI
BIBI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BIBI
BI
ININ
BI
BI
BIBI
IN
ININ
INININ
ININ
INININ
BIBI
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
BI
BI
BI
BI
BI
BIBIBI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BIBIBI
ININ
BI
BI
NC
NC
NC
NC
NC_CE1
NC_ZQ1
A0
VREFDQ
VREFCA
VSSQ#G10
VSSQ#E3
VSSQ#G2
VSSQ#F10
VSSQ#E9
NC_ODT
NC_CSI
RESET
DMU
DQSL
CKE_CKE0
ODT
CS
CK
CK
DQU4
VDD#K9
VDD#R10
VDD#R2
VDD#N10
VDD#N2
RAS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15_BA3
BA0
BA1
BA2
CAS
WE
DQSL
DQSU
DML
DQSU
ZQ_ZQ0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU5
DQU6
DQU7
VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
IN
IN
INININ
ININ
INININ
BI
BI
BI
BIBI
BIBI
IN
IN
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6866
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
WCM_2012_900T
SUYIN_020173GR004M555ZL_4P
P5V0A_USB3
Block Diagram
CSA3
CN2001
L200130C5 51C2
30C5 51C2
USB_P2_DNUSB_P2_DP
USB_L_P2_DNUSB_L_P2_DP
1
4 G4G3G2G1
23
2134
VCC
GND G4
G3
G2
G1
DATA-
DATA+BIBI
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
REFERENCE 9000~9999(SMALL BOARD)
POWER BUTTON
6867
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
SMDPAD_1P_40X120
SMDPAD_1P_40X120
PHP_PESD5V2S2UT_SOT23_3P_DY
DGND_PWRSW_DB
1000PF_50V_2_DY
FIX_MASK
SCREW540_700_NP_1P
SCREW540_700_NP_1P
MISAKI_NTC017_DA1G_E160T_6P
A3 CS
Block Diagram
FIX_MASK FIX_MASKFIX_MASKFIX_MASKFIX_MASK
DGND_PWRSW_DB
PAD9001
PAD9000
D9000
C9000
SW9000
S9001
S9000
FIX9005FIX9004FIX9003FIX9002FIX9001FIX9000
1
1
32 1
21
654
321
1
1
111111
A B
DC
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B
6868
X011310xxxxx-0-0
MODEL,PROJECT,FUNCTION
21-OCT-2002XXX
Block Diagram
CSA3
DOC.NUMBER
DATE
SIZE CODE
8
8 7
7 6
6 5
5 4
3 2 1
DD
CC
B
AA
4
1
ofSHEET
TITLE
CHANGE by
23
INVENTEC
REV
B