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Technical Program of IEEE ICDV 2017

Venue: Jonathan KS Choi Cultural Center,

Vietnam National University Hanoi.

Address: No. 144 Xuan Thuy road, Hanoi, Vietnam

October 05, 2017

Time Content

8:00-8:30 Registration

Opening Session Co-Chairs: Prof. Cong-Kha Pham (UEC), Prof. Xuan-Tu Tran (UET VNU)

8:30-8:40 Welcome Address:

Rector of UET VNU

8:40-8:45 Opening Speech: Dr. Uchiyama; Prof. Cong-Kha Pham

8:45-8:55 Photo Session

9:00-9:30

Keynote 1: Current Status and Prospect for EUV Lithography

Prof. Takeo Watanabe, Center for EUVL, Laboratory of Advanced Science and Technology

for Industry, University of Hyogo, Japan

9:30-10:00

Keynote 2: Renesas Design Vietnam - Way to a Semiconductor Solution Provider for the next decade

from Successful the first decade in the Semiconductor Industry at Vietnam

President Atsuo Hanami, Renesas Design Vietnam Co., Ltd.

10:00-10:15 Break

ICDV Session 1

Co-Chairs: Prof. Toshimasa Matsuoka (Osaka Uni.), Dr. Van-Phuc Hoang (LQDTU)

10:15-10:40

Invited talk: An Implementation of Ultra-Low-Standby SRAMs using 65 nm Silicon-on-Thin-

Box (SOTB) for Smart IoT

Dr. Koji Nii, Renesas Electronics, Japan

10:40-11:05

Invited talk: High-Sensitivity Micro-magnetic Probe for The Applications of Safety and

Security Nguyen Ngoc Mai-Khanh (Uni. of Tokyo), Tetsuya Iizuka (Uni. of Tokyo), Shigeru Nakajima (Device Analysis, Japan) and Kunihiro Asada (Uni. of Tokyo)

11:05-11:25

16.8 GB/s LPDDR4-3200 @32-bit memory access bandwidth Kha Huynh, Thien Nguyen, Hai Nguyen, Khoa Tran, Kenichi Iwata (Renesas Design Vietnam Co., Ltd), Katsuya Mizumoto, Nobuhiko Honda, Keisuke Matsumoto, Katsushige Matsubara and Seiji Mochizuki (Renesas Electronics Corporation)

11:25-11:45

2xVDD 28-nm CMOS Digital Output Buffer Using Low-Vth Transistors for Slew Rate Adjustment Chua-Chin Wang, Tsung-Yi Tsai, Yu-Lin Deng (National Sun Yat-Sen University, Taiwan) and Tzung-Je Lee (Cheng Shiu University, Taiwan)

11:45-12:05 An Ultra-Low-Voltage-Startup Circuit For Thermal Energy Harvesting Application Kien Le and Loan Pham-Nguyen (HUST, Vietnam)

12:05-13:30 Lunch

ICDV Session 2

Co-Chairs: Prof. Koichiro Ishibashi (UEC), Dr. Kiem-Hung Nguyen (UET VNU)

13:30-13:55

Invited talk: AI, IoT Acceralation with "via-switch" FPGA and High Level Synthesis

Dr. Kazutoshi Wakabayashi, NEC, Japan

13:55-14:20 Invited talk: Design and SI/PI analysis of High Bandwidth Memory (HBM) interface in 2.1D

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System in Package

Dr. Yutaka Uematsu, Hitachi., Ltd, Japan

14:20-14:40

Implementation of a CMOS analog linear VGA Hung Q. Nguyen, Ha L. Vu, Lam D. Tran and Cuong M. Nguyen (Institute of Electronics, Vietnam)

14:40-15:00

Verilog-A Based Compact Model of the Silicon Hall Element Dao Dinh Ha, Viktor Stempitsky,(BSUIR, Belarus) and Tran Tuan Trung (Le Quy Don Tech. Uni.)

15:00-15:20

Implementation of CMOS Tunable On-chip Gm-C IF Filter in RF front-end IC for SDR Transceiver Ha L. Vu, Hong T.T. Luu, Lam D. Tran and Hai V. Tran (Institute of Electronics, Vietnam)

15:20-15:35 Break

ICDV Session 3

Co-Chairs: Prof. Nguyen Ngoc Mai Khanh (VDEC, Uni. of Tokyo), Prof. Duc-Tan Tran (UET VNU)

15:35-16:00

Invited talk: Beat Sensors IoT Technology Suitable for Energy Saving

Prof. Koichiro Ishibashi, Ryohei Takitoge, and Shohei Ishigaki (UEC, Tokyo, Japan)

16:00-16:25

Invited talk: Super Steep Subthreshold Slope PN-Body Tied SOI FET for Ultra Low Power

IoT Edge Applications

Prof. Jiro Ida, Takayuki Mori (Kanazawa Institute of Technology, Japan)

16:25-16:45 A Smart Delivery System Using Internet of Things

Van-Lan Dao and Van-Phuc Hoang (Le Quy Don Tech. Uni., Vietnam)

16:45-17:05 Development of a Smart IoT Device for Bicyclists Masaki Saegusa and Koyo Katsura (Kogakuin University, Japan)

17:05-17:25

A Novel Step Counter Supporting For Indoor Positioning Based On Inertial Measurement

Unit Van Thanh Pham (Uni. Fire Fighting and Prevention), Anh-Dao Nguyen Thi (University of Technology and Logistics), Quynh Tran Thi Thuy, Dung Chu Thi Phuong (UET VNU), Viet Ho Mau (Uni. ICT) and Duc-Tan Tran (UET VNU)

17:25-17:45

An Experimental Measurement of Simple Chip AD8302 Implemented in SONAR Interferometer Van Sang Doan, Van Linh Nguyen, Cong Trang Tran, Hoai Nhan Nguyen and Thanh Hung Nguyen (Naval Academy, Vietnam)

18:00-20:30 Banquet

October 06, 2017

ICDV Session 4

Co-Chairs: Prof. Toshimasa Matsuoka (Osaka Uni.), Dr. Loan Pham (HUST)

8:00-8:25 Invited talk: Single Chip 8K HEVC Decoder Architecture and Implementation Dr. Masaitsu Nakajima, Fellow Visual Solution Business Unit, Socionext Inc, Japan

8:25-8:45

Efficient Binary Arithmetic Encoder for HEVC with Multiple Bypass Bin Processing Quang-Linh Nguyen, Xuan-Tu Tran, Dinh-Lam Tran, Duc-Tho Mai and Duy-Hieu Bui (UET VNU)

8:45-9:05 Texture Characteristic based Fast Algorithm for CU Size Decision in HEVC Intra Coding Le Dinh Trang Dang, Kyungrae Kim, Ikjoon Chang and Jinsang Kim (Kyunghee Uni., Korea)

9:05-9:25 An Approach to the Next Generation of Computing: Small and Inexpensive Vision Intelligence Device

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Tu Thai, Jun Sato, Nga Phan, Duy Phan and Vinh Loi (Gnomons Vietnam)

9:25-9:45 An Adaptive DC-DC Converter for Loading Circuit of Li-Ion Battery Charger Hao Nguyen Van, Loan Pham-Nguyen and Minh Nguyen-Duc (HUST, Vietnam)

9:45-10:05 An IDPSO Algorithm-based Application Mapping Method for Network-on-Chips Van-Nam Dinh, Xuan-Tu Tran and Kiem-Hung Nguyen (UET VNU)

10:05-10:20 Break

ICDV Session 5

Co-Chairs: Prof. Cong-Kha Pham (UEC), Dr. Toan Dao (UTC, Hanoi)

10:20-10:45

Invited talk: MPEG Media Transport technologies and its Application to Immersive Media

Communication Services

Dr. Takayuki Nakachi, Media Innovation Laboratory, NTT Network Innovation Laboratories,

NTT, Japan

10:45-11:05

Analysis of type-II InAs/GaSb superlattice mid-wavelength infrared p-i-n photodetector using

device simulation

Yen Le Thi, Yoshinari Kamakura, Takeharu Goji Etoh and Nobuya Mori (Osaka Uni., Japan)

11:05-11:25

A Low-power Complementary Organic Double-edge Triggered D Flip-flop with Variable-

threshold Voltage Transistors

Tung Xuan Pham, Huyen Thanh Pham and Toan Dao (UTC, Hanoi)

11:25-11:45 Proposal structure of very small helical antenna using parasitic element for TPMS Duc Phan Trong and Thuyen Hoang Dinh (Le Quy Don Tech. Uni., Vietnam)

11:45-12:05 Developing a symmetrical phased array antenna with low complexity Tran Cao Quyen (UET VNU)

12:05-12:10 Closing

Prof. Xuan-Tu Tran (UET VNU) 12:10-13:30 Lunch