structured analog design

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Structured Analog Design discusses derivation of analog circuits from feedback point of view.

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  • 1Structured Electronic DesignStructured Electronic Design

    ET 8016

    5 ECTS credits

  • 2Structured Electronic DesignStructured Electronic Design

    Design methodology Analysis and Synthesis

    Applied network theory

    Fundamental research Free-swinging intellect

    Some keywords:

  • 3An amplifierAn amplifier

    10k

    1R

    1. What type of amplifier is this?2. When the gain is 10, what is the value of R1?

  • 4Another amplifierAnother amplifier

    10k

    2R

    3. When the gain is 100, what is the value of R2?

  • 5And another amplifierAnd another amplifier

    10k

    3R

    4. When the gain is 2, what is the value of R3?

  • 6And anotherAnd another

    10k

    4R

    5. When the gain is 20, what is the value of R4?

  • 76. How do you get the crab out?

  • 8

  • 9Fundamental researchFundamental research

    Why do it this way? (philosophy)

    How to design an amplifier? (techniques)

  • 10

  • 11

    br

    r c

    c

    or

    7. What is this?

  • 12

    8. Will the lamp light up?

  • 13

    9. Will the lamp light up?

  • 14

    YES NO

  • 15

    Tetrahedron Hexahedron Octahedron

    Dodecahedron Icosahedron

    Platonic solidsPlatonic solids

    Edges and angles are all congruent

    Edges and angles are all congruent

  • 16

  • 17

    10.Is this a good model?

    It correctly predicts the orbit of all planets you can see with the naked eye.

  • 18

    ModelingModeling

    A correct model gives a correct prediction

  • 19

    Tetrahedron Hexahedron Octahedron

    Dodecahedron Icosahedron

    Platonic solidsPlatonic solids

    The five Pythagorean regular polyhedra dictate the structure of the universeand reflect God's plan through geometry; June19, 1595, Johannes KeplerThe five Pythagorean regular polyhedra dictate the structure of the universeand reflect God's plan through geometry; June19, 1595, Johannes Kepler

  • 20

    ModelingModeling

    A correct model gives a correct prediction

    Never confuse models with the truth

  • 21

    Back to the amplifierBack to the amplifier

    6. What is the current through the load?

    10k

    10k

    1V 1k

    Kirchoffs first law is not obeyed!Kirchoffs first law is not obeyed!

  • 22

    Ludwig Wittgenstein(1889-1951)

    Language is a labyrinth of pathsLanguage is a labyrinth of pathsDesign problems arise from bad formulationsDesign problems arise from bad formulations

  • 23

    Amplifier designAmplifier design

  • 24

    An amplifier with a nullorAn amplifier with a nullor

    2R

    1R

    10k

    4R

  • 25

    vin=0 vout

    iout

    NullorNullor

    Input current and input voltage of the nullor are made zero by the output signals of the nullorInput current and input voltage of the nullor are made zero by the output signals of the nullor

    iin=0

  • 26

    Inside the NullorInside the Nullor

    NorratorNullator

    NullatorNorrator

    0?0?

    iv==

    0!0!

    iv==

    0v =

    0i =

    Input current and input voltage of the nullor are made zero by the output signals of the nullorInput current and input voltage of the nullor are made zero by the output signals of the nullor

  • 27

    What is the transfer T of this amplifier?What is the transfer T of this amplifier?

    2R

    1R

  • 28

    2R

    1R

    The transfer T of this amplifierThe transfer T of this amplifier

    2

    1

    RTR

    = 2R

    1R

    outv

  • 29

    Another transfer T of this amplifierAnother transfer T of this amplifier

    2anotherT R= 2R

    1R

    outvini

  • 30

    Joseph HenryJoseph Henry

    The seeds of great discovery are constantly floating around us, but they only take root in minds well prepared to receive them

  • 31

    2R

    1R

    2

    1

    RTR

    = 2anotherT R=

    in

    in

    vi

    ? out

    out

    vi

    The chain matrix of this amplifierThe chain matrix of this amplifier

    1

    2

    2

    0

    1 0

    in out

    in out

    v vi

    RR

    Ri

    = ??again anotherT =

  • 32

    The two-port and its chain matrixThe two-port and its chain matrix

    + +

    _ _vin vout

    iin iout

    =

    out

    out

    in

    in

    iv

    DCBA

    iv

  • 33

    The two-port and its chain matrixThe two-port and its chain matrix

    0out

    in

    out i

    vAv =

    =0out

    in

    out v

    vBi =

    =0out

    in

    out i

    iCv =

    =0out

    in

    out v

    iDi =

    =

    =

    out

    out

    in

    in

    iv

    DCBA

    iv+ +

    _ _vin vout

    iin iout

  • 34

    +

    +_

    _

    vin=0 vout

    iin=0 iout

    NullorNullor

    Input current and input voltage of the nullor are made zero via the output signals of the nullor

    =

    out

    out

    in

    in

    iv

    DCBA

    iv 0 0

    0 0in out

    in out

    v vi i

    =

  • 35

    Information from source to load

    Signal power is enlarged

    Information stays unaltered

    A,B,C,D constantA,B,C,D accurately knownA,B,C,D constantA,B,C,D accurately known

    A BC D

    Accurate amplificationAccurate amplification

  • 36

    A voltage-to-voltage amplifierA voltage-to-voltage amplifier

    1

    2

    2

    0

    1 0

    RR

    R

    2

    1v

    RAR

    =

    2R

    1R

    outvinv

  • 37

    Amplification factor becomes inaccurate.

    2R

    1R

    outvinv

    sR

    2

    1v

    s

    RAR R

    +=

  • 38

    2R

    1R

    outvinv

    sR

    nv

    ( )2

    1

    1 24 //n

    vs

    v s

    RAR R

    S kT R R R

    = += +

    OptimizationOptimization

    / Information is disturbed/ Amplification factor still inaccurate.

  • 39

    2R

    1R

    outvinv sR

    Change topologyChange topology

    1 2

    1

    1 24 ( // )n

    v

    v s

    R RAR

    S kT R R R

    +== +

    OrthogonalizationOrthogonalization

  • 40

    2R

    1R

    outvinv sR

    1 2

    1

    1 2

    1 2

    4 ( // )n

    v

    v s

    outfb

    R RAR

    S kT R R R

    viR R

    +== += +

  • 41

    Orthogonalization

    Optimization

    Orthogonalization

    Optimization

    2R

    1R

    outvinv sR

    2R

    1R

    outvinv

    sR

  • 42

    outv

    inv sR

    n1

    4

    0n

    v

    v s

    fb

    A nS kTR

    i

    ===

    1 2

    1

    1 2

    1 2

    4 ( // )n

    v

    v s

    outfb

    R RAR

    S kT R R R

    viR R

    +== += +

  • 43

    Right choice

    Orthogonalization

    Optimization

    Right choice

    Orthogonalization

    Optimization

  • 44

    The right choice: Start? (as usual?) Analyze? Optimize? Orthogonality? Specifications? Criteria?

    The right choice: Start? (as usual?) Analyze? Optimize? Orthogonality? Specifications? Criteria?

  • 45

    NNSBC += log2

    The criteriaThe criteria

    1. Noise

    2. Signal power (distortion)

    3. Bandwidth

    1. Noise

    2. Signal power (distortion)

    3. BandwidthAnd what about supply voltage, current, power consumption, technology etc.?

  • 46

    Optimization

    Orthogonalization

    Correlated propertiesCorrelated properties

    1. Noise

    2. Signal power (distortion)

    3. Bandwidth

    1. Noise

    2. Signal power (distortion)

    3. Bandwidth

  • 47

    Properties are generally not orthogonal

    But design as if

    Make it right

    Orthogonal properties (2)Orthogonal properties (2)

  • 48

    When optimizing non-linear behavior (distortion): No dynamic effects No noise

    When optimizing bandwidth: Small-signal models (no non-linearity) No noise

    When optimizing noise behavior: Small-signal models (no non-linearity) No bandwidth details

    As ifAs if

  • 49

    bandwidth noise distortionbandwidth distortion - noisenoise - bandwidth distortionnoise distortion - bandwidthdistortion - noise bandwidthdistortion bandwidth - noise

    The most orthogonal sequence?The most orthogonal sequence?

  • 50

    Is it a cow? Is it green? Is it an animal?

    Know which problem to solve firstKnow which problem to solve first

  • 51

    See the structure: Create Hierarchy!See the structure: Create Hierarchy!

    Detail

    Limiter

    Limiter

    Vlaag

    Vhoog

    Memory Vc

    Global

  • 52

    The right design step at the right time

    A design step occurs only once

    Orthogonality, hierarchy, classification

    Efficient designEfficient design

  • 53

    Reduce the search space as fast as possible.

    Look for fast criteria: Necessary but not sufficient (e.g. LP -product)

    Extensive calculations only when it makes sense Simplest model that suffices

    Efficient design (2)Efficient design (2)

  • 54

    AttitudeAttitude

    Know exactly what you want

    Use second best, if you cant have it

    Know the penalty

  • 55

    Voltage amplifier, whats in the nullor?Voltage amplifier, whats in the nullor?

    Nullor

    Source

    Load

  • 56

    Inside the NullorInside the Nullor

    NorratorNullator

  • 57

    Nullator? Norrator?Nullator? Norrator?

    NorratorNullator

    0v =

    0i =Current sensor

    Voltage sensor

    Current source

    Voltage source

  • 58

    practical nullor implementationspractical nullor implementations

    i

    vv

    i

    A B

    C D

  • 59

    ChooseChoose

    Nullor

    Source

    Load

    i

    vv

    i

    A B

    C Di

    vv

    i

  • 60

    The experts with practical experienceThe experts with practical experience

    v

  • 61

    Loopgain with B-type blockLoopgain with B-type block

    Source

    v

    Load1R 2

    RLR LC

    1

    1 2

    1

    1

    1B

    L

    L L

    L

    L L

    Rj R CL R R R R

    j R C

    + = + + +

  • 62

    Loopgain with A-type blockLoopgain with A-type block

    1R 2R

    v

    Source

    Load

    LR LC

    1

    1 2

    1A

    RLR R

    = + 1

    1 2

    1

    1

    1B

    L

    L L

    L

    L L

    Rj R CL R R R R

    j R C

    + = + + +

  • 63

    Which transistor stage?Which transistor stage?

    1R 2R

    v

    Source

    Load

    LR LC

    +

    +

    + ++ +

    -

    -

    - - - -

    +

    +

    + ++ +

    -

    -

    - - - -

    CE-stage CB-stage CC-stage

    Differential CE-stage Differential CB-stage Differential CC-stage

  • 64

    Voltage amplifier with A-type blockVoltage amplifier with A-type block

    1R 2RSource

    Load

    LR LC

    1R 2R

    v

    Source

    Load

    LR LC 1

    1 2

    1A

    RLR R

    = + L

  • 65

    Back to the B-type solution (told you so.)Back to the B-type solution (told you so.)

    1R 2RSource

    Load

    LR LC

    1

    1 2

    1 12

    1

    1

    L

    L L

    L

    E L

    L

    C

    Rj RL CR R R

    j RB

    C

    R

    + + + + = >

  • 66

    The expert solutionThe expert solution

    1R 2RSource

    Load

    LR LC

    2 or

    Miller effect Distortion Miller effect Distortion

    1

    1 2

    1 1lim2

    1B

    1Do

    L

    L Lr LCE

    L

    C

    L

    C

    Rj R CL R R R R

    j R C

    + = + + + BA CECE

    or=

    ( )

    ( )

    1 2

    1 2

    1 2

    1

    1

    1 2

    2

    1

    1

    12

    1A A

    D

    1

    L

    L L

    L

    L L

    L

    L Lo CC

    L

    L

    CE

    L

    CC

    R R Rj R

    RL

    CR R Rj R C

    R R Rj R Cr R R R

    R

    j R C

    R

    + + = +

    + + + + + + + + +

    ro should be low???

    ro should be low???

  • 67

    Expert versus logicExpert versus logic

    1R 2RSource

    Load

    LR LC

    2 or

    1R 2RSource

    Load

    LR LC

    1

    1 2

    1

    1

    1 12B D

    L

    CE CC

    L L

    L

    L L

    Rj R C

    R R Rj

    R

    R

    L

    C

    + + + + =

    no miller effect less distortion/ Load dependent loopgain

    no miller effect less distortion/ Load dependent loopgain/ miller effect first stage

    / distortion and clipping first stage Loopgain not(less) load dependent

    / miller effect first stage/ distortion and clipping first stage Loopgain not(less) load dependent

    ( )

    ( )

    1 2

    1 2

    1 2

    1

    1

    1 2

    2

    1

    1

    12

    1A A

    D

    1

    L

    L L

    L

    L L

    L

    L Lo CC

    L

    L

    CE

    L

    CC

    R R Rj R

    RL

    CR R Rj R C

    R R Rj R Cr R R R

    R

    j R C

    R

    + + = +

    + + + + + + + + +

  • 68

    Which solution when?Which solution when?

    1R 2RSource

    Load

    LR LC

    2 or

    1R 2RSource

    Load

    LR LC

    no miller effect less distortion. Load dependent loopgain

    no miller effect less distortion. Load dependent loopgain/miller effect first stage

    / distortion and clipping first stage Loopgain not(less) load dependent

    /miller effect first stage / distortion and clipping first stage Loopgain not(less) load dependent

  • 69

    AlternativesAlternatives

  • 70

    ConclusionsConclusions

    Know ideal case

    Know the penalty for choosing second best

    Beware of experts !

    Always remember the ideal case!

    The seeds of great discovery are constantly floating around us, but they only take root in minds well prepared to receive them