structured electronic design
TRANSCRIPT
4(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute forceFix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
5(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
6(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
CompensationReproduce the error at some location in a system
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
7(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
CompensationReproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
8(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedback
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
9(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the response
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
10(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired value
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
11(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired valueNullify the difference
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
12(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired valueNullify the difference
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
15(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
16(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
17(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
18(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
19(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
20(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
21(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the gate voltage:
22(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
23(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
24(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
25(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
26(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Deterioration of start-up behaviorand overdrive recovery
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
27(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Deterioration of start-up behaviorand overdrive recovery
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
30(c) 2020 A.J.M. Montagne
Model-based biasing
Application of Compensation
Requires reproduction of the error
31(c) 2020 A.J.M. Montagne
Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
32(c) 2020 A.J.M. Montagne
Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
33(c) 2020 A.J.M. Montagne
Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
Generates the temperature-dependent gate-source voltage
34(c) 2020 A.J.M. Montagne
Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
Generates the temperature-dependent gate-source voltage
37(c) 2020 A.J.M. Montagne
Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
38(c) 2020 A.J.M. Montagne
Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
Requires a loop filter: DC transfer will (ideally) be zero
39(c) 2020 A.J.M. Montagne
Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
40(c) 2020 A.J.M. Montagne
Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
+
-
+
-
+
-
+
-
+
-
41(c) 2020 A.J.M. Montagne
Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
43(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
44(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
45(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
46(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
47(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
48(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
49(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
50(c) 2020 A.J.M. Montagne
Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
|Z|
|f|
(log)
(log)
inductive
51(c) 2020 A.J.M. Montagne
Electronic self inductance
Electronic self inductance
|Z|
|f|
(log)
(log)
inductive