snapdragon™ 800 based (apq8074) processor dragonboard ... · series snapdragon 8074 processor....

Snapdragon™ 800 based (APQ8074) Processor DragonBoard™ Development Kit Mini User Guide

[Document: ICS-01IMP1101-MUG-001 version: 1.2]

Your use of this document is subject to and governed by those terms and conditions in the Intrinsyc Purchase Snapdragon 800 based

(APQ8074) Processor DragonBoard Development Kit and Software License Agreement for the Snapdragon 800 based (APQ8074)

Processor DragonBoard Development Kit, which you or the legal entity you represent, as the case may be, accepted and agreed to

when purchasing a DragonBoard Development Kit from Intrinsyc Software International Inc. (“Agreement”). You may use this

document, which shall be considered part of the defined term “Documentation” for purposes of the Agreement, solely in support of

your permitted use of the DragonBoard Development Kit under the Agreement. Distribution of this document is strictly prohibited

without the express written permission of Intrinsyc Software International Inc. and its respective licensors, which they can withhold,

condition or delay in its sole discretion.

Intrinsyc is a trademark of Intrinsyc Software International Inc., registered in Canada and other countries.

Qualcomm and Snapdragon are trademarks of Qualcomm Incorporated, registered in the United States and other countries. Other

product and brand names used herein may be trademarks or registered trademarks of their respective owners.

This document contains technical data that may be subject to U.S. and international export, re-export, or transfer (“export”) laws.

Diversion contrary to U.S. and international law is strictly prohibited.

Snapdragon™ 800 based (APQ8074) Processor DragonBoard™ Development Kit Mini User Guide Version 1.2

2 Copyright Intrinsyc Software International Incorporated

IDENTIFICATION

Document Title Snapdragon™ 800 based (APQ8074) Processor DragonBoard™ Development

Kit Mini User Guide

Document Number ICS-01IMP1101-MUG-001

Version 1.2

Date Feb 19, 2014



Table of Contents

1. INTRODUCTION .................................................................................. 4 1.1 Purpose........................................................................................................ 4

1.2 Scope ........................................................................................................... 4

1.3 Intended Audience ...................................................................................... 4

2. DOCUMENTS ...................................................................................... 5 2.1 Applicable Documents ................................................................................ 5

2.2 Reference Documents ................................................................................. 5

2.3 Terms and Acronyms .................................................................................. 5

2.4 List of Figures ............................................................................................. 7

2.5 List of Tables .............................................................................................. 7

3. APQ8074 DEVELOPMENT KIT ........................................................... 8 3.1 Introduction ................................................................................................. 8

3.2 Kit Contents ................................................................................................ 8

3.3 DragonBoard Block Diagram and Hardware Specification ..................... 10

3.4 Hardware configurations and proof of concept designs ........................... 13

3.5 DragonBoard 8074 SOM .......................................................................... 15

3.5.1 SOM Features .......................................................................................................... 16 3.5.2 APQ8074 SOM Q7 Compliance level ..................................................................... 17 3.5.3 APQ8074 SOC Feature List..................................................................................... 18



1. INTRODUCTION

1.1 Purpose

The purpose of this Mini User Guide is to provide minimal technical information for the

DragonBoard 8074 to customers before they have access to the full documentation set.

For background information on the kit, visit http://mydragonboard.org/db8074

1.2 Scope

This document describes the following for DragonBoard 8074:

Block Diagram and overview

Hardware Features

Configuration

SOM

Carrier Board

Taiko WCD9320 Audio codec board

Display board for LCD

1.3 Intended Audience

This document is intended for customers who have not purchased a DragonBoard Development Kit.

You can buy the DragonBoard from the web store: http://shop.intrinsyc.com/collections/qualcomm

http://mydragonboard.org/db8074/

http://shop.intrinsyc.com/collections/qualcomm



2. DOCUMENTS

This section lists any supplementary documents for the DragonBoard 8074.

2.1 Applicable Documents

REFERENCE TITLE

A-1 Intrinsyc Purchase and Software License Agreement for the DragonBoard

Development Kit

2.2 Reference Documents

REFERENCE TITLE

R-1 Hardware Document Set For the Snapdragon APQ8074 based DragonBoard

Development Kit

2.3 Terms and Acronyms

Term and acronyms Definition

RF Radio Frequency

FCC US Federal Communications Commission

SOM System On Module

qHD Quarter High Definition

SPMI System Power Management Interface

(Qualcomm PMIC / baseband proprietary

protocol)

UIM User Identity module

NFC Near Field Communication

eMMC Embedded Multimedia Card

USB HS USB High Speed

USB SS USB Super Speed

DSI MIPI Display Serial Interface

MIPI Mobile Industry processor interface

SATA Serial ATA

ANC Audio Noise Cancellation

AMIC Analog Microphone



JTAG Joint Test Action Group

UART Universal Asynchronous Receiver Transmitter

USB Universal Serial Bus

BLSP Bus access manager Low Speed

Peripheral(Serial interfaces like UART / SPI /

I2C/ UIM)

SLIMBUS Serial Low-power Inter-chip Media Bus

MPP Multi-Purpose Pin

CSI Camera Serial Interface

DP Display Port

HDMI High Definition Media Interface

GPS Global Positioning system

EEPROM Electrically Erasable Programmable Read only

memory

SSBI Single wire serial bus interface (Qualcomm

proprietary mostly PMIC / Companion chip

and baseband processor protocol)

LNA Low Noise Amplifier

B2B Board to Board

HSIC High Speed Inter Connect Bus



2.4 List of Figures

Figure 1 Assembled DragonBoard 8074 Development Kit ................................................................... 9 Figure 2 DragonBoard 8074 Block Diagram ....................................................................................... 10 Figure 3 Mini ITX Case configuration use case .................................................................................. 13 Figure 4 Portable configuration (Proof Of Concept) ........................................................................... 14 Figure 5 SOM Block Diagram ............................................................................................................. 15

2.5 List of Tables

Table 3.3-1 DragonBoard Hardware Features ..................................................................................... 11 Table 3.5-1 APQ8074 Q7 MXM Edge Connector vs Q7 Comparison................................................ 17 Table 3.5-2 APQ8074 SOC Features ................................................................................................... 18



3. APQ8074 DEVELOPMENT KIT

3.1 Introduction

The DragonBoard 8074 provides a quick reference or evaluation platform for Qualcomm’s latest 800

series Snapdragon 8074 processor. This kit is ideal suited for Android / Linux Application

developers, OEMs, Consumer manufacturers, Hardware Component Vendors, Video Surveillance, to

evaluate, optimize, test and deploy applications that can utilize the Qualcomm Snapdragon 800 series

technology.

3.2 Kit Contents

The DragonBoard 8074 Development Kit includes the following:

o Snapdragon 8074 SOM or main CPU board

o Mini-ITX form-factor carrier board

o 4.3” qHD 540x960 16.7 M LCD

o AC power adapter



Figure 1 Assembled DragonBoard 8074 Development Kit

The kit is delivered with Android 4.2.2 software pre-programmed on eMMC memory of the CPU

board (SOM).

Contact Intrinsyc for availability of the Camera, Sensor board, and other Accessories:

[email protected]

mailto:[email protected]



3.3 DragonBoard Block Diagram and Hardware Specification

The DragonBoard 8074 at a top level split across four major components

o Snapdragon 8074 SOM Q-seven form factor

o Carrier board for IO and expansion

o Display Board

o Taiko Audio Codec (WCD9320) Board

5text

APQ8074

DDR3

2GB

PM8941

PM8841

SPMI

AT

X P

ow

er

Co

nn

ecto

r

eMMC 4.5

4 to 64GBPower

Selector

Circuit

4-bit SDIO

4L

SPI/I2CHSIC to

USB hubHSIC

USB HS

USB SS

DP

HDMIHDMI

ID

EEPROM

8-bit

SDIO

QCA6234

WiFi/BT

BT/WiFi

(2.5, 5GHz)

CSI 4L Primary

Secondary

GPS

WGR7640

UART

WCD9320

Codec

I2C

USB3

to SATA

USB3

to GbE

SOM

Carrier Board

USB3

HUB

JTAG

HEADERSLIMBUS

NFC

Header

I2C

SD

C3

IQ +

SS

BI

Controls

Dis

pla

y &

To

uch

Co

nn

ecto

r

4L

CSI 4LCSI 0CSI 1

CSI 4LCSI 2

JTAG

Au

dio

Te

st C

on

n.

I2S

6 x DMICs

3 x AMICs

2 x speakers

Speaker

Header

ANC

HS

DC

Jack

RF

Printed

GPS Ant

RF

RF

SMA

SMA

SMA

Power

General

Vol +

RST/Vol -

PWR btn.

Header

USB 2

HSIC

uUSB

Type AB

(OTG)

USB2.0

Type A

LEDs

RGB

Education

ConnectorBPLSs / MPPs / GPIOsSensor

HeaderBLSPs / GPIOs / IRQs

Secondary

3 x AMICs

2 x Line-out

3-Port

Audio

Jack

MP

P

VBUS to

PMIC8941

USB3.0

Type A

DisplayPort

RS-232

For

Debug

DSI 0

DSI 1

/3

UIM

Controls

SPI/I2C

UA

RT

PCM

USB

HEADER

Audio

Front Panel2 x Line-out

2 x AMIC

RF

RF

(Optional)

(Optional)

(Optional)

Figure 2 DragonBoard 8074 Block Diagram



The DragonBoard includes the following hardware features

Table 3.3-1 DragonBoard Hardware Features

Subsystem / Connectors

Feature Set Description Specification

Chipset APQ8074 Qualcomm Snapdragon 800

Processor

POP

Quad core Krait 2.4 Ghz each

Core

Armv7 with Neon SMD

(128bit)

PM8941 + PM8841 Qualcomm PMIC, Companion

PMIC for APQ8074 processor

NA

Memory 2GB LPDDR3 Memory POP 800Mhz LPDDR3 POP on

CPU BGA chip

16 GB eMMC Primary Storage for board for

SW, Userdata

eMMC 4.5

SanDisk / Kingston

(stuffing option up to 64GB can

support HS200)

Connectivity Wi-Fi 2.4 Ghz/ 5Ghz

via QCA6234 – SDIO

Wi-Fi Atheros 6234 Wi-Fi + BT

Combo Chip

802.11n 2.4/5.0 GHz via

QCA6234.

Full 2x2 antenna configuration

BT 2.4 Ghz via

QCA6234 – UART /

PCM

Wi-Fi Atheros 6234

Wi-Fi + BT Combo Chip

BT 2.1 / 4.0

GPS via WGR7640 –

SSBI Qualcomm

Proprietary Protocol

GPS Frontend GPS, GLONASS, COMPASS

NFC (Optional

Expansion)

Optional Connector for NFC +

UIM

NA

RF Interfaces 2xWLAN / BT

External Antenna

Connectors

External BT / WIFI Antenna NA

Audio Headset with ANC

Support

Headset connector with ANC

support and backward

compatibility

Qualcomm Proprietary ANC

Connector

6 Analog line out via 2

via 3port stereo jack

Multipurpose Audio 3 port

stereo jack

3.5 MM TRS

4 Analog line-in via 3

port audio jack

Multipurpose Audio 3 port

stereo jack

3.5 MM TRS

6 digital MICs Digital MIC via Digital Audio

Header

Audio Header

Far-field speaker

header

2 Pin NA

Keys Power Button Power Button NA

Volume up Increase Volume Button NA

Volume Down Decrease Volume button NA

General purpose user

button

General purpose user button NA

Sensors Sensor expansion

Header

Support for Sensor (Optional

Peripheral KIT of ST Micro and

Camera)

Sensor board contains:

Gyro - L3GD20H

Accelerometer + Compass –

LSM303D

Pressure – LPS25H



Humidity – HTS221

Indicating LED Red LED SMD LED (driven by PMIC) PMIC driven led

Green LED SMD LED (driven by PMIC) PMIC driven led

Blue LED SMD LED (driven by PMIC) PMIC driven led

Privacy LED SMD LED (driven by PMIC) PMIC driven led

Interfaces /

Connectors

SOM

2 x MIPI CSI

Camera Connectors

CSI0, CSI1

MIPI Alliance Specification

v1.0

Carrier Board

1 x MIPI CSI

Camera connector carrier board

connector for CSI-2 [optional]

MIPI Alliance Specification

v1.0

1 x ITX USB2.0

header

USB2.0 header for via HSIC for

ITX front USB

USB2.0

1 x ITX mic /

headphone out audio

header (FP)

ITX Audio Header NA

Interfaces /

Connectors

2 x SATA ITX SATA NA

1 X ITX front panel

switch and LEDs

header

ITX LED and Button header for

Hard Drive, Power.

ITX standard power + LED

header

For front panel

1 x ITX Power

Connector

ITX power Connector ITX standard power supply

400-500W

1 x MIPI DSI (DSI0 &

DSI1) + Touch 60-pin

display Connector

60- pin display connector MIPI Alliance Specification

v1.0

1 x Education

expansion header

General purpose IO for SPI / I2C

/ GPIOs/ UIM/ UART functions

1 x NFC expansion

header

NFC expansion header can be

used for UIM + I2C + SPI

1 x Micro SD card

Slot

4 bit Micro SD card slot Supports XDHC/ SDHC and

SDIOv3.0

Carrier Panel

Connectors

1 x DC Jack DC Power Supply 12V-3A

1 x Gigabit Ethernet RJ-45 Gigabit Ethernet

Connector for connectivity

10/100/1000 Mbit Ethernet

2 x USB3.0 USB 3.0 connectors Type A

2 x USB2.0 USB 2.0 connectors Type A

1 x HDMI Standard HDMI output support Type A HDMI 1.4a

1 x Display Port Standard Display Port eDP Specification v1.2.

Currently not supported1

1 x USB2.0 OTG OTG port Micro AB

1 x RS-232 full Debug full UART with CTS /

RTS

Male DB9

1 x Option SMA

connectors

Optional SMA connectors for

Wi-Fi, BT, GPS

SMA

1 Currently eDP Port is not supported in software / hardware.



3.4 Hardware configurations and proof of concept designs

The DragonBoard hardware could support multiple configurations:

1) Open Frame Configuration (Default shipped)

2) ITX Case Configuration

3) Portable (Not Available at the moment)

1. Open Frame Configuration

a. This is the default configuration

b. Allows full connectivity to most of all expansions

c. Extends beyond the bounds of the mini-ITX form factor

d. Allows camera / display, buttons, and most of the features supported by platform.

2. Mini ITX Case configuration

a. Used for PC or server configurations

b. Fully enclosed in mini-ITX case

c. Allows standard mini-ITX case connectors on the back and front

Figure 3 Mini ITX Case configuration use case



3. Portable configuration (Currently not available)

a. Allows mobile operation with minimal connections

b. Power via USB, DC, Battery

c. Features like HDMI, Micro SD, Camera, depending upon requirements can be

designed

Figure 4 Portable configuration (Proof Of Concept)

Contact Intrinsyc for such configuration customization / modification.



3.5 DragonBoard 8074 SOM

The APQ8074 Snapdragon 800 SOM (System On Module) is a Q7 Rev2.0 form factor. It measures

70x70mm, 230 pin MxM with board to board connector to support other SOC interfaces defined in

Q7. The following is the SOM block diagram:

text

APQ8074

DDR3

2GB

PM8941

PM8841

SPMI

eMMC 4.5

4 to 64GB

4Lane

SMSC

USB4604

HSIC to

USB

HSIC

STROBE

DATA

USB HS

USB SS

DP

HDMIHDMI

ID

EEPROM

8-bit

SDIO

QCA6234

WiFi/BT

CSI 4LPrimary

Secondary

GPS

WGR7640

UIM1 CLK/DATA

BLSP1 I2C SDA / SCL

Q7 Form Factor SOM

I2C

SD

C3

IQ +

SS

BI

Controls(GPIO/PWM/VREG,RESET_N)

4Lane

CSI 4L

CSI 0

CSI 1

CSI 4LCSI 2

JTAG_SRST_M

RF

RF

RF

EDU_PM_GPIO1/2/3

SATA/GBE_RST_N

USB 2

HSIC

RGB

BLSP10 / MPPs / GPIOs

I2S/

GYRO,ACC,COMPASS INT+RESET

MP

P

DSI 0

DSI 1

Controls(GPIO/PWM/VREG,RESET_N)

UA

RT

PCM

USB Port1

USB Port2

USB Port3

USB Port4

4Lane-DP+EN

OTG Port

4-bit SDIO uSD

SLIMBUS

DATA/CLKSLIM

BUS

I2S/

GPIOS

BLSP3 I2C SCL,SDA for sensor

&BLSP3 GPIOs

BLSP3

I2C/

GPIO

DISP_PWR_EN

RESET IN

BLSP12

I2C/GPIO

BLSP12 I2C SCL,SDA for sensor

&BLSP12_GPIO

USB_OTG_CC

BLSP2_UART

TX/RX/CTS/RTS

BLSP8_SPI_MOSI/MISO/CLK/CS

For Education Connector & BLSP8 GPIOs

BLSP8/

GPIO

JTAG

TRST/TCK/TDO/TDI/TMSJTAG

BLSP6 I2C SCL,SDA for NFCBLSP6

I2C

Q7

E

D

G

E

MXM

C

O

N

N

E

C

T

O

R

TS0_SAMPLE_READY

/TS0_RESOUT_N

B2B

C

O

N

N

E

C

T

O

R

#

1

LED DRV_R/G/B

BLSP1_2/BLSP1_3/GPIO

Codec/Reset

VOL+/VOL-/PWR_KEY/MPP

BATTERY_ID

VREG_l22/LVS1/VREG_5V/BATT_THERM/PM89DC_OVP

WebCam

MIPI_DSI1_RESET_N

USB SS HUB RESET

NFC_RESET

NFC_IRQ

VPH_PWR

CCI_I2C_0/CCI_I2C_1

WEBCAM1/2/3_RESET_N

B2B

C

O

N

N

E

C

T

O

R

#

2

Figure 5 SOM Block Diagram



The SOM is a Q7 form factor but not fully compliant to Q7 standard due to B2B connectors.

However standard Q7 interface on main Q7 connectors are supported.

3.5.1 SOM Features

The SOM provides the basic common set of features with minimal integration efforts for end user.

It contains:

APQ8074 Snapdragon 800 main application processor

LPDDR3 up to 800Mhz 2GB RAM (POP)

PM8941 – PMIC for Peripheral LDOs, Boost Regulators

PM8841 – PMIC for Processor Core regulators

CSI0, CSI1

QCA6234 Atheros Wi-Fi + BT combo chip over SDIO, UART, PCM

16 GB eMMC 4.5 can support HS200

BtB1, BtB2 for extending further interfaces not supported by Q7 connectors

2x2 WLAN/BT Antenna

WGR External GPS Antenna

WGR7640 RF Front End

USB 2.0 SMSC4604 HSIC Hub

Easy To integrate with existing Q7 based system with minimal modifications



3.5.2 APQ8074 SOM Q7 Compliance level

The SOM is a Q7 form factor SOM. The following table explains pin out and break out of the pins

which are over Q7 edge connector.

3.5.2.1 Q7 MXM Edge Connector Block Table showing Q7 vs APQ8074 Implementation

Table 3.5-1 APQ8074 Q7 MXM Edge Connector vs Q7 Comparison

Interface Name Q7 Spec

APQ8074 SOM Usage

Remarks

PCI Express 20 0 Left unused for future compatibility

UART 4 4

Gigabit Ethernet 13 0 Left unused for future compatibility

SATA 9 0 Left unused for future compatibility

USB 22 22

SDIO 14 9

I2S Audio 5 5

eDP/ Q7 LVDS

Display

26 12 Used only for Standard Display Port full

connector pins

HDMI / Q7 DP 14 11 Used only for Standard HDMI full

connector pins

GPIO / Q7 LPC 8 8 Used as GP GPIOs

SPI 5 5 Used as Education IFC BLSP

CAN 2 0 NA

Power Supply 49 49

Power Control 2 1 PWGIN is not used

Power Management 8 2 Used for buttons (RSTBTN, WAKE_N)

Misc Interfaces 11 7 I2C interfaces and GP PWM

Manufacturing /

JTAG

5 5 Used for JTAG

Thermal and Fan Ctrl 4 0

Reserved 6 6 Not Connected

Total 227 146



3.5.3 APQ8074 SOC Feature List

Below are the SOC Feature List, some of the feature might not be available on actual APQ8074

Dragonboard due to pin multiplexing. Refer to above block diagram for detailed available SOC

interface on APQ8074 DragonBoard.

Table 3.5-2 APQ8074 SOC Features

Feature Capability

Processors Application Processor Four Krait uP armv7 cores up to 2+ GHz; 2 MB L2

cache

RPM system - primary boot processor

trust (SROT) Krait μP

quickly

(MPM)

and VDDs

-based

Low-power audio QDSP6 v5 core at 600 MHz; 16 k/3 k L1 and 256

k L2 caches

WLAN/BT/FM ARM9 based core via WCN3660/WCN3680

Memory Support System memory via PoP and EBI 2x LPDDR3 SDRAM; 32-bit wide; up to 800 MHz

Other internal memory 1.5 MB unified SRAM pool on-chip memory

(OCMEM)

External memory

Via SDC1 C/SD NAND flash devices

VIA SPI -modified SW)

RF Support WLAN/BT/FM With WCN3680 / QCA6234

GNSS – gpsOne™ engine Gen 8B; GPS and GLONASS

Multimedia

Display support

external

MIPI_DSI -lane + 4-lane available on Carrier board

HDMI available on Carrier board

eDP -lane available on Carrier board

Example Display Combinations DSI0 (2560 × 2048) + (1080p external)

DSI0 (2048 × 1536) + DSI1(1920 × 1200) +

(1080p external HDMI/eDP)

DSI0 (2048 × 1536) + (4 k × 2 k external HDMI /

eDP)

General display features – 24-bit pp; TFT, LTPS, CSTN,

OLED panels

Camera / Video Input



Camera interfaces Qcamera; dual ISP with MIPI CSI-2

MIPI_CSI -lane or four at 4 + 4 + 1 + 1 lanes; 1.5

Gbps per lane

-0 – 4 lane

-1 – 4 lane

-2 – 4 lane or 2 x 1 lane

2D performance

3D performance

General camera features and post processing

techniques, including defective pixel correction

Mobile display processor MDP 5

Video applications performance

Encode 1080p at 96 fps; 4 k × 2 k at 30 fps; 4x 1080p at

30 fps – H.264/263,

MPEG4, VP8

-view – MVC

Decode

30 fps

H.264/263, MPEG4/2, WMV9, VC1, VP6/8, DivX,

XVID

-view – MVC

Graphics / GPU

pixels/sec

DX9.3

Audio

Codec ithin the WCD9320 device

digital MICs

detection

Low-power audio

– many audio playback and voice modes;

encoders for

audio and FM recording; many concurrency modes

Voice codec support -B, EVRC-WB;

G.711, G.729A/AB;

GSM-FR, -EFR, -HR; AMR-NB, -WB (Applicable to

MSM)

Audio codec support -3,

eAC-3, DTS

Enhanced audio -HD; DTS

Express 7.1



protection

A/V output – HDMI Rev 1.4a

fresh; 24-bit RGB color

-channel audio for 7.1 surround sound

-HD, and DTS-HD

Master

Web technologies

acceleration

d HTTP tuning

optimization

Connectivity BLSP ports

functions

UART – up to 4 MHz

UIM – SIM, USIM, CSIM; dual V (1.8/2.85) is

available 1x

I2C – cameras, sensors, near field communicator

(NFC), etc.

SPI (master only) – cameras, sensors, etc.; NOR memory with

SW modes

UIM (other than via BLSP) Two – dual voltage (1.8/2.85 V)

USB Two – one USB 2.0 high-speed and one USB 3.0

super-speed/USB 2.0

high-speed compliant

HSIC

Dual-voltage (1.2/1.8)

-power, and low processor

loading

Secure digital interfaces -bit and three 4-bit; SD 3.0

SDC1 and SDC2 are dual-V

eSD/eMMC boot

TSIF Up to two ports; DMB support

Audio interfaces

SLIMbus -speed; baseline WCD

interface

I2S

speakers, and mics)

MI2S

audio for HDMI

PCM

Wireless Connectivity

WLAN

adds 802.11/ac

Bluetooth

FM radio

Touchscreen support Capacitive panels via ext IC (I2C, SPI, and



interrupts)

DMB support Via external DMB device (SDC or TSIF)

Configurable GPIOs

Number of GPIO ports 146 – GPIO_0 to GPIO_145

Input configurations Pull-up, pull-down, keeper, or no pull

Output configurations Programmable drive current

Top-level mode multiplexer Provides a convenient way to program groups of

GPIOs

Internal functions

Security

General security features .1, ARM

TrustZone, SEE,

secure debug, Microsoft WM DRM10, HDCP for

HDMI

Crypto engine

(AES-XTS) and

IPSec and SSL (HMAC-SHA, CCM, CBCMAC)

QFPROM -generation

Qfuse chains

-volatile memory with faster and simpler

programming

Security controller -wide configuration for security, feature

enable, and debug

data

facility

QFPROM

SFS

Boot sequence

system

t over HS-USB

seconds (target)

(target)

PLLs and clocks

WLAN, 32.768 KHz

external XTAL is required

-purpose outputs: M/N counter, PDM

Resource and power manager up and power management

controller, MPM

-rail

power collapse and

voltage scaling; several low-power sleep modes



Debug JTAG, Design for Software Debug (DFSD), and

ETM (all cores)

Others Thermal sensors; modes and resets; peripheral

subsystem

Power management 2-line SPMI; plus other lines as needed via GPIOs

WCD audio codec

SLIMbus -speed audio data plus status

and control

Legacy

control

Others l, and clock lines as needed via

GPIOs

WCN wireless connectivity

WLAN baseband data

WLAN status and control

Bluetooth -line data interface plus dedicated SSBI

FM radio -line data interface plus dedicated SSBI

Fabrication technology and package

Digital die 28 nm HPm CMOS

Moulded laser PoP – small,

thermally efficient package device on top)

Bottom pin array of PoP -pin nanoscale pkg (990 NSP); 0.4

mm pitch

Top pin array of PoP -pin chipscale pkg (216 CSP); 0.5 mm

pitch

Bare Die PoP – small, thermally

efficient package device on top)

Bottom pin array of PoP -pin nanoscale pkg (990 NSP); 0.4

mm pitch

Top pin array of PoP -pin chipscale pkg (216 CSP); 0.5 mm

pitch