simple vga

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Simple VGA output using Spartan 3e While I was working on the vga module I have produced some objects with different colors and shapes. Unfortunately, Spartan 3e can provide only 1 bit for each color and this limits your choices. Not like Spartan 3e which has 4 bit for each color, also not as virtex2 which has 8 bit color using an IC . This is a simple code for the VGA using Spartan 3e library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.numeric_std.all;

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this is a simple VGA code for spartan 3E.

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Page 1: Simple VGA

Simple VGA output using Spartan 3e

While I was working on the vga module I have produced some objects with different colors and shapes. Unfortunately, Spartan 3e can provide only 1 bit for each color and this limits your choices. Not like Spartan 3e which has 4 bit for each color, also not as virtex2 which has 8 bit color using an IC .

This is a simple code for the VGA using Spartan 3e

library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;use ieee.numeric_std.all;

---- Uncomment the following library declaration if instantiating---- any Xilinx primitives in this code.--library UNISIM;--use UNISIM.VComponents.all;

entity vga is Port ( CLK50_in : in STD_LOGIC;

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HS : out STD_LOGIC; VS : out STD_LOGIC; r,g,b : out std_logic);end vga;

architecture Behavioral of vga is

------- signals declarationssignal clk25,reed,ena : std_logic;signal H_counter_value : integer;--std_logic_vector(9 downto 0);signal V_counter_value : integer;--std_logic_vector(9 downto 0);signal x ,x_ball: integer; --std_logic_vector(9 downto 0);signal y ,y_ball: integer; -- std_logic_vector(9 downto 0);signal data : std_logic_vector(7 downto 0);signal addr : std_logic_vector(15 downto 0);signal c:std_logic;constant obj1_x_l : integer := 20 ;constant obj1_x_r: integer := 30 ;constant obj2_x_l : integer := 200 ;constant obj2_x_r: integer := 230;constant obj2_y_u : integer := 50 ;constant obj2_y_d: integer := 150 ;

constant ball_x_l : integer := 100 ;constant ball_x_r: integer := 107;constant ball_y_u : integer := 150 ;constant ball_y_d: integer := 157 ;

--signal gdata: std_logic_vector(7 downto 0):="11110000";signal obj1_rgb:std_logic_vector(2 downto 0) := "001";signal obj2_rgb:std_logic_vector(2 downto 0) := "010";signal ball_rgb:std_logic_vector(2 downto 0) := "011";signal obj1_on,obj2_on,ball_on:std_logic;

--subtype tmp is integer; type memory_array is array ( 0 to 7 ) of std_logic_vector ( 0 to 7 ) ; constant mem : memory_array:= ("00111100", -- * * * *"01111110" , -- * * * * * *"11111111", -- * * * * * * * *"11111111" , -- * * * * * * * *"11111111", -- * * * * * * * *"11111111", -- * * * * * * * *"01111110", -- * * * * * *"00111100" -- * * * *);

begin

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obj1_on <='1' when (obj1_x_l <= x ) and (x <= obj1_x_r) else'0';

obj2_on <='1' when (obj2_x_l <= x ) and (x <= obj2_x_r) and (obj2_y_u <=y) and (obj2_y_d >= y) else'0';

ball_on <='1' when (ball_x_l <= x ) and (x <= ball_x_r) and (ball_y_u <=y) and (ball_y_d >= y) else'0';

-- generate a 25Mhz clock divide_by_two_counter :process (clk50_in) begin if clk50_in'event and clk50_in='1' thenclk25 <= not clk25;end if;end process;

HS_VS_generator :process (clk25)

beginif clk25'event and clk25='1' thenH_counter_value <= H_counter_value +1;if (H_counter_value = 800)thenH_counter_value <= 0; V_counter_value <= V_counter_value +1;end if;if (V_counter_value = 521)thenV_counter_value <= 0;end if;

x <= H_counter_value-143;y <= V_counter_value-31;x_ball<= x - ball_x_l;y_ball<= y - ball_y_u;

--if (H_counter_value >=144 and H_counter_value < 783 and V_counter_value >=31 and V_counter_value <510) then-- if((x>=0)and(x<256)and(y>=0)and(y<256))then

-- addr<=addr+1;-- reed<='1';ena<='1';-- r<='0';b<='0';--g<=(others=>'0');-- g<='1';--else

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-- r<='1';b<='0';g<='0';addr<="0000000000000000";-- reed<='0';ena<='0';

-- end if;--else-- r<='0';g<='0';b<='0';addr<="0000000000000000";

--reed<='0';ena<='0';--end if;

if (H_counter_value < 96)thenHS <= '0';else HS <= '1'; end if;

if (V_counter_value < 2)thenVS <= '0';elseVS <= '1';end if;

end if;end process;process(clk25,ball_on)beginif ball_on='1' thendata <=mem(y_ball);c<= data (x_ball);end if;end process;

process(clk25,H_counter_value,V_counter_value,obj1_on,obj2_on,ball_on,c)begin

if (H_counter_value >=144 and H_counter_value < 783 and V_counter_value >=31 and V_counter_value <510) then

if obj1_on ='1' thenr<=obj1_rgb(2);b<=obj1_rgb(1);g<=obj1_rgb(0);elsif obj2_on ='1' thenr<=obj2_rgb(2);b<=obj2_rgb(1);g<=obj2_rgb(0);

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elsif ball_on='1' thenif c='1' then r<=ball_rgb(2);b<=ball_rgb(1);g<=ball_rgb(0);else r<='1';g<='0';b<='0';end if;else r<='1';g<='0';b<='0';end if;

else r<='1';g<='0';b<='0';end if;

end process;end Behavioral;