senior project by: ricardo v. gonzalez advisor: v. b. prasad

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Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

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Page 1: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Senior Project

By: RICARDO V. GONZALEZ

Advisor: V. B. PRASAD

Page 2: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Data Mover

Method:

Using VLSI

Testing: in logicworks and mentor graphics

Page 3: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Objective

• The main objective is to build a Data Mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip.

Page 4: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Standards

Page 5: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Table Of Content

• Block diagram

• Theory

• 4-bit data mover (2-bit example)

• Timing table

• Controller circuit

• Complete data mover (two bits example)

Page 6: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Table Of Content (2)

• Trace of data mover

• What is done so far

• Circuitry tested

• VLSI chip designs

• Question section

Page 7: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Block Diagram

Page 8: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Theory Following RTLDesign

• Data mover:• Memory a[4]; b[4]; c[4]• Inputs: x[4]• Outputs: z[4]• 1 a x• 2 c /a• 3 b c[0], c[1]• 4 c a v b• 5 z = c

Page 9: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Data Mover LW Design

Page 10: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Timing Table

Page 11: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Controller Circuit

Page 12: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Data Mover

• Data mover• Using 2-bits

Page 13: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Trace Of Data Mover

• This is the sequence the controller must follow to achieve an optimum flow of the data

Page 14: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

What Is Done So Far

• Researched about the behavior of data mover circuit

• Designed controller circuit for timing

• Working in actual VLSI design of D flip-flop and gates

Page 15: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Nand Gate Design In VLSI

Page 16: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Inverter Design Using VLSI

Page 17: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

D Flip-flop Design In VLSI

Page 18: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Work Left To Do

• Finish D flip-flop in professional version

• Do more testing on the overall circuit

• Research about more possible applications

• Send the design for fabrication

Page 19: Senior Project By: RICARDO V. GONZALEZ Advisor: V. B. PRASAD

Thank You!Any

Questions?