review of some hicum geometry scaling laws: issue and proposal

D. CELI

7th HICUM Workshop

Dresden, June 2007

Review of Some HICUM

Geometry Scaling Laws:

Issue and Proposal

Purpose

Contrary to MOS models, bipolar models are not scalableNot scalable means that the scaling rules are not hard-coded in the model equations.

If we want to make scalable bipolar models, 2 main approaches [1](i) Coding of scaling equations in simulator scripts(ii) Use separate specific program like TRADICA

Each of these solutions have their pros and cons(i) Limited language capability, IP is open to external users.(ii) Magic black box where default geometry scaling equations are hidden to modeling engineers.

Nevertheless, in the two cases we need to know (no detailed publication on thissubject)

How to scale the model parameters to the dimensions of the devices.

How to determine specific parameters.

Our goal is (i) to review some (limited time) HICUM geometry scaling laws, as we think they are, (ii) to discuss possible issues and (iii) to propose solutions...

June 2007 - DM50.077th European HICUM Workshop Didier CELI

© STMicroelectronics

2/37

Overview of HICUM Geometry Scaling Equations

Effective emitter areaDefinition

Parameter extraction

Low collector current and depletion capacitancesDescription of existing geometry scaling laws

Possible issue

Proposal and results

Low Base-Emitter currentDescription of existing scaling laws

Possible issue


Weak avalanche currentDescription of existing geometry scaling laws

Issue




3/37

Effective Emitter Area [2],[3]

Definition and extraction methodOriginal concept allowing to model the peripheral transfer current withoutadditional component (current source).

The effective (electrical) emitter area, AE*, is defined so that the total trans-fer current IT flows through an extended internal transistor, via the parame-ter γC, without any peripheral component

where the effective emitter area AE* is given by

For small devices, 3-D effects can be improved by taken into account thecorner rounding caused by lithography. In this case the effective emitterarea becomes (Appendix A)

where

Then to compute the model parameters for 2-D (and 3-D) transistors, allarea specific elements (currents, charges) occurring in the GeneralizedIntegral Charge-Control Relation (GICCR) must be multiplied by this effec-tive emitter area.

P+

N+

P

N

γC

γCγC

γC

JT

WE

LE* LE0

WE0

WE*

ΔE/2

ΔE/2

x

LE

Mask

rC

IT ITA ITP 4ITC+ + JTA AE0⋅

Area

JTP PE0⋅

Perimeter

4ITC

Corner

JTA AE∗⋅=+ +

= =⎧ ⎪ ⎨ ⎪ ⎩ ⎧ ⎪ ⎨ ⎪ ⎩ ⎧ ⎨ ⎩

AE∗ WE∗ LE∗⋅ LE0 2 γC⋅+( ) WE0 2 γC⋅+( )⋅= =

AE∗ WE∗ LE∗⋅ 4 π–( ) rc∗2⋅–= rc∗ rc γC+=



4/37

The extended emitter width and length γC can be easily determined from the ratio of specific perimeter to areacollector current• At low current densities (VBE < 0.7 V and VBC = 0V), we can write (corner rounding neglected, LE >> WE)

• That allows to calculate γC

• Experimental results (HS transistors, WE = 0.25, 0.45, 0.65, 1.05, 1.45 μm, LE = 12.65 μm)

IT IC≈ ICA ICP 4ITC+ + JCA AE0 JCP PE0⋅ 4ITC+ +⋅= =

IT IC≈ ICA AE∗⋅ ICA W⋅=E∗ LE∗⋅ ICA LE0 2γC+( ) WE0 2γC+( )⋅ ⋅ JCA AE0 JCA γC PE0⋅ ⋅ 4JCA γC

2⋅+ +⋅= = =⎩⎨⎧

γCJCPJCA---------=

0

0.5

1

1.5

2

2.5

0 1 2 3 4 5 6 7 8 9

J C [

μA/μ

m2 ]

P/A [μm-1]

0.0485

0.049

0.0495

0.05

0.0505

0.051

0.0515

0.052

0.0525

0.053

0.0535

0.5 0.52 0.54 0.56 0.58 0.6 0.62 0.64 0.66 0.68 0.7

γ C [

nm]

VBE [V]

γC = 51.2 nm

4.79%

3.52%

JCA

JCP



5/37

• TCAD results from process and device simulations (HV transistors, WE = 0.4, 0.8, 1.6 μm, LE = 12 μm)

Comments and possible issues• At low current densities γC is not exactly a constant, slight decrease with VBE

• Cause- Combination of measurement inaccuracy and correctness of extraction method?- Internal depletion charges not exactly proportional to the effective emitter area?- Model limitation? γC could be bias depend (investigation in progress)

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2

0 1 2 3 4 5

J C [

μA/μ

m2 ]

P/A [μm-1]

0.14

0.1405

0.141

0.1415

0.142

0.1425

0.143

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65

γ C [

nm]

VBE [V]

γC = 141.9 nm

1.17%



6/37

Forward Transfer Current

Study at low current densities and VBC = 0V

Geometry scaling equationsAt low low current densities and VBC = 0V, the collector current is close to the forward transfer current and canbe written

(1)

The internal BE depletion charge QjEi is related to the internal depletion capacitance CjEi, which is, by definitionof the effective emitter area, (normally) proportional to AE*

(2) where QjEA is the BE specific area depletion charge (C/m²)

Always by definition of the effective emitter area, ITF is proportional to AE* according to

where JTFA is the specific area forward transfer current (A/m²)

Therefore, JTFA can be written

IC ITF≈C10 e

VBEiVT------------

⋅Qp0 hjEi QjEi⋅+----------------------------------------=

QjEi AE∗ QjEA⋅=

ITF AE∗ JTFA⋅=

JTFAITFAE∗---------

C10 e

VBEiVT------------

⋅AE∗ Qp0 hjEi QjEi⋅+( )⋅-----------------------------------------------------------

C10 e

VBEiVT------------

⋅AE∗ Qp0 hjEi AE∗ QjEA⋅ ⋅+( )⋅---------------------------------------------------------------------------

C10 e

VBEiVT------------

⋅

AE∗2 Qp0

AE∗---------- hjEi QjEA⋅+⎝ ⎠

⎛ ⎞⋅--------------------------------------------------------------

C10A e

VBEiVT------------

⋅Qp0A hjEi QjEA⋅+---------------------------------------------= = = = =



7/37

In conclusion, the specific area forward transfer current JTFA is given by

(3)

where C10A and Qp0A are respectively the specific GICCR constant (AC/m4) and the specific zero-bias holecharge (C/m²).This expression is identical to (1) where the model parameters have been replaced by their specific values.


Re-arranging (3) gives

where QjEA is calculated from the specific parameters ofthe BE depletion capacitance.

Therefore, QjEA vs. is a straight line. The slopes allows to calculate C10A, and the intercept i allows toknow QP0A. At this step (and even after! [4]), hjEi isassumed to be equal to 1

JTFAC10A e

VBEiVT------------

⋅Qp0A hjEi QjEA⋅+---------------------------------------------=

2.8

3

3.2

3.4

3.6

3.8

4

3.03 3.035 3.04 3.045 3.05 3.055 3.06 3.065 3.07 3.075

Qje

i [fC

.μm

-2]

exp(VBE/VT-1)/JC*10-17 [A-1]

C10 = 2.4010-31 C.A.μm-4 QP0 = 6.97 fC.μm-2

10 17– VBEi VT⁄( )exp{ } JC ⁄⋅ A 1– μm2⋅[ ]

QjEAC10AhjEi------------ e

VBEiVT------------

JTFA------------⋅

Qp0AhjEi-------------–=

e

VBEiVT------------

JTFA⁄

C10A s hjEi⋅ s= =

Qp0A i– hjEi⋅ i–= =⎩⎨⎧



8/37

Possible issuesThe main issues comes from the fact that the specific parameters (area and perimeter compo-nents) of BE junction capacitance are determined from the actual emitter dimensions on waferand that after the internal and external BE junction capacitance are generated from the effectiveemitter area:

• Possible negative external BE junction capacitance• External potential and grading factor different than extracted values, needed to be re-calculated for each

emitter size.The BE depletion capacitance, related to the actual emitter dimensions, is given by (2D device)

where CJEA and CJEP are respectively the area and perimeter components of the BE junction capacitance. and being respectively the specific area and perimeter components. From their bias dependence, we can write

(4)

In order to be compatible with the HICUM geometry scaling laws and to be consistent with the GICCR (all collectorcurrent flows through an effective electrical emitter area AE*, without perimeter component), CJE(V) must beexpressed from the effective area as follows

(5)

CJE V( ) CJEA V( ) CJEP V( )+ CJEA V( ) AE0⋅ CJEP V( ) PE0⋅+= =

CJEACJEP

CJE V( )CJEA0 AE0⋅

1 VVDEA-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEA--------------------------------------

CJEX0 PE0⋅

1 VVDEX-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEX-------------------------------------+=

CJE V( ) CJEi V( ) CJEx V( )+ CJEA V( ) AE∗⋅

Internal transistor

CJEP V( ) PE0⋅ CJEA V( ) AE∗ AE0–( )⋅–

External transistor

+= =

⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩ ⎧ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎨ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎩



9/37

1st issue: depending on the technology, the external part of the BE junction capacitance can be negative

where is defined as the ratio of specific perimeter to area BE junction capacitance.

• if the external BE junction capacitance becomes negative!

• TCAD results from process and device simulation (HV transistors, WE = 0.4, 0.8, 1.6 μm, LE = 12 μm)

CJEP V( ) PE0⋅ CJEA V( ) AE∗ AE0–( )⋅– CJEP V( ) PE0⋅ CJEA V( ) AE0 γC PE0⋅ AE0–+( )⋅–= =

CJEP V( ) PE0⋅ CJEA V( ) γC PE0⋅ ⋅– CJEA V( ) PE0CJEP V( )

CJEA V( )---------------------- γC–

⎩ ⎭⎨ ⎬⎧ ⎫

CJEA V( ) PE0 γJ γC–( )⋅ ⋅=⋅ ⋅=

γJCJEP V( )

CJEA V( )----------------------=

γJ γC<

0.14

0.1405

0.141

0.1415

0.142

0.1425

0.143

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65

γ C [

nm]

VBE [V]

γC = 141.9 nm

4

4.5

5

5.5

6

6.5

7

7.5

8

8.5

0 1 2 3 4 5

C/A

[fF

/μm

2 ]

P/A [μm-1]

CA =4.8868 fF/μm2 CP =0.2529 fF/μm

γJ(0V) = 51.8 nm < γC = 141.9 nm



10/37

2nd issue: the built in potential and the grading factor must be re-calculated for each transistor dimension. If is itfeasible and done (?) in program like TRADICA, it is more complex to implemented in language simulators.

• Moreover, if γJ is close to γC, the re-calculated built-in voltage and grading factor can have non-physical value.From (4) and (5) we can write

• For the internal transistor, the model parameters of the BE junction capacitance are directly related to theextracted specific parameters. It is no more true for the external transistor. VDEP and ZEP are not equal to theextracted specific parameters VDEX and ZEX. They are respectively function of VDEX, VDEA and ZEX, ZEA andmust be re-calculated for each transistor dimensions.

CJE V( )CJEA0 AE∗⋅

1 VVDEA-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEA-------------------------------------

Internal transistor

=CJEX0 PE0⋅

1 VVDEX-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEX-------------------------------------

CJEA0 AE∗ AE0–( )⋅

1 VVDEA-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEA

-------------------------------------------------–

External transistor

+

CJEI0

1 VVDEI-----------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEI----------------------------------

CJEP0

1 VVDEP-------------–

⎩ ⎭⎨ ⎬⎧ ⎫ZEP-------------------------------------+=

⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩ ⎧ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎨ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎩



11/37

Solution and proposal

TRADICA approach

• From the information we have, if γJ < γC, it would seem that

• Using this approach poses a problem, because QjEi is no more proportional to AE*, and consequently ITF isalso no more proportional to AE*.

• Therefore the exposed method used to determine the specific parameters QP0A and C10A is no more valid.

• How to overcome this problem?

CJEi V( ) CJEA V( ) AE0⋅ CJEP V( ) PE0⋅+=

CJEx V( ) 0=⎩⎨⎧



12/37

Proposal

• Contrary to (5) we defined the internal and the external BE junction capacitance from the actual emitter area

and perimeter

• Therefore QjEi is directly related to the emitter area AE0 through where QjEA is calculated from the area components (CJEA, VDEA, ZEA) of the BE depletion

capacitance.

• The expression of JTFA becomes

• In order to be consistent with the HICUM scaling approach, ITF must be proportional to AE*, we have to definea new unitary (or specific) parameter hjEu such as

CJE V( ) CJEi V( ) CJEx V( )+ CJEA V( ) AE0⋅

Internal transistor

= = CJEP V( ) PE0⋅

External transistor

+

⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩ ⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩

QjEi AE0 QjEA⋅=

JTFAITFAE∗---------

C10 e

VBEiVT------------

⋅AE∗ Qp0 hjEi QjEi⋅+( )⋅-----------------------------------------------------------

C10 e

VBEiVT------------

⋅AE∗ Qp0 hjEi AE0 QjEA⋅ ⋅+( )⋅---------------------------------------------------------------------------

C10

AE∗2--------- e

VBEiVT------------

⋅

Qp0AE∗---------- hjEi

AE0AE∗--------- QjEA⋅ ⋅+

---------------------------------------------------------= = = =

C10A e

VBEiVT------------

⋅

Qp0A hjEiAE0AE∗--------- Q⋅

jEA⋅+

------------------------------------------------------------=

hjEu hjEiAE0AE∗---------⋅ cons ttan= =



13/37

• We can finally write

• This equation is identical to the previous equation (3), expect that now QJEA is now expressed from AE0 andnot from AE*. That allows to avoid negative QJEA value.

Parameter extraction and results

• Identical methodology to the one describes previously

QjEA vs. is a straight line. The slope s allowsto calculate C10A, and the intercept i allow to know QP0A.

• Here again hjEu is assumed to be equal to 1

JTFAC10A e

VBEiVT------------

⋅Qp0A hjEu QjEA⋅+-----------------------------------------------=

1.5

2

2.5

3

3.5

4

0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74

QjE

i [fC

.μm

-2]

exp(VBE/VT)/JCA [aA-1.μm-2]

C10 = 1.58 10-17 fC.A.μm-4 QP0 = 8.05 fC.μm-2

QjEAC10AhjEu------------ e

VBEiVT------------

JTFA------------⋅

Qp0AhjEu-------------–=

e

VBEiVT------------

JTFA⁄

C10A s hjEu⋅ s= =

Qp0A i– hjEu⋅ i–= =⎩⎨⎧



14/37

• TCAD results from process and device simulation (HV transistors, WE = 0.4, 0.8, 1.6 μm, LE = 12 μm)

Scaling law for the collector current at low current densities and VBC =0V

• With this new approach hjEi is now geometry dependent and is defined, for each transistor geometry, by

10

15

20

25

30

35

40

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7

I C/e

xp(V

BE/V

T [

aA])

VBE [V]

C10A = 1.58 10-17 fC.A.μm-4 QP0A = 8.05 fC.μm-2 γC = 141.9 nm

NN122A120NN122C120NN122E120

10-12

10-11

10-10

10-9

10-8

10-7

10-6

10-5

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7VBE [V]

C10A = 1.58 10-17 fC.A.μm-4 QP0A = 8.05 fC.μm-2 γC = 141.9 nm

NN122A120NN122C120NN122E120

I C [

A]

IC JTFA AE∗⋅≈C10A AE∗

2 e

VBEiVT------------

⋅ ⋅Qp0A AE∗⋅ hjEu QjEA AE∗⋅ ⋅+--------------------------------------------------------------------------

C10 e

VBEiVT------------

⋅

Qp0 hjEuQjEiAE0---------- AE∗⋅ ⋅+

--------------------------------------------------------C10 e

VBEiVT------------

⋅Qp0 hjEi QjEi⋅+----------------------------------------= = =

hjE i hjEuAE∗

AE0---------⋅=



15/37

We can extend this study to the BC junction (VBC < 0 V) in order to obtain the general expression of the transferIT current at low current densities

Where the new geometry scaling rules are defined by

IT JTFA AE∗⋅C10 e

VBEiVT------------

⋅Qp0 hjEi QjEi⋅ hjCi QjCi⋅+ +------------------------------------------------------------------------= =

C10 C10A AE∗2⋅=

QP0 QPOA AE∗⋅=

QjEi QjEA AE0⋅ f CJEA VDEA ZEA, ,( ) AE0⋅= =

QjCi QjCA AC0⋅ f CJCA VDCA ZCA, ,( ) AC0⋅= =

ISC10QP0----------

C10AQP0A------------- AE∗⋅ JSA AE∗⋅= = =

hjEi hjEuAE∗

AE0---------⋅=

hjCi hjCuAE∗

AC0---------⋅=

⎩⎪⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎪⎧



16/37

Base-Emitter Current

ModelLow current densities and VBC = 0 V

In HICUM/L2, the BE current is described by 2 diodes. One diode usedto describe the internal BE current IBEi, the second for the extrinsic BEcurrent IBEX. These 2 diodes are spitted across the intrinsic base resis-tance.

Each of these 2 diodes are composed of an ideal current (non-ideality factor close to 1), and a recombinationcurrent (non-ideality factor close to 2).

IBEiIBEx

Rbx Rbi

IBEi IBEA IREA+ IBEIS e

VBEiMBEI VT⋅-------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅ IREIS e

VBEiMREI VT⋅-------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅+= =

IBEx IBEP IREP+ IBEPS e

VBEiMBEP VT⋅---------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅ IREPS e

VBEiMREP VT⋅---------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅+= =

⎩⎪⎪⎪⎪⎨⎪⎪⎪⎪⎧



17/37

Geometry scaling rules

No (?) official (published) document describing the scaling laws used, in TRADICA, for the base currents.

If the introduction of an effective emitter area, using γC, is very clever for describing the geometry dependence ofthe transfer current. The notion of an effective area for the base current, using γΒ, is more questionable:

1st issue: as the BE current is modeled by 2 diodes (contrary to the transfer current which is modeled by onlyone current source), there is no interest to define and effective area for the base current.

2nd issue: if the internal base current is referenced to the effective emitter area AE* and if γΒ < γC, we can de-monstrate (same demonstration than for the BE depletion capacitance) that the extrinsic BE current, IBEx, will benegative

IBEi JBEA AE∗⋅=

IBEx JBEA PE0 γB γC–( )⋅ ⋅=⎩⎨⎧



18/37

3rd issue: In fact, contrary to the transfer current, it is not possible to introduce the notion of effective area for thebase current. Indeed, if we define the parameter γB, allowing to introduce the effective emitter area for the basecurrent, as the ratio of the perimeter specific BE current, JBP, to the area BE specific current, JBA

This parameter is not constant with VBE due to the fact that the non-ideality factor of the area and perimeter cur-rents are not identical

therefore

is not a constant and is a function of VBE if .

γBJBEPJBEA------------=

JBEA JBEAS e

VBEiMBEA VT⋅---------------------------

⋅≈

JBEP JBEPS e

VBEiMBEP VT⋅---------------------------

⋅≈⎩⎪⎪⎨⎪⎪⎧

γBJBEPJBEA------------

JBEPSJBEAS--------------- e

VBEiVT------------ 1

MBEP--------------- 1

MBEA---------------–

⎩ ⎭⎨ ⎬⎧ ⎫

⋅

⋅= =

MBEA MBEP≠



19/37

New proposed geometry scaling rules and parameter extraction

The base current is split on 2 components IBEi and IBEX respectively related to the actual BE area and perimeter

JBEI and JBEX can be easily determinated (from 2D transistors with variable emitter width), at each VBE(VBC=0V), by plotting IBE/AE0 vs. PE0/AE0

IBE IBEi IBEx+ JBEi AE0⋅ JBEx PE0⋅+= =

0.0 10 0

2.0 10 6

4.0 10 6

6.0 10 6

8.0 10 6

1.0 10 7

1.2 10 7

0 1 2 3 4 5

I B/A

[A

/μm

2 ]

P/A [μm-1]

JBEiJBEx

IBEAE0--------- JBEi JBEx

PE0AE0---------⋅+=



20/37

Formulation of the internal and external BE specific currents JBEI and JBEX

JBEi JBEIS e

VBEiMBEI VT⋅-------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅ JREIS e

VBEiMREI VT⋅-------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅+=

JBEX JBEPS e

VBEiMBEP VT⋅---------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅ JREPS e

VBEiMREP VT⋅---------------------------

1–⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅+=

⎩⎪⎪⎪⎪⎨⎪⎪⎪⎪⎧

JBEI

VBEI

MBEI

MREI

JREIS

JBEIS

JBEX

VBEI

MBEP

MREP

JREPS

JBEPS



21/37

Determination of the intrinsic BE specific parameters JBEIS, JREIS, MBEI, MREI

• Direct extraction without global optimization, the key point to obtain both accurate and physics based modelparameters.

• Assuming VBEI greater than few VT, we can write

• Therefore, if MBEI and MREI are known, this characteristic is linear, the slope allows to determine JREIS andthe intercept JBEIS.

• How to determine MBEI and MREI? MBEI and MREI are determined by dichotomy, for each couple (MBEI, MREI),the correlation coefficient r of the characteristic is calculated. The selected couple (MBEI, MREI) is the onewhich maximize r (best alignment of the measured data).

JBEi

e

VBEiMBEI VT⋅----------------------------------------------- JBEIS JREIS e

VBEiVT------------ 1

MREI------------- 1

MBEI-------------–

⎩ ⎭⎨ ⎬⎧ ⎫

⋅

⋅+=

0.01

0.02

0.03

0.04

0.05

0.06

0.07

0.08

0.09

0 1 2 3 4 5 6 7

J BA/e

xp(V

BE

i/(M

BE

I.VT))

[aA

]

103.exp((VBE/VT).(1/MREI - 1/MBEI))

10-15

10-14

10-13

10-12

10-11

10-10

10-9

10-8

10-7

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75

JB

A [A

/μm

2 ]

VBE [V]



22/37

Determination of the extrinsic BE specific parameters JBEPS, JREPS, MBEP, MREP

• Same principle on the characteristic JBEx

e

VBEiMBEP VT⋅-------------------------------------------------- JBEPS JREPS e

VBEiVT------------ 1

MREP--------------- 1

MBEP---------------–

⎩ ⎭⎨ ⎬⎧ ⎫

⋅

⋅+=

0

0.001

0.002

0.003

0.004

0.005

0.006

0.007

0.008

0.009

0 0.5 1 1.5 2 2.5

J BP/e

xp(V

BE

i/(M

BE

P.V

T))

[aA

]

103.exp((VBEi/VT).(1/MREP - 1/MBEP))

10-16

10-15

10-14

10-13

10-12

10-11

10-10

10-9

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75

JB

P [A

/μm

]

VBE [V]



23/37

TCAD results from process and device simulation (HV transistors, WE = 0.4, 0.8, 1.6 μm, LE = 12 μm)

20

40

60

80

100

120

140

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75

β

VBE [V]

NN122A120NN122C120NN122E120

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75

I B/e

xp(V

BE/V

T)

[aA

]

VBE [V]

NN122A120NN122C120NN122E120

10-11

10-10

10-9

10-8

10-7

10-6

10-5

10-4

10-3

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75

I B [

mA

]

VBE [V]

NN122A120NN122C120NN122E120



24/37

Weak Avalanche Current

Geometry scaling rules Same comment than for the base current, to our knowledge, there is no published document describing the

geometry scaling laws for the weak avalanche current. In HICUM/L2, the weak avalanche current is given by

In first approximation, we assume that both IAVL and ITF are scaled to the effectiveemitter area AE* (default TRADICA approach?)

Normally both QAVL and CJCI are scaled to the same dimension, whichever thisdimension, we have

In conclusion, the multiplication factor M defined by

(6)

must be constant

C’

B’

IAVL

IB IB0

IC0

IC

M is the multiplication factor

IC M IC0⋅ IC0 IAVL+= =

M 1IAVLIC0----------+=

IAVL ITF FAVL VDCi VB′C′–( )QAVL–

CJCi VDCi VB′C′–( )⋅---------------------------------------------------

⎩ ⎭⎨ ⎬⎧ ⎫

exp⋅ ⋅ ⋅=

ITF JTF AE∗⋅=

IAVJ JAVL AE∗⋅=⎩⎨⎧

QAVLCJCi-------------

QAVL

CJCi

------------- cst= =

M 1IAVLIC0----------+ 1

ITF FAVL VDCi VB′C′–( ) e

QAVL–CJCi VDCi VB ′C ′–( )⋅------------------------------------------------------

⋅ ⋅ ⋅ITF

----------------------------------------------------------------------------------------------------------------+≈ 1 FAVL VDCi VB′C′–( ) e

QAVL–

CJCi VDCi VB ′C ′–( )⋅------------------------------------------------------

⋅ ⋅+= =



25/37

Scalable parameter extraction

The same method than the one described in [5] can be used. For M > 1 (avalanche region) and definingVJ = VDCi - VB’C’, (6) can be written

(7)

Substituting in (7) the expression of leads to the final expression

(8)

Therefore, the characteristic versus

must be a straight line. The intercept allows to deter-mine FAVL and the slope .

M 1–( )ln FAVL( )ln Vj( )lnQAVL

CJCi Vj⋅--------------------–+=

CJCi

M 1–Vj--------------

⎩ ⎭⎨ ⎬⎧ ⎫

ln FAVL( )lnQAVL

CJCi0 VDCAZCA⋅

-------------------------------- VjZCA 1–

⋅–=

M 1–Vj--------------

⎩ ⎭⎨ ⎬⎧ ⎫

ln

VjZCA 1–

FAVL( )ln

QAVL

CJCi0 VDCAZCA⋅

---------------------------------–

M 1–Vj--------------

⎩ ⎭⎨ ⎬⎧ ⎫

ln VjZCA 1–

QAVL



26/37

Experimental results (see also [6]) HS transistors, WE = 0.25, 0.45, 0.65, 1.05, 1.45 μm, LE = 12.65 μm

Contrary to what expected, the multiplication factor M is not independent of the emitter dimensions. M increaseswhen the emitter width decreases.

• Why? Is it due to non-scalable process or non-scalable model, or wrong geometry scaling rules?

It is interesting to notice that in fact the characteristics vs. are all parallel, that demon-strates (i) that QAVL is scalable (slope of the characteristics identical), (ii) that (effective) FAVL (deduced from theintercept) is geometry dependent. Why?.

-8

-7.8

-7.6

-7.4

-7.2

-7

-6.8

-6.6

-6.4

-6.2

-6

0.53 0.54 0.55 0.56 0.57 0.58 0.59 0.6 0.61

ln[(

M-1

)/(V

DC

I + V

CB)]

[(VDCI + VCB)/VDCI]ZCI-1

FAVL = 7.13 10 V QAVL = 7.78 10 fC.μm

0.9995

1

1.0005

1.001

1.0015

1.002

1.0025

1.003

1.0035

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8

Mul

tiplic

atio

n F

acto

r M

VCB [V]

FAVL = 7.13 100 V 1 QAVL = 7.78 100 fC.μm 2

WE-

VDCi VC ′B ′+( )ZCA 1–

M 1–( ) Vj⁄{ }ln VjZCA 1–



27/37

Similar results obtained by XMOD using TRADICA [7]



28/37

Same results observed from TCAD simulations

That partially eliminate the possibility of non-scalable process.

It remains 2 possibilities (i) non-scalable model or we apply wrong geometry scaling rules.

-8.5

-8

-7.5

-7

-6.5

-6

-5.5

0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24

ln[(

M-1

)/(V

DC

I + V

CB)]


FAVL = 2.16 100 V-1 QAVL = 7.92 1000 fC.μm-2

1

1.002

1.004

1.006

1.008

1.01

1.012

1.014

0 1 2 3 4 5 6

Mul

tiplic

atio

n F

acto

r M

VCB [V]

FAVL = 2.16 100 V-1 QAVL = 7.92 100 fC.μm-2




29/37

Analysis and proposal If M is not independent on the geometry, from (6) that means that IAVL is not scaled to the effective emitter areaAE*.

This behavior was already shown in [6], where it was found that γAVL was different from γC.

Therefore, in order to have a scalable multiplication factor, we define an effective area for the avalanche currentsuch as

where γAVL is equal to the ratio of the specific perimeter to the specific area avalanche current

(6) can be re-written

(9)

Substituting in (9) the expression of , and after some calculation, leads to the final expression

(10) Similar to (8) by adding the red term.

AAVL WE0 2 γAVL⋅+( ) LE0 2 γAVL⋅+( )⋅=

γAVLJAVLPJAVL--------------=

M 1–IAVLIC0----------

JAVL AAVL⋅JTF AE∗⋅-----------------------------

JTF AAVL FAVLu VDCi VB′C′–( ) e

QAVL–

CJCi VDCi VB ′C ′–( )⋅------------------------------------------------------

⋅ ⋅ ⋅ ⋅JTF AE∗⋅

--------------------------------------------------------------------------------------------------------------------------------------≈ ≈=

AAVLAE∗------------- FAVLu⋅ VDCi VB′C′–( ) e

QAVL–

CJCi VDCi VB ′C ′–( )⋅------------------------------------------------------

⋅ ⋅=

CJCi

AE∗

AAVL------------- M 1–

Vj--------------

⎩ ⎭⎨ ⎬⎧ ⎫

⋅⎩ ⎭⎨ ⎬⎧ ⎫

ln FAVLu( )lnQAVL

CJCi0 VDCAZCA⋅

-------------------------------- VjZCA 1–

⋅–=



30/37


Same straight forward method. Equation (10) must be a straight line, the intercept allows to determine FAVLu

and the slope .

Results

HS transistors, WE = 0.25, 0.45, 0.65, 1.05, 1.45 μm, LE = 12.65 μm

QAVL

0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0 1 2 3 4 5 6 7 8 9

J AV

L [μ

A/μ

m2 ]

P/A [μm-1]

-13.2

-13

-12.8

-12.6

-12.4

-12.2

-12

-11.8

-11.6

-11.4

0.53 0.54 0.55 0.56 0.57 0.58 0.59 0.6 0.61

ln[(

M-1

)/(V

DC

I + V

CB)]


FAVL = 1.45 10+0 V-1 QAVL = 1.38 10+01 fC.μm-2

γAVL determination

FAVLu and determinationQAVL




31/37

New geometry scaling laws

AC0 is the area used to determine the area component of the BC junction capacitance.Now FAVL is geometry dependant and it is a function of AAVL/AE*

0

2e-08

4e-08

6e-08

8e-08

1e-07

1.2e-07

1.4e-07

1.6e-07

1.8e-07

2e-07

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8

I B /

I B0

VCB [V]

FAVL = 1.45 10+0 V-1 QAVL = 1.38 10+01 fC.μm-2

0.9995

1

1.0005

1.001

1.0015

1.002

1.0025

1.003

1.0035

1.004

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8

Mul

tiplic

atio

n F

acto

r M

VCB [V]

FAVL = 1.45 10+0 V-1 QAVL = 1.38 10+1 fC.μm-2

I B [

A]

Multiplication factor Base current

WE-

WE-

QAVL AC0 QAVL⋅=

FAVLAAVLAE∗------------- FAVLu new!⋅=

⎩⎪⎨⎪⎧



32/37

Summary and Comments

Some geometry scaling rules for HICUM/L2 have been investigated• Collector and base current at low current densities.• BE and BC depletion capacitances. • Weak avalanche current.

Depending on the technology, the standard HICUM geometry scaling laws can poseproblems

• Negative external components.• Non-scalable avalanche current.

To avoid these problems, solutions were proposed• Feedback, and comments are welcome.

Work in progress • Investigation of other geometry scaling laws (BC and substrate currents, transit time, ...).• Detection and study of non-standard geometry scaling effects [9], like WPE (Well Proximity Effects).

Pending issues• hJEiu and hJCiu determination. Today there are assumed to be equal to 1.• Validation of the partition of the BE and BC depletion capacitances across the base resistance.• Suggestions and help would be welcome...



33/37

Acknowledgement

Thanks to A. Pakfar and T. Schwartzmann [8] for the process and device simulationdata used in this presentation.

© T. Schwartzmann © T. Schwartzmann



34/37

Appendix A Corner Rounding Effects

Actual emitter area AE0 and PE0 calculation

• By taking into account the corner rounding, the actual emitter area AE0 and perimeter PE0 can be expressed as

• By default rc is set to , where WE0min is the minimum emitter width allowed in the process.

WE0

LE0

rc

rc

r0

rc

Area rc2 π r0

2⋅4------------– rc

2 1 π4---–⎝ ⎠

⎛ ⎞⋅==

WE0min

LE0

rcrc

WE0min

AE0 WE0 LE0⋅ 4 rc2 1 π

4---–⎝ ⎠

⎛ ⎞⋅ ⋅– WE0 LE0⋅ rc2 4 π–( )⋅

Corner rounding

–= =

PE0 2 WE0 LE0+( )⋅ 4 2 rc⋅ ⋅ 2 π rc⋅ ⋅+– 2 WE0 LE0+( )⋅ 2 4 π–( ) rc⋅ ⋅

Corner rounding

–= =⎩⎪⎪⎪⎨⎪⎪⎪⎧

⎧ ⎪ ⎨ ⎪ ⎩

⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩

rcWE0min

2-------------------=



35/37

Effective emitter area AE* calculation• Taken into account the corner rounding, the effective emitter area AE* is

expressed as (see AE0 calculation)

Knowing that

AE* can be rewritten

• That leads finally to

WE0

LE0LE*

WE*

γC

γC

rc*rcAE∗ WE∗ LE∗⋅ 4 π–( ) rc∗

2⋅–=

WE∗ WE0 2γC+=

LE∗ LE0 2γC+=

rc∗ rc γC+=⎩⎪⎨⎪⎧

AE∗ WE0 2γC+( ) LE0 2γC+( )⋅ 4 π–( ) rc γC+( )2⋅–=

WE0 LE0⋅ 2γC WE0 LE0+( )⋅ 4γC2 4 π–( ) rc

2 2γCrc γC2+ +( )⋅–+ +=

WE0 LE0⋅ 4 π–( ) rc2⋅–

AE0

2 WE0 LE0+( )⋅ 2 4 π–( ) rc⋅ ⋅–{ } γC⋅

PE0

4γC2 4 π–( ) γC

2⋅–+ +=

⎧ ⎪ ⎪ ⎪ ⎪ ⎨ ⎪ ⎪ ⎪ ⎪ ⎩ ⎧ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎨ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎪ ⎩

AE∗ AE0 γC PE0⋅ π γC2⋅+ +=



36/37

References

[1] B. Ardouin, “Scalble Parameter Extrcation Methodologies using TRADICA and HMT for HICUM Level 2.1.Trickcs and Techniques“, 5th European HICUM Workshop, Crolles, June 2005.

[2] H.-M. Rein, “A Simple Method for Separation of the Internal and External (peripheral) Currents of Bipolar Tran-sistors“, Solid-State Electron., vol. 27, pp. 625-635, 1984.

[3] M. Schröter and D.J. Walkey, “Physical Modeling of Lateral Scaling in Bipolar Transistors“, vol. 31, pp. 1484-1491, 1996 and vol. 33, p. 171, 1998.

[4] D. Céli, “About hjEi Parameter Extraction“, Bipolar Arbeitskreis, Erfurt, October 2006.

[5] D. Céli and D. Berger, “Direct Extraction of Base-Collector Weak Avalanche HICUM Model Parameters“,HICUM User’s Meeting, Minneapolis, September 2001.

[6] F. Pourchon, “Scalability of the Avalanche Phenomenon in Bipolar Transistor“, 5th European HICUM Work-shop, Crolles, June 2005.

[7] XMOD, “HICUM Scalable Models for STM BC7RF Process“, MINEFI 2005.[8] T. Schwartzmann, TM07_036, Internal ST report, February 2007.[9] M. Schröter, S. Lehmann and D. Céli, “Non-Standard Geometry Scaling Effects in High-Frequency SiGe Bipo-

lar Transistors“, WCM, NSTI Nanotech 2007, vol. 3, pp. 603-608, May 2007



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review of some hicum geometry scaling laws: issue and proposal

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