prof. yoram ofek - dit - university di trento1 ip flows over optical and wireless ip flows over...

prof. Yoram Ofek - DIT - University di Trento

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IPIP FLFLows over ows over OOptical and ptical and WWireless ireless “IP-FLOW”

UTC-based / Banyan-basedSwitch and Wi-Fi Prototype

This work was supported in part by funds from the European Commission (contract N° 002807)

Marie Curie Chairs (EXC)Marie Curie Chairs (EXC)


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Participants

Mario Baldi – Politecnico di Torino (Michele Corra – Universita' di Trento) Giorgio Fontana – Universita' di Trento Renato LoCigno – Universita' di Trento Yoram Ofek – Universita' di Trento Danilo Severina – Universita' di Trento Prof. Giovanni Soncini – Universita' di Trento

(Deepak Agrawal – Universita' di Trento) Paolo Larcheri – Universita' di Trento Truong Thu Huong – Universita' di Trento Guido Marchetto – Politecnico di Torino Viet-Thang Nguyen – Universita' di Trento Olga Zadedyurina – Universita' di Trento


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Agenda

Project overview and prototype-testbed objectives – Yoram Ofek – Universita' di Trento

Terabit switch prototype – Giorgio Fontana – Universita' di Trento

Terabit switch control plan and signaling – Michele Corra, Viet-Thang Nguyen – Universita' di Trento

Torino software-based time-driven priority switch – Guido Marchetto, Mario Baldi - Politecnico di Torino

Using Symmetricom GPS time card – Guido Marchetto – Politecnico di Torino

GE to terabit switch interface – Truong Thu Huong – Universita' di Trento

Terabit switch to wireless interface – Paolo Larcheri – Universita' di Trento


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General Guidelines

General prototype meeting at least every 3-month Credit for all principle Prototype activities is only part of a more general research activities

Objective: To have some prototype demonstration by July, then To use the prototype to obtain more funding to expand:

To connect Trento and Torino To develop and implement optoelectronic switching fabric To develop and implement GMPLS control plane

Other activities: web page, papers, seminars, …


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Prototype Functional Structure

SwitchingSwitchingFabricFabric

PrototypePrototype

UTC-basedUTC-basedSwitch ControllerSwitch Controller

UTC-basedUTC-basedNetworkNetworkInterfaceInterface

Wi-FiWi-Fiw/Smart w/Smart AntennaAntenna

(1)(1)

(2)(2)(3)(3)

(4)(4)UTC-basedUTC-based

NetworkNetworkInterfaceInterface


(3)(3)

(4)(4)

UTCUTCUTCUTC

UTCUTC

Optional extensions: Optional extensions: (5) Satellite interface(5) Satellite interface(6) Ethernet Passive Optical Network - EPON(6) Ethernet Passive Optical Network - EPON

(5)(5)

(6) EPON(6) EPON

GEGE GEGE


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Prototype Activity Chart

Switching Fabric Prototype:Switching Fabric Prototype:

GiorgioGiorgio, Olga, Olga

UTC-based Switch Controller:UTC-based Switch Controller:

GiorgioGiorgio, Nguyen, (Deepak, Michele), Nguyen, (Deepak, Michele) UTC-basedUTC-basedNetwork Interface:Network Interface:

DaniloDanilo, Guido, , Guido, Paolo, TruongPaolo, Truong

Wi-Fi w/Smart Wi-Fi w/Smart Antenna:Antenna:

DaniloDanilo, Paolo, Paolo (1)(1)

(2)(2)(3)(3)(4)(4)

UTCUTC UTCUTC

GE:GE:

GiorgioGiorgio,,OlgaOlga

Main Demonstration: Streaming of Audio and Video Main Demonstration: Streaming of Audio and Video Flows through Wireless and Optical Flows through Wireless and Optical = IP-FLOW = IP-FLOW

between Trento and Torinobetween Trento and Torino

SWSW Responsible Person Responsible PersonDaniloDanilo

HWHW Responsible Person Responsible PersonGiorgioGiorgio

12 Project – WL QoS12 Project – WL QoS

Torino NetGroupTorino NetGroupTime-drive Priority Time-drive Priority


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Action Plan

Implementation: February-May 2005 (1)(1) Hardware implementation and testing (Giorgio, Olga) Software implementation primarily the scheduling operations, s.t.,

at predefined times in each UTC second – while gradually changing time scales – from milliseconds to microseconds:

(2)(2) To change the cross-point by the switch controller (Nguyen, Deepak) (3)(3) To send data to the switch (Truong, Guido)

To send data to Wi-Fi (Paolo, Danilo) (4)(4) Wi-Fi with directional antennas (Paolo, Danilo)

Integration and testing: May-July 2005


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(1) Switching Fabric Prototype

MindSpeedM21151

128-by-1281280 Gbps

1

128

1

128

11

128

1

128

1

3232

128x128: 10 Tbps Switching Module

Ele

ctri

cal I

nte

rcon

nec

tion

MindSpeedM21156

128-by-1281280 Gbps

128-by-1281280 Gbps

128-by-1281280 Gbps


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STEP 1: BASIC ELECTRONIC STEP 1: BASIC ELECTRONIC ANALOG & DIGITALANALOG & DIGITAL TESTING TESTING

M21151144 x 144Crosspoint

Switch


Switch


Switch


Switch

Ele

ctri

cal I

nte

rcon

nec

tion

PatternGenerator

ErrorDetector

Oscilloscope

2115621156

2115621156

Laptop computerLaptop computer

Direct electricalDirect electricalCoupling of GE?Coupling of GE?

Direct electricalDirect electricalCoupling of GE?Coupling of GE?

SpectrumAnalyzer



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Switch


Switch


Switch


Switch


Switch


Switch


Switch


Switch

TWO NODES with Alignment TWO NODES with Alignment GPS/GalileoTime Source

GPS/GalileoTime Source

Pipeline ForwardingSwitch Controller

UTC


UTC Laptop computer

Laptop computer

Laptop computer

Laptop computer

UTC UTC

Remote PacketRemote PacketData Source (Torino Design)Data Source (Torino Design)

Remote PacketRemote PacketData Source (Torino Design)Data Source (Torino Design)

UT

C T

FA

lig

nm

en

t

UTCUTC

SIGNALINGSIGNALINGVIA THEVIA THE

NETWORKNETWORK

UT

C T

FA

lig

nm

en

t

UT

C T

FA

lig

nm

en

tU

TC

TF

Ali

gn

me

nt

Ele

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cal I

nte

rcon

nec

tion

Ele

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nte

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nec

tion

TF – Time Frame TF – Time Frame



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(1) UTC Based Switching Test Bed


Switch


Switch

Gluelogic

Gluelogic

Low speed control channelpublic Internet.

USB2 USB2

High speeddata channels

BERT3.2 Gb

GPS time/frequencysource.

GPS time/frequencysource.

Parallelinterface

Parallelinterface

rs232 rs232

Pack and Unpack datawith UTC.

Mindspeed demo board Mindspeed demo board


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Switch


Switch

Gluelogic

Gluelogic

Low speed control channelpublic Internet.

USB2 USB2

High speeddata channels

Parallelinterface Parallel

interface

rs232rs232

Pack and Unpack datawith UTC.

Mindspeed demo board Mindspeed demo board

2 x gigabit ethernet 2 x gigabit ethernet

4 x GBIC


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Input 1 Alignment

SwitchingFabric

Alignment

Input N

Output 1

Output N

t+1

Time-of-Day or UTC

t-1 t-2 t-3tt+2

Idle time: Safety marginbetween two time frames

Idle time:Safety marginbetween two time frames

Time-of-Day or UTC

: Time frame payload – with a predefined number of data units

fT fT fT fT

fT : Time frame


(1) Switching Fabric Prototype – Alignment


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UTC

Alignment Queues

1-to-3DMUX

Queue 1

Switch ControllerSelect-in

Queue 2

Queue 3

3-to-1DMUX

Switch ControllerSelect-out

{

To FabricInput signal

UTC alignment principle:At every time frame, - packets from the receiver are stored in one queue and - packets to the fabric are transferred from another queueThus, memory access BW = optical link BW

UTC alignmentproblem:The link delay is not integer multiple of time frames

Output signal

(1) Switching Fabric Prototype – Alignment


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(1) Switching Fabric Prototype – testing plan

Testing step 1: Static testing of the cross-point switches Testing step 2: Optoelectronic transceiver to cross-point Testing step 3: Bit synchronization testing Testing step 4: GE to GE packet transmission

Key issues: Bit synchronization UTC synchronization software latency

Discussion Notes:Discussion Notes:• The synchro between two card can be done with internal generator or with GPS clock and PGA logic card• Synchro between two card: it is more important that the two card has the same frequency than to know exactly what the frequency of them is • MindSpeed works until 3Gb/s, but at this speed the distortion generates jitter. It can be reduced by PLL. With PLL a continuous flow of packets is needed to avoid silence that can cause loss of synchro.• One flow in input can manage more than one flows in output.


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(2) UTC-based Switch Controller

Down-load next switching configuration UTC synchronization software latency Which controller should be used? PC-based, ? Using FPGA card with USB interface – up to 200 MHz

How to connect single controller to 4 cross-point switches


PrototypePrototype

UTC-basedUTC-basedSwitch ControllerSwitch Controller

(1)(1)

(2)(2)

UTCUTC


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(2) UTC-based Switch Controller

Discussion Notes:Discussion Notes:

• To use an external card with FPGA on board. The card can be connected to the Mindspeed Board with bus and must be connected to a PC through COM or USB connection. The controller must contain:

FPGAUSB controller or COM portProgrammable PLL to change the clock of FPGA

• The configuration of controller can be done with VHDL

• The LabView software can be user for these purpose, but it is only an user-interface.

• The speed of FPGA must manage the Mux (1to3) and DeMux(3to1)


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(3) UTC-based Network Interface

Which operating system should be used? FreeBSD or Linux

UTC to transmission response time – UTC to GE card?


PrototypePrototype


(1)(1)

(3)(3)


(3)(3)

UTCUTC UTCUTC


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(3) UTC-based Network Interface


• The card for syncrho receive a clock from GPS and generate a pulse timing in the output with frequency that can be changed

• Developed software is online.

• Each Pc must have an UTC card for the synchro

• If a server has two processor, the OS allows to manage them separately?

• Software FREEBSD: the system must manage the queue and programs to queues are written for this OS. There is not export for Linux?

• FreeBSD can be more flexible, but it may be more difficult to manage.


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(4) Wireless to Optical Interface

Bandwidth mismatch scheduling Clock distribution to Wi-Fi clients – mobile devices … Access point from ST Microelectronics


PrototypePrototype



(1)(1)

(3)(3)(4)(4)



(3)(3)(4)(4)

UTCUTC UTCUTC


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(4) Wireless to Optical Interface


• The flows that arrive to wireless network is synchro

• The AP of the wireless LAN can be synchronized among them

• The policy to allow user to access to the network can be partially centralized.

• Synchro among users is very difficult.

prof. yoram ofek - dit - university di trento1 ip flows over optical and wireless ip flows over...

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