COUNCIL

p r e s e n t s

APEX"Electronics Assembly Processe x h i b i t i o nconference

PROCEEDINGS OF THE

TECHNICAL PROGRAM

MARCH 14-16,2000LONG BEACH CONVENTION CENTER,

LONG BEACH, CALIFORNIA

UB/TIB Hannover121 598 721

89

TABLE OF CONTENTS

Session P-AD1: Developments in Wafer Scale PackagingChair: Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory

Wafer Level Packaging (WLP) & Beyond, Associated Trends in Multi-Chip Package Integration P-AD1 / 1Lee Smith, Amkor Technology

Important Considerations for Packaging ICs at Wafer Level P-AD1 / 2Joseph Fjelstad, Pacific ConsultantsBelgacem Haba, Ph.D., Tessera, Inc.

A Unique Solution to Wafer-Level Back-End Processing P-AD1 / 3John Novitsky, FormFactor Inc.Chuck Miller, FormFactor Inc.

Session P-AD2: CSP Reliability ConsiderationsChair: Martin Goetz, Alpine Microsystems

Wafer Level Packaging: Advantages, Applications and Reliability P-AD2 / 1Peter Elenius, Flip Chip Technologies

When to Underfill Chip Scale Packages, A Review of Design Considerations for Portable Electronic P-AD2 / 2ApplicationsSteven J. Adamson, AsymtekHoratio Quinones, Asymtek

Impact of CSP Assembly Underfill on Reliability P-AD2 / 3Reza Ghaffarian, California Institute of Technology

Reliability Considerations for the Transition to Chip-Size Packaging P-AD2 / 4Ian R. Harvey, Ph.D., Bourns ElectronicsDavid Turner, Bourns ElectronicsChris Herbert, Bourns ElectronicsJim Ortowski, Bourns Electronics

Session P-AD3: Laser Soldering TechniquesChair: Marc Chason, Motorola Inc.

Using Laser Technology for Selective Soldering and Rework P-AD3 / 1Erick Russell, ViTechnology

Laser Micro Soldering and Welding: Future-Oriented Joining Methods? P-AD3 / 2Marc Fleckenstein, University of Erlangen-NurembergMichael Schmidt, University of Erlangen-NurembergManfred Geiger, University of Erlangen-Nuremberg

Soldering with Diode Lasers P-AD3 / 3ARahn, PhD., Rahn-Tec Consultant's Ync'.

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Session P-AD4: Integrating Passive ComponentsChair: Jan Danvir, Motorola Advanced Technology Center

Embedded Resistors in HDI Applications P-AD4 / 1Bruce Mahler, Ohmega Technologies, Inc.

Integrated Passives Packaging for Wireless Applications P-AD4 / 2Elizabeth Logan, Intarsia CorporationJames Young, Intarsia Corporation

Integral Passives Development: The State of the Art P-AD4 / 3Simon Ang, University of ArkansasFred Barlow, University of ArkansasWilliam Brown, University of ArkansasAicha Elshabini, University of ArkansasJames Parkerson, University of ArkansasLen Schaper, University of ArkansasRichard Ulrich, University of Arkansas

Session P-APl: BGA and CSP TechnologyChair: Glenn Dody, Dody Consulting

Launching Process Technology Worldwide P-APl / 1Kim Hyland, Solectron CorporationHarjinder Ladhar, Solectron Corporation

Measurement and Analysis of BGA Defects with Advanced X-Ray Inspection Systems P-APl / 2Richard Amtower, Ph.D., CR Technology

An Investigation Of The Effects Of Printed Wiring Board Surface Finish and Conformal Coating For Ball P-APl / 3Grid Array AssemblyDave Hillman, Rockwell CollinsNicole Cavanah, Rockwell CollinsJaimie Reinig, Rockwell CollinsLaura Keehner, Rockwell CollinsEddie Hofer, Rockwell Collins

Optimized PBGA Construction for Board Level Assembly and Reliability P-APl / 4Janet Sickler, Analog Devices Inc.James Bray, Analog Devices Inc.Macs Dayanghirang, ASAT Inc.

Trends in Assembly Processes for Miniaturized Consumer Electronics P-APl / 5Caroline Beelen-Hendrikx, Philips Centre for Manufacturing TechnologyMartin Verguld, Philips Centre for Manufacturing Technology

Session P-AP2: DCA Design and ApplicationsChair: Kishor Desai, LSI Logic and Dan Baldwin, Georgia Institute of Technology

Flip Chip Processing for Miniaturized Telecommunications Applications P-AP2 / 1Kari Kulojarvi, Nokia Mobile Phones

Advances in Materials and Processes for Flip Chip Packaging _ P-AP2 / 2Raj Master, Advanced Micro Devices, Inc.Mohammad Khan, Advanced Micro Devices, Inc.Maria Guardado, Advanced Micro Devices, Inc.

Process Characterization and the Effect of Process Defects on Flip Chip Reliability P-AP2 / 3Brian J. Lewis, Siemens EAE

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Session P-AP3: Flip Chip ProcessesChair: Ajit Trivedi, IBM Corp.

OSP Development for Flip Chip Ball Grid Array Package P-AP3 / 1Chao-Wen Chung, Ph.D., LSI LOGIC Corp.Anand Govind, LSI LOGIC Corp.Kumar Nagarajan, LSI LOGIC Corp.

Manufacturing of Flip Chip-on-Laminate P-AP3 / 2Prasanna Kulkarni, Auburn UniversityR. Wayne Johnson, Ph.D., Auburn UniversityErin Yaeger, Loctite CorporationMark Konarski, Loctite CorporationAfranio Torres, Loctite CorporationPaul Krug, Loctite CorporationLarry Crane, Loctite Corporation

Low Cost Flip Chip Processes Utilizing No Flow Underfill Materials P-AP3 / 3Ryan Thorpe, Kyocera AmericaPaul N. Houston , Georgia Institute of TechnologyDaniel F. Baldwin, Ph.D., Georgia Institute of Technology

Failure Mode Analysis of Advanced Electronics Packaging P-AP3 / 4PaulN. Houston, Georgia Institute of TechnologyBrian A. Smith, Georgia Institute of TechnologyDaniel F. Baldwin, PhD, Georgia Institute of TechnologyBrian J. Lewis, Siemens EAE

Session P-AP4: Materials & Reliability for Direct Chip Attach ApplicationsChair: Elizabeth Jacobs, Texas Instruments

Development of a Reliable High Thermal Performance Laminate Flip Chip BGA Package P-AP4 / 1Kumar Nagarajan, LSI Logic CorporationKishor Desai, LSI Logic CorporationMy Nguyen, Ph.D., Honeywell

Flip Chip Reliability __ P-AP4 / 2Peter Borgesen, Ph.D., Universal Instruments CorporationDaniel Blass, Universal Instruments CorporationK. Srihari, Ph.D., State University of New York

High Frequency Acoustic Micro Imaging for Process Monitoring and Quality Control In Flip Chip P-AP4 / 3Underfill AssemblyJanet E. Semmens, Sonoscan, Inc.Lawrence W. Kessler, Sonoscan, Inc.

Session P-AP5: Panel: Advances in Flip Chip Technology and Future Directions No PaperChair: Dan Baldwin, Georgia Institute of Technology

Raj Master, Advanced Micro DevicesPeter Elenius, Flip Chip TechnologiesSteven Corbett, Poly-flex CircuitsKari Kulojarvi, Nokia Mobile Phones Ltd.Larry Crane, Ph.D., Loctite

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Session P-AP6: Advanced Methodology for Cleaning HDI AssembliesChair: Terry Munson, CSL Inc.

Cleaning Issues Related to Flip Chip, Ball Grid Array and Chip Scale Packages P-AP6 / 1Mike Bixenman, Kyzen CorporationErik Miller, Kyzen Corporation

Cleaning RMA Flux Residues in a High Lead Wafer Bumping Process P-AP6 / 2Mary Pat McCurdie, Agilent Technologies

Effects of Post-Reflow Cleaning Processes On the Performance of Flip-Chip Devices P-AP6 / 3Michael Todd, Dexter Electronic MaterialsMike Bixenman, Kyzen Corporation

Session P-AP7: Conformal Coating for Today's AssembliesChair: William Kenyan, Ph.D. Global Centre for Process Change

Conformal Coating Process Controls: The Manufacturing Engineer's Aid P-AP7 / 1Michael A. Reighard, Nordson Electronics Systems GroupNicholas A. Barendt, Nordson Electronics Systems Group

Conformal Coatings and Harsh Environments P-AP7 / 2David A. Douthit, D.A. Douthit Consulting

Conformal Coating: A Hybrid Process for Critical PCB Assemblies P-AP7 / 3Khalid Saeed, Abbott Diagnostic Manufacturing, Inc.

Conformal Coatings for Assembled PCBs - Requirement Profiles and Processing P-AP7 / 4Peter Heuser, Lackwerke Peters GmbH + Co KG

Session P-AP8: Board Assembly Issues with Chip Scale PackagesChair: Joe Fjelstad, Pacific Consultants, LLC

Process Development Strategies: Rapid Implementation of Chip-Scale Packaging Production P-AP8 / 1Jeff Kennedy, Manufacturers' Services LtdA.H. Tan, Manufacturers' Services Ltd

Developing a Repeatable SMT Assembly Process for Chip Scale Packaging P-AP8 / 2Vern Solberg, Tessera, IncJoseph Fjelstad, Pacific Consultants

Assembly and Cleaning of CSPs for High, Low and Ultra-Low Volume Applications P-AP8 / 3R. Ghaffarian, Ph.D., California Institute of TechnologyA. Mehta, California Institute of TechnologyC. Achong, CelesticaO. Vogler, CelesticaD. Phillips, CelesticaA. Chen, CelesticaJ.K. Banner, Ph.D., California Institute of TechnologyS. Stegura, Raytheon Systems CompanyM. Mehrotra, Raytheon Systems CompanyM. Simeus, Raytheon Systems Company

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Session P-AP9: Reliability of Area Array DevicesChair: Jean-Paul Clech, Ph.D, EPS I

BGA Solder Joint Vibration Fatigue Damage P-AP9 / 1T. E. Wong, Raytheon Systems Company, Sensor and Electronic SystemsF. W. Palmieri, Raytheon Systems Company, Sensor and Electronic SystemsB. A. Reed, Raytheon Systems Company, Sensor and Electronic SystemsH. M. Cohen, Raytheon Systems Company, Sensor and Electronic Systems

Optimization of Design and Process Parameters for CSP Solder Joint Reliability P-AP9 / 2Shelgon Yee, Ph.D., Solectron Technical CenterHorace Firth, Solectron Technology Inc.Charles Fieselman, Solectron Technology Inc.Douglas Greenfield, Solectron Technology Inc.

Solder Column Interposer for Single Chip Ceramic Packaging P-AP9 / 3Raj N. Master, Advanced Micro DevicesThomas Dolbear, Advanced Micro DevicesO. T. Ong, Advanced Micro DevicesAjit Dubey, Advanced Micro DevicesH. Saiki, NTK Technical CeramicsK. Yamasaki, NTK Technical Ceramics

Session P-EM1: Smoothing the Manufacturing ProcessChair: Jeff Kennedy, Manufacturers' Services, Ltd.

Flip Chip - Integrated In A Standard SMT Process P-EM1 / 1Wilhelm Prinz von Hessen, Universal Instruments Corporation

Implementing SMT AOI in a Contract Manufacturing Environment P-EM1 / 2Shane Downing, Celestica CorporationMark Owning, MV Technology Ltd.

Implementing CSP Technology: A Controlled Approach to New Product Introduction P-EM1 / 3Cameron E. Presley, K*Tec Electronics, Inc.

Qual i fy ing a n d M a i n t a i n i n g P r o c e s s Sens i t ive M a n u f a c t u r i n g E q u i p m e n t o n the P r o d u c t i o n F l o o r _ ___ P - E M 1 / 4Michael O'Hanlon, DEK Screen Printers

Cycle Time Reduction In A Batch Mode P-EM1 / 5Michael R. Bublitz, Benchmark Electronics - Winona DivisionConnie A. LeCleir, Benchmark Electronics - Winona Division

Session P-EM2: Panel: The Challenges of Bringing Products to Market: No PaperOEMs, EMS Providers and Suppliers Share Their ExperiencesChair: Rodolfo Archbold, Manufacturers' Services Ltd.

Kim Hyland, Solectron Corp.Nick Brathwaite, Flextronics InternationalRichard Kubin, Nortel NetworksGeorge Westby, Universal Instruments CorporationRalph Kenton, Ralph Kenton & Associates

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Session P-EM3: Using Internet for Electronic Data TransferChair: Lisa Hamburg, Circuits Assembly Magazine

Expediting Product Data Transfer between OEM and EMS Provider P-EM3 / 1Tomo Yoshikawa, Solectron CorporationTaka Shioya, Solectron Corporation

Best Practices in New Product Introduction: Software Tools for Data Transfer and Rapid Document __ P-EM3 / 2GenerationMike Shivnan, Manufacturers' ServicesTom Lyons, Manufacturers' Services

Remote Monitoring of the Reflow Process # ^ P-EM3/3Miles Moreau, KIC Thermal Profiling

Session P-EM4: Ins & Outs of Supply Chain ManagementChair: Angela Locascio, Ph.D, Motorola, Inc.

Customer-Centric Supply Chains P-EM4 / 1Sarah Saunders, Manugistics, Inc.Case History of Inventory Accuracy Management in an OEM Electronics Manufacturing Environment P-EM4 / 2Kay Israelite, Motorola, Inc.

Beyond Manufacturing: Managing the EMS Supply Chain P-EM4 / 3Brian Tracy, EFTC CorporationJohn Briant, EFTC Corporation

Session P-EM5: EMS Business IssuesChair: Greg Reed, Penn Well

Tools for Measuring Customer Satisfaction P-EM5 / 1Douglas Andrea, Andrea Electronics CorporationSezai Dogdu, Ph.D., Andrea Electronics CorporationCarolynne O'Grady, Andrea Electronics Corporation

A Field Survey Report on Outsourcing P-EM5 / 2Randall Sherman, New Venture Research Corporation

Changes EMS Business Models for the New Millennium P-EM5 / 3Mark Lyell, SMT Unlimited

Session P-EQl: Advances in Inspection TechnologyChair: Ray Prasad, Ray Prasad Consultancy Group

An Improved Imaging System for Inspecting BGA, CSP, Flip Chip Components P-EQl / 1Mark Cannon, ERSA Lottechnik GmbH

Benefits of AOI: A Case Study P-EQl / 2Shane Fitzpatrick, Dovatron Ireland, B. V.

Advances in Image Technology: Statistical Appearance Modeling for PCB Inspection P-EQl / 3Brook Jackson, CyberOptics

An Integrated Test And Inspection Strategy P-EQl / 4David M. Mendez, Solectron Electronics

AOI Implementation - Obtaining the Best Return on Investment from the Process P-EQl / 5Mark J. Norris, Vision Inspection Technology

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Session P-EQ2: Dispensing EquipmentChair: Ken Gilleo, Ph.D, Cookson Electronics Group

Practical Production Applications for Jetting Technology _ P-EQ2 / 1Anthony F. Piracci, Asymtek

Ultra-High Speed Dispensing of Surface Mount Materials to Enhance Production Throughput P-EQ2 / 2Chris Ijee, Speedline Technologies, Inc.

Flux Encapsulants - Dispense and Place P-EQ2 / 3Jaques Coderre, Universal Instruments CorporationKarthik Vijayamadhavan, Binghamton University

Session P-EQ3: Rework Methods for High Density AssembliesChair: Donald Spigarelli, Phase Four Solutions

Rework Process Development and Solder Joint Analysis for Fine Pitch Connectors P-EQ3/1Paul P. E. Wang, Solectron Corporation

Rework of BGAs Used in Data Networking Applications P-EQ3 / 2Changhong Lin, Nortel NetworksSusan Hayes, Nortel NetworksRajat Srivastava, Nortel NetworksKSrihari, Ph.D., State University of New York

Rework Process for MicroBGA and CSP Components P-EQ3 / 3Thomas W. Dalrymple, IBM MicroelectronicsCynthia Milkovich, IBM Microelectronics

Session P-EQ4: Trends in Placement EquipmentChair: John Yealland, Celestica, Inc.

Process Development for Chip-Size Package Mounting P-EQ4 / 1Caroline Beelen-Hendrikx, Philips Centre for Manufacturing TechnologySjefvan Gastel, Philips Electronic Manufacturing Technology

Advances in SMT Automation: The 0201 Challenge for High Speed Placement Machines P-EQ4 / 2Gene Dunn, Panosonic Factory Automation

Mass Reflow Assembly of 02\01 Components P-EQ4 / 3James H. Adriance , Universal Instruments CorporationJeffrey D. Schake, DEK Screen Printers

A Placement Tool Characterization: Innovations and Obstacles with Advanced Assembly Equipment _ P-EQ4 / 4Brian J. Lewis, Siemens EAEAlan R. Reinnagel, Hover-Davis, inc.Andrew D. Dugenske, Georgia Institute of Technology

Low Cost Smart Tag/RFID Assembly Using Flexible Flip Chip Shooters P-EQ4 / 5Gunter Schiebel, Siemens AG

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Session P-EQ5: Selective SolderingChair: Bill Barthel, Plexus

Using Softbeam Technique as a Selective Soldering Method in High Volume Production P-EQ5 / 1Lother Baer, Kiekert AC

Selective Soldering Options and Decisions P-EQ5 / 2Peter Bagshaw, Seho UK Ltd

Pin In Paste - Another Process Alternative #- P-EQ5/3Michael K. Garn, Abbott Laboratories Diagnostics Division

Session P-EQ6: Developments in Wave & Refiow SolderingChair: Phil Zarrow, ITM Inc.

Using Simulated Membrane Technology in Inert Wave Soldering to Reduce Costs P-EQ6 / 1Jason Smith, Lexmark ElectronicsAndy C. Mackie, Ph.D., Praxair, Inc.Bill Boudinot, Praxair, Inc.

Robust Refiow Profile Design P-EQ6 / 2Bob Rooks, KByte Reptron Inc.

Cooling Parameters in Refiow Soldering P-EQ6 / 3W. James Hall, Vitronics Sollec Corporation

Integrated Profiling for the Refiow Process P-EQ6 / 4Kristen Brown, BTU international

Session P-MTl: Underfill MaterialsChair: Alec Babiarz, Asymtek

"No Flow" Underfill Reliability is Here - Finally! P-MTl / 1Michael A. Previti, Cookson Semiconductor Packaging Materials

Evaluations of No-Flow Fluxing Underfills with BGA, CSP and Flip Chip on Board Assemblies P-MTl / 2Doug Katze, Emerson and CumingTony DeBarros, Emerson and CumingPericles Kondos, Universal Instruments

Refiow Encapsulant for Flip Chip Applications P-MTl / 3Torey J. Tomaso, Kester SolderHui Wang, Kester Solder

Wafer -Level Flux-Underfill: Underflip! P-MTl / 4Ken Gilleo, Ph.D., Cookson Electronics

On the Effects of Underfill Properties on Flip Chip Plastic Ball Grid Array (FC-PBGA) Reliability __ P-MTl / 5Peter J. Brofman , IBM Microelectronics DivisionMichael Gaynes, IBM Microelectronics DivisionAleksander Zubelewicz, IBM Microelectronics DivisionSon Tran, IBM Microelectronics Division

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Session P-MT2: Eliminating Lead from Electronics: Lead-free AlloysChair: Paul Vianco, Ph.D, Sandia National Laboratories

Worldwide Usage of Lead-free Solder Alloys for SMT P-MT2 / 1Peter Biocca, Multicore Solders, Inc.

Assessment of Lead-Free Solders for SMT P-MT2/2Klaus Feldman, Institute for Manufacturing Automation and Production Systems, University of ErlangenMarcus Reichenberger, Institute for Manufacturing Automation and Production Systems, University of Erlangen

Solderability of Lead-Free Alloys P-MT2 / 3Christopher Hunt, National Physical LaboratoryDeborah Lea, National Physical Laboratory

Session P-MT3: Processing with Lead-Free SoldersChair: R. Wayne Johnson, Ph.D, Auburn University

Challenges and Solutions for Lead-Free Soldering of Large PCB Assembly P-MT3 / 1Kenichiro Suetsugu, Ph.D., Matsushita Electric Industrial Company, Ltd.Takeo Okumura, Matsushita Electric Industrial Company, Ltd.Thomas J. Baggio, Panasonic Factory Automation

Lead-Free - After the Shouting Is Over? P-MT3 / 2Alan Rae, Cookson Electronics

Circuit Board Assembly with Lead-Free Solders P-MT3 / 3Paul T. Vianco, Sandia National LaboratoriesCynthia L. Hernandez, Sandia National LaboratoriesJerome A. Rejent, Sandia National Laboratories

Compatibility of Lead-Free Solders with Refiow Process P-MT3 / 4Benlih Huang, Ph.D., Indium Corporation of AmericaNing-Cheng Lee, Ph.D., Indium Corporation of America

Session P-SM1: Evaluating ProcessesChair: Karen Walters, BTU International

Usage Of Process Capability Coefficients In SMT-Manufacturing: Theory And Practical Experiences P-SM1 / 1Wilfried Sauer, Dresden University of TechnologyMathias Keil, Cybertron mbHHeinz Wohlrabe, Dresden University of Technology

The Use for Process Metrics to Predict Quality Performance P-SM1 / 2Brian Coll, Manufacturers' Services Ltd

Systematic Procedures for the Process Evaluation of Solder Pastes P-SM1 / 3Balakrishnan Goplan, State University of New YorkK. Srihari, Ph.D., State University of New YorkJames H. Adriance, Universal Instruments Corporation

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Session P-SM2: Evaluating and Improving Electronic Manufacturing ProductivityChair: Chuck Richardson, SCI Systems

Real Time Costing as a Tool to Improve Profitability P-SM2 / 1Ronald C. Lasky, Ph.D., PE, Cookson Performance Solutions

A Practical Guide to Process Assessments as a Continuous Process Improvement Tool P-SM2 / 2Joe Belmonte, Cookson Performance Solutions

Tools for Optimizing Manufacturing Efficiency in a Low Margin Environment P-SM2/3Mike Slenson, Manufacturers' Services Ltd

Operational Performance Metrics and Assessment _ P-SM2/4Leon F. McGinnis.Ph.D., Georgia Institute of Technology

Session P-SM3: Automating Odd Form AssemblyChair: Bill Mahoney, GPAX International Corp.

Application and Automation of Straddle Mount Connectors P-SM3/1John G. Ricci, Universal Insterments Corp.Sarah Marshall, Celestica Inc.Jeffrey Stanton, AMP Inc.

Developments in Odd-Form Assembly P-SM3 / 2Joseph Morris, PMJ Automec Oyj.

Feeding Challenges and Solutions for Odd-Form Parts _ P-SM3 / 3Gregory W. Holcomb, CHAD Industries

Session P-SM4: Reducing Manufacturing DefectsChair: Kathleen Murray, Cookson Performance Solutions

Analyzing Lead-Free Soldering Defects in Wave Soldering Using Taguchi Methods P-SM4 / 1Gerjan Diepstraten, Vitronics Soltec

Using Failure-Mode Effect Analysis (FMEA) to Reduce Defects P-SM4 / 2Paul Wheeler, Manufacturers' Services Ltd.

Implementing Statistical Process Control and Automated Optical Inspection in Electronic Manufacturing P-SM4 / 3George T. Ayoub, Ph.D., Machine Vision Products, Inc.

Automating Component Selection and Trackability P-SM4 / 4Brian Philips, Panasonic Factory Automation

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Session P-SMS: Advances in Screen Printing Technology: Controlling the ProcessChair: Richard Clouthier, AMTX

Developments in Advanced Stencil Technology P-SM5 / 1Richard Cloutier, AMTX

Solder Paste Characteristics that Influence Production Yields P-SM5 / 2David Torp, Kester Solder/Litton

High Speed Stencil Printing of Solder Paste: A DOE Screening Experiment P-SM5 / 3S. Manian Ramkumar, Ph.D., Rochester Institute of Technology (RIT)Jason Lemery, Rochester Institute of Technology (RIT)

3D Inspection for the Measurement of Solder Paste Deposits P-SM5/4Jeffrey Rupert, GSI Lumonics Inc.Doreen Tan, GSI Lumonics Inc.Pat Pilon, GSI Lumonics Inc.

Comparison of Volume and Height Control Between 45 and 60 Degree Metal Squeegee Blades and Direct P-SM5 / 5ImagingJay B. Hinerman, DEK USA, Inc.

PCB Surface Planarity for Solder Paste Deposition P-SM5 / 6George Trinite, Sanmina Corporation

Session F-FO2: Japan's "JISSO" Technology Roadmap for Packaging and Hand-held ApplicationsChair: Richard Boulanger, Universal Instruments Corp.

The Requirement for A Semiconductor Device and Package or Electronic Products F-FO2 / 2Kuniaki Takahashi, Toshiba Corp. Digital Media Equipment & Services Company

Session F-FO3: New IPC StandardsChair: Mel Parrish, EMPF/ACI

IPC-9850 Surface Mount Equipment Performance Characterization F-FO3 / 4Craig Ramsey, Quad Systems Corp.Barry Groman, MotorolaDavid Farrell, Universal Instruments

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