Real Time Operating System Basic for Developing Embedded System

Real Time Operating SystemBasic for Developing Real Time Embedded SystemDania Eridanidania@ce.undip.ac.id

Teknik Sistem Komputer 20151TodayBasic architectureHardware interfacingCPUMemoryI/OTeknik Sistem Komputer 20152Real TimeBasic ArchitectureComputer CPU and memory connected by bus.Bus data, address, control

Real time system uniprocessing and multiprocessingReal time with multiprocessing distributed system or schedule tasks across the different processor.Teknik Sistem Komputer 20153

Hardware InterfacingLatchingA mechanism for recording the appearance of that signal for later processing.Ex: interrupt signals are latched into the programmable interrupt controller so that they can be serviced at an appropriate time.

Teknik Sistem Komputer 20154Hardware InterfacingEdge vs Level TriggeredThe signal is represented by the voltage exceeding a certain threshold. When the signal reaches that level, an event is triggered and latched so that another event cannot be triggered until the latch is reset.Teknik Sistem Komputer 20155

Hardware InterfacingTeknik Sistem Komputer 20156Tristate logicWhen multiple devices are connected to the same bus structure it is important that those devices that are not currently involved in data interchange remain, essentially, unconnected.To achieve this effect, those devices that are not involved are placed into a high-impedance state at their bus interconnections, that is, they are tristated .Hence a particular electrical signal can be in one of three levels, high, low, or tristated.Hardware InterfacingWait StateWhen a microprocessor must interface with a slower peripheral or memory device, the normal timing of the microprocessor may need to be altered. Specifically, in some cases a wait state may need to be added to the bus cycles that access that peripheral or memory. Wait states extend the microprocessor read or write cycle by a certain number of processor clock cycles to allow the device or memory to catch up.Teknik Sistem Komputer 20157CPUThe CPU can be thought of as containing several components connected by its own internal bus, which is distinct from the memory and address buses of the system.

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CPUFetch and Execute CyclePrograms are a sequence of macroinstructions or macrocode. These are stored in the main memory of the computer in binary form and await execution. The macroinstructions are sequentially fetched from the main memory location pointed to by the program counter, and placed in the instruction register.The control unit decodes the instruction.Teknik Sistem Komputer 20159CPUMicrocontroller Not all real-time systems are based on a microprocessor. Some may involve a mainframe or minicomputers, while others are based on a microcontrollerA microcontroller is a computer system that is programmable via microinstructionsBecause the complex and time-consuming macroinstruction decoding process does not occur, program execution tends to be very fast

Teknik Sistem Komputer 201510CPUInstruction FormAn instruction set constitutes the language that describes a computers functionality.Instructions in a processor are akin to functions in procedural programming language in that both take parameters and return a result. Most instructions make reference to either memory locations, pointers to a memory location, or a register.Teknik Sistem Komputer 201511CPUPipeliningPipelining imparts an implicit execution parallelism in the different cycles of processing an instruction. Suppose execution of an instruction consists of the following stages:1. Fetch Get the instruction from memory.2. Decode Determine what the instruction is.3. Execute Perform the instruction decode.4. Write Store the results to memory.In nonpipelined execution (scalar execution), one instruction is processed through a cycle at a time. With pipelining, more instructions can be processed in different cycles simultaneously, improving processor performance.Teknik Sistem Komputer 201512CPUPipeliningTeknik Sistem Komputer 201513

CPUCore InstructionThere are generally six kinds of instructions. These can be classified as:Horizontal-bit operation: The horizontal-bit operation is a generalization of the fact that these instructions alter bits within a memory in the horizontal direction, independent of one anotherFor example, the third bit in the operands would affect the third bit in the resultantUsually, these instructions are the AND, OR, XOR, NOT operations.Vertical-bit operation: The vertical-bit operation alters a bit within a memory word in relation to the other bits. These are the rotate-left, rotate-right, shift-right, and shift-left operations.Teknik Sistem Komputer 201514CPUCore InstructionThere are generally six kinds of instructions. These can be classified as:Control: Both horizontal- and vertical-bit operations can alter a word within a memory location, but a processor has to alter its state to change flow of execution and which instructions the processor executesData movement: The I/O movement instructions are used to move data to and from registers, ports, and memoryMathematical/special processing: The bit operation instructions can create the effects of binary arithmetic, but it is far more efficient to have the logic gates at the machine hardware level implement the mathematical operations.Teknik Sistem Komputer 201515CPUCore InstructionThere are generally six kinds of instructions. These can be classified as:Other (processor specific): The only other kinds of instructions are those specific to a particular architecture. For example, the 8086 LOCK, The 68000 has an ILLEGAL instruction, Such instructions as LOCK and ILLEGAL are highly processor architecture specific, and are rooted in the design requirements of the processor.Teknik Sistem Komputer 201516CPUCISCComplex instruction set computers (CISC) supply relatively sophisticated functions as part of the instruction set. This gives the programmer a variety of powerful instructions with which to build applications programs and even more powerful software tools, such as assemblers and compilers. In this way, CISC processors seek to reduce the programmers coding responsibility, increase execution speeds, and minimize memory usage.Teknik Sistem Komputer 201517CPURISCIn a reduced instruction set computer (RISC) each instruction takes only one machine cycle. Classically, RISCs employ little or no microcode. This means that the instruction-decode procedure can be implemented as a fast combinational circuit, rather than a complicated microprogram scheme. In addition, reduced chip complexity allows for more on-chip storage (i.e., general-purpose registers).Effective use of register direct instructions can decrease unwanted memory fetch timeTeknik Sistem Komputer 201518CPUCISC vs RISC Teknik Sistem Komputer 201519CISCRISCComplex instructions take many different cycles.Simple instructions taking one clock cycle.Any instruction can reference memory.LOAD/STORE architecture to reference memory.No instructions are pipelined.Highly pipelined design.A microprogram is executed for each native instruction.Instructions executed directly by hardware.Instructions are of variable format.Fixed-format instructions.There are multiple instructions and addressing modes.Few instructions and addressing modes.There is a single set of registers.Large multiple-register sets.Complexity is in the microprogram and hardware.Complexity handled by the compiler and software.MemoryMemory AccessThe typical microprocessor bus read cycle embodies the handshaking between the processor and the main memory store. The time to complete the handshaking is entirely dependent on the electrical characteristics of the memory device and the busTeknik Sistem Komputer 201520MemoryMemory technologiesVolatile (the contents will be lost if power is removed) or non-volatile (the contents are preserved upon removing power).Primary and secondary memory storage forms a hierarchy involving access time, storage density, cost, and other factors. Clearly, the fastest possible memory is desired in real-time systems, but cost control generally dictates that the fastest affordable technology is used as required.Teknik Sistem Komputer 201521MemoryMemory technologiesIn order of fastest to slowest, and considering cost, memory should be assigned as follows:1. Internal CPU memory2. Registers3. Cache4. Main memory5. Memory on board external devicesTeknik Sistem Komputer 201522I/OIn real-time systems the input devices are sensors, transducers, steering mechanisms, and so forth. Output devices are typically actuators, switches, and display devices.Input and output are accomplished through one of three different methods: programmed I/O, memory-mapped I/O,or direct memory address (DMA).Teknik Sistem Komputer 201523I/OProgrammed I/OIn programmed I/O, special data-movement instructions are used to transfer data to and from the CPU. An IN instruction will transfer data from a specified I/O device into a specified CPU register. An OUT instruction will output from a register to some I/O device.Normally, the identity of the operative CPU register is embedded in the instruction code. Both the IN and OUT instructions require the efforts of the CPU, and thus cost time that could impact real-time performance.Teknik Sistem Komputer 201524I/ODirect Memory AccessIn DMA, access to the computers memory is given to other devices in the system without CPU intervention. That is, information is deposited directly into main memory by the external deviceTeknik Sistem Komputer 201525

Here a DMA controller is requiredunless the DMA circuitry is integrated into the CPU. Because CPU participation is not required, data transfer is fast.I/OMemory-Mapped I/OMemory-mapped I/O provides a data-transfer mechanism that is convenient because it does not require the use of special CPU I/O instructions. In memorymapped I/O certain designated locations of memory appear as virtual I/O portsTeknik Sistem Komputer 201526I/OInterruptSoftware interrupt: from some instruction when an instruction executed by master processorInternal hardware interrupt: event from trouble from some executed instruction like illegal math operation, debugging, invalid instructionExternal hardware interrupt: from hardware beside master processor, like I/OTeknik Sistem Komputer 201527LatihanApa yang kalian pahami mengenai interrupt?Bagaimana proses penyimpanan data dan instruction yang ada pada interrupt terkait dengan latching dan tristate logic?Jelaskan siklus eksekusi yang ada di CPU dan bandingkan proses eksekusi biasa dengan proses pipelining.Apa yang kalian pahami tentang DMA?Teknik Sistem Komputer 201528Sekian dan Terimakasih . . .Teknik Sistem Komputer 201529