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Preprint typeset in JINST style - HYPER VERSION

Performance tests during the ATLAS IBL StaveIntegration

J. Jentzscha∗

on behalf of the ATLAS CollaborationaCERN, Switzerland/TU Dortmund, Germany

E-mail: jennifer.jentzsch@tu-dortmund.de

ABSTRACT: In preparation of the ATLAS Pixel Insertable B-Layer integration, detector compo-nents, so called staves, were mounted around the Beryllium ATLAS beam pipe and tested usingproduction quality assurance measurements as well as dedicated data taking runs to validate acorrect grounding and shielding schema. Each stave consists of 32 new generation readout chipswhich sum up to over 860k pixels per stave. The integration tests include verification that neitherthe silicon planar n+-in-n nor the silicon 3D sensors were damaged by mechanical stress, and thattheir readout chips, including their bump-bond and wire-bond connections, did not suffer from theintegration process. Evolution of the detector performance during its integration will be discussedas well as its final performance before installation.

KEYWORDS: CERN; LHC; ATLAS.

∗Corresponding author.

Contents

1. The ATLAS Insertable B-Layer 1

2. Module loading and results 2

3. The Stave QA bench and performance 3

4. Integration and current status 8

5. Towards bake out and operation 8

6. Conclusion 9

1. The ATLAS Insertable B-Layer

An additional layer of pixel detectors has been installed in mid 2014 into the existing 3-layerATLAS Pixel Detector [1], [2]. The main reasons for that first upgrade are required improvementsof tracking robustness, the tracks’ impact parameter reconstruction, vertexing and thus b taggingperformance for Run 2 and 3 of the LHC. It was shown in [3] and [4] that this new layer ofsilicon pixel detectors is more robust to the conditions expected for the upcoming runs, namelyincreased luminosity, radiation damage and pileup. The Insertable B-Layer (IBL), consists of 14staves (Figure 1(b)) mounted around a new Beryllium beam pipe at a tilt angle of 14◦ at an averagedistance of 33.25 mm from the beam (Figure 1(a)).

(a) (b)

Figure 1. (a) Technical drawing of one quarter of the ATLAS IBL [3] and a (b) sketch of one stave.

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One stave hosts 32 readout chips which correspond to 12 planar double chip sensors in the cen-tral region and four 3D single chip sensors on either side. They are glued to the 64 cm long Pary-lene coated carbon foam support structure, enabling charged track reconstruction up to a pseudo-rapidity1 |η | ≤ 2.9. Due to space constraints there can be no overlap of material in z (along thebeam direction), leaving a 205 µm gap between the sensors. Thus, new sensor designs had to beimplemented to minimize the inactive area. Details on the IBL sensor designs can be found in [4].The extremely light design structure of the IBL leads to a radiation length of 1.9 %. Inside thecarbon foam support structure a titanium pipe carries the CO2 for cooling.

2. Module loading and results

Figure 2. Photo series of the stave loading process.

An IBL module consists of either one planar n+-in-n sensor hosting two readout chips or one3D sensor bump bonded to one readout chip (version FE-I4 [5]). The electrical signals to and fromthe chips are transported via wire bonds through a flexible PCB (module flex) glued on top of theassembly. Modules arriving at the stave loading site are dressed like in Figure 2. Here, a planarmodule is shown. The assemblies are mounted on an aluminum carrier, along with the full sizemodule flex for a better mechanical support and a rather big connector for more practical handlingand testing. After qualifying for loading, this temporary connector gets removed and the remainingmodule gets loaded onto a bare stave with high precision alignment. Then the wings, guiding theelectrical connections from the stave flex underneath the stave to its face plate, get glued onto the

1spatial coordinate describing the angle of a particle relative to the beam axis. It is defined as η ≡ − ln [tan(θ/2)],where θ is the angle between the particle three-momentum p and the positive direction of the beam axis

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module flexes. For monitoring the wire bonding process, four additional wire bonds every tworeadout chips get set and pulled afterwards. The average pull strength of the entire production was~ 6.5±0.6 g while 5 g was the required minimum pull strength. The module alignment is verifiedin metrology measurements. Fiducial marks on the sensors serve as reference points. The modulepositions are verified along and across the stave to avoid mechanical contact between two modules.The differences of the modules’ fiducial mark positions and their nominal positions do not exceed150 µm on any given stave. In total 20 staves have been loaded with 240 planar double chip(produced at CiS2), 88 3D CNM3 and 72 3D FBK4 modules. After module loading basic tests (LVchecks, IV curves, digital, analog, threshold and time over threshold scans) and one first calibrationwere performed. It was agreed to chose 3000 e− as a first threshold value. The time over thresholdis measured in units of bunch crossing (25 ns in the LHC). In the FE-I4 readout chip it ranges up to14 bunch crossings while a MIP5 creates a signal of roughly 16 000 e−. Thus, the tuning point is setto 10 bunch crossings at that reference charge. If those steps were successfully passed, the stavesgot shipped to CERN where they were integrated into a dedicated test bench for more thoroughqualification. In case of failure, a module got replaced on site which was necessary for around10 % of the production.

3. The Stave QA bench and performance

The main part of the CERN SR1 ATLAS IBL Stave QA bench is a ~ 2 x 1 x 1 m3 environmentalbox in which two staves can be placed, connected to a transportable CO2 unit, equipped with a hu-midity and temperature interlock. Close to the environmental box there are second stage regulatedLV power supplies, readout adapter cards as well as a crate for scintillator triggering in case ofcosmic tests. Since the cosmics rate is rather low, it was decided to mainly use radioactive sourcesfor sensor qualification and disconnected bump studies. Two 90Sr and two 241Am sources wereavailable that can be mounted onto a support structure connected to a linear motor. This motor canbe steered from the scan control panel and thus allows running automated source scans.

Figure 3. Sketch of the stave layout indicating the naming scheme used in the ATLAS IBL [6].

To minimize the services inside the active area of the detector, four chips get powered inparallel forming a so called DCS6 group. Two chips share one command line and thus form onereadout group. The data is sent out on individual lines. The naming convention (A and C side,counting modules from the interaction point to each end of stave) is in accordance with the ATLAS

2Competence in Silicon, Forschungsinstitut für Mikrosensorik und Photovoltaik GmbH (Erfurt, Germany)3Centro Nacional de Microelectronica (Barcelona, Spain)4Fondazione Bruno Kessler (Trento, Italy)5Minimum Ionising Particle6Detector Control System

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naming scheme. The modularity is shown in Figure 3. In the Stave QA bench, a completely newreadout system was used because the IBL DAQ components [3] were not fully available by the timethe QA measurements were performed. It is a highly modular system developed at SLAC, basedon an ATCA7 crate. A crate with five slots hosts two CIM8 and three RCE boards while one RCEboard holds two RCEs. One RCE can handle up to eight FE-I4s. That means four RCE boards areneeded for the IBL Stave QA bench. A CIM is the control unit and communication interface, a 96channel 10 Gb/s ethernet switch, establishing connections between the DAQ PC and the accordingRCEs. Customized routing and logic can be implemented in the HSIOs9 that directly connect to theEnd of Stave PCBs. They also translate the electrical signal from the modules into optical signalthat then get transmitted to the RCEs and vice versa. In addition, in the case of the Stave QA bench,the HSIOs provide buffering, multiplexing of commands and 8b/10b decoding of the FE-I4 dataas well as generation of the clock and cyclic or external triggers. The HSIOs are not hosted in theATCA crates but in a rack right next to the setup. The calibration and data taking is executed by theoperator via the so-called calibGui, the dedicated DAQ panel which collects module configurationfiles, runs scans and displays the results of each scan. The module configuration files are basicallylists in plain text format that hold the readout chips’ register names and individual setting. Theresults are saved in the ROOT file format.

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Figure 4. (a) Photo of an ATLAS IBL module and (b) 2D hit map of one chip on a planar module [6], [7].

Upon reception of a stave from the loading site a very thorough optical inspection is beingperformed. First, very high resolution overview pictures are taken (like the one in Figure 4(a)).Then all wire bonds and other critical parts of the modules are inspected with a microscope. Theinspector’s comments and if necessary additional detailed pictures are stored in the QA database.If nothing suspicious was found during the optical inspection, the stave gets integrated into theenvironmental box.

7Advanced Telecommunications Computing Architecture8Cluster Interconnect Module9High-Speed Input-Output

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Four days are planned for each stave at which installation and removal including optical in-spections are scheduled with one day each. The test flow comprises verification of the electricaland logical functionality of chips and sensors, calibration of all chips to the same (standard) set-tings, running of source scans for charge calibration, sensor functionality and disconnected bumpbond studies and concludes in the determination of the total number of bad pixels based on the in-formation from all previous scans. Once the basic electrical functionalities are checked by runningsense line checks, power up studies and measuring the sensors’ IV characteristics, basic scans canbe run to check the logical parts. These scans include register read back tests, digital and analogtests as well as a threshold and time over threshold (ToT) scan. The basic tests are performed ata module temperature of ~ 22 ◦C and mainly used for identifying major changes due to handlingissues. Since the environmental conditions at CERN are different to the ones in the loading site, itis necessary to recalibrate the modules. Once all modules have been tuned to the desired thresholdof 3000 e− with a dispersion of less than 100 e−, source scans can be performed. Since the electronemitted from the 90Sr source is MIP-like (2.3 MeV) those were used for every stave, illuminatingeach module for 400 s to verify the sensor functionality and to identify disconnected bumps. As canbe seen in the 2D hit map in Figure 4(b) there are some seemingly low efficiency regions. Thesecorrespond to the passive components mounted on the module flex (Figure 4(a)). The increasednumber of hits in the outer column corresponds to longer pixels (see slim edge design in [4]). Itshould be noted that the readout mirrors the columns.

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(b)Figure 5. Average (a) threshold and (b) threshold noise distributions for all 18 staves as a function of chipnumber at a module temperature of -12 ◦C [6], [7].

Eventually the testing in operation like conditions starts. The module temperature is set to-12 ◦C and the threshold setting is successively lowered down to 1500 e− in three steps while thetime over threshold settings remain the same. 1500 e− is the desired operational threshold for theIBL and thus it has to be ensured in the QA tests that all modules can be tuned to it. In Figure 5threshold and derived noise of all 18 production staves as a function of chip position is shown. Theerror bars represent the RMS, the blue bars represent the minimum and maximum values foundamong the 18 staves. The slightly higher noise (Figure 5(b)) on the 3D sensors is expected dueto a higher sensor capacitance. The significantly increased noise on A8-2 comes from one ratherbad module on one of the staves. However, this particular stave was not chosen for the IBL. After

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the successful threshold tuning to 1500 e− three thermal cycles have been performed with basicfunctionality checks (Digital, Analog, Threshold, ToT Scan) in-between to look for changes due tomechanical stress but none were observed.

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Figure 6. (a)Threshold, (b) threshold noise, (c) threshold over noise distributions per pixel at a moduletemperature of -12 ◦C and (d) chip wise time over threshold response for the 14 IBL staves at a moduletemperature of 20 ◦C and a threshold of 3000 e− [6], [7].

In Figure 6 the IBL calibration performance before integration is summarized. Figure 6(a)shows the overall pixel thresholds for the different pixel types. All types peak at 1500 e− thresholdin a very narrow distribution with a dispersion of less than 50 e−. Planar outer column and interchip pixels are listed separately because of their longer size as can be seen in the derived noise plot(Figure 6(c)). The threshold over noise is the key parameter in determining the quality of the IBLmodules with respect to their operability at a given discriminator setting. The bigger this factorthe less contamination of noise hits in the sample of physics hits recorded during collisions. Thephysics occupancy in the ATLAS Pixel Detector b-layer was ~ 5 · 10−4 hits per pixel per bunchcrossing at the end of Run 1. Pixels with a noise occupancy rate higher than 10−6 hits per pixelper bunch crossing are referred to as noisy pixels and are disabled from data taking to ensure noisecontamination in physics hits from collisions to be less than 0.5%. The expected physics occupancyfor the IBL is 10−3 hits per pixel per bunch crossing in early operation and higher in later years. A

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threshold over noise value higher than 5 would ensure that the noise contamination in physics hitsfrom IBL would be less than 0.1%. This is achieved for the majority of all pixels, as can be seen inFigure 6(c). The fraction of noisy IBL pixels is less than 0.03% for the 1500 e− reference thresholdtuning at -12 ◦C module temperature. The rate of noisy pixels in the 3-Layer Pixel Detector is twiceas high at 0.06% for the 3500 e− operational threshold at the same module temperature. In Figure6(d) the most probable values of the cluster time over threshold distributions per chip as responsesto the electrons from the 90Sr source are presented. It shows a very homogeneous signal responseover all chips in the detector.

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Figure 7. (a) Average bad pixel ratio distribution as a function of η for installed and not installed productionstaves and (b) the operational fraction of pixels in the η-φ plane for the 14 installed staves. Resolution:128 bins in η from -3.03 to 3.03 that correspond to a bin width of 0.0473, 56 bins in φ from 0 to 2 π thatcorrespond to a bin width of 0.112 [6], [7].

The number of working channels is the major criterium for choosing a stave for installationalong with stave planarity and sensor IV stability. All 18 staves successfully passed the QA badpixel cut which was set to 1%. In fact, no stave showed more than 0.3% bad pixels. Figure 7(a)shows the average bad pixel fraction in blue for the installed 14 and in red for the 4 remainingstaves as a function of η . It can be clearly seen that already in the step of mounting modules ontostaves the low η regions were covered with the best modules available. The number of operationalchannels in the ATLAS IBL is 99.9 % in total. The few defect channels are preferably distributedhomogeneously in the η-φ plane. Thus, an η weighted ranking was applied on all staves. Theeventual picture of the operational fraction of pixels in the η-φ plane for the 14 installed stavesis displayed in Figure 7(b). The planarity is defined as the difference between the minimum andmaximum height of a stave and did not exceed 340 µm in the IBL production which is within theenvelope requirements of the IST10 inside the 3-Layer Pixel Detector. The applied classificationof pixel failure modes, more detailed QA results and a selection of encountered issues during theproduction, namely double trigger responses, noise sensitivity on 3D sensors, charge calibration,weak differential driver output, oscillations on the low voltage supply lines and noise coupling ondouble chip sensors, can be found in [6].

10IBL Support Tube

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4. Integration and current status

At the beginning of 2014, the stave QA finished and within one month 14 staves got integrated ontothe IPT11 surrounding the beam pipe. The package was fully assembled including all services onemonth later and was lowered into the ATLAS cavern beginning of May 2014. Once the detectorwas fully connected to all supplies, cooling and readout, it was re-calibrated stave by stave witha transportable version of the readout system used for the stave QA (see Section 3). The QAconfiguration files were used as starting points. All chips are still operational and the calibrationresults, as shown in Figure 8, are comparable to the ones obtained in the QA setup.

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Figure 8. Average (a) threshold and (b) threshold noise distributions for all IBL staves as a function of chipnumber at a module temperature of 20 ◦C integrated into ATLAS [7].

5. Towards bake out and operation

The next steps towards Run 2 of the LHC are the cold operation of the Inner Detector, the bake-out of the new beam pipe and combined cosmics data taking of all subsystems of the ATLASdetector. The new beam pipe which is integrated in the IBL package needs to be baked out toreduce thermal outgassing and to activate the Non Evaporable Getter (NEG) coating on the inside.This is a crucial procedure for the targeted LHC vacuum. To understand the conditions duringthe beam pipe bake-out, CFD12 simulations have been run (see Figure 9(b)). In addition to those,a real size IBL thermal mock-up (Figure 9(a)) has been built and installed in CERN SR1 cleanroom. It is operated with a 1000 W CO2 cooling plant connected to stainless steel pipes running inaluminum staves in the mock up. Various heaters as well as temperature and humidity sensors arelargely distributed over the entire mockup. To be as comparable as possible to the actual detector,also the aerogel between the dummy beam pipe and the dummy IPT has been removed over thelength of the detector volume, namely 622 mm. In the detector, this is done to reduce the radiationlength. Only every second stave could be cooled in that setup. However,comparing the results

11IBL Positioning Tube12Computational Fluid Dynamics

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from the cold staves to the CFD simulation during bake-out, one can see that they are in very goodagreement (see Tab. 1). The beam pipe bake-out will happen at 220 ◦C. The stave temperatures,however, shall not exceed +40 ◦C which results in a substantial temperature gradient over just afew mm. With the help of the simulations and the mock-up it could be shown that the detector willremain unharmed during the bake-out if the coolant is set to -20 ◦C.

(a) (b)

Figure 9. (a) Photograph of the thermal mockup at CERN and (b) CFD simulations of the temperaturedistribution in IBL for the foreseen beam pipe bake out.

Measurements CFD calculations

Cooling lines -19.2 ◦C -19.2 ◦CCold staves -18.7 ◦C -17.7 ◦CTIPT at Z0, north +92.5 ◦C +92.7 ◦CTIST at Z0, north/south +18.5 ◦C/+9.2 ◦C +13.4 ◦C/+5.3 ◦CCentral heater dissipation at Z0 212 W/m 154 W/m

Table 1. Comparison of CFD calculations and measurements performed with the thermal mock-up.

6. Conclusion

All components used for the ATLAS IBL meet the demanding requirements compiled in [3] withrespect to engineering constraints, operational stability, calibration performance and radiation hard-ness. The production of detector components lead to a successful construction of 20 staves fromwhich 18 were considered production staves as two were damaged by accidental exposure to con-densation [6]. Eventually the 14 best were chosen to build the IBL. All modules are functionalafter integration and 99.9 % of the readout channels are working. The installation into the ATLASDetector was successful and no damages have been observed. Also the beam pipe bake out left thedetector unharmed and first cosmic data in combination with other ATLAS sub-detectors has beentaken. The DAQ integration into the existing ATLAS frame is ongoing. The IBL is the fourth layerof silicon pixel detectors in ATLAS, foreseen to take data up to the high luminosity upgrade of theLHC.

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Acknowledgments

Work supported by the Wolfgang-Gentner-Programme of the Bundesministerium für Bildung undForschung (BMBF).

References

[1] The ATLAS Collaboration, 2008, The ATLAS Experiment at the CERN Large Hadron Collider, JINST3 S08003.

[2] G. Aad et al., ATLAS pixel detector electronics and sensors, JINST 3 (2008) P07007.

[3] The ATLAS Collaboration, 2010, ATLAS insertable b-layer technical design report Technical ReportCERN-LHCC- 2010-013. ATLAS-TDR-019

[4] ATLAS IBL Collaboration, 2014, Prototype ATLAS IBL modules using the FE-I4A front-end readoutchip JINST 7 P11010.

[5] M. Garcia-Sciveres et al.,2011 The FE-I4 pixel readout integrated circuit Nucl.Instrum.Meth. A636S155-S159.

[6] The ATLAS Collaboration, ATLAS Pixel IBL: Stave Quality Assurance, ATL-INDET-PUB-2014-006.

[7] The ATLAS Collaboration, 2014, https://twiki.cern.ch/twiki/bin/view/AtlasPublic/ApprovedPlotsPixel.

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