op amp ch2 handout

Integrated circuit By Syed Javed Hussain

Chapter 2: Operational amplifier 1

Chapter 2: Operational Amplifiers

This Handout covers Chapter 2.1-2.3

1. Function and characteristics of an ideal Op-amp 2. The inverting configuration 3. The non-inverting configuration

Notes:

4. This is the first of 5 lectures to cover chapter 2 5. Study Example 2.2

A few words about op-amp: • Op-amp is one of the most popular function blocks to build

sophisticate electronic system and instrumentation. • Today, op-amps are available at low cost, with great varieties of

characteristics for instrumentation and circuit development. • Since the learning of op-amp doesn’t involve the knowledge of

semiconductors, it can be treated as a blackbox and easy to learn too!

Symbol and Characteristics of an ideal op-amp The op-amp is designed to sense the difference between two input voltage signals. An ideal op-amp should

• Has infinite large input impedance (doesn’t draw current) • Output impedance is ZERO as an ideal voltage source • An ideal op-amp should have infinite bandwidth • The output is always equal to ( )12 vvA − • Terminal one is referred as inverting input terminal, terminal

2 is non-inverting terminal • If input 1 and 2 are the same, the output will be zero, this is

referred as common-mode rejection • The gain A is referred as differential gain or open-loop gain,

which is very large gain (~ A → ∞). Therefore, an op-amp should never been used in an open-loop configuration.


Integrated circuit By Syed Javed Hussain The inverting configuration: The basic configuration for an op-amp involves two resistors R1 and R2 shown below.

• Since R2 links terminal 3 and negative input terminal 1, it provides a negative feedback!

• If R2 links terminal 3 and the positive input 2, it will provide positive feedback!

Now, let’s do the math. During this derivation, we assume A=∞ Thing to notice: virtual ground!

1

2

RR

vv

I

O −=

Input resistance: 111 /

RRv

viv

ivR

I

II

source

sourcei ====

Output resistance: 0==≡−

−

sc

oc

circuitshort

circuitopenout i

viv

R



Apparently, A is not ∞, we can re-do the math by taking a more practical scenario by assuming A is finite but a large number.

Examples: The weighted summer • The weighted summer with the same sign


Integrated circuit By Syed Javed Hussain • The weighted summer with the opposite signs

⎟⎟⎠

⎞⎜⎜⎝

⎛−⎟⎟

⎠

⎞⎜⎜⎝

⎛−⎟⎟

⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛+⎟⎟

⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

44

33

22

11 R

Rv

RR

vRR

RR

vRR

RR

vv cc

b

ca

b

caO

The Non-inverting configuration: Another commonly used configuration will yield a positive gain, as non-inverting configuration.


Integrated circuit By Syed Javed Hussain Apparently, A is not ∞, we can re-do the math by taking a more practical scenario by assuming A is finite but a large number.

Application: voltage follower Buffers are function block commonly used in micro-electronics. It has high input impedance and low output impedance. In a buffer, gain is not important, but the ability to drive low-impedance load is. An op-amp with non-inverting configuration can do that, this is referred as a voltage follower (or unity-gain amplifier).



This handout covers Chapter 2.4-2.5

1. A single Op-Amp difference amplifier 2. Instrumentation amplifier 3. Frequency response of open-loop amplifiers 4. Frequency response of closed-loop amplifiers

Notes:

A few words about difference (differential) amplifiers: • Difference amplifiers are designed to respond to the difference

between two input signal • Difference amplifiers are used to eliminate noise which are

commonly identical but sometime much larger than signal level. If input of an amplifier has common-mode input vIcm applied identically to two input leads of an amplifier. And a differential input signal vId, also apply to two input leads, the output signal of a linear amplifier can be characterized by two gains Ad and Acm:

IcmcmIddO vAvAv += An ideal difference amplifier magnifies differential input much larger than the common-mode signal, which is characterized by the common-mode rejection ratio (CMRR):

1log20 >>⎟⎟⎠

⎞⎜⎜⎝

⎛=

cm

d

AA

CMRR

1. Single Op-Amp Difference Amplifier The op-amp is designed to be a difference amplifier. However, since the gain of the op amp is too large, without any feedback mechanism, it is not practical to use it alone. In the last lecture, we learned two fundamental configuration of an op-amp, inverting and non-inverting configuration shown below.

Inverting Non-inverting



The gains for these two configurations are negative and positive respectively:

⎟⎟⎠

⎞⎜⎜⎝

⎛+=−= −

1

2

1

2 1RRA

RRA invertingNoInverting

We can therefore combine two configurations to make an ideal difference amplifier. By properly choosing feedback resistance, zero common-mode gain can be achieved. The resulting circuit is shown below.

Let’s do the math to select resistance. In this lecture, we will use a different derivation from the textbook.

Using the same procedure, we can calculate the common-mode gain:

3

4

1

2

11

22

3

4

3

4

1

21

1

22

43

4

1

21

11

RR

RR

vRR

v

RR

RR

RR

vRR

vRR

RR

RRv IIIIO

=

−⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+⎟⎟⎠

⎞⎜⎜⎝

⎛+=−⎟⎟

⎠

⎞⎜⎜⎝

⎛+⎟⎟

⎠

⎞⎜⎜⎝

⎛ +=


Integrated circuit By Syed Javed Hussain In additional to rejecting CM signal, we wish to have a high input resistance to differential signal. We can find out this by:

12RRid =

The Instrumentation amplifiers: Note from the above analysis, if the amplifier needs to have a large differential gain (R2/R1), then R1 has to be small, so as the input resistance. This is a significant drawback of the single op-amp differential amplifier. This can be resolved by buffering the two input terminals using voltage followers. The additional benefit is to get some additional gain in the first stage. The circuits is shown below.

The analysis of this circuit is straightforward. Two things

∞=−

⎟⎟⎠

⎞⎜⎜⎝

⎛+⎟⎟

⎠

⎞⎜⎜⎝

⎛=−

cesisInputRR

RRAGainDiff d

tanRe

1:1

2

3

4

However, a few problems arise: • The input CM signal will be amplified by the 1st stage, which

might saturate the 2nd stage. Even the 2nd stage is not saturated by the CM signal, the CMRR will be reduced.

• Two amplifier channels must be perfectly matched, otherwise, mismatch will appear as a differential signal to spur the real signal.

To overcome this problem, we come up with the following configuration.


Some non-ideal characteristics of op-amps: In this section, we consider some non-ideal properties of op amps. Since this information are important for electronic designers. They are normally available in data sheet. Frequency response of an open-loop op-amp: For an op-amp as it is, the typical frequency response (open-loop) is single-time-constant (STC) low-pass response shown below.

Since we only have SINGLE time constant, the gain A as a function of frequency ω can be written as:

( )bj

AA

ωωω

/10

+=

• ωb or fb is 3-dB (corner frequency) • ωt or ft is the unity frequency • Since we only have single time constant, the slope is 20 dB/decade • For ω>>ωb,

( ) bttb A

jjA

A ωωωω

ωω

ω 00 =≈≈



Frequency response of an closed-loop op-amp: Having familiarizing the close-loop specification on frequency response, we can calculate the frequency response for close-loop configuration. Inverting configuration with finite gain A:

( ) ( )bi

o

sA

AARR

RRVV

ωω

/1/110

12

12

+=

++−

=

Substituting A(ω) into the close-loop gain, we have ( )( ) ( ) ( )( )( )

( )

( )120

12

12

0

1212

0

12

1

1/1

1/111

RRA

RRsRR

sVsV

A

RRsRR

A

RRsVsV

t

i

o

bt

t

i

o

+>>

++

−=

=

++++

−=

ω

ωω

ω

An important conclusion we get out of this derivation is the 3-dB corner frequency:

123 /1 RR

tdB +=

ωω

Non-inverting configuration with finite gain A:

( ) ( )bi

o

sA

AARR

RRVV

ωω

/1/111 0

12

12

+=

+++

=

If 120 /1 RRA +>> , we have ( )( )

( )12

12

/1/1

/1

RRs

RRsVsV

t

i

o

++

+≈

ω



This Handout covers Section 2.6, 2.7

1. Imperfection of op-amp: saturation, slew rate 2. Full-power bandwidth 3. Offset voltage, offset currents, and input bias

Notes:

In this lecture, we study the limitations on the op-amp performance. This first includes output voltage and current saturation. Output voltage and current saturation In practical, Op amps will operate linearly over a limited range of output voltage and current. For a typical op-amp (741) the range for voltage and current are around ±10-15 V and ±10-20 mA. Beyond this range, the output will be nonlinearly distorted (e.g. cut-off). Slew rate and full-power bandwidth Another nonlinear distortion for large output signals are so-called slew-rate limiting. This refers to the maximum alow rate of change of signal, defined as:

maxdtdv

SR O= (V/μs)

An op-amp will not respond any signal faster than the maximum slew-rate. An example is shown below for a step-change input and it is output for a voltage follower. One thing to note here is the slew-rating limiting is a non-linear effect, which is different from a finite bandwidth distortion. The finite bandwidth distortion is a linear effect, which does not change the shape of input sinusoid. The slewing does change the shape of sinusoid. To further clarify this point, let’s compare the effect of finite bandwidth. The transfer function for a voltage follower is

ti

o

sVV

ω/11

+=


Integrated circuit By Syed Javed Hussain Its step response would be an exponential function.

( ) ( )tO

teVtv ω−−= 1

As long as V is small so that ωtV<SR, the output will follow above as a linear response. Another example for nonlinear SR limiting can be illustrated using a sine wave output:

tVv oO ωsin= The changing rate is given by

tVdt

dvo

O ωω cos=

So the maximum changing rate is given by ωVo, which depends on both the maximum output voltage and frequency. If ωVo exceeds maximum SR, distortion happens as shown below. The op-amp data sheets provide a frequency fM as the full-power bandwidth. If the maximum output voltage is Vomax, then the fM is related to SR as:

max

max

2 oM

oM

VSRf

SRV

π

ω

=

=

DC imperfections: offset voltage Since op-amp has a very large gain, any imbalance between two inputs can instantly saturate output. Unfortunately, in practical application, a number of facts can contribute to the mismatch between two inputs including the op-amp designs. Given a typical dc gain of >10000, even a mismatch of a few mV can saturate the op-amp. This is a must-addressing issue. To model the dc offset effect, an op-amp can be modeled as following:

Generally speaking: • Vos range from 1-5 mV • Vos depends on temperature (μV/oC)

Now let’s analyze the impact of offset to performance of a op-amp with negative feedback:



One way to overcome the dc offset is by capacitive coupling shown below. Since capacitor is an open circuit for DC, the op-amp won’t amplify the Vos, however, this does not work for an op-amp circuits working in dc and low frequency. Notice: the gain of such configuration will become very small at low-frequency. Here is the analysis.

Input bias and offset currents In a practical op-amp, both input terminal are supplied with dc currents to function. These two currents can be modeled with two current sources. The average of these two currents is referred as input bias current. The different between these two currents is referred as input offset current.

2121

2 BBOSBB

B IIIII

I −=+

=

Given the technology used to build op-amp, IB range from pA to 100 nA, IOS is one order of magnitudes smaller than IB, whatever it is. The dc output voltage of a closed-loop op-amp cue to the input bias currents can be easily found out by considering the an inverting configuration. The dc offset voltage becomes

221 RIRIV BBO ≈= The allowable dc offset voltage apparently will be used to determine what is the maximum allowable R2. One way to reduce the dc offset voltage will be connecting the positive input terminal with a resistance R3. The following analysis justifies the solution and provides a guideline to choose R3.



This Handout covers Section 2.8

1. Inverting configuration with general impedances 2. Inverting integrator 3. Op-amp differentiator

Notes:

A few words about integrators and differentiators: Together with summation, subtraction, integration and differentiation are two important signal processing algorithms. These functions can be readily realized by op-amp. General Impedances Although you might be still studying RLC circuits, the concept of impedance for inductors and capacitors can also be understood without too much difficulty. Or, you can take the following concept “as they are” for now.

• For DC, a capacitor is an open circuit element with a resistance of ∞. An inductor is a short circuit with a resistance of 0.

• For AC, however, both capacitors C or inductor L will produce “resistance” for any AC signal. This is referred as impedance.

• For a single frequency sine signal Aisin(ωt), the impedance for A capacitor C: 1/(jωC) An inductor L: jωL A resistor R: R

• Apparently, the total impedance of circuits depends on frequency.

• Sometime, jω is replaced by s during circuit analysis. • In the event that we need find out the time-domain response,

we can convert the frequency-response into the transient response by:

Replace 1/jω by ∫

Replace jω by dtd

• Then a frequency response will be converted into a linear differential equation. Given the initial condition and input signal, the output signal can be readily calculated by the circuit.

Now, let’s use an example to illustrate this concept.


Integrated circuit By Syed Javed Hussain Example: for the circuit below, derive an expression for the transfer function Vo(s)/Vi(s), show that the circuit is a low-pass circuit. Find DC gain (f=0Hz) and 3-dB frequency. Design the circuit to obtain a dc gain of 40 dB, a 3-dB frequency of 1 kHz, and an input resistance of 1 kΩ.

The inverting integrator: The basic configuration for n inverting op-amp integrators is shown below We now do the math to perform analysis in both time and frequency domain. Time domain: the I-V crossing the C and the transfer function are:

( ) ( )

( ) ( ) C

t

IO

t

CC

VdttvRC

tv

dttiC

Vtv

−−=

+=

∫

∫

0

0 1

1

1

Frequency domain: The transfer function is: ( )( )

o

i

o

i

o

RCVV

RCjjVjV

901

1

==

−=

φω

ωωω

1/RC is referred as integrator frequency, RC is known as integrator time constant. Generally speaking: an integrator is a low-pass filter with a corner (3-dB) frequency of ZERO.


Integrated circuit By Syed Javed Hussain DC offset: The basic configuration of integrator shown above has a problem at DC. Since a capacitor is an open-circuit at DC, the op-amp will have no negative feedback and can saturated immediately. Even at AC, any dc offset can be deleterious too. The following analysis explains: DC offset voltage DC offset current

The solution for the dc offset can be alleviated by connecting a resistor RF. Thus, the transfer function becomes

( )( ) F

F

i

o

sCRRR

sVsV

+−=

1/

To remove the dc offset, one would chose low value for RF. However, the low value for RF will lead to high corner frequency (1/CRF), which will distort the integrator performance. Therefore, a design trade-off needs to be carefully entertained.



The inverting differentiator: Interchanging the C and R of the integrator results a differentiator circuit. We can perform both time-domain and frequency domain analysis to obtain the transfer functions.

• RC is referred as differentiator time-constant. • The ideal differentiator can be considered as a high-pass filter

with a corner frequency at infinity. • Differentiator output will “spike” or very sensitive to the sharp

change of the input. • Differentiators are not stable and should be avoided to use

alone in practice. ( )

( )( )

o

I

o

i

o

IO

RCVV

RCjjVjV

dtdvRCtv

90−==−=

−=

φωωωω

op amp ch2 handout

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