nvmw 2021 | 12th annual non-volatile memories workshop...
TRANSCRIPT
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Improving the Performance and Endurance ofEncrypted Non-volatile Main Memory through
Deduplicating Writes
Pengfei Zuo, Yu Hua, Ming Zhao*, Wen Zhou, Yuncheng GuoHuazhong University of Science and Technology (HUST), China
*Arizona State University (ASU), USA
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Non-volatile Memory (NVM)
Non-volatile memory is expected to replace or complement DRAM in memory hierarchy
Non-volatility, low power, high density, large capacity
PCM ReRAM DRAMRead (ns) 20-70 20-50 10Write (ns) 150-220 70-140 10
Non-volatility √ √ ×
Standby Power ~0 ~0 HighEndurance 107~109 108~1012 1015
Density (Gb/cm2) 13.5 24.5 9.1
PCM
ReRAM2K. Suzuki and S. Swanson. “A Survey of Trends in Non-Volatile Memory Technologies: 2000-2014”, IMW 2015.
C. Xu et al. “Overcoming the Challenges of Crossbar Resistive Memory Architectures”, HPCA, 2015.
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Endurance and Security in Non-volatile Memory
NVM typically has limited endurance– 107~109 for PCM, 108~1012 for ReRAM– Writes have much higher latency than reads– Write reduction matters for NVM
3
NVM is vulnerable to stolen DIMM attack– NVM still retains data after systems power down– An attacker can directly read data from the stolen NVM – Memory encryption matters for NVM
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Encryption Increases Bit Flips to NVM
Diffusion property of encryption– The change of one bit in the original data has to
modify half of bits in the encrypted data
4
00000000…000000000000
10000000…000000000000
01011010…000010110100
10101100…000100101001Encryption
Encryption
1 of 512 bits modified 256 of 512 bits modified
Old data in NVM:
New data:
Overwrite Overwrite
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Encryption Increases Bit Flips to NVM
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Young et al. “DEUCE: Write-efficient encryption for non-volatile memories”, in Proc. of ASPLOS, 2015.
4X
Encryption renders existing bit-level write reduction techniques ineffective
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Observation and Motivation
A large number of entire-line duplicates exist in real-world applications6
SPEC CPU2006 PARSEC 2.1
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DeWrite
Lightweight cache-line-level deduplication for NVMM– Employ lightweight hashing– Leverage NVM read/write asymmetry– Eliminate a write at the cost of a read
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Last Level Cache
MetadataCache
AES-ctr
Memory Controller
Dedup Logic
Metadata:Direct encryption
MetadataStorage Encrypted NVMM
Data: CME
Data
OTPNon-duplicate
Hardware Architecture
Efficient synergization between deduplication and encryption – Opportunistic parallelism– Metadata storage co-location
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Prediction-based Parallelism
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Detect Duplication
Is duplicate ?
Encrypt Data
Write to NVM
Cancel the Write
No
Yes
A Write Request
The direct way
Be inefficient for non-duplicate writes• Serial execution latency
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Prediction-based Parallelism
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Detect Duplication
Is duplicate ?
Encrypt Data
Write to NVM
Cancel the Write
No
Yes
A Write Request
The direct way
Detect Duplication
Is duplicate ?
Write to NVM
Discard the Ciphertext
No
Encrypt Data
Yes
A Write Request
The parallel way
Be inefficient for non-duplicate writes• Serial execution latency
Be inefficient for duplicate writes• Unnecessary encryption
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Prediction-based Parallelism
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Detect Duplication
Is duplicate ?
Encrypt Data
Write to NVM
Cancel the Write
No
Yes
A Write Request
The direct way
Detect Duplication
Is duplicate ?
Write to NVM
Discard the Ciphertext
No
Encrypt Data
Yes
A Write Request
The parallel way
Be inefficient for non-duplicate writes• Serial execution latency
Be inefficient for duplicate writes• Unnecessary encryption
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Prediction-based Parallelism
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Detect Duplication
Is duplicate ?
Encrypt Data
Write to NVM
Cancel the Write
No
Yes
A Write Request
The direct way
Detect Duplication
Is duplicate ?
Write to NVM
Discard the Ciphertext
No
Encrypt Data
Yes
A Write Request
The parallel way
PredictionDuplicate Non-duplicate
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Prediction-based Parallelism
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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MemoryCPU
ABCD
1: duplicate 0: non-duplicate
History window
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Prediction-based Parallelism
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MemoryCPUA
BCD
1: duplicate 0: non-duplicate
History window
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
A
0
BCD
History window
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
A
0
B
CD
History window
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
A
0
B
CD
History window
Predict
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
A
0
BCD
History window0
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABD
History window00
C
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
AB
C
D
History window
Predict00
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABCD
History window
92.1% accuracy
000
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABCD
History window0 00
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABC
D
History window0 00
Predict
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABC
D
History window0 0
92.1% 93.6%
0Predict
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
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MemoryCPU
1: duplicate 0: non-duplicate
ABC
D
History window0 0
92.1% 93.6%
0Predict
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
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Prediction-based Parallelism
How to know whether a cache line is duplicate beforehand?Observation: duplication states of most memory writes are the same as those of their previous onesA prediction scheme:
Rationale: the size of duplicate (non-duplicate) data is usually much larger than a cache line – E.g., a page (4KB) is duplicate or non-duplicate: 100% accuracy
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Why can we achieve such a high prediction accuracy?
92.1% 93.6%
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Lightweight Deduplication for NVMM
Traditional deduplication
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SHA1/MD5
SHA1/MD5
Non-duplicate
Duplicate
Hash computation latency: >300ns ≈ NVM write latencyMatch?Match?
Y
N
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Lightweight Deduplication for NVMM
Traditional deduplication
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SHA1/MD5
SHA1/MD5
Non-duplicate
Duplicate
Hash computation latency: >300ns ≈ NVM write latency
DeWrite
CRC-32CRC-32 Match?Match?
Non-duplicate
Read data and compare
Read data and compare Match?Match? Duplicate
Match?Match?
15ns75ns+1ns
Y
N
Y Y
NN
The latency is 91ns at most
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Metadata Colocation
Encryption metadata: per-line counter
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AES-ctr
LineAddr Counter
Key +Plaintext Plaintext
+Ciphertext Ciphertext
Encryption Decryption
OTP
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Metadata Colocation
Encryption metadata: per-line counter
Deduplication metadata: address mapping, reverted hash
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Metadata Colocation
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- - a2 - a4 a5 an…
0 1 2 3 4 5 ninitAddr:realAddr:
h0 h1 - h3 - - hn…
0 1 2 3 4 5 ninitAddr:hash:
(b) The address mapping table
(a) The inverted hash table
Deduplicated
Encryption metadata: per-line counter
Deduplication metadata: address mapping, reverted hash
‘-’: empty
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Metadata Colocation
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c0 c1 a2 c3 a4 a5 an…
0 1 2 3 4 5 ninitAddr:realAddr:
h0 h1 c2 h3 c5 hn…
0 1 2 3 4 5 ninitAddr:
c4hash:
Encryption metadata: per-line counter
Deduplication metadata: address mapping, reverted hash
(b) The address mapping table
(a) The inverted hash table
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Metadata Colocation
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c0 c1 a2 c3 a4 a5 an…
0 1 2 3 4 5 ninitAddr:realAddr:
h0 h1 c2 h3 c5 hn…
0 1 2 3 4 5 ninitAddr:
c4
Flag
hash:
Encryption metadata: per-line counter
Deduplication metadata: address mapping, reverted hash
(b) The address mapping table
(a) The inverted hash table
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Evaluation
Benchmarks– 12 Benchmarks from SPEC CPU2006: single-threaded– 8 benchmarks from m PARSEC 2.1: multiple-threaded
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Simulation: gem5 + NVMain
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NVM Endurance
DeWrite reduces 54% writes to secure NVM on average
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Write Speedup
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DeWrite speeds up NVM writes by 4.2X on average
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Read Speedup
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DeWrite speeds up NVM reads by 3.1X on average
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Instructions per Cycle
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DeWrite improves the IPC by 80% on average
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Energy Consumption
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DeWrite reduces energy consumption by 40% on average
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Space Overheads of Metadata Storage & Cache
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Metadata storage– 6.25%
Metadata cache– (a) 512KB– (b) 512KB– (c) 512KB– (d) 128KB– Total <2MB
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ConclusionMemory encryption renders the bit-level write reduction techniques ineffective for secure NVMM
This paper proposes DeWrite, a line-level write reduction technique to enhance the endurance and performance– Lightweight cahe-line-level deduplication – Efficient synergization of deduplication and encryption
Reduce 54% writes, speed up memory writes and reads of secure NVMM by 4.2× and 3.1×, on average
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Thanks! Q&A