nov. 7, 2007sysc 2001* - fall 2007. sysc2001-lecture-ch10.ppt1 william stallings computer...

Nov. 7, 2007 SYSC 2001* - Fall 2007. SYSC2001-lecture-Ch10.ppt 1

William Stallings Computer Organization

and Architecture6th Edition

Chapter 10

Instruction Sets:

Characteristics and Functions


What is an instruction set?

the instructions that are understood by a CPU

Machine Code

• encoded in binary – for machines to work with

for people: represent by assembly codes

• text – for people to work with


(Recall) Elements of an Instruction

Operation code (Op code)

• Do this operation

Source Operand(s) reference(s)

• With this/these operands

Result Operand reference

• Put the answer here

Next Instruction Reference (control flow!)

• When you have done that, do this...


Where Can Operands Be?

Main memory (or cache)

CPU register

I/O device


Instruction Cycle State Diagram


Instruction Representation

In machine code each instruction has a unique bit pattern

For human consumption (well, programmers anyway) a symbolic representation is used

• e.g. ADD, SUB, LOAD

Operands can also be represented symbolically

• e.g. ADD A,B


Simple Instruction Format


Instruction Types

Data processing

Data storage (main memory)

Data movement (I/O)

Program flow control


Number of Addresses (a)

3 addresses

• Operand 1, Operand 2, Result

• a = b + c;

• May be a fourth - next instruction (usually implicit)

• Not common

• Needs very long words to hold everything

Aside: a recent architecture trend (mid-90’s) is to have a Very Long Instruction Word (Search web for “VLIW”)


Number of Addresses (b)

2 addresses

• One address doubles as operand and result

• a = a + b (in C: a += b )

• Reduces length of instruction

• Requires some extra work

– Temporary storage to hold some results


Number of Addresses (c)

1 address

• Implicit second address

• Usually a register (accumulator)

• Common in early machines

• e.g. ADD 10

adds 10 (explicit) to accumulator (implicit)


Number of Addresses (d)

0 (zero) addresses

• operations use implicit stack

• e.g. push a

• push b

• add ( c = a + b )

• pop c

what isa “stack”?

(later!)also see

Appendix 10.A

Java Virtual Machine is stack-based like this!


How Many Addresses ?

More addresses larger instructions

• More complex (powerful?) instructions

• More registers

– Inter-register operations are quicker

• Fewer instructions per program

Fewer addresses smaller instructions

• Less complex (powerful?) instructions

• More instructions per program

• Faster fetch/execution of instructions Why?


Design Decisions (1)

Operation repertoire

• How many ops?

• What can they do?

• How complex are they?

Built-In Data types supported

Instruction formats – how to encode as binary values

• Length of op code field

• Number of addresses


Design Decisions (2)

Registers

• Number of CPU registers available

• Which operations can be performed on which registers?

Addressing modes ( very important! later … Ch. 11)

RISC v CISC

• Reduced Instruction Set Computer

• Complex Instruction Set Computer


Types of Operand

Addresses

Numbers

• Signed Integer / Unsigned Integer / Floating Point

Characters

• ASCII etc.

Logical Data

• Bits or flags


Pentium Data Types

8 bit Byte

16 bit word

32 bit double word

64 bit quad word

Addressing is by 8 bit unit (byte)

A 32 bit double word is read at addresses divisible by 4

N.B. not just anyaddress !


Specific Data Types

General - arbitrary binary contents

Integer - single binary value

Ordinal - unsigned integer

Unpacked BCD - One digit per byte

Packed BCD - 2 BCD digits per byte

Pointer – 32-bit or 64-bit

Bit field

Byte String

Floating Point

BCDBinary Coded Decimal

0000 1001

packed in byte

4-bit 4-bit

BCD1 BCD2

0 0 0 0 BCD


Pentium Integer & FP Data Types

80-bit!10 bytes

(8087 legacy)


PowerPC Data Types 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword)

length data types

Some instructions need operand aligned on 32 bit boundary

Fixed point processor recognises:

• Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes)

Floating point

• IEEE 754

• Single or double precision


Types of Operations

Data Transfer

I/O

Arithmetic

Logical

Conversion

System Control

Transfer of Control

move (copy) & store data

process info

control flow

change system’s ability to process info


Data Transfer

Specify

• Source (src)

• Destination (dest)

• Size of data

E.G. MOVB dest, src

operands

size: B = byteoperation


Arithmetic

Add, Subtract, Multiply, Divide

Signed Integer

Floating point ?

May include

• Increment (a++)

• Decrement (a--)

• Negate (-a)

• BCD add/subtract


Shift and Rotate Operations0

logicalshift

shift in 0

arithmeticshift

keep sign !

rotate


Logical

Bitwise operations

• AND, OR, exclusive-OR (XOR)

• NOT (one’s complement)

1-bit XOR:0 xor 0 = 00 xor 1 = 11 xor 0 = 11 xor 1 = 0


Conversion

size conversion:

• e.g. byte to word – sign extend?

E.G. Binary to BCD

• binary 00001111 (1510) to

• packed BCD 0001 0101

integer to floating

BCD

1

BCD

5


Input/Output

May be specific instructions

• e.g. IN or OUT for I/O

MOV for memory

May be done using data movement instructions

• memory mapped

• e.g. MOV for memory

MOV for I/O

May be done by a separate controller (I/O or DMA)


Systems Control

Privileged instructions

CPU needs to be in specific state

• Ring 0 on 80386+

• Kernel mode

For operating systems use


Transfer of Control Unconditional branch

• e.g. branch to instruction at location xxxx

Conditional Branch

• e.g. branch to instruction at location xxxx if result of

last operation was zero

Skip

• e.g. increment and skip next instruction if result is zero

ISZ Register1 increment & skip if zero

Branch xxxx skip this if result was zero

ADD A

Subroutine (function) call


Branch Instruction


Nested Procedure Calls

startaddressof Proc1

startaddressof Proc2

how does machine

knowwhereto gobackto?

STACK!


Hardware Stack

contiguous block of memory locations to store values

have a pointer to value on “top” of stack

• pointer is typically a register in processor, e.g. SP

PUSH

• puts new value on top of stack

– modifies memory and SP

POP

• removes value from top of stack

– modifies SP only

LIFO storageLast In is the

First Out


X

Stack Example

initially empty

PUSH X

PUSH Y

POP

SP

SP

SP

XY

SP

XY

top of stack

top of stack

top of stack

LIFO:Y is Last In and First Out

???

??????


Use of Stack to Save Return Addresses

address of instruction

AFTER “call” to Proc1

RETURN pop return address off

top of stack and putinto PC !

CALL push address of next

instruction onto top of stack and then set

PC = address of Proc

4000

PC

4500 4800 4601 4800 4651 4101


Exercise For Reader

Find out about instruction set for Pentium and PowerPC

Start with Stallings

Visit web sites


Byte Order – Endian Scheme

What order do we store and fetch values that occupy more than one location?

e.g. (number in hex to make it easy to read)

• 12345678 can be stored in 4x 8-bit locations

• what order should be used?


Byte Order (example: 12345678)

Address Value (1) Value (2)

184 12 78

185 34 56

186 56 34

187 78 12

i.e. read top down or bottom up?

low

high

lsbyte

Big endian: “big end first”

Little endian: “little end first”

each “part” is also stored

according to the endian

scheme


Byte Order Names

The problem is called Endian

Value (1) has the least significant byte in the highest address

• This is called big-endian

Value (2) has the least significant byte in the lowest address

• This is called little-endian


4 bytes

62

Example of C Data Structure


Alternative Endian Views

of Memory Map

int a

double b

int pad

char* c

char d[7]

short e

int f


Standard Endian Scheme?

Pentium (80x86), VAX: little-endian

IBM 370, Motorola 680x0 (Mac), most RISC: big-endian

Internet is big-endian

• Makes writing Internet programs on PC more awkward!

• WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert

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