multiplication

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1 Multiplication Look at the following pencil and paper example: 1000d X 1001d 1000 0000 0000 1000 1001000d By restricting the digits to 1 & 0 (which is binary) the algorithm is simple, at each step: Place a copy of the multiplicand ( ללללל) if the multiplier (ללללל) digit is 1. Place 0 if the digit is 0. The position for the next step is shifted left by one place.

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Multiplication. Look at the following pencil and paper example: 1000 d X 1001 d 1000 0000 0000 1000 1001000 d By restricting the digits to 1 & 0 (which is binary) the algorithm is simple, at each step: - PowerPoint PPT Presentation

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Page 1: Multiplication

1

Multiplication• Look at the following pencil and paper example:

1000dX 1001d

1000 0000 0000 1000 1001000d

• By restricting the digits to 1 & 0 (which is binary) the algorithm is simple, at each step:– Place a copy of the multiplicand (מוכפל) if the multiplier

.digit is 1 (מכפיל)

– Place 0 if the digit is 0.

– The position for the next step is shifted left by one place.

Page 2: Multiplication

2

First Multiplication Algorithm

• Half of the multiplicand bits are always zero. So using a 64-bit ALU is useless and slow.

• What would happen if we added the multiplicand to the left half of the product and shift right?

64-bit ALU

Control test

MultiplierShift right

ProductWrite

MultiplicandShift left

64 bits

64 bits

32 bits

Done

1. TestMultiplier0

1a. Add multiplicand to product andplace the result in Product register

2. Shift the Multiplicand register left 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition?

Start

Multiplier0 = 0Multiplier0 = 1

No: < 32 repetitions

Yes: 32 repetitions

Page 3: Multiplication

3

Second Multiplication Algorithm

• There still is waste, the product has wasted space that matches the multiplier exactly.

• As the wasted space in the product disappears, so do bits in the multiplier.

• The multiplier can now be in the lower half of the product.

MultiplierShift right

Write

32 bits

64 bits

32 bits

Shift right

Multiplicand

32-bit ALU

Product Control test

Done

1. TestMultiplier0

1a. Add multiplicand to the left half ofthe product and place the result inthe left half of the Product register

2. Shift the Product register right 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition?

Start

Multiplier0 = 0Multiplier0 = 1

No: < 32 repetitions

Yes: 32 repetitions

Page 4: Multiplication

4

Final Multiplication Algorithm

• This algorithm can properly multiply signed numbers if we remember that the numbers have infinite digits.

• When shifting right we must extended the sign. This is called an arithmetic shift.

ControltestWrite

32 bits

64 bits

Shift rightProduct

Multiplicand

32-bit ALU

Done

1. TestProduct0

1a. Add multiplicand to the left half ofthe product and place the result inthe left half of the Product register

2. Shift the Product register right 1 bit

32nd repetition?

Start

Product0 = 0Product0 = 1

No: < 32 repetitions

Yes: 32 repetitions

Page 5: Multiplication

5

Division• Look at the following pencil and paper example:

1001d1000d 1001010d -1000 10 101 1010 -1000 10d

• The 2 operands are called dividend (מחולק) and divisor (מחלק) and the results are the quotient (שארית) and remainder (מנה)

Page 6: Multiplication

6

First Division Algorithm

• The Remainder is initialized with the dividend.

• The divisor is in the left half of the Divisor.

• As with multiplication, only half of the Divisor is useful, a 64-bit register and ALU are wasteful.

64-bit ALU

Controltest

QuotientShift left

RemainderWrite

DivisorShift right

64 bits

64 bits

32 bits

Done

Test Remainder

2a. Shift the Quotient register to the left,setting the new rightmost bit to 1

3. Shift the Divisor register right 1 bit

33rd repetition?

Start

Remainder < 0

No: < 33 repetitions

Yes: 33 repetitions

2b. Restore the original value by addingthe Divisor register to the Remainder

register and place the sum in theRemainder register. Also shift the

Quotient register to the left, setting thenew least significant bit to 0

1. Subtract the Divisor register from theRemainder register and place the result in the Remainder register

Remainder > 0–

Page 7: Multiplication

7

Second Division Algorithm• Shift the remainder left

by 1 bit.• Subtract the divisor from

the remainder.• If the remainder is positive

the quotient bit is 1, if negative the quotient bit is 0 and the divisor added back to the remainder.

• At termination of the algorithm the remainder is in the left half of the Remainder register.

• As in multiplication the Quotient register can be eliminated by holding the quotient in the bits vacated in the Remainder.

Controltest

QuotientShift left

Write

32 bits

64 bits

32 bits

Shift left

Divisor

32-bit ALU

Remainder

Page 8: Multiplication

8

Final Division Algorithm

• The remainder will be shifted left once to many times. Thus the reminder must be shifted right 1-bit at the end of the algorithm.

Done. Shift left half of Remainder right 1 bit

Test Remainder

3a. Shift the Remainder register to the left, setting the new rightmost bit to 1

32nd repetition?

Start

Remainder < 0

No: < 32 repetitions

Yes: 32 repetitions

3b. Restore the original value by addingthe Divisor register to the left half of theRemainder register and place the sum

in the left half of the Remainder register.Also shift the Remainder register to theleft, setting the new rightmost bit to 0

2. Subtract the Divisor register from theleft half of the Remainder register andplace the result in the left half of the

Remainder register

Remainder 0

1. Shift the Remainder register left 1 bit

–> Write

32 bits

64 bits

Shift leftShift right

Remainder

32-bit ALU

Divisor

Controltest

Page 9: Multiplication

9

A Division Example• We will divide 2 4-bit numbers using the final division

algorithm - 0111/0010 (7/2)• Itr Step Remainder Divisor

0 Initial values 0000 0111 0010Shift Rem left 1 0000 1110 0010

1 2: Rem=Rem-Div 1110 1110 0010 3b:Rem<0 => +Div, sll R, R0=0 0001 1100 0010 2 2: Rem=Rem-Div 1111 1100 0010

3b:Rem<0 => +Div, sll R, R0=0 0011 1000 0010 3 2: Rem=Rem-Div 0001 1000 0010

3a:Rem>=0 => sll R, R0=1 0011 0001 0010 4 2: Rem=Rem-Div 0001 0001 0010 3a:Rem>=0 => sll R, R0=1 0010 0011 0010

Shift left half of Rem right by 1 0001 0011 0010

Page 10: Multiplication

10

Signed Division• One solution is to remember the signs of the divisor

and dividend and negate the quotient if the signs disagree.

• But there is a complication with the remainder:Dividend = Quotient*Divisor + RemainderRemainder = Dividend - Quotient*Divisor

• Lets look at all the cases of 7/2:7/2 Quotient= 3 Remainder = 7 - (3*2) = 1-7/2 Quotient=-3 Remainder = -7 - (-3*2) = -17/-2 Quotient=-3 Remainder = 7 - (-3*-2) = 1-7/-2 Quotient= 3 Remainder = -7 - (3*-2) = -1

• The quotient is negated if the signs oppose and the remainder is the same sign as the dividend.

Page 11: Multiplication

11

Multiplication in MIPS• MIPS provides a pair of 32-bit registers to contain the 64-bit

product, called Hi and Lo. MIPS has 2 instructions for multiplication:mult $s2,$s3 # Hi,Lo = $s2*$s3 (signed)multu $s2,$s3 # Hi,Lo = $s2*$s3 (unsigned)

• MIPS ignores overflow in multiplication.• The instructions: mflo $t0, mfhi $t0, mtlo $t0, mthi $t0 move from/to Lo and Hi to general registers.

• The pseudoinstructions: mul $t0,$s1,$s2 #$t0=$s0*$s1 (without overflow)mulo $t0,$s1,$s2 # $t0=$s0*$s1 (with overflow)mulou $t0,$s1,$s2 # $t0=$s0*$s1 (unsigned with overflow)Perform multiplication and put the product in the specified general register.

Page 12: Multiplication

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Division in MIPS• MIPS has 2 instructions for division:div $s2,$s3 # Hi=$s2%$s3,Lo=$s2/$s3 (signed)divu $s2,$s3 # Hi=$s2%$s3,Lo=$s2/$s3 (unsigned)

• MIPS ignores overflow in division.• The pseudoinstructions: div $t0,$s1,$s2 #$t0=$s0/$s1 (signed)divu $t0,$s1,$s2 # $t0=$s0/$s1 (unsigned)Perform division and put the quotient in the specified general register.

• The pseudoinstructions: rem $t0,$s1,$s2 #$t0=$s0%$s1 (signed)remuu $t0,$s1,$s2 # $t0=$s0%$s1 (unsigned)Perform division and put the remainder in the specified general register.

Page 13: Multiplication

13

Floating-Point Numbers• The following numbers can't be represented in an

integer (signed or unsigned):3.14159265… , 2.71828… (e), 0.000000001 or 1.0*10-9 (seconds in a nanosecond), 6,311,520,000 or 6.31152*109 (seconds in two centuries).

• The notation where there is only one number to the left of the decimal point is called scientific notation.A number in scientific notation which has no leading zeros is called a normalized number.

• A binary floating point number is of the form:1.xxx*2yyy , the number 9d or 1001 is represented as: 1.001*211(3d) , 2.5d or 10.1b is: 1.01*21

Page 14: Multiplication

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Floating-Point Representation• A floating-point number in MIPS is a 32-bit value that

contains 3 fields: The sign (1-bit), the exponent (8-bit) and the mantissa or significand (32-bit). These 3 fields compose a binary FP number:(-1)sign*mantissa*2exponent

• s exponent mantissa31 30 …………… 23 22 ………………..…...…………………………….0

• This representation is called sign and magnitude because the sign has a separate bit.

• The range of a float is between fractions as small as 2*10-38 to numbers as large as 2*1038.

• It is still possible to overflow a float (the exponent is too large), in fact now we can also cause an underflow (the exponent is too small).

Page 15: Multiplication

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Enlarging the Range and Precision• Even though the range is large it isn't infinite. In order to

enlarge this range two MIPS words are used, this is called a double precision FP number. Single precision is the name of the previous format.

• A double has the same 3 fields of a float: sign (1-bit), exponent (11-bits), and mantissa (52-bits).

• In order to pack more bits into the mantissa the leading 1 to the left of the binary point is implicit. Thus a binary FP number is: (-1)sign*(1 + mantissa)*2exponent

• This representation isn't unique to MIPS. It is part of the IEEE 754 floating-point standard.

• The designers of IEEE 754 want a representation that could be easily processed by integer comparisons. That is why the sign is the MSB and the exponent is right after it.

Page 16: Multiplication

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Biased Notation• Negative exponents can cause problems, a negative

exponent in two's complement looks like a large exponent. Thus we will represent the most negative exponent as 00…00b and the most positive exponent as 11…11b.

• This convention is call biased notation with the bias being the number subtracted from the normal, unsigned representation. IEEE 754 uses a bias of 127 for single precision. So an exponent of -1 is represented by -1 + 127, or 126d = 0111 1110b. An exponent of 10 is represented by 10+127=137d=10001001.

• Now the value represented by a FP number is really: (-1)sign*(1 + mantissa)*2(exponent-bias)

• The bias of a double precision number is 1023.

Page 17: Multiplication

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Decimal to FP Representation• Show the IEEE 754 rep. of the number -0.75 in single and

double precision.-0.75= -0.5 + -0.25 = -0.1b + -0.01b = -0.11b = -0.11*20 (scientific notation) = -1.1*2-1 (normalized scientific notation)So in a FP representation it is: (-1)sign*(1 + mantissa)*2(exponent-bias) => (-1)1*(1 + .1)*2(126-127)

• The single precision representation is: 1 01111110 10000000000000000000000 sign exponent (8-bits) mantissa (23-bits)

• The double precision representation is: 1 01111111110 10000000000000000000000000000000... sign exponent (11-bits) mantissa (52-bits)this is because the double precision representation is: (-1)1*(1 + .1)*2(1022-1023)

Page 18: Multiplication

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Binary to Decimal FP• What decimal number is represented by:

1 1000001 0100000… (single precision)(-1)sign*(1 + mantissa)*2(exponent-bias) =>(-1)1*(1 + .25)*2(129-127) = -1.25*22 = -1.25*4 = -5.0

• What decimal number is represented by:0 10000000010 101100… (double precision) (-1)0*(1 + .5 + .125 + .0625)*2(1026-1023) = 1.6875*23 = 1.6875*8 = 13.5

• Let's double check to make sure: 13.5d = 1101.1b = 1.1011*23

The sign bit is 0, exponent - bias = 3 => exponent = 1026d = 10000000010b, and the mantissa without the leading 1 is 1011…...

Page 19: Multiplication

19

Floating-Point Addition• Let's add 2 normalized decimal FP numbers 9.999*101 +

1.610*10-1 (the maximal precision is 4 digits)• In order to add correctly we must align the decimal points of

both numbers by shifting the mantissa of the smaller number right until the exponents match: 9.999*101

+ 0.016*101

10.015*101

• The sum isn't normalized so we have to shift the result (right in this example).10.015*101 = 1.0015*102

• But the sum is represented by 5 digits so we must round the sum to 1.002* 102

• We see here two problems that cause precision loss, the matching of exponents and the final rounding.

Page 20: Multiplication

20

Binary FP Addition

Done

2. Add the significands

4. Round the significand to the appropriatenumber of bits

Still normalized?

Start

Yes

No

No

YesOverflow orunderflow?

Exception

3. Normalize the sum, either shifting right andincrementing the exponent or shifting left

and decrementing the exponent

1. Compare the exponents of the two numbers.Shift the smaller number to the right until itsexponent would match the larger exponent

0 10 1 0 1

Control

Small ALU

Big ALU

Sign Exponent Significand Sign Exponent Significand

Exponentdifference

Shift right

Shift left or right

Rounding hardware

Sign Exponent Significand

Increment ordecrement

0 10 1

Shift smallernumber right

Compareexponents

Add

Normalize

Round

Diagram of a FP adder

Page 21: Multiplication

21

FP Multiplication• The idea is simple: Add

the exponents and multiply the mantissas. Set the sign depending on the signs of the operands.

• Division is similar: Subtract the exponents and divide the mantissas.

2. Multiply the significands

4. Round the significand to the appropriatenumber of bits

Still normalized?

Start

Yes

No

No

YesOverflow orunderflow?

Exception

3. Normalize the product if necessary, shiftingit right and incrementing the exponent

1. Add the biased exponents of the twonumbers, subtracting the bias from the sum

to get the new biased exponent

Done

5. Set the sign of the product to positive if thesigns of the original operands are the same;

if they differ make the sign negative

Page 22: Multiplication

22

FP Instructions in MIPS• MIPS has a set of 32, single precision, FP registers called

$f0,$f1 … $f31. Double precision instructions use two such registers, using the even numbered register as it's name.

• MIPS provides the following FP instructions:– Addition: single add.s $f1,$f2,$f3# $f1=$f2+$f3

double add.d $f0,$f2,$f16#$f0=$f2+$f16– Subtraction: sub.s, sub.d– Multiplication & Division: mul.s,mul.d,div.s,div.d– Branch: branch if true, bc1t; branch if false, bc1f. True

or false are set by the following comparison instructions:– Comparision:

• equal - c.eq.s, c.eq.d• less then - c.lt.s, c.lt.d• less then or equal - c.le.s, c.le.d

Page 23: Multiplication

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Compiling a FP Program into MIPS• Let's convert a temperature in Fahrenheit to Celsius:float f2c (float fahr){

return((5.0/9.0) * (fahr -32.0));}

• In MIPS assembly (the first 2 instructions load from memory into FP registers, fahr is in $f12):f2c: lwc1 $f16,const5($gp) # $f16=5.0 (5.0 in memory) lwc1 $f18,const9($gp) # $f18=9.0 (9.0 in memory) div.s $f16,$f16,$f18 # $f16=5.0/9.0Many compilers would divide 5.0/9.0 at compile time and store the result in memory, saving a divide and load lwc1 $f18,const32($gp)# $f18=32.0 sub.s $f18,$f12,$f18 # $f18=fahr-32.0 mul.s $f0,$f16,$f18 # $f0=(5.0/9.0)*(fahr-32.0) jr $ra # return