modeling and simulation of via conductor losses in co-fired … · 2016-06-09 · modeling and...
TRANSCRIPT
Modeling and Simulation of Via
Conductor Losses in Co-fired Ceramic
Substrates Used In Transmit/Receive
Radar Modules
4/5/16
Rick Sturdivant, CTO
310-980-3039
Edwin K.P. Chong, Professor
Colorado State University
http://www.engr.colostate.edu/~echong/
RLS Design, Inc.
Goal Of The Presentation
Major Goal:
– Demonstrate the effect of via resistance on vertical transitions within
co-fired ceramic substrates.
Motivation
– During a product development, it was suggested that via conductor
losses may be increasing the insertion loss of the vertical transition.
Specifically, the center conductor via for the quasi-coaxial transition.
Describe the use of vertical transitions in transmit receive
modules.
Show simulation results
Describe the model developed
RLS Design, Inc.
T/R Modules Are Used In AESA Radar
and Communication Systems
T/R modules are being used in multiple
military systems including airborne, ground
based, and sea based systems.
Commercial applications of T/R modules
include communication systems, satellite
systems, consumer high data rate mobile.
TX RX
Switch Switch Switch Switch
T/R T/R T/R T/R Power Divider Network
(Manifold)
Active Electronically
Scanned Array (AESA)
AESA Radar
defense-update.com
koreansentry.com
neviditelnypes.lidovky.cz
Airborne Radar
Ground Based Radar
RLS Design, Inc.
Typical Transmit Receive Module Showing
Location Of Vertical Transition
Power Detector
• Detects HPA output
power level. High Power
Amplifiers
• Two amplifiers
Circulator
• Combines RX and TX
functions to one radiator
port.
Limiter and Low Noise Amplifier
• Must handle at least the reverse
power of HPA output.
• LNA, G>20dB typ., NF~1-1.5dB
Phase Shifter and VGA
• 6 bits of phase
• 5 bits of attenuation
Switches
• SPDT
• Used to switch between TX
and RX paths.
Si and Other
Functions:
•ASIC, Regulators,
Energy Storage,
HEXFETs, etc.
Vertical
Transition
Wilkenson
Power Divider
• Power
combines HPA
outputs
RLS Design, Inc.
How Can A Transition Between
Stripline and Microstrip Be Created?
This is a very common transition
since many applications require
the signal line to be buried inside
the PCB at some point.
Requires careful design of the
transmission lines and transition
area between the transmission
lines.
stripline microstrip
Vertical
Transition
RLS Design, Inc.
Design Of The Stripline Section Requires
Careful Attention To Via Placement Detail
Avoiding the two undesired
modes results in a limited
range for acceptable values for
dimension a.
Stripline Desired Mode
0
10
20
30
40
50
60
70
80
90
100
25.0
27.5
30.0
32.5
35.0
37.5
40.0
42.5
45.0
47.5
50.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
On
set
Of
TE0
1 R
eso
nan
t M
od
e (
GH
z)
Lin
e Im
pe
dan
ce (
oh
m)
Cavity Width, b (mm)
er
a
er
a
er
a via
Allowed Range
For Dimension a
Stripline Undesired Mode1
Stripline Undesired Mode2
fsr1 = v0
2a εrμr
Simulate using quasi-static or full-
wave simulator to determine
change in impedance and
effective dielectric constant as a
function of spacing between vias.
(for er=9.8, b=1mm, w=0.203mm)
Cavity Width, a (mm)
RLS Design, Inc.
The Equivalent Circuit Model Of
The Transition Is An LC Network
L1 = inductance of the via through substrate thickness h.
L2 = inductance of via through the top section of substrate
thickness b.
C1 = capacitance created by via passing through the
ground plane below the microstrip.
C2 = capacitance created by the via catch pad at the
stripline interface.
Microstrip
Stripline
GND1
GND2
Via Diameter, d
h
b
D
Dcp
C1
L1 L2
C2
Equivalent Circuit Model
RLS Design, Inc.
The Model Creation Procedure
Requires Three Steps
Step 1: Calculate L1 and L2
using (4).
Step 2: Calculate C1 using (5).
Step 3: Calculate C2 using (6) R
etu
rn L
oss (
dB
)
Frequency (GHz)
LVia =μ02π
h ∙ lnh + r2 + h2
r+3
2r − r2 + h2 (4) C1 = A1 ∙ h +
b
2
εr60 ∙ voln D/d
(5)
C2 =Acp ∙ εoεr
spacing=π
DCP2
2
ε0εr
b 2 (6)
C1
L1 L2
C2
For LTCC (er=7.8), h=0.25mm, b=0.5mm,
D=0.55mm, d=0.2mm, Dcp=0.35mm which yield
L1=0.0259nH, L20=0.108nH, C1=0.102pF,
C2=0.0781pF
RLS Design, Inc.
What Effect Does The Conductor Loss
Of The Via Have On Performance?
Approach
– Convert ohm/sq into resistivity
– Perform EM simulation
– Extract insertion loss as a
function of metal conductivity
– Modify circuit model to
accommodate via resistance
effect.
RLS Design, Inc.
Co-Fired Ceramic Fabricators Specify
Metal Conductivity in Ohm/sq
Must convert ohm/sq into
resistivity or conductivity for EM
simulators. W
Total Length, L
(a) Top Down View
W
L
t
(b) Isometric View
L LR
A W t
Area A W t
From Definition
Of Resistivity
Ohm LR
Sq W
From Ohm/Square
L Ohm L
W t Sq W
Ohmt
Sq
Use This for EM
Simulator Input Data
RLS Design, Inc.
-0.40
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
1000 10000 100000 1000000
Inse
rtio
n lo
ss (d
B)
Via Conductivity (S/m)
Insertion Loss Effect of The Center Conductor Via
HFSS
Ideal (DC Case)
The Via Can Be Modeled As A Simple
Resistor For Insertion Loss Contribution
Contribution of resistive part to the insertion loss of the transition can be
found from (1), but only if we were just concerned about DC effects (i.e.,
effects at zero frequency).
However, (1) does not capture the full story because of the skin depth effect.
D
L’ R’=(L’/A’)
A’=p(D/2)2
(1)
Considering DC (i.e., f=0) Current Only
RLS Design, Inc.
Skin Depth Effect Tells Us That The RF
Current Only Penetrates A Small Distance
Into The Metal
1Skin Depth
f
p
Where:
= permeability
= metal conductivity
f = frequency of concern
J0
X
Jx(z) =Joe-z/
Z
Ex(z)
AirRegion
MetalRegion (,)
RLS Design, Inc.
Because of Skin Depth Effects, The Current
Only Travels On The Surface Of The Via
Using (2) provide a more
accurate estimate of the
D
L’
Skin Depth
Effect
2 2
' 1
2 2
effA A A
D D np
-
- -
10 '
0
221( ) 20
2S dB LOG
R Z
Effective Area
Due To Skin Depth
Effects
''
eff
LR
A
(2)
n= number of
skin depths
to include
RLS Design, Inc.
When Skin Depth Effects Are Taken
Into Account, The Lumped Model
Agrees With HFSS
-0.40
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
1000 10000 100000 1000000
Inse
rtio
n lo
ss (d
B)
Via Conductivity (S/m)
Insertion Loss Effect of The Center Conductor Via
HFSS
Model
Ideal (DC Case)
@10GHz
Cu
Au
W
RLS Design, Inc.
Simulations Were Performed
Using HFSS From Ansys
Results show a steady increase in insertion loss as a function of
frequency and via conductivity.
Roll off above 10GHz is due to mismatch losses.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Frequency (GHz)
Insertion Loss Versus Frequence and Via Conductivity
-0.5
-0.45
-0.4
-0.35
-0.3
-0.25
-0.2
-0.15
-0.1
-0.05
0
Insert
ion L
oss (
dB
)
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod0_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod1_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod2_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod3_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod4_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod5_HFSSDesign1
DB(|S(2,1)|)
Transition_IMAPS_Ramp1_Mod6_HFSSDesign1
Alumina HTCC
RLS Design, Inc.
Conclusions
The goal of the presentation was to show the effect of the center conductor
resistivity for vertical transitions.
We showed:
– 1) For good conductivity metals, the contribution of the center conductor to overall
insertion loss of the vertical transition is less than approximately 0.1dB.
– 2) The skin depth effect must be accounted for when calculating the resistive part of the
via transition.
Suggestions For Further Study:
– 1) All the vias including the ground vias in the location of the transition should be taken
into account.
– 2) A analytical solution for n should be calculated.
C1
L1 L2
C2
R’
Modified Model