micro-electronics assignment
DESCRIPTION
Assignment no. 11 in EE210A at IIT KanpurTRANSCRIPT
1
VS
3.3V
2/1
VBias
VO
10F
3.3V
vin
vo
80k
m1 m2
2/1 2/1
70k
1.5V
DEPARTMENT OF ELECTRICAL ENGINEERING, IIT KANPUR EE210: Microelectronics - I
HW – 11
Unless stated otherwise, the MOSFET in the problems given below has the following characteristics
2 1
15 16 1/2
100 / ; 1 ; 0.01 ; / 0.026 ;
4 10 ; 4 10 ; 0.7 ;2 0.7
N P TN TP n p
gs db sb gd F
KP KP A V V V V V kT q V
C C C F C F V V
Unless otherwise stated, ignore body effect CS Amplifier Q.1 For the CS amplifier shown below in Fig. 1, determine the gate bias voltage for a drain bias current of 25µA. Determine voltage gain and maximum output voltage swing for HD2 ≤ 5%. Determine next the lower and upper 3dB cutoff frequencies. Include body effect in the calculations.
Fig. 1 Fig. 2 Q.2 One way of doubling the gain of the amplifier is by reducing current by a factor of 4 and increasing RD by a factor of 4 (to maintain VDSQ constant). Determine the new upper cutoff frequency. Q.3 Another way of doubling the gain is by increasing transistor width W by a factor of 4 and maintaining current constant by suitable decreasing bias voltage. Determine new upper cutoff frequency again. Increase capacitances by a factor of 4 due to increased size. Comment on gain bandwidth tradeoff in CS amplifier.
2
3.3V
VO
2/1
VS
VBias
R
VO
VS
VDD
VS
M1
VBias1
VBias2
vO2
VS
M1
M2
M2
M3M3
vO1
vO
R
R
3.3V
VO
2/1
2/1
m2
VS
m1
1.55V
Q.4 Determine the voltage gain and upper cutoff frequency of the amplifier shown in Fig. 2. Q.5 Determine voltage gain for the amplifiers shown in Fig. 3 using the ‘REUSE’ method. Assume that all transistors are biased in saturation , have identical parameters and use the following relationship 1 / m Og R r to simplify the results.
Fig. 3 CG Amplifier Q.6 For the CG amplifier circuit shown in Fig. 4, determine voltage gain, input resistance and output resistance. Verify that ~ 1v i OA R R . The transistor is biased at a drain
current of 25µA Take body effect into account in your calculations.
Fig. 4 Fig. 5
3
3.3V
-3.3V
VO
2/1Vbias
VS RS
Q.7 Determine the upper 3dB frequency of the CG amplifier of Q.4 and compare it with that of CS amplifier calculated in Q.1. Is there an improvement in 3dB frequency? When does a CG stage provide better frequency performance as compared to a CS stage? Q.8 Figure 5 shows a Cascode amplifier. determine voltage gain and upper cutoff frequencies. If required assume that dc value of source voltage of M2 is 0.2V. CD Amplifier Q.9 For the CD amplifier shown in the next figure, determine small signal voltage gain and output resistance. Assume that dc value of output voltage is 0V. Fig. 6 Q.10 How high can VO in the CD amplifier shown in Fig. 6 become if net voltage at the gate can be as large as 3.3V? How low can VO become?. What would be the maximum voltage swing of this amplifier? Q.11 Determine voltage swing if a load resistor of 1K is connected between output and ground. Q.12 Determine the value of resistor RS required to obtain a swing of 1V across a load resistance of 1K. Assume a MOS size of 100/1 and neglect body effect. The dc value of output voltage is zero. Q.13 Suppose RS is replaced by an ideal current source. What value of bias current would be required? Assume again that MOS size is 100/1 and body is tied to source. Determine the voltage gain of this amplifier.