march 2014 fqp12n60c n-channel qfet mosfet · march 2014 fqp12n60c — n-channe l qfet ® mosfet...

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March 2014 FQP12N60C — N-Channel QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 www.fairchildsemi.com 1 FQP12N60C N-Channel QFET ® MOSFET 600 V, 12 A, 650 mΩ Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies, active power factor correction, electronic lamp ballast based on half bridge topology. Features 12 A, 600 V, R DS(on) = 650 m(Max.) @ V GS = 10 V, I D = 6 A Low Gate Charge (Typ. 48 nC) Low Crss (Typ. 21 pF) 100% Avalanche Tested Absolute Maximum Ratings T C = 25 o C unless otherwise noted. *Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter FQP12N60C Unit V DSS Drain-Source Voltage 600 V I D Drain Current - Continuous (T C = 25°C) - Continuous (T C = 100°C) 12 7.4 A A I DM Drain Current - Pulsed (Note 1) 48 A V GSS Gate-Source voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note 2) 870 mJ I AR Avalanche Current (Note 1) 12 A E AR Repetitive Avalanche Energy (Note 1) 22.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns P D Power Dissipation (T C = 25°C) - Derate above 25°C 225 1.78 W W/°C T J, T STG Operating and Storage Temperature Range -55 to +150 °C T L Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds 300 °C Symbol Parameter FQP12N60C Unit R θJC Thermal Resistance, Junction-to-Case, Max. 0.56 °C/W R θJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 °C/W TO-220 G D S G S D

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Page 1: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

March 2014

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

www.fairchildsemi.com1

FQP12N60C N-Channel QFET® MOSFET 600 V, 12 A, 650 mΩ

DescriptionThese N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies, active power factor correction, electronic lamp ballast based on half bridge topology.

Features• 12 A, 600 V, RDS(on) = 650 mΩ (Max.) @ VGS = 10 V,

ID = 6 A• Low Gate Charge (Typ. 48 nC)• Low Crss (Typ. 21 pF)• 100% Avalanche Tested

Absolute Maximum Ratings TC = 25oC unless otherwise noted.

*Drain current limited by maximum junction temperature

Thermal Characteristics

Symbol Parameter FQP12N60C UnitVDSS Drain-Source Voltage 600 V

ID Drain Current - Continuous (TC = 25°C)- Continuous (TC = 100°C)

127.4

AA

IDM Drain Current - Pulsed (Note 1) 48 A

VGSS Gate-Source voltage ± 30 V

EAS Single Pulsed Avalanche Energy (Note 2) 870 mJ

IAR Avalanche Current (Note 1) 12 A

EAR Repetitive Avalanche Energy (Note 1) 22.5 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

PD Power Dissipation (TC = 25°C)- Derate above 25°C

2251.78

WW/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TL Maximum Lead Temperature for Soldering Purpose,1/8” from Case for 5 Seconds 300 °C

Symbol Parameter FQP12N60C UnitRθJC Thermal Resistance, Junction-to-Case, Max. 0.56 °C/W

RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 °C/W

TO-220GDS

G

S

D

Page 2: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com2

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Part Number Top Mark Package Packing Method Reel Size Tape Width QuantityTube N/A N/A 50 units

Package Marking and Ordering Information

Electrical Characteristics TC = 25°C unless otherwise noted.

NOTES:1. Repetitive rating: pulse-width limited by maximum junction temperature.

2. L = 11 mH, IAS = 12 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.3. ISD ≤ 12 A, di/dt ≤ 200 A/µs, VDD ≤ BVDSS, starting TJ = 25°C.4. Essentially independent of operating temperature typical characteristics.

FQP12N60C FQP12N60C TO-220

Symbol Parameter Conditions Min Typ Max UnitOff Characteristics

BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA, TJ = 25°C 600 -- -- V

∆BVDSS/ ∆TJ

Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.5 -- °CV/

IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V VDS = 480 V, TC = 125°

----

----

110

µAµA

IGSSF Gate-Body Leakage Current, Forward -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA

On Characteristics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V

RDS(on) Static Drain-SourceOn-Resistance VGS = 10 V, ID = 6 A -- 0.53 0.65 Ω

gFS Forward Transconductance VDS = 40 V, ID = 6 A -- 13 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz

-- 1760 2290 pF

Coss Output Capacitance -- 182 235 pF

Crss Reverse Transfer Capacitance -- 21 28 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 300 V, ID = 12 A RG = 25 Ω

(Note 4)

-- 30 70 ns

tr Turn-On Rise Time -- 85 180 ns

td(off) Turn-Off Delay Time -- 140 280 ns

tf Turn-Off Fall Time -- 90 190 ns

Qg Total Gate Charge VDS = 400 V, ID = 12 A VGS = 10 V

(Note 4)

-- 48 63 nC

Qgs Gate-Source Charge -- 8.5 -- nC

Qgd Gate-Drain Charge -- 21 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 12 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 48 A

VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 12 A -- -- 1.4 V

trr Reverse Recovery Time VGS = 0V, IS = 12 A dIF/dt = 100 A/µs

-- 420 -- ns

Qrr Reverse Recovery Charge -- 4.9 -- µC

VGS = 30 V, VDS = 0 V

Page 3: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com3

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward VoltageDrain Current and Gate Voltage Variation vs. Source Current

and Temperatue

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

100 1

100

101

VGSTop : 15.0 V

10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V

Bottom : 4.5 V

※ Notes : 1. 250µs Pulse Test 2. TC = 25

I D, D

rain

Cur

rent

[A]

10

VDS, Drain-Source Voltage [V]

2 4 8 1010-1

100

101

150oC

25oC-55oC

※ Notes : 1. VDS = 40V 2. 250µs Pulse Test

I D, D

rain

Cur

rent

[A]

6

VGS, Gate-Source Voltage [V]

0 5 10 15 20 25 30 35

0.5

1.0

1.5

VGS = 20V

VGS = 10V

※ Note : TJ = 25

RDS

(ON) [Ω

],D

rain

-Sou

rce

On-

Res

ista

nce

ID, Drain Current [A]0.2 0.4 0.6 0.8 1.0 1.2 1.4

10-1

100

101

150

※ Notes : 1. VGS = 0V 2. 250µs Pulse Test

25I DR, R

ever

se D

rain

Cur

rent

[A]

VSD, Source-Drain voltage [V]

10-1 0 1010

500

1000

1500

2000

2500

3000

3500Ciss = Cgs + Cgd (Cds = shorted)Coss = Cds + CgdCrss = Cgd

※ Notes ; 1. VGS = 0 V 2. f = 1 MHzCrss

Coss

Ciss

Cap

acita

nce

[pF]

10

VDS, Drain-Source Voltage [V]

0 10 0320 04 500

2

4

6

8

10

12

VDS = 300V

VDS = 120V

VDS = 480V

※ Note : ID = 12A

V GS,

Gat

e-So

urce

Vol

tage

[V]

QG, Total Gate Charge [nC]

Page 4: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com4

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature

-100 -50 0 50 100 150 2000.8

0.9

1.0

1.1

1.2

※ Notes :1. VGS = 0 V2. ID = 250 µA

BVDS

S, (N

orm

aliz

ed)

Dra

in-S

ourc

e Br

eakd

own

Volta

ge

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 2000.0

0.5

1.0

1.5

2.0

2.5

3.0

※ Notes :1. VGS = 10 V2. ID = 6.0 A

RDS

(ON), (

Nor

mal

ized

)D

rain

-Sou

rce

On-

Res

ista

nce

TJ, Junction Temperature [oC]

25 50 75 100 125 1500

2

4

6

8

10

12

14

I D, D

rain

Cur

rent

[A]

TC, Case Temperature []

Figure 11. Transient Thermal Response Curve

t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]

Z θJC(t)

, The

rmal

Res

pons

e [o C

/W]

100 101 102 10310-2

10-1

100

101

102

100 ms

10 µs

DC

10 ms1 ms

100 µs

Operation in This Area is Limited by R DS(on)

※ Notes :1. TC = 25 oC2. TJ = 150 oC3. Single Pulse

I D, D

rain

Cur

rent

[A]

VDS, Drain-Source Voltage [V]

1 0 -5 1 0 -4 1 0 -3 1 0 -2 1 0 -1 1 0 0 1 0 1

1 0 -2

1 0 -1

1 0 0

※ N o tes : 1 . Z θ JC(t) = 0 .56 /W M a x . 2 . D u ty F a c to r, D = t1/t2 3 . T JM - T C = P D M * Z θ JC(t)

s in g le p u ls e

D = 0 .5

0 .0 2

0 .2

0 .0 5

0 .1

0 .0 1 t1

PDM

t2

Page 5: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com5

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Figure 12. Gate Charge Test Circuit & Waveform

Figure 13. Resistive Switching Test Circuit & Waveforms

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

VVGSGS

VVDSDS

1010%%

90%90%

ttd(d(onon)) ttrr

tt onon tt ofofff

ttd(d(ooffff)) ttff

VVDDDD

VVDSDSRRLL

DUDUTT

RRGG

VVGSGS

ChaCharrgege

VVGSGS

QQgg

QQgsgs QQgdgdVVGSGS

DUDUTT

VVDSDS

300n300nFF

50K50KΩΩ

200n200nFF12V12V

SamSamee TTyypepeas as DUDUTT

===EEEASASAS --------21212121-------- LLL ASASASIII

BVBVDSSDSS222 ----------------------------------------

BVBVDSDSSS - V- VDDDD

VVDDDD

VVDSDS

BVBVDSDSSS

t t pp

VVDDDD

IIASAS

VVDS DS (t)(t)

IID D (t)(t)

TiTimmee

DUTDUT

RRGG

LLL

III DDD

t t pp

IG = const.

VVGSGS

VVGSGS

Page 6: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com6

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

••

DUTDUT

VVDSDS

++

__

DrivDrivererRRGG

SamSamee TTyyppee as as DUTDUT

VVGSGS •• ddvv//dtdt ccoontntrroolllleed d bbyy RRGG

IISDSD ccononttrrolollleded byby pupullsse e peperriiodod

VVDDDD

LLLII SDSD

1010VVVVGSGS

( ( DrivDriver er ))

II SDSD

( ( DUT DUT ))

VVDSDS

( ( DUT DUT ))

VVDDDD

BoBodydy DDiiooddeeForForwward ard VVololttagage e DrDropop

VVSDSD

IIFMFM , , BoBodydy DiDiodode e FFoorrwwaarrd d CCuurrrrenentt

IIRMRM

BoBodydy DDiiodode e RReevveerrssee CCuurrrrenentt

BoBodydy DiDiodode e RReecovcoveerryy dvdv/d/dtt

didi/d/dtt

D D D === ------GateGateGate--------------------------- PPPulululsss------------------------e e e WWWiiiddd---------------ttthhhGaGaGate te te PuPuPulllssseee Pe Pe Perrriiiododod

--- ---

Page 7: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com7

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

Mechanical Dimensions

Figure 16. TO220, Molded, 3-Lead, Non Jedec Variation AB

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any mannerwithout notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify orobtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-ically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO220-003

Page 8: March 2014 FQP12N60C N-Channel QFET MOSFET · March 2014 FQP12N60C — N-Channe l QFET ® MOSFET ©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0 1 FQP12N60C N-Channel

www.fairchildsemi.com8

FQP12N

60C —

N-C

hannel QFET

® MO

SFET

©2003 Fairchild Semiconductor Corporation FQP12N60C Rev C0

TRADEMARKSThe following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is notintended to be an exhaustive list of all such trademarks.

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVERELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANYPRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTYTHEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THEEXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:1. Life support devices or systems are devices or systems which, (a) are

intended for surgical implant into the body or (b) support or sustain life,and (c) whose failure to perform when properly used in accordance withinstructions for use provided in the labeling, can be reasonablyexpected to result in a significant injury of the user.

2. A critical component in any component of a life support, device, orsystem whose failure to perform can be reasonably expected to causethe failure of the life support device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONSDefinition of Terms

AccuPower™AX-CAP®*BitSiC™Build it Now™CorePLUS™CorePOWER™CROSSVOLT™CTL™Current Transfer Logic™DEUXPEED®

Dual Cool™EcoSPARK®

EfficentMax™ESBC™

Fairchild®

Fairchild Semiconductor®

FACT Quiet Series™FACT®

FAST®

FastvCore™FETBench™FPS™

F-PFS™FRFET®

Global Power ResourceSM

GreenBridge™Green FPS™Green FPS™ e-Series™Gmax™GTO™IntelliMAX™ISOPLANAR™Marking Small Speakers Sound Louderand Better™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MicroPak2™MillerDrive™MotionMax™mWSaver®

OptoHiT™OPTOLOGIC®

OPTOPLANAR®

PowerTrench®

PowerXS™Programmable Active Droop™QFET®

QS™Quiet Series™RapidConfigure™

Saving our world, 1mW/W/kW at a time™SignalWise™SmartMax™SMART START™Solutions for Your Success™SPM®

STEALTH™SuperFET®

SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS®

SyncFET™Sync-Lock™

®*

TinyBoost®

TinyBuck®

TinyCalc™TinyLogic®

TINYOPTO™TinyPower™TinyPWM™TinyWire™TranSiC™TriFault Detect™TRUECURRENT®*μSerDes™

UHC®

Ultra FRFET™UniFET™VCX™VisualMax™VoltagePlus™XS™

®

Datasheet Identification Product Status Definition

Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Preliminary First ProductionDatasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.

Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,www.Fairchildsemi.com, under Sales Support.Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of theirparts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failedapplication, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from theproliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized FairchildDistributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized FairchildDistributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range ofup-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address andwarranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild iscommitted to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.

Rev. I68

tm

®