logic design cs221 1 st term 2009-2010 logic-circuit implementation cairo university faculty of...

Logic DesignCS221

1st Term 2009-2010

Logic-Circuit ImplementationLogic-Circuit Implementation

Cairo University

Faculty of Computers and Information

24/10/2009 cs221 – sherif khattab 2

Administrivia lab 2 is divided into two parts email subject must include the word CS221 homework 1 due today project ideas due next Saturday by email


important concepts clock timing diagram counter datasheet


K-map simplification a Boolean function is represented by a truth

table function value (0 or 1) at each combination of inputs

truth table => K-map K-map simplification

combining adjacent squares


don't-care conditions in some Boolean functions, we do not care

whether the output is 0 or 1 for some input combinations

these don't-care conditions allow for simpler expressions

Example: conversion from BCD-code to excess-3 code how many inputs? how many outputs? truth table (next slide)


don't-care conditions (contd.)

1 0 1 0 ? ? ? ?

1 0 1 1 ? ? ? ?

1 1 0 0 ? ? ? ?

1 0 1 0 X X X X

1 0 1 1 X X X X

1 1 0 0 X X X X


don't-care conditions (contd.) K-map for z don't-care conditions can be treated as 1 or 0,

whichever gives a simpler expression

m12

, m14

, m10

: 1's

m13

, m15

, m11

: 0's

z = ?


don't-care conditions (contd.) Example 2: F = ∑(1,3,7,11,15) with don't-care

minterms d = ∑(0,2,5)

F = w'x' + yz F = w'z' + yz=?


Boolean function implementation convert Boolean function expression into logic

circuit Example: F = B'D' + B'C' + A'C'D


AND-OR implementation any Boolean function can be represented using

only AND, OR, and NOT gates why?

sum-of-minterms and sum-of-product forms can be directly converted into two-level AND-OR implementation


NAND implementation NAND gates are easy to fabricate

any Boolean function can be represented using only NAND gates

why? answer in the next 2 slides


NAND implementation (contd.) AND, OR, and NOT gates can represented

using NAND gates


NAND implementation (contd.) any Boolean function can be represented using

only AND, OR, and NOT gates AND, OR, and NOT gates can represented

using NAND gates Then? NAND is a universal gate.


how to get a NAND implementation first, note that NAND gate can be:

start with AND-OR implementation insert pairs of bubbles (NOT gates) works with alternating levels of AND and OR

gates: AND-OR, AND-OR-AND-OR, etc.


how to get a NAND implementation (contd.)



combining 1's in a K-map gives: sum-of-products? product-of-sums?

?

?



Boolean function in truth table, minterms, or algebraic form

represent the function in a K-map

simplify the K-map

convert the resulting SoP into AND-OR logic circuit

convert the AND-OR circuit into NAND circuit as described earlier (by inserting pairs of bubbles)


NOR implementation NOR gates are easy to fabricate

any Boolean function can be represented using only NOR gates

why? answer in the next 2 slides


NOR implementation (contd.) AND, OR, and NOT gates can represented

using NOR gates


NOR implementation (contd.) any Boolean function can be represented using

only AND, OR, and NOT gates AND, OR, and NOT gates can represented

using NOR gates Then? NOR is a universal gate.


how to get a NOR implementation first, note that NOR gate can be:

start with OR-AND implementation insert pairs of bubbles (NOT gates) works with alternating levels of AND and OR

gates: AND-OR, AND-OR-AND-OR, etc.


how to get a NOR implementation (contd.)



combining 1's in a K-map gives: sum-of-products? product-of-sums?

NAND

NOR

??


product-of-sums from K-map simplify the function's complement (F') where are the squares of F'?

combine adjacent 0's get an algebraic form for F' get complement of F': (F')' = F how?


product-of-sums from K-mapExample: simplify the following K-map in product-

of-sums form

F' = AB + CD + BD'

F = (A' + B')(C' + D')(B' + D)


NOR implementation

NOR

NOR??


NOR implementation


wired-and wiring of two NAND gates => AND no physical AND gate -> one-level => less

delay F = (AB)'.(CD)' = (AB + CD)' AND-OR-INVERT


wired-or wiring of two NOR gates => OR no physical OR gate -> one-level => less delay F = (A+B)' + (C+D) = ((A+B) (C+D))' OR-AND-INVERT


other two-level implementations how many two-level implementations from the

four gates: AND, OR, NAND, NOR?

AND-AND AND-OR AND-NAND AND-NOR

OR-AND OR-OR OR-NAND OR-NOR

NAND-AND NAND-OR NAND-NAND NAND-NOR

NOR-AND NOR-OR NOR-NAND NOR-NOR


other two-level implementations 8 degenerate (AND-AND) : one operation 8 nondegenerate

AND-AND AND-OR AND-NAND AND-NOR

OR-AND OR-OR OR-NAND OR-NOR NAND-AND NAND-OR NAND-NAND NAND-NOR NOR-AND NOR-OR NOR-NAND NOR-NOR

which ones are duals? which ones are equivalent?


AND-NOR, NAND-AND

how to get AND-NOR of a function? F' in sum-of-products (AND-OR) F in AND-NOR


OR-NAND, NOR-OR

how to get OR-NAND of a function? F' in product-of-sums (OR-AND) F in OR-NAND


xor implementationcan we simplify

this K-map?

note that the 1's are in the odd rows => XOR


parity xor gates are often used in parity generation

and checking truth table for even parity generation


parity xor gates are often used in parity generation

and checking truth table for even parity checking

logic design cs221 1 st term 2009-2010 logic-circuit implementation cairo university faculty of...

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