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ENE 5400 , Spring 2004 1

Lecture 10: Accelerometers (Part I)

ADXL 150 (Formerly the original ADXL 50)

ENE 5400 , Spring 2004 2

Outline

Performance analysis Capacitive sensing Circuit architectures Circuit techniques for non-ideality cancellation Feedback linearization

Sigma-delta modulation Accelerometer Examples

CMOS-integrated polysilicon-micromachined accelerometer (Fedder, UC Berkeley)

CMOS-micromachined chopper-stabilized capacitive accelerometer (Wu, Carnegie Mellon)

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ENE 5400 , Spring 2004 3

Why Do Analog Devices Do This?

Over 40,000,000 car produced worldwide annually

The old technology was bulky and expensive (~$100 /car)

MEMS accelerometers more reliable, smaller, and less expensive (~$5 /car)

ENE 5400 , Spring 2004 4

Accelerometer Specifications

Accelerometer parametersSensitivity Transducer sensitivity Bias (offset) Temperature drift of sensitivityTemperature drift of bias offsetNoiseCross-axis sensitivityAcceleration limitBandwidthShock resistanceSupply voltage

UnitsV/gV/g/Vmg% / Kµg / Kµg / Hz1/2

%gHzgV

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ENE 5400 , Spring 2004 5

Accelerometer

2n

inin

total

aa

km

xωωωω

========

)()()()( tmatxktxbtxm intotaltotal ====++++++++ &&&

Mechanical sensing element

Static:

Dynamic:

substrateain

ENE 5400 , Spring 2004 6

Capacitive Accelerometer

Induced displacement is often capacitively sensed using comb fingers (yet the motion in the parallel-plate fashion)

How to do interconnects (fabrication issue) affects the sensing circuit architecture

MASS

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ENE 5400 , Spring 2004 7

Accelerometer Frequency Response

Operating frequency is much lower than ωωωωn

The quality factor will affect Brownian Noise Transient response (Ringing)

22

1)()(

nnin s

Qssa

sX

ωωωωωωωω ++++++++====

ENE 5400 , Spring 2004 8

Brownian Noise

Brownian noise force and noise acceleration

mQTk

fa

TbkfF

nbn

bn

ωωωω4)(

4)(

====⇒

====

5

ENE 5400 , Spring 2004 9

Sensing Range vs. Noise Floor

Large-ωωωωn accelerometers can have large sensing range, yet with higher Brownian noise floor

2n

inin

total

aa

km

xωωωω

======== Case 1: x = 20 nm @ 24.7 kHz and 50gCase 2: x = 1.2 µµµµm @1 kHz and 50g

mQTk

fa nbn

ωωωω4)( ====

ENE 5400 , Spring 2004 10

Spring Design

Folded-beam spring design Should ensure large spring constant in the non-

sensing axis

x (sensing)

y z

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ENE 5400 , Spring 2004 11

Capacitive Sensing

ENE 5400 , Spring 2004 12

Capacitive Sensing

Standard steps: Modulation Amplification Demodulation Low-pass filtering

Circuit architectures: Continuous-time

voltage sensing Continuous-time

current sensing Switched-capacitor

circuit» Demodulation not

needed

-Vm

Csp

Csn

Pre-amplifier

×××× Low-PassFilter

demodulator

Vm, frequency fm

Carrier, frequency fm

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ENE 5400 , Spring 2004 13

Simulation

Vm, frequency fm

-Vm

Csp

Csn×××× LPF

ain

Vmod

Vo

VoVmod

t (s)

fm

LPF removes the 2x carrier-frequencysignal; induced phase lag depends onthe pole of the LPF

ain

p/s ω+1

1

ENE 5400 , Spring 2004 14

Modulation

Required because capacitance can’t be sensed at DC At the same time can avoid the 1/f noise at the low

frequencies How is the modulation frequency related to the circuit and the

fabrication technology? Z = 1 / (2ππππfC); ~16 MΩΩΩΩ for f = 100 kHz and C = 100 fF.

Therefore the sensing circuit must have comparably high input impedance to avoid substantial signal attenuation

» CMOS is a good candidate than bipolar junction transistors (BJT); however its 1/f noise is worse than BJT

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ENE 5400 , Spring 2004 15

Example: Analog Multiplier (the Gilbert Cell)

Can perform modulation and demodulation Think about sinωωωω1t*sinωωωω2t

Can provide a gain larger than one

V1 is the carrier, and V2 is the modulated signal from sensor

Think of that Q3, Q4, Q5, and Q6 as switches that alternatively turn on to pass bias current (e.g. when Q3 and Q6 are on, then Q4 and Q5 are off, and vice versa)

Reference: Gray and Meyer, Analysisand design of analog integrated circuits

+_ Vout

RL RL

ENE 5400 , Spring 2004 16

Cont’d

RL

Vout

V2

ic3 ic6

IEE

RL

Q1 Q2

1st ½ cycle: Q3 and Q6 on

RLVout

V2

ic4 ic5

IEE

RL

Q1 Q2

2nd ½ cycle: Q4 and Q5 on

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ENE 5400 , Spring 2004 17

Capacitive Position Sensing

mps

ssense V

xx

CCC

V02

2++++

====

Csp

Csn

Vsense

Vmp

-Vmn

x

For small-displacement parallel-plate capacitors (x << xo) :

oos xAC /εεεε====

xo

ENE 5400 , Spring 2004 18

Fully-Differential Capacitive Sensing

Doubled sensitivity than differential sensing Improves the interference rejection with higher common-mode

rejection ratio (CMRR) and power supply rejection ratio (PSRR)

mops

ssensensensepsense V

xx

CCC

VVV ⋅⋅⋅⋅⋅⋅⋅⋅++++

====−−−−====2

4Routing shown is on a

CMOS-MEMS accelerometer

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ENE 5400 , Spring 2004 19

Sensitivity

What would you do to increase sensitivity? Can the amplitude of the modulation voltage be

arbitrary large?

2

12

4

no

m

ps

s

in

sense

xV

CCC

aV

ωωωω⋅⋅⋅⋅⋅⋅⋅⋅

++++====

ENE 5400 , Spring 2004 20

Spring-Softening Effect

Reduces resonant frequency and possible destabilization if the electrical spring ke completely negates the mechanical spring constant

Vs

Vm

-Vm

Csp

Csn

(stator)

(stator)

(rotor)

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ENE 5400 , Spring 2004 21

Performance Comparison

[Bernstein,99]

[Yazdi,99]

[Smith,94]

[Lu,95]

[ADXL105][Lemkin,97]

[Zhang,99][Luo,00]

This work

0.1

1

10

100

1000

10000

0.1 1 10 100 1000 10000 100000

Capacitance Sensitivity (fF/g)

No

ise

Flo

or

(ug

/rtH

z)

Si bulkPoly thin-filmCMOS MEMS

[Wu, 2002]

A better design achieves lower noise floor at the same capacitive sensitivity

ENE 5400 , Spring 2004 22

Capacitive Sensing Circuits

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ENE 5400 , Spring 2004 23

Continuous-Time Voltage Sensing

Use ac modulation voltage; general topologies include: Capacitive feedback

» An a.c. virtual ground is provided so it is parasitic-insensitive

Open-loop» Not parasitic-insensitive

Vm

-Vm

Csp

CsnRb

Vm

-Vm

Csp

Csn +

_

Cf

Rb

ENE 5400 , Spring 2004 24

Continuous-Time Voltage Sensing

In CMOS, the requires dc bias at the high-impedance sensing node can be realized by: A large resistor (large occupied area) A reversed-biased diode (leakage would shift the dc bias) A MOS transistor operated in the sub-threshold region A turned-off MOS switch A reset MOS transistor

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ENE 5400 , Spring 2004 25

Continuous-Time Current Sensing

Processes the a.c. current Provides a virtual ground and robust d.c. biasing Essentially uses a differentiator which has high-pass frequency

response ⇒ noise amplification Not an attractive choice

Vm

-Vm

Csp

Csn +

_

Rf

ENE 5400 , Spring 2004 26

Switch-Capacitor Sensing Circuits

It is a natural approach to transfer the accumulated charge on asensing capacitor to a sensed voltage output

DO NOT need ac modulation voltage; the continuous switching action would set the dc bias at the high-impedance capacitive node

The switching action also produces a pulsed output, which after a holding and a LPF circuits, becomes the smoothed basebandsensed signal No demodulation required

Operate as discrete-time signal processors; analyzed by the z-transform technique

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ENE 5400 , Spring 2004 27

Equivalent Resistor using a Switched Capacitor

Compare the transferred charges within ∆∆∆∆T:

V1

V2

R

∆∆∆∆Q = (V1 – V2)∆∆∆∆T/R ∆∆∆∆Q = C(V1 – V2)CT

R∆∆∆∆====

φ1 φ2

C

V2V1S1 S2

S1 and S2 close and open on alternate phases: (1 cycle = ∆∆∆∆T)(1)(1)(1)(1) φφφφ1 on: C charges to V1. ∆∆∆∆Q = CV1(2)(2)(2)(2) φφφφ2 on: C discharges to V2. ∆∆∆∆Q = C(V1 – V2)(3)Next φφφφ1 onExample: 16 MΩΩΩΩ resistor simulated with 1 pF capacitor, ∆∆∆∆T = 160 µµµµs;easily achieved with modern CMOS

ENE 5400 , Spring 2004 28

Discretization Issues

Current in SC circuit flows in “pulses” The lower the clock period, the better approximation to the true,

continuous current profile

∆T 2∆T 3∆T t

i(t)v(t)/R

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ENE 5400 , Spring 2004 29

Timing Issue

The two clock phases should not overlap during on and off

φ1 φ2

C

V2V1S1 S2

φφφφ1

φφφφ2

∆∆∆∆T

Non-overlap

ENE 5400 , Spring 2004 30

A Simple SC Integrator

Replace R with a switched capacitor:

If parasitic capacitances are not considered, the discrete-timetransfer function is: (notice there is a half-cycle delay, see why?)

1

1

2

1

1)( −−−−

−−−−

−−−−−−−−====

zz

CC

zH

φ1 φ2

C1

S1 S2

C2

+

_Vi

Vo

delay

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ENE 5400 , Spring 2004 31

A Simple SC Integrator

However that integrator is parasitic-sensitive

poly1

poly2Cp1

Cp2

C1metal

φ1 φ2

C1

ViS1 S2

C2

+

_

Cp1Cp2

Cp3

Cp4

1

1

2

11

1)()( −−−−

−−−−

−−−−++++

−−−−====z

zC

CCzH p

Vo

silicon

ENE 5400 , Spring 2004 32

Parasitic-Insensitive SC Integrator

Parasitic capacitances at C1 are made insensitive because they are all discharged to ground after the φφφφ2 clock

No delay in the integrator; Vi directly charges C1 and through C2to change Vo

φφφφ1

φφφφ2222

C1C2

+

_Vi

Vo

φφφφ1

φφφφ2222

12

1

11

)( −−−−−−−−−−−−====

zCC

zH

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ENE 5400 , Spring 2004 33

Switched-Capacitor Sensing Circuit

φφφφ1 on, charge C1; Q1 = C1Vs

φφφφ2 on, Q1 is transferred to C2 until the virtual ground is reached

Provide robust DC biasing without having to use specific bias scheme

so VCC

V2

1====

φφφφ1 C1(x) C2

+

_Vs

Vo

φφφφ2222

φφφφ1φφφφ1

φφφφ2

(actual gain depends on the duty cycle)

ENE 5400 , Spring 2004 34

Cont’d: Vo with a Sinusoidal Change on C1(x)

t

Vo(t) Pulsed output

After holding and LPF

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ENE 5400 , Spring 2004 35

Non-ideality Cancellation

ENE 5400 , Spring 2004 36

Circuit and Sensor Offsets

The CMOS circuits have offset on the order of 1 - 10 mV (@ d.c.) Worse for minimum-length devices in differential amplifiers Saturation can easily occur if a signal amplification of 100 to

1000 is required Mismatch of sensing capacitances (a position offset) results in a

signal at the modulation frequency, and thus a dc offset after demodulation

0 fm

circuit offset sensor offset

circuit noise

Brownian noise

sensed signal (weak)

f (Hz)

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ENE 5400 , Spring 2004 37

Circuit Offset

Methods of d.c. offset cancellation ac-coupling capacitance dc feedback Chopper stabilization (CHS) Correlated Double Sampling (CDS)

1/f noise can be reduced by CHS and CDS

Vin Vo

a.c. coupling

ENE 5400 , Spring 2004 38

DC Feedback for Offset Cancellation

Uses a low-pass filter in the feedback loop to realize a high-pass frequency response A offset reduction of (1 + A2); Vo = A1Voff/(1+A2)

+_Voff VoA1

A2F(s)

p/s ω+1

1

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ENE 5400 , Spring 2004 39

Cont’d

+_Voff VoA1

A2F(s)

p/s ω+1

1

V1 E

ENE 5400 , Spring 2004 40

Chopper Stabilization

Introduced about 50 years ago to realizing high precision d.c. gains with ac-coupled amplifiers “Chopper” originates from the use of mechanical choppers;

now can be integrated on-chip by electronic switches A “modulation” technique to reduce d.c. offset and 1/f noise

Key: the signal is modulated, amplified, and demodulated back to the base band, while the offset and noise is only modulated once to high frequencies

×××× + Av ××××Vin Vout

Vnoise + VoffsetVcarrier

Vcarrier

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ENE 5400 , Spring 2004 41

Example of a Fully Differential CHS Capacitive Readout Circuit

Vrefp and Vrefn are stable d.c. voltage sources; the alternating switching actions (choppers) are similar to using two modulatingac voltage sources with opposite phases (why doing this?)

Demodulation is realized by alternating switching actions

(low-pass filtering)

ENE 5400 , Spring 2004 42

Correlated Double Sampling

Reduces circuit offset and 1/f noise; usually applied in the SC circuits

Requires two phases (φφφφ1, φφφφ2) in a sampling period to sample and subtract the offset

+

_VinVout

C1

C2

φ1

φ1

φ1

φ2

φ2

+_ Voff

φ1

T 2T

T

3Tφ2

T 2T

T

3T

A

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ENE 5400 , Spring 2004 43

Correlated Double Sampling

φφφφ1 is on:

φφφφ2 is on:

=−

=−

=

)T

nT(q

)T

nT(q

VA

2

2

2

1

+

_VinVout

C1

C2

+_Voff

+

_Vout

C1

C2

+_Voff

+_

+ _

==

=

)nT(q

)nT(q

VA

2

1

+ _

_+

A

A

ENE 5400 , Spring 2004 44

Correlated Double Sampling

Charge conservation at node A:

The output is delayed by T / 2 without the offset voltage