8/9/2019 Lecture 1 8085

1/48

Topics

1. Introduction

2. Programming model of 8085

3. Instruction set of 80854. Example Programs

5. Addressing modes of 8085

. Instruction ! "ata #ormats of 8085

8/9/2019 Lecture 1 8085

2/48

1. Introduction

$  A microprocessor  executes instructions gi%en &'

t(e user

$ Instructions s(ould &e in a language )no*n to

t(e microprocessor $ +icroprocessor  understands t(e language of 0,s

and 1,s onl'

$ T(is language is called Machine Language

8/9/2019 Lecture 1 8085

3/48

$ #or e.g.

01001111

 - Is a %alid mac(ine language instruction of

8085

 - It copies t(e contents of one of t(e internal

registers of 8085 to anot(er

8/9/2019 Lecture 1 8085

4/48

 A +ac(ine language program to

add t*o num&ers

00111110 /op' %alue 2 in register A

0000001000000110 /op' %alue 4 in register

00000100

10000000 A A

8/9/2019 Lecture 1 8085

5/48

 Assem&l' anguage of 8085

$ It uses Englis( li)e *ords to con%e' t(e

actionmeaning

$#or e.g. - +67  to indicate data transfer 

 - A""  to add t*o %alues

 - 9  to su&tract t*o %alues

8/9/2019 Lecture 1 8085

6/48

 Assem&l' language program to add

t*o num&ers

+7I  A: 2 /op' %alue 2 in register A

+7I : 4 /op' %alue 4 in register

 A""  A A

;ote<

$  Assem&l' language is specific to a gi%en

processor 

$ #or e.g. assem&l' language of 8085 is different

t(an t(at of +otorola 800 microprocessor 

8/9/2019 Lecture 1 8085

7/48

+icroprocessor  understands +ac(ine anguage onl'=

$ +icroprocessor  cannot understand a program

*ritten in Assem&l' language

$  A program )no*n as Assembler  is used to

con%ert a Assem&l' language program tomac(ine language

 Assem&l'

anguage

Program

 Assem&ler 

Program

+ac(ine

anguage

/ode

8/9/2019 Lecture 1 8085

8/48

o*>le%elig(>le%el languages

$ +ac(ine language and Assem&l' language are&ot(

 - +icroprocessor specific ?Machine dependent@

so t(e' are called - o*>le%el languages

$ Machine independent languages are called

 - ig(>le%el languages

 - #or e.g. AI/: PA/A:/:/:A7A: etc.

 - A soft*are called Compiler  is reBuired tocon%ert a (ig(>le%el language program to

mac(ine code

8/9/2019 Lecture 1 8085

9/48

+I/C6PC6/E6C

$ +icroprocessor is a

multipurpose:programma&le:cloc)

dri%en:register &ased electronic de%ice

t(at reads &inar' instructions from storage

de%ice called memor':accepts &inar' data

as ip and process data accordingl'

8/9/2019 Lecture 1 8085

10/48

2. Programming model of 8085

Accumulator 

ALU

Flags

InstructionDecoder 

Register Array

Memory Pointer

Registers

Timing and Control Unit

1!bit

Address "us

#!bit Data

"us

Control "us

8/9/2019 Lecture 1 8085

11/48

Accumulator (8-bit) Flag Register (8-bit)

B (8-bit) C (8-bit)

D (8-bit) E (8-bit)

H (8-bit) L (8-bit)Stack Pointer (SP) (!-bit)

Program Counter (PC) (!-bit)

S Z AC P CY

1! Lines

Unidirectional

#! Lines

"idirectional

8/9/2019 Lecture 1 8085

12/48

 - T(ere is also t(e flags register *(ose &its are affected &' t(e arit(metic ! logicoperations.

$ >sign flag

 - T(e sign flag is set if &it "D of t(e accumulator is set after an arit(metic orlogic operation.

 - 0> 7e 1> >7e

$ >Fero flag - et if t(e result of t(e A9 operation is 0. 6t(er*ise is reset. T(is flag is

affected &' operations on t(e accumulator as *ell as ot(er registers. ?"/C@.

$  A/>Auxiliar' /arr'

 - T(is flag is set *(en a carr' is generated from &it "3 and passed to "4 .T(is flag is used onl' internall' for /" operations.

$ P>Parit' flag -  After an A9 operation if t(e result (as an e%en no of 1,s t(e p>flag is set.

6t(er*ise it is cleared. o: t(e flag can &e used to indicate e%en parit'.

$ /G>carr' flag

 - /G carr' is set *(en result generates a carr'. Also a &orro* flag.

$ % AC P C&

8/9/2019 Lecture 1 8085

13/48

8/9/2019 Lecture 1 8085

14/48

8/9/2019 Lecture 1 8085

15/48

6%er%ie*< 8085 Programming model 

1. ix general>purpose Cegisters

2. Accumulator Cegister 

3. #lag Cegister 4. Program /ounter Cegister 

5. tac) Pointer Cegister 

8/9/2019 Lecture 1 8085

16/48

1' $i( general!purpose registers

 - : /: ": E: :

 - /an &e com&ined as register pairs toperform 1>&it operations ?/: "E: @

)' Accumulator * identi+ied by name A - T(is register is a part of A9

 - 8>&it data storage

 - Performs arit(metic and logical operations

 - Cesult of an operation is stored inaccumulator 

8/9/2019 Lecture 1 8085

17/48

,' Flag Register 

 - T(is is also a part of A9

 - 8085 (as fi%e flags named

$ %ero flag ?@

$ Carry flag ?/G@

$ $ign flag ?@

$ Parity flag ?P@

$ Au(iliary Carry flag ?A/@

8/9/2019 Lecture 1 8085

18/48

$ T(ese flags are fi%e flip>flops in flag register 

$ Execution of an arit(meticlogic operation can

set or reset t(ese flags

$ /ondition of flags ?set or reset@ can &e tested

t(roug( soft*are instructions

$ 8085 uses t(ese flags in decision>ma)ing

process

8/9/2019 Lecture 1 8085

19/48

-' Program Counter .PC/

 -  A 1>&it memor' pointer register  - 9sed to seBuence execution of program

instructions - tores address of a memor' location

$ *(ere next instruction &'te is to &e fetc(ed&' t(e 8085

 - *(en 8085 gets &us' to fetc( currentinstruction from memor'

$ P/ is incremented &' one$ P/ is no* pointing to t(e address of next

instruction

 

8/9/2019 Lecture 1 8085

20/48

0' $tac Pointer Register 

 - a 1>&it memor' pointer register  - Points to a location in $tac memor'

 - eginning of t(e stac) is defined &' loading

a 1>&it address in stac) pointer register 

8/9/2019 Lecture 1 8085

21/48

8085 9 AC/ITE/T9CE

8/9/2019 Lecture 1 8085

22/48

2hat is Address "us3 Data "us and Control "us in Microprocessor 4 2hatare the di++erences bet5een them6

+icroprocessor is processing de%ice of e%er' computing de%ice. It is li)e an artificial

&rain. It needs to communicate *it( outer *orld. for example: It needs to

communicate *it( Input de%ices to get data:it needs to communicate *it( memor'

to process data according to instructions *ritten in memor' and finall' it needs to

communicate *it( output de%ices to displa' t(e output on 6P de%ices. Tocommunicate *it( external *orld: +icroprocessor ma)e use of &uses. T(ere are

different t'pes of &uses used in +icroprocessor<

Address "us< It is a group of *ires or lines t(at are used to transfer t(e addresses

of +emor' or I6 de%ices. It is unidirectional.In Intel 8085 microprocessor: Address

&us *as of 1 &its. T(is means t(at +icroprocessor 8085 can transfer maximum 1

&it address *(ic( means it can address 5:53 different memor' locations. T(is&us is multiplexed *it( 8 &it data &us. o t(e most significant &its ?+@ of address

goes t(roug( Address &us ?AD>A0@ and goes t(roug( multiplexed data &us

?A"0>A"D@.

8/9/2019 Lecture 1 8085

23/48

Data "us

8/9/2019 Lecture 1 8085

24/48

8085 +icroprocessorArc(itecture

8/9/2019 Lecture 1 8085

25/48

T(e a&o%e diagram s(o*s pin diagram for 8085A

$ It is a 8>&it general purpose p capa&le of addressing 4J ofmemor'

$ "e%ice (as 40 pins:reBuires 57 single po*er suppl' and can

operate *it( 3+F single p(ase cloc)$ All t(e signals are classified into six groups

1. address &us 2. data &us 3 . control and status signal 4. po*ersuppl' and freBuenc' signal 5. Externall' initiated signals

  .serial I6 ports

 A""CE 9< (as 1 address lines and split into t*o segments<

 A15>A8 and A"D>A"0.

 A15>A8< ig(er order address &us and are unidirectional

 A"D>A"0

8/9/2019 Lecture 1 8085

26/48

8/9/2019 Lecture 1 8085

27/48

$ Ta)e 20?00100000@ address on (ig(er order &us and05?00000101@ address on lo* order &us and et 4#(?01001111@ &e t(e data.

$ 1st address needs to &e latc(ed and used for identif'ing t(e memor'address.

$ T(e address *ill t(en c(age to 2005>204#

$ #ig s(o*s demultiplexing t(e &us A"D>A"0

8/9/2019 Lecture 1 8085

28/48

2./ontrol and status signal<

T*o control signal< C" and HC

ot( are acti%e lo* C" indicates t(at selected Io 6r memor' de%ice isto &e read and data are a%aila&le on data &us

HC indicates data a%aila&le on data&us is to &e *ritten on selectedmemor' or I6 location.

T(ree tatus signals are< I6+ :1: ans 0<

 I6+

8/9/2019 Lecture 1 8085

29/48

I78M $1 $9 Controlsignal.allsignalsacti:e lo5/

6pcode fetc( 0 1 1 C"0

+emor' read 0 1 0 C"0

+emor' Hrite 0 0 1 HC0

I6 Cead 1 1 0 C"0I6 Hrite 1 0 1 HC0

Interruptac)no*ledge

1 1 1 I;TA0

alt 0 0

old L L C"HCI;TA1

Ceset L L

8/9/2019 Lecture 1 8085

30/48

8085 interrupts and externall' initiated signals<

$ I;TC?input@

8/9/2019 Lecture 1 8085

31/48

8/9/2019 Lecture 1 8085

32/48

8/9/2019 Lecture 1 8085

33/48

8/9/2019 Lecture 1 8085

34/48

8/9/2019 Lecture 1 8085

35/48

8/9/2019 Lecture 1 8085

36/48

8/9/2019 Lecture 1 8085

37/48

8/9/2019 Lecture 1 8085

38/48

8/9/2019 Lecture 1 8085

39/48

8/9/2019 Lecture 1 8085

40/48

8/9/2019 Lecture 1 8085

41/48

8/9/2019 Lecture 1 8085

42/48

8/9/2019 Lecture 1 8085

43/48

8/9/2019 Lecture 1 8085

44/48

8/9/2019 Lecture 1 8085

45/48

8/9/2019 Lecture 1 8085

46/48

8/9/2019 Lecture 1 8085

47/48

8/9/2019 Lecture 1 8085

48/48