lab-measurement results on izm thin assemblies
DESCRIPTION
Lab-measurement results on IZM thin assemblies. Mathieu Benoit . Outline. Assembly process Methodology Results . Sensor production and procurement : Bumping at IZM. Micron Sensor Wafer were sent to IZM for Under-Bump Metallization and assembly to Timepix and Medipix3RX ASIC - PowerPoint PPT PresentationTRANSCRIPT
Lab-measurement results on IZM thin assemblies
Mathieu Benoit
Outline
• Assembly process
• Methodology
• Results
Sensor production and procurement : Bumping at IZM
Micron Sensor Wafer were sent to IZM for Under-Bump Metallization and assembly to Timepix and Medipix3RX ASIC• 10 Sensor wafers processed by IZM
• Thickness: 100,150,200,300,650,1500 um • wafer <= 200 um thickness attached to handle
wafer for processing
100um-on-100um assembly
Methodology• After wire-bonding, chip is powered,
sensor biased at 40V• Chip threshold equalization is
performed twice, mask pattern is written to disk– First equalisation lead to weird masked
pixel pattern (checkboard)– Second equalization works usually fine
• An image of a Sr90 source is taken with Exposure time of 30s (every pixel should see some energy deposition)
• A simple algorithm count how many pixel see no or too little signal (<20% of neighbors) and compare to mask
C03-W0126 (100-on-100um) Masked pixels
C03-W0126 (100-on-100um) Sr90, 30s Exposure
229 masked pixel in C03-W012635567 pixel with no Sr90 in C03-W0126
J08-W0126 (100-on-100um) Masked pixels
J08-W0126 (100-on-100um) Sr90, 30s Exposure
56 masked pixel in J08-W012656 pixel with no Sr90 in J08-W0126
J10-W0126 (100-on-100um) Masked pixels
J10-W0126 (100-on-100um) Sr90, 30s Exposure
190 masked pixel in J10-W0126195 pixel with no Sr90 in J10-W0126
K04-W0126 (100-on-100um) Masked pixels
K04-W0126 (100-on-100um) Sr90, 30s Exposure
52 masked pixel in K04-W012652 pixel with no Sr90 in K04-W0126
K05-W0126 (100-on-100um) Masked pixels
K05-W0126 (100-on-100um) Sr90, 30s Exposure
28 masked pixel in K05-W012639 pixel with no Sr90 in K05-W0126
K06-W0126 (100-on-100um) Masked pixels
K06-W0126 (100-on-100um) Sr90, 30s Exposure
31 masked pixel in K06-W012631 pixel with no Sr90 in K06-W0126
Conclusion• New assemblies show pretty good yield for the bumping of 100um ASIC to
100um Sensors (5/6 perfect sensors)
• Only one assembly with a catastrophic failure, plan to send it back to IZM for further X-Ray study, chip was fine before wire-bonding– Ian mention that assemblies were quite fragile– Maybe lift-off occurred during wire-bonding process
• 4 more assemblies with 150um n-in-p on 100um currently at the bonding lab
This is now our thinnest full functional module we ever did using this technology.I forwarded this results immediately to all colleagues involved in this task.
Thomas Fritzsch, IZM
Hitmap, 100 on 100 um Assemblies
Unconnected pixels