k75f mlb memswap - assistenza apple · 27 k75f_mlb 28 chipset support 04/14/2010 26 k75f_mlb 26...

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DRAWING

DRAWING

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3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT

3

B

7

ECNREV

BRANCH

DRAWING NUMBER

REVISION

SIZE

D

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

DRAWING TITLE

THE POSESSOR AGREES TO THE FOLLOWING:

Apple Inc.

SHEET

R

DATE

D

A

C

THE INFORMATION CONTAINED HEREIN IS THE

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

C

3456

D

B

8 7 6 5 4 2 1

12

APPDCK

DESCRIPTION OF REVISION

K75F MLB_MEMSWAP

1 OF 92

0000892544A

051-8600

A.0.0

1 OF 110

PRODUCTION RELEASED 2010-04-15

04/14/2010

K75F_MLB4852

SMBus Connections

04/14/2010

K75F_MLB4751

LPC+SPI Debug Connector

04/14/2010

K75F_MLB4650

SMC Support

04/14/2010

K75F_MLB4549

SMC

04/14/2010

K75F_MLB4447

Internal USB Connections

04/14/2010

K75F_MLB4346

EXTERNAL USB CONNECTORS

04/14/2010

K75F_MLB4245

SATA Connectors

04/14/2010

K75F_MLB4143

FIREWIRE CONNECTOR

04/14/2010

K75F_MLB4042

FW: 1394B MISC

04/14/2010

K75F_MLB3941

FireWire LLC/PHY (XIO2213B)

04/14/2010

K75F_MLB3839

ETHERNET CONNECTOR

04/14/2010

K75F_MLB3738

CAESAR II SUPPORT

04/14/2010

K75F_MLB3637

ETHERNET (CAESAR II)

04/14/2010

K75F_MLB3536

USB HUB 2

04/14/2010

K75F_MLB3435

USB HUB 1

04/14/2010

K75F_MLB3334

PCI-E Wireless Connector

04/14/2010

K75F_MLB3233

DDR3 SUPPORT AND BITSWAPS

04/14/2010

K75F_MLB3132

DDR3 SO-DIMM CONNECTOR B

04/14/2010

K75F_MLB3031

DDR3 SO-DIMMs 0 & 2

04/14/2010

K75F_MLB2930

MEMORY CAPS

04/14/2010

K75F_MLB2829

DDR3 VREF MARGINING

04/14/2010

K75F_MLB2728

CHIPSET SUPPORT

04/14/2010

K75F_MLB2626

CLOCK (CK505)

04/14/2010

K75F_MLB2525

EXTENDED DEBUG PORT(XDP)

04/14/2010

K75F_MLB2424

PCH DECOUPLING

04/14/2010

K75F_MLB2323

PCH GROUNDS

04/14/2010

K75F_MLB2222

PCH POWER

04/14/2010

K75F_MLB2121

PCH MISC

04/14/2010

K75F_MLB2020

PCH PCI/FLASHCACHE/USB

04/14/2010

K75F_MLB1919

PCH DMI/FDI/GRAPHICS

04/14/2010

K75F_MLB1818

PCH SATA/PCIE/CLK/LPC/SPI

04/14/2010

K75F_MLB1717

CPU/PCH GFX DECOUPLING

04/14/2010

K75F_MLB1616

CPU NON-GFX DECOUPLING

04/14/2010

K75F_MLB1515

STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU

04/14/2010

K75F_MLB1414

CPU GROUNDS

04/14/2010

K75F_MLB1313

CPU POWER

04/14/2010

K75F_MLB1212

CPU DDR3 INTERFACES

04/14/2010

K75F_MLB1111

CPU CLOCK/MISC/JTAG

04/14/2010

K75F_MLB1010

CPU DMI/PEG/FDI/RSVD

04/14/2010

K75F_MLB99

Signal Aliases

04/14/2010

K75F_MLB88

UNUSED SIGNAL ALIAS

04/14/2010

K75F_MLB77

Holes

04/14/2010

K75F_MLB66

Power Conn / Alias

04/14/2010

K75F_MLB55

PROTO 0 DEBUG LEDS

04/14/2010

K75F_MLB22

System Block Diagram

K22/K23 ICT/FCT110

K75F_MLB

04/14/2010

91PM RESETS ENABLES PGOOD CONST

109

K75F_MLB

04/14/2010

90POWER CONSTRAINTS

107

K75F_MLB

04/14/2010

89SMC Constraints

106

K75F_MLB

04/14/2010

88GRAPHICS CONSTRAINTS

105

K75F_MLB

04/14/2010

87ENET/FIREWIRE CONSTRAINTS

104

K75F_MLB

04/14/2010

86IBEX PEAK CONSTRAINTS

103

K75F_MLB

04/14/2010

85PCIE/DMI/FDI/SATA CONSTRAINTS

102

K75F_MLB

04/14/2010

84Memory Constraints

101

K75F_MLB

04/14/2010

83K60/K61 RULE DEFINITIONS

100

K75F_MLB

04/14/2010

82Display: BiDiVi Support

95

K75F_MLB

04/14/2010

81Display: Ext DP Connector

94

K75F_MLB

04/14/2010

80BIDIVI DP MUX2

92

K75F_MLB

04/14/2010

79Display: BiDiVi Mux1

91

K75F_MLB

04/14/2010

78Display: Int DP Connector

90

K75F_MLB

04/14/2010

77Display: Aliases

87

K75F_MLB

04/14/2010

76MXM PCIE CAPS

86

K75F_MLB

04/14/2010

75MXM I/O

85

K75F_MLB

04/14/2010

74MXM PCIe, DP & Power

84

K75F_MLB

04/14/2010

73S3+S0 FETS

80

K75F_MLB

04/14/2010

721.05 S5 SUPPLY

79

K75F_MLB

04/14/2010

711.5V / 1.8V VREGS

78

K75F_MLB

04/14/2010

705V_S3 / 3V3_S5 VREGS

77

K75F_MLB

04/14/2010

69IBEX PEAK CORE

76

K75F_MLB

04/14/2010

68CPU VTT REGULATOR

74

K75F_MLB

04/14/2010

67VREG: CPU CORE - PHASE 4

73

K75F_MLB

04/14/2010

66VREG: CPU CORE - PHASES 1-3

72

K75F_MLB

04/14/2010

65VREG: PPVCORE_S0_CPU

71

K75F_MLB

04/14/2010

64POWER SEQUENCING PGOOD

70

K75F_MLB

04/14/2010

63POWER SEQUENCING ENABLES

69

K75F_MLB

04/14/2010

62AUDIO: Mikey

68

K75F_MLB

04/14/2010

61AUDIO: Detects/Grounding

67

K75F_MLB

04/14/2010

60Audio: MLB to I/O Conn.

66

K75F_MLB

04/14/2010

59AUDIO: Woofer Amp

65

K75F_MLB

04/14/2010

58AUDIO: Tweeter Amp 1

64

K75F_MLB

04/14/2010

57AUDIO: FILTER/BUFFER

63

K75F_MLB

04/14/2010

56AUDIO: CODEC/REGULATOR

62

K75F_MLB

04/14/2010

55SPI ROM

61

K75F_MLB

04/14/2010

54CPU FAN

57

K75F_MLB

04/14/2010

53HD AND OD FAN

56

K75F_MLB

04/14/2010

52Thermal Sensors

55

K75F_MLB

04/14/2010

51GRAPHICS / DIMM POWER SENSE

54

K75F_MLB

04/14/2010

50

LAST_MODIFIED=Thu Apr 15 11:21:16 2010

TITLE=K22

ABBREV=DRAWING

LAST_MODIFIED=Thu Apr 15 11:21:16 2010

Page(.csa) Date

SyncContentsCPU POWER SENSE

53

K75F_MLB

04/14/2010

49

04/14/2010

K75F_MLB44

BOM Configuration

04/14/2010

K75F_MLB33

Power Block Diagram

04/14/2010

K75F_MLB11

Table of Contents

ContentsDate(.csa)

Page Sync

SCH,K75F,MLB_MEMSWAP

苹果笔记本维修交流群群号：325742634


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II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:


36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR

IV ALL RIGHTS RESERVED

SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

U6806

J4700

MIKEY

(UP TO 14 DEVICES)

USX2061USX2061

SKIN TEMP LCD TEMP

DDR3 1333 CHB

DDR3 1333 CHA

FDI LINK

DISPLAY PORT CONN

SATA-A1

MIDBUS PROBE

X4 DMI

SO-DIMMS

SO-DIMMS

XDP CONNPG 25

J2500

Port80,serialPG 51

PG 56,57

XDP

E-NETCONNECTOR

J3900

(PORT B)

(PORT D)

X1 PCIE GEN1 LANE 2.5GBITPSE-NETMAGNETICS

PG 39

T3900

INTEL

PG 18

X1 PCIE GEN1 LANE 2.5GBITPS

HW

U93XX

LPC

INTERFACE

PG 18

PG 19

DMI INTERFACE XDP CONN

PG 18

HDMI/DVI/DP

PG 19

PG 19

PG 18

PG 18

PG 18

PG 20

PG 18

PG 19

PG 19

PG 20

U1800

PG 25

U2510

PG 38 PG 39

05

67

8910

11

(SUPPORTED UPTO 4 REQ/GNT)

FDI INTERFACE

J8400X4 DP

X4 DP

U2600

INTEL CPU

SPIBoot ROM

CPU DIE-PECI HARD DRIVEOPTICAL DRIVE

PG 13

U6100

PG 32

PG 31

J3200, J3200

J3100, J3100

PG 93

SUPPORT

BIDIVI

PG 53 POWER SENSE

PG 55

TEMP, CURRENT SENSE

TEMP SENSORSMXM - GPU DIE

CPU HEATSINK

AMBIENT INTAKE

TO BIDIVI HW

FAN CONN AND CONTROL

PCI

X16 PCI-E GEN2

13

2 SO-DIMMS

PG 10

POWER SUPPLY

Fan

J4300

SPI

B,0 BSB

SMCADC

PG 34

GPIOs

PG 43

AirPortMini PCI-E

PG 49

U4900

HDA

6 SATA 2.O PORTS

HDMI/DVI/DP

DIGITAL VIDEO OUTPUT

RGB OUT

ConnFireWire

J3400


(PORT C)

PG 41

U4100

HDMI/DVI/DP

SMB

GB E-NET

U1000

2 SO-DIMMS

J5100

PrtSer

PG 61

J5600, J5601, J5700

CLK

LPC+SPI CONN

Misc

GPU HEATSINK

PG 84

J9002

J9400

PG 90

X4 DP

CONTROL LOGIC FROM SMC

INTERNAL DISP

X4 BIDIRECTIONAL DP LINK

PG 94


(PORT A)

ANALOG VIDEO OUTPUT

SATA IBEX PEAK

SATA-A2

SATA-A0

SYNTH

SATA 2.0 3GHZ.

PG 26CK505

HDPG 45

SATA CONN

J4510

J4520

PG 45

ODDSATA CONN

PG 45

SATA CONN

J4530

SSD

PCI-E GEN2

UP TO 8 LANES3

X1 PCIE GEN1 LANE 2.5GBITPS

U6201

Audio

Audio

Conns

Codec

U6400, U6500

SPEAKER AMPS

HEADPHONES INTERNAL/EXTERNAL

MICROPHONES LINE INPUT

J6600,J6601,J6602,J6603

MXM CONNECTOR

LGA1156 - CLARKDALE/LYNNFIELD

USB 96MHZ/PCIE 100MHZ/SATA 100MHZ/BCLK 133MHZ.

SATA 2.0 3GHZ.

SATA 2.0 3GHZ.

CONTROLLER

U3800

BCM5764M

AND PHY

XIO2211TI 1394B

DIMM’s

12

34

PWR

USB 2.0

CTRL

12

PG 46

J4630

PORT0 EXT PORT2

EXT

J4610

PG 46

43

IR

USB HUB 1

PG 35

J4780

PG 47

CAMERA

PG 47

21

J4620

PG 46

PORT1

PG 46

EXT

J4620

432

PG 36

J4750

SD CARD

USB HUB 2

PG 47

BLUETOOTH

PG 47

J4720

1

EXT PORT3

SYNC_DATE=04/14/2010

System Block DiagramSYNC_MASTER=K75F_MLB

2 OF 110

A.0.0

051-8600

2 OF 92


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G S

D

IN

D1

D3

D4S3S2

GATE

S1D2




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PAGE


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D

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8 7 5 4 2 1

PP3V3_S5_AVREF_SMC

PAGE 50

PP12V_S5:

12V_S5

SMCPP3V42_G3H_REG

CAMERAPP5V_S3_REG

WM

IBEX PEAK

PP12V_S5

PM_SMC_G2_EN

PPVCORE_CPU

PAGE 71-72

IBEX PEAK

MXM

PP12V_S0_HDD

AC/DC POWER SUPPLY

FET (6.9A)

PAGE 42

1.0V @ 0.08A

MAIN MEMORY

PM_SLP_S3

PAGE 79REG

SMC VREF

CARD READER

PP1V8_S0_REG

MXMOPTICAL

LCD PANELIBEX PEAKAUDIO

P3V3S3_EN

PAGE 79

VCCME, PCH

P5VS0_EN

3.3V @ 2.8A

PAGE 80

PP3V3_S5_REG3.3V @ 6.2A

AUDIO

PP1V95_S3

PAGE 76

1.1V @ 30APPVTT_S0

.65-1.5V @ 90A

PP1V05_S5

IBEX PEAKPAGE 76

FANS

PP1V05_S01.05V @ 3A

FET (10.3A)

ETHERNET

FET (2.8A)

PPDDR_S3_REG

P3V3S0_EN

BIDIVI FIREWIRE

BOOT ROM

MXMPP3V3_S0

HDD

1.05V @ 0.4A

AP

PP12V_G3H

PP5V_S0

PP12V_S0:

PP12V_S0

PM_SLP_S3_OD

HARD DRIVELCD PANEL

AUDIOPP12V_G3H:

PAGE 80

CONTROL

CPU UNCORE

SMBUS

1.5V @ 4.9A

PAGE 78

SW (1A)

CPU MEM

BT

PP1V5_S0

PP12V_S312V @ 0.2A

PAGE 80

WM

P12VS0_EN

ENET

PAGE 38

1.2V @ 0.2APP1V2_S3

13A (S3 & S0)

PAGE 74

PAGE 75

PAGE 75

0.75V @ 0.6APP0V75_S0

MEM_VTT

FIREWIREAUDIO

PP3V3_S3

PAGE 80

FW

PAGE 78

CPU PLL

IR

USB

REG

PAGE 76

CPU_CORE

PPLED_PWR

DCM/FCM

TEMP SENSOR

12V S5 FET ( 7A )

2

1 C80400.47UF

805

16V10%

X7R

2

1R80425%1/16WMF-LF402

100K

2

1R8045

402MF-LF

10K1/16W5%

2

1R80405%1/16W

10K

MF-LF402

21

R8041

MF-LF1/16W

402

5%

10K

2

1

3

Q80412N7002SOT23-HF1

45

3

2

1

4

8

7

6

5

Q8040CRITICAL

FDS4465_GSOI-HF

Power Block DiagramSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

P12V_S5_EN_R

P12V_S5_EN_D

SMC_PM_G2_EN

P12V_S5_EN_G

MAKE_BASE=TRUEVOLTAGE=12VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

PP12V_S5_FET=PP12V_G3H_S5_FET

3 OF 110

A.0.0

051-8600

3 OF 92

6 6

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PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_BOMGROUP_ITEM

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



ALTERNATES

GROUND

POWER

SIGNAL

POWER

GROUND

SIGNAL

SIGNAL

SIGNAL

BOARD STACK-UP

32TOP

4567

BOTTOM

RAW: 335S0663

BOM Variants

(338S0489 - BLNK)

CPU SOCKET & ILM SUB-BOMS

BOM GROUPS

ALTERNATE SOCKET VENDORS MUST USE MATCHING ILM

CPUS

COMMON

K75F PARTS

PCBF,K75F,MLB_MEMSWAP820-2901 K75FMLB11

K75F1 CRITICALU4900341T0273 IC,SMC,K75F

1 CPU CRITICAL 3P60GHZ_CKD_CPU337S3910 CKD,SLBTM,PRQ,3.60,73W,1333,K0,4M,LGA

CRITICALCPU 3P20GHZ_CKD_CPU337S3911 1 CKD,SLBUD,PRQ,3.20,73W,1333,K0,4M,LGA

518S0685 J9002518S0811

128S0298 128S0293 C7460,C7461,C7462,C7463

SCH,K75F,MLB_MEMSWAP051-8600 K75FSCH11

337S3810 1 CPU CRITICAL 2P66GHZ_LFD_CPULFD,SLBLC,PRQ,2.66,95W,1333,B1,8M,LGA

LFD,SLBJG,PRQ,2.93,95W,1333,B1,8M,LGA337S3861 CRITICALCPU1 2P93GHZ_LFD_CPU

CRITICAL337S3828 1 U1800IC,IBEX PEAK B3 PRQ,DESKTOP,FCBGA,P425

1 CRITICALU6100341T0230 IC,EFI BOOTROM,K74/K75

359S0157 1 CRITICAL BUF_CLKIC,SLG2AP108,CLK GEN,CK505,QFN3 U2600

COMMON,ALTERNATE,XDP,BETTER,MXM,XDP_CPU_BPM,INT_VREF,PCH_VRM,BUF_CLK,PRODUCTIONBASIC

DEV_GROUP XDP_CONN,LPCPLUS,MOJOMUX,CPU_TDIODE

639-1106 PCBA,MLB,K75F,2.93GHZ,LFD K75F,2P93GHZ_LFD_CPU,BASIC,CPUPOC_IMAX_100_120

X14MLB LABEL,48.0X4.8825-7122 CRITICAL1

607-6877 607-6876 SKT_ILM FOXCONN ALTERNATIVE

CRITICAL1 MOLEX CPU SOCKET AND ILM SKT_ILM607-6876

MOLEX_SOCKETSUB ASSY,CPU SOCKET,K75F,MOLEX607-6876

FOXCONN_SOCKETSUB ASSY,CPU SOCKET,K75F,FOXCONN607-6877

1 CRITICAL MOLEX_SOCKET604-0942 ASSY,PURCHASED,ILM,MOLEX,K75 ILM

PCBA,MLB,DEV,K75F085-1609 DEVELOPMENT,DEV_GROUP

1511S0063 SOCKET,LGA1156,CPU-LF U1000 CRITICAL MOLEX_SOCKET

ILM CRITICAL1 ASSY,PURCHASED,ILM,FOXCONN,K75 FOXCONN_SOCKET604-0988

CRITICALU1000SOCKET,LGA1156,CPU-LF1 FOXCONN_SOCKET511S0069

PCBA,MLB,K75F,3.20GHZ,CKD639-1103 K75F,3P20GHZ_CKD_CPU,BASIC,CPUPOC_IMAX_100_120

PCBA,MLB,K75F,3.60GHZ,CKD639-1105 K75F,3P60GHZ_CKD_CPU,BASIC,CPUPOC_IMAX_100_120

639-1104 PCBA,MLB,K75F,2.66GHZ,LFD K75F,2P66GHZ_LFD_CPU,BASIC,CPUPOC_IMAX_100_120

338S0765 1 U4100 CRITICALIC,XIO2211ZAY,1394B_PCIE,PHY/LINK

U37011 CRITICAL341T0269 ENET 1MBIT FLASH,CII,K74/K75F

U3700 CRITICAL1 IC,BCM5764M,68PIN QFN343S0485

BOM ConfigurationSYNC_MASTER=MASTER SYNC_DATE=N/A

4 OF 110

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IN

G

D

SING

D

SIN

G

D

SIN

G

D

SIN

G

D

SIN

G

D

S




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SILKSCREEN:4

SILKSCREEN:2

SILKSCREEN:2

SILKSCREEN:4

SILKSCREEN:4

Battery Off (G3Hot)

Run (S0/M0)

Sleep (S3/M1)

Soft-Off (S5/M1)

Sleep (S3/M-Off)

Soft-Off (S5/M-Off)

State

On

N/A

On

Off

Off

N/A

Manageability

1

0

1

1

1

SMC_PM_G2_ENABLE

0

1

1

0

0

1

PM_S4_STATE_L

0

0

1

0

0

0

PM_SLP_S3_L PM_SLP_S4_L

0

0

1

1

1

1

0

1

0

0

PM_SLP_M_L

1

1

SILKSCREEN:2

1

CAN DELETE THESE FOR PROTO1 AND BEYOND

19 32 33 37 46 62 63 91

K

A

LED550SILK_PART=VCORE_PGOODDEVELOPMENT

GREEN-3.6MCD2.0X1.25MM-SM

2

1R520DEVELOPMENT

MF-LF1/10W

3.3K5%

603

4

5

3

Q540

DEVELOPMENT

SOT-3632N7002DW-X-G

26 63 64 91

K

A

LED520SILK_PART=SLP_M

DEVELOPMENT


4

5

3

Q520

DEVELOPMENT

SOT-3632N7002DW-X-G

K

A

LED500GREEN-3.6MCD2.0X1.25MM-SM

DEVELOPMENT

SILK_PART=SLP_S4

19 62 91

K

A

LED530 SILK_PART=DDR_PGOODDEVELOPMENT

2.0X1.25MM-SMGREEN-3.6MCD

2

1R540

603

5%3.3K

MF-LF

DEVELOPMENT

1/10W

1

2

6

Q520DEVELOPMENT

SOT-3632N7002DW-X-G

62 70 91

K

A

LED540SILK_PART=PCHCORE_PGOODDEVELOPMENT


1

2

6

Q540DEVELOPMENT

2N7002DW-X-GSOT-36362 63 68 91

2

1R500

603

5%3.3K1/10WMF-LF

DEVELOPMENT

2

1R531

603

5%1/10WMF-LF

NOSTUFF

3.3K

2

1R530

MF-LF

5%

603

DEVELOPMENT

1/10W

3.3K

2

1R550DEVELOPMENT

MF-LF1/10W

3.3K5%

603

4

5

3

Q500

SOT-3632N7002DW-X-G

DEVELOPMENT

2

1R510DEVELOPMENT

603

5%3.3K1/10WMF-LF

K

A

LED510SILK_PART=SLP_S3DEVELOPMENT


19 91

1

2

6

Q500DEVELOPMENT

2N7002DW-X-GSOT-363


PROTO 0 DEBUG LEDSSYNC_MASTER=K75F_MLB

=PP3V3_S5_PWRCTL

PM_LED_DDRREG

=PP3V3_S0_PWRCTL

PM_LED_S4

PM_LED1_DDRREG

PM_SLP_M_L

PM_SLP_S3_L

PM_SLP_S4_3_L

PM_PGOOD_PVCORE_CPU

PCHCORE_REG_PGOOD

PM_PGOOD_DDRREG_S3

PM_LED1_SM

PM_LED_SM

PM_LED1_S3

PM_LED_S3

PM_LED1_S4

PM_LED1_PVCORE

PM_LED_PVCORE

PM_LED1_PCHCORE

PM_LED_PCHCORE

=PP3V3_S5_PWRCTL

=PP3V3_S5_PWRCTL

=PP3V3_S5_PWRCTL

=PP3V3_S0_PWRCTL

5 OF 110

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051-8600

5 OF 92

5 6 62 63

5 6 62 63 72 5 6 62 63

5 6 62 63

5 6 62 63

5 6 62 63 72

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8 7 5 4 2 1

ALWAYS ON WHEN UNIT HAS AC POWER AND IN S5"S5" RAILS

"S0" RAILSONLY ON IN RUN

PLACE AT J600.

EMC: C600,C626,C627,C628,C629,C630,C631

SILKSCREEN:1

518-0352

SILKSCREEN:3

SILKSCREEN:2

SILKSCREEN:4

ON IN RUN AND SLEEP

GND RAILS

G3H: ALIASES

"S3" RAILS

THIS NET IS NOT CONNECTED TO ANY VOLTAGE RAIL. INSTEAD ON PAGE 24 IT IS CONNECTED TO GND THROUGH A RESISTOR

ALWAYS ON WHEN UNIT HAS AC POWER AND IN G3HOT PER SMC

"G3H" RAILS

2

1 C62710%0.001UF

402

50VX7R

45 46

2

1 C624

16V

10UF10%

1210X5R-CERM2

1 C626

50VX7R

10%

402

0.001UF

2

1

3

Q6102N7002SOT23-HF1 2

1 C600

X7R

0.001UF10%50V

402

2

1 C623

X5R

20%

805

10V

10UF

2

1 C630

402

50V10%

X7R

0.001UF

2

1 C631

402X7R

0.001UF50V10%

9

8

7

6

5

4

3

2

14

13

12

11

10

1

J600M-RT-TH

76833-0100

CRITICAL

4

5

3

Q6022N7002DW-X-GSOT-363

1

2

6

Q602

SOT-3632N7002DW-X-G

K

A


2

1R601

402MF-LF

5%1K1/16W

2

1R600

402MF-LF

5%1K1/16W

DEVELOPMENT

K

A

LED605


DEVELOPMENT

2

1R603

402

1K1/16WMF-LF

5%

K

A


2

1R604

402MF-LF1/16W5%1K

MXM

K

A

LED604


MXM

21

2

1R602

402

1K

MF-LF

5%1/16W

K

A


25 32 63 91


Power Conn / AliasSYNC_MASTER=K75F_MLB

MAX_NECK_LENGTH=4.1 MMMAKE_BASE=TRUE

GND

VOLTAGE=0VNET_SPACING_TYPE=GND

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 mm

MAKE_BASE=TRUEPP5V_S0


VOLTAGE=3.3V


MAKE_BASE=TRUEPP3V3_S0

=PP3V3_S0_SMBUS_SMC_BSA

PP5V_S0_FET

=PP5V_S0_SATA

=PP5V_S0_VRD

=PP5V_S0_P1V8_VREG

=PP3V3_S0_PCH_PM

=PP5V_S0_ISENSE

PP12V_S0

=PP3V3_S0_ENET

=PP3V3_S0_RSTBUF

MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mm

MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWER

VOLTAGE=3.3V

PP3V3_S3

=PP5V_S0_MXM

VIDEO_ON_L

MAX_NECK_LENGTH=3 MM

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

PP3V3_S5

=PP12V_S5_FW

=PP3V3_S3_ENET

=PP3V3_S3_USB_HUB

=PP3V3_S3_BRCRYPT

=PP12V_S5_PWRCTL

PP12V_S3_FET

=PP12V_G3H_S5_FET

MIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

VOLTAGE=1.05VMIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUEPP1V05_S0

=PP1V05_S0_PCH_VCC_CORE

=PP1V05_S0_CK505

PPVTT_S0_DDR_LDO

MAKE_BASE=TRUE



VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

PP1V5_S0

=PP3V3_S3_USB_RESET

=PP1V5_S3_MEM_B

=PP3V3_S3_PWRCTL

PP5V_S3_REG

=PP5V_S3_USB

=PP5V_S3_S0FET

=PP12V_S3_WM

=PP3V3_S0_SMBUS_SMC_B_S0

=PP3V3_S0_SMBUS_SMC_MGMT

=PP3V3_S3_SMBUS

=PP3V3_S3_WM

=PP3V3_S3_SDCARD

=PP3V3_G3H_SMC

=PP3V3_S5_RTC_D

=PP1V5_S3_MEMRESET

=PPDDR_S3_S0FET

=PP12V_S0_PCH_CORE_VREG

=PP12V_S0_PWRCTL

=PP1V5_S0_CK505=PP12V_S0_CPU_VTT_VREG

=PPV_S0_MXM_PWR

=PP3V3_S0_SMC_LS

=PP3V3_S0_TSENS

=PP3V3_S0_ODD

=PP3V3_S0_SATALED

=PP3V3_S0_PWRCTL

=PP3V3_S0_SMC

=PP3V3_S0_MXM

=PP3V3_S0_DPCONN

=PP3V3_S0_SMBUS_SMC_0_S0

=PP3V3_S0_AUDIO


MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

VOLTAGE=1.5V

PP1V8_S0

GPU_PRESENT_R

=PP5V_S3_BRAY

MIN_LINE_WIDTH=0.6MMVOLTAGE=5V

MIN_NECK_WIDTH=0.2MM


MAKE_BASE=TRUEPP5V_S3

=PP5V_S3_DDR_VREG

PP1V5_S0_FET

=PP1V5_S0_AUD_DIG

=PP1V5_FWRS0_FWXIO



NET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2MM

VOLTAGE=1.8VMAKE_BASE=TRUE

PP1V8_S0_CPU

=PP3V3R1V8_S0_PCH_VCCPNAND

PP3V3_S3

GPU_PRESENT_DRAIN

=PP5V_S3_IR

=PP5V_S3_MEMRESET

=PP5V_S3_PWRCTL

=PP5V_S3_VREFMRGN

=PP12V_S0_AUDIO_SPKRAMP

=PP12V_S0_VRD


MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

NET_SPACING_TYPE=POWER

VOLTAGE=12VMAKE_BASE=TRUE

PP12V_S5

=PP12V_S0_FAN

=PP3V3_S0_PCH_VCC3_3_PCI

=PP3V3_S0_CK505

=PP3V3_S0_VIDEO

=PP3V3_FW_FWPHY


MAKE_BASE=TRUE


VOLTAGE=0V



PPVAXG_S0_CPU

PP1V8_S0_REG

=PP1V8_S0_CPU_PLL

=PP3V3_S5_CPURESET

=PP3V3_S5_PCH

PP3V3_S5_REG

=PP3V3_S5_PCH_GPIO

=PP1V05_S0_PCH_VCCIO_SATA

MIN_LINE_WIDTH=0.5 mmVOLTAGE=1.05V


MAKE_BASE=TRUE



PP1V05_S5

=PP0V75_S0_MEM_VTT_S0FET

=PP1V05_S0_PCH

PP1V05_S0_REG


MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mm


PP12V_G3H


MAKE_BASE=TRUEVOLTAGE=12VMIN_LINE_WIDTH=0.6 mm


PP12V_S3

MAKE_BASE=TRUEVOLTAGE=12V



PP12V_S0

PP0V75_S0MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmVOLTAGE=0.75V


=PP3V3_S0_PCH_VCC3_3_CORE

=PP3V3_FWRS0_FWXIO

=PP3V3_S0_DP

=PP3V3R1V5_S0_PCH_VCCSUSHDA



MAKE_BASE=TRUEVOLTAGE=1.1V


PPVCORE_S0_CPU

=PP3V3_S0_PCH_STRAPS

=PP3V3_S0_VRD

PPVTT_S0_CPUMAKE_BASE=TRUEVOLTAGE=1.1V





PP1V5_CPU_MEM

VOLTAGE=1.5V


MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

PPVCORE_S0_CPU_REG

=PPVCORE_S0_CPU

=PP0V75_S0_MEM_VTT_B

PPVTT_S0_DDR

MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmVOLTAGE=0.75VMAKE_BASE=TRUE


MAKE_BASE=TRUE

NET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2MM


VOLTAGE=3.42V

PP3V42_G3H PP3V42_G3H_REG

=PP0V75_S0_MEM_VTT_A =PP1V05_S5_SM_FET

=PPVTT_S0_CPU

PPVTT_S0_CPU_REG

=PPVTT_S0_XDP

=PPVTT_S0_PCH_VCC_DMI

=PP1V05_S0_PCH_VCCIO_DMI

=PP1V05_S0_PCH_VCCADPLL

=PP12V_S0_LCD

=PP5V_S5_PCH

PP3V3_S0

PP3V3_S0

LCD_SHOULD_ON_R

ITS_PLUGGED_IN

PP3V3_S3

ITS_ALIVE

=PP3V3_SM_PWRCTL

PP3V3_S5_REG

CORE_VOLTAGES_ON_R

=PP3V3_SM_PCH_VCC_ME

PP3V3_SM_FET

PP1V05_SM_FET

=PP1V05_SM_ME



MAKE_BASE=TRUE



PP3V3_S0M

=SMB_ACDC_SDA

=PP1V5_CPU_MEM



MAKE_BASE=TRUE



PPVTT_S0

LCD_PWM LCD_BKL_ON=PP1V05_S0_SM_FET

=PP1V05_S0_PCH_VCCIO_PCIE

PP1V05_S5_REG

=PPVTT_S0_PCH_VCCP_CPU

=PP1V05_SM_PCH_VCC_MEMAKE_BASE=TRUE




PP1V05_SM

=PP1V8R1V5_S0_PCH_VCCVRM

=PP3V3_S0_PCH

=PP3V3_S0_FAN

=PP3V3_S0_PCH_VCCADAC

=PPSPD_S0_MEM_B

PPVTT_S0_DDR_FET

MXM_GOOD

ALL_SYS_PWRGD_R

CORE_VOLTAGES_ON

=SMB_ACDC_SCL

PM_ACDC_PS_ON

=PP3V3_S0_PCH_GPIO

=PP3V3_S0_PCH_VCC3_3_SATA

PP3V3_S0_FET

=PP12V_S5_S3_FET

=PP12V_S5_P5VS3_VREG

=PP12V_S5_P3V3S5_VREG

=PP12V_S5_DDR_VREG

PP12V_S5_FET

PP5V_S5_LDO



MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 mm

PP5V_S5

=PPSPD_S0_MEM_A

=PP3V3_S0_SMBUS

=PP3V3_S0_ME

=PP5V_S0_CPU_VTT_VREG


=PP5V_S0_LPCPLUS

=PP5V_S0_PCH

=PP5V_S0_AUDIO

=PPVAXG_S0_CPU

=PP3V3_S0_XDP

=PP1V05_SM_PCH_VCC_LAN

=PP3V3_S5_MEMRESET

PP1V05_SM_PCH_LAN

VOLTAGE=1.05VMAKE_BASE=TRUE

=PP1V05_S0_PCH_VCCIO_USB

=PP3V3_S5_XDP


=PP3V3_S5_LPCPLUS

=PP1V5_S3_MEM_A

PP1V5_S3_REG

=PP3V3_S3_MINI

=PP3V3_S3_SMBUS_SMC_A_S3

MAKE_BASE=TRUEVOLTAGE=1.5VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

PP1V5_S3

=PP3V3_S3_MEMRESET

=PP5V_S3_CAMERA

=PP3V42_G3H_AVREF

=PP3V3_G3H_SMCUSBMUX

=PP3V3_G3H_LPCPLUS


=PP3V3_S3_BT

=PP3V3_S3_VREFMRGN

PP3V3_S3_FET

=PP3V3_S5_PCH_VCCSUS3_3_USB

=PP3V3_S5_ROM

=PP3V3_S5_SM_FET

=PP3V3_S5_P1V05S5_VREG

=PP3V3_S5_S0FET

=PP3V3_S5_S3FET

=PP3V3_S5_PWRCTL

PM_SLPS3_BUF2_L

PP12V_G3H

=PP5V_S0_SATA

6 OF 110

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6 OF 92

89 92

6 89

48

72

6 42

64

70

27

49

6 63 89

36

27

6 89 92

73

77

89

41

37

34 35

44

63 72

72

3

89

22 24

26

70

89

34

28 29 31

63 72

69 92

43

72

44

48

48

48

44

44

45 46

27

32

72

68

63

26 67

50

46 51

51

42

18 42

5 62 63 72

46 49 50

63 73 74

80

48

55 57 58 59 60 61

89

44

89

70

49 72

55

39

49 89

22 24

6 89 92

44

32

62

28

60

64

89

52 53

22 24

26

77

39 40 41

49 70

13 16 63

11

18 19 24

6 69

20

18 22 24

89

32

24

68

6 71 89

89

6 63 89

89

22 24

39

77 78 79 81

22 24

89

15

64

49 89

49 89

64 65 66

13 16

31

89

89 71

30 72

11 13 16 46 64

49 67

25

22 24

22 24

17

77

24

6 89

6 89

6 89 92

63 72

6 69

22 24

72

72

63

89

48

13 16 29

89

77 77 72

18 19 22 24

71

22 24

22 24

89

24

18 21 24 68

52 53

17

31

32 48

20

22 24

72

72

69

69

70

3

69 89

30 46

48

72

67

68

47

24

55 61

13 17

25

22 24

32

89

22 24

25

15

47

28 29 30

49 50 70

33

48

89

32

44

46

43

47

15

44

28

72

22 24

47 54

72

71

72

72

5 62 63

6 71 89

6 42

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8 7 5 4 2 1

EMC Springs (870-1125) Removed 2009-10-05

PCH HEATSINK

Rear Cover

Standoffs (860-1255)

CPU Heatsink

4mm Plated Holes (998-0850)

EMC Spring (870-1577); Near DIMMs EMC POGO Pins (870-1698); Near DIMMs

Nuts (835-0269)

Backer Plate

For EMC

DIMM CONNECTOR NUTS

Nuts (805-9582)

1

ZH07004P75R4

OMIT

1

ZH0701OMIT

4P75R41

ZH07024P75R4

OMIT

1

ZH0703OMIT

4P75R4

1SC0702EMI-SPRINGCLIP-SM-K2

CRITICAL

1

SDF0713STDOFF-6.8OD15.0H-1.56-TH

CRITICAL

1

NUT0700NUT-6.5OD1.4H-1.56-3.8-TH

CRITICAL

1

NUT0701NUT-6.5OD1.4H-1.56-3.8-TH

CRITICAL

1

NUT0702CRITICAL

NUT-6.5OD1.4H-1.56-3.8-TH

1

NUT0703NUT-6.5OD1.4H-1.56-3.8-TH

CRITICAL

1

NUT0753CRITICAL

NUT-4.25OD1.4H-1.40-3.25-TH

1

NUT0752CRITICAL

NUT-4.25OD1.4H-1.40-3.25-TH

1

NUT0751CRITICAL

NUT-4.25OD1.4H-1.40-3.25-TH

1

NUT0750CRITICAL

NUT-4.25OD1.4H-1.40-3.25-TH

1

SC0705SM

CRITICAL

NOSTUFF

2.0DIA-TALL-EMI-MLB-M97-M98

1

SC07062.0DIA-TALL-EMI-MLB-M97-M98

SM

CRITICAL

NOSTUFF

1


CRITICAL

1

SDF0715CRITICAL

STDOFF-6.8OD15.0H-1.56-TH1

SDF0717CRITICAL

STDOFF-6.8OD15.0H-1.56-TH 1

SDF0718CRITICAL

STDOFF-6.8OD15.0H-1.56-TH

1


CRITICAL

SYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

Holes

7 OF 110

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7 OF 92

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8 7 5 4 2 1

NC ON UNUSED DISPLAY ALIASES

UNUSED CPU SIGNALS

NC ON UNUSED PCI ALIASES

NC ON UNUSED MEM ALIASES

NC ON UNUSED MISC ALIASES

NC ON UNUSED NAND ALIASES

NC ON UNUSED SATA ALIASES


UNUSED SIGNAL ALIAS

TP_DP_IG_B_AUX_P

TP_DP_IG_B_AUX_N

TP_DP_IG_B_DDC_CLK

NC_DP_IG_C_MLN<3..0>NO_TEST=TRUEMAKE_BASE=TRUE

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_MLP<3..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_C_AUXN

TP_SATA_F_R2D_CP

TP_SATA_F_R2D_CN

TP_SATA_F_D2RP

TP_MEM_B_DQS_N<8>

TP_JTAG_XDP_TRST_L NC_JTAG_XDP_TRST_LMAKE_BASE=TRUE NO_TEST=TRUE

NO_TEST=TRUENC_PCH_PWM0MAKE_BASE=TRUE

TP_PCH_PWM0

TP_PCH_SST

TP_PCH_PWM1 NC_PCH_PWM1MAKE_BASE=TRUE NO_TEST=TRUE

MAKE_BASE=TRUENC_NV_WR_RE_L<1..0>

NO_TEST=TRUE

MAKE_BASE=TRUENC_NV_RB_L

NO_TEST=TRUETP_NV_RB_L

NO_TEST=TRUEMAKE_BASE=TRUENC_DMI_CLK100M_LAN

TP_PCIE_CLK100M_XDPP

NC_CPU_FC_AG40MAKE_BASE=TRUE NO_TEST=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_CLK100M_XDPP

TP_NV_WR_RE_L<1..0>

NC_LPC_DREQ1_LMAKE_BASE=TRUE NO_TEST=TRUE

TP_PCIE_CLK100M_XDPN

TP_MEM_B_DQ_CB<7..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_NV_WE_CK_L<1..0>

TP_MEM_A_DQS_N<8>

TP_LPC_DREQ1_L

TP_MEM_A_DQ_CB<7..0>

TP_NV_DQ<15..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_MEM_B_CS_L<7..4>

NC_MEM_A_DQS_P<8>NO_TEST=TRUEMAKE_BASE=TRUE

NO_TEST=TRUEMAKE_BASE=TRUENC_MEM_B_DQ_CB<7..0>

TP_MEM_B_DQS_P<8>

TP_PCH_PWM2

NO_TEST=TRUEMAKE_BASE=TRUENC_MEM_A_DQ_CB<7..0>

NC_MEM_B_DQS_P<8>MAKE_BASE=TRUE NO_TEST=TRUE

TP_MEM_B_CS_L<7..4>

NC_MEM_B_DQS_N<8>MAKE_BASE=TRUE NO_TEST=TRUE

MAKE_BASE=TRUENC_MEM_A_DQS_N<8>

NO_TEST=TRUE

TP_MEM_A_CS_L<7..4>

NO_TEST=TRUEMAKE_BASE=TRUENC_NV_CE_L<3..0>TP_NV_CE_L<3..0>

TP_NV_DQS<1..0>

TP_NV_WE_CK_L<1..0>

NC_PCH_PWM3NO_TEST=TRUEMAKE_BASE=TRUE

TP_PCH_PWM3

TP_MEM_A_DQS_P<8>

MAKE_BASE=TRUENC_MEM_A_CS_L<7..4>

NO_TEST=TRUE

TP_LPC_DREQ0_LMAKE_BASE=TRUE NO_TEST=TRUENC_LPC_DREQ0_L

MAKE_BASE=TRUE NO_TEST=TRUENC_DMI_CLK100M_LAP

TP_DMI_CLK100M_LAN

NO_TEST=TRUEMAKE_BASE=TRUENC_PCH_SST

NC_PCH_PWM2NO_TEST=TRUEMAKE_BASE=TRUE

TP_PCI_RESET_L

TP_PCI_PAR

TP_DMI_CLK100M_LAP

NO_TEST=TRUEMAKE_BASE=TRUENC_PCIE_CLK100M_XDPN

NC_NV_DQ<15..0>MAKE_BASE=TRUE NO_TEST=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_NV_DQS<1..0>

MAKE_BASE=TRUENC_PCI_C_BE_L<3..0>

NO_TEST=TRUE

NC_PCI_AD<31..0>NO_TEST=TRUEMAKE_BASE=TRUE

TP_PCI_AD<31..0>

TP_CPU_FC_AE38

TP_CPU_RSVD<26..1>

TP_CPU_RSVD<41..29>

TP_CPU_FC_AG40

NC_PCI_RESET_LNO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUENC_PCI_PAR

NO_TEST=TRUE

TP_PCI_C_BE_L<3..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_PCI_T28_R2D_C_N<3..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_PCI_T28_R2D_C_P<3..0>

NC_PCI_T28_D2R_P<3..0>NO_TEST=TRUEMAKE_BASE=TRUE

TP_PCI_T28_R2D_C_P<3..0>

NO_TEST=TRUEMAKE_BASE=TRUENC_PCI_T28_D2R_N<3..0>NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_RSVD<26..1>

MAKE_BASE=TRUE NO_TEST=TRUENC_CPU_FC_AE38

NO_TEST=TRUENC_CPU_RSVD<41..29>MAKE_BASE=TRUE NC_SATA_D_D2RN

MAKE_BASE=TRUE NO_TEST=TRUETP_SATA_D_D2RN

NC_SATA_D_D2RPNO_TEST=TRUEMAKE_BASE=TRUE

TP_SATA_D_D2RP

NC_SATA_D_R2D_CNMAKE_BASE=TRUE NO_TEST=TRUE

TP_SATA_D_R2D_CN

NC_SATA_D_R2D_CPNO_TEST=TRUEMAKE_BASE=TRUE

TP_SATA_D_R2D_CP

NO_TEST=TRUEMAKE_BASE=TRUENC_SATA_E_D2RNTP_SATA_E_D2RN

NC_SATA_E_R2D_CNNO_TEST=TRUEMAKE_BASE=TRUE

TP_SATA_E_R2D_CN

NO_TEST=TRUEMAKE_BASE=TRUENC_SATA_E_D2RPTP_SATA_E_D2RP

MAKE_BASE=TRUE NO_TEST=TRUENC_SATA_E_R2D_CPTP_SATA_E_R2D_CP

NC_SATA_F_D2RNMAKE_BASE=TRUE NO_TEST=TRUE

TP_SATA_F_D2RN

MAKE_BASE=TRUE NO_TEST=TRUENC_SATA_F_D2RP

NO_TEST=TRUEMAKE_BASE=TRUENC_SATA_F_R2D_CN

MAKE_BASE=TRUENC_SATA_F_R2D_CP

NO_TEST=TRUE

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_DDC_CLKTP_CRT_IG_DDC_CLK

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_DDC_DATA

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_REDTP_CRT_IG_RED

MAKE_BASE=TRUE NO_TEST=TRUENC_CRT_IG_GREENTP_CRT_IG_GREEN

TP_CRT_IG_BLUE

MAKE_BASE=TRUE NO_TEST=TRUENC_CRT_IG_HSYNCTP_CRT_IG_HSYNC

NC_CRT_IG_VSYNCMAKE_BASE=TRUE NO_TEST=TRUE

TP_CRT_IG_VSYNC

NC_DP_IG_D_MLN<3..0>MAKE_BASE=TRUE NO_TEST=TRUE

NO_TEST=TRUENC_DP_IG_D_AUXNMAKE_BASE=TRUE

MAKE_BASE=TRUENC_DP_IG_D_MLP<3..0>

NO_TEST=TRUE

NC_DP_IG_D_AUXPNO_TEST=TRUEMAKE_BASE=TRUE

NC_DP_IG_D_CTRL_CLKMAKE_BASE=TRUE NO_TEST=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_D_HPD

NC_DP_IG_D_CTRL_DATAMAKE_BASE=TRUE NO_TEST=TRUE

TP_DP_IG_D_MLN<3..0>

TP_DP_IG_D_AUXN

TP_DP_IG_D_MLP<3..0>

TP_DP_IG_D_AUXP

TP_DP_IG_D_CTRL_CLK

TP_DP_IG_D_HPD

TP_DP_IG_D_CTRL_DATA

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_BLUE

TP_DP_IG_C_MLN<3..0>

TP_DP_IG_C_MLP<3..0>

TP_DP_IG_C_AUX_N

MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_C_AUXPTP_DP_IG_C_AUX_P

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_HPDTP_DP_IG_C_HPD

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_CTRL_CLKTP_DP_IG_C_CTRL_CLK

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_CTRL_DATATP_DP_IG_C_CTRL_DATA

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_MLN<3..0>

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_MLP<3..0>TP_DP_IG_B_MLP<3..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_B_AUXN

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_HPDTP_DP_IG_B_HPD

MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_B_AUXP

NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_CTRL_CLK

NC_DP_IG_B_CTRL_DATAMAKE_BASE=TRUE NO_TEST=TRUE

TP_DP_IG_B_DDC_DATA

MAKE_BASE=TRUE NO_TEST=TRUENC_GFX_VID<0..6>TP_GFX_VID<0..6>

MAKE_BASE=TRUE NO_TEST=TRUENC_GFX_VSENSE_N

NO_TEST=TRUEMAKE_BASE=TRUENC_GFX_VSENSE_PTP_GFX_VSENSE_P

TP_GFX_VSENSE_N

TP_CRT_IG_DDC_DATA

TP_PCI_T28_D2R_N<3..0>

TP_DP_IG_B_MLN<3..0>

TP_PCI_T28_D2R_P<3..0>

TP_PCI_T28_R2D_C_N<3..0>

NO_TEST=TRUENC_HDA_SDIN1MAKE_BASE=TRUE

TP_HDA_SDIN1

MAKE_BASE=TRUENC_HDA_SDIN3

NO_TEST=TRUETP_HDA_SDIN3

MAKE_BASE=TRUENC_HDA_SDIN2

NO_TEST=TRUETP_HDA_SDIN2

NC_PCIE_CLK100M_PE5PNO_TEST=TRUEMAKE_BASE=TRUE

TP_PCIE_CLK100M_PE5P

NO_TEST=TRUEMAKE_BASE=TRUENC_PCIE_CLK100M_PE5NTP_PCIE_CLK100M_PE5N

NC_NV_RCOMPMAKE_BASE=TRUE NO_TEST=TRUE

TP_NV_RCOMP

MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_P

NC_PCIE_CLK100M_EXCARD_NNO_TEST=TRUEMAKE_BASE=TRUE

PCIE_CLK100M_EXCARD_N

TP_USB_1P

TP_USB_6P

TP_USB_6N

TP_USB_7P

TP_USB_7N

NO_TEST=TRUEMAKE_BASE=TRUENC_USB_1P

NO_TEST=TRUEMAKE_BASE=TRUENC_USB_1N

MAKE_BASE=TRUE NO_TEST=TRUENC_USB_6P

NC_USB_6NNO_TEST=TRUEMAKE_BASE=TRUE

TP_USB_1N

MAKE_BASE=TRUENC_USB_7P

NO_TEST=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_USB_7N

TP_USB_9P

TP_USB_5N

TP_USB_3P

TP_USB_3N




NO_TEST=TRUENC_USB_5NMAKE_BASE=TRUE





TP_USB_10N

TP_USB_11N

TP_USB_11P

TP_USB_10P


TP_USB_9N

TP_USB_5P

MAKE_BASE=TRUENC_USB_3P

NO_TEST=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_EXCARD_D2R_PPCIE_EXCARD_D2R_P

NC_PCIE_EXCARD_D2R_NNO_TEST=TRUEMAKE_BASE=TRUE

PCIE_EXCARD_D2R_N

NC_PCIE_EXCARD_R2D_C_PNO_TEST=TRUEMAKE_BASE=TRUE

PCIE_EXCARD_R2D_C_P

NC_PCIE_EXCARD_R2D_C_NMAKE_BASE=TRUE NO_TEST=TRUE

PCIE_EXCARD_R2D_C_N

NC_SDVO_TVCLKINPNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_TVCLKINP

NC_SDVO_TVCLKINNNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_TVCLKINN

NC_SDVO_STALLPNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_STALLP

NC_SDVO_STALLNNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_STALLN

NC_SDVO_INTPNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_INTP

NC_SDVO_INTNNO_TEST=TRUEMAKE_BASE=TRUE

TP_SDVO_INTN

TP_USB_12P

TP_USB_12N





TP_USB_13N

TP_USB_13P

8 OF 110

A.0.0

051-8600

8 OF 92

19

19

19

18

18

18

12 83

25

21

21

21

20

21

20

21

12

12 83

18

12

20

12 83

21

12

12

20

20

20

21

12 83

18

21

20

20

21

20

13

10

10

13

20

18

18

18

18

18

18

18

18

18

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

13

13

13

19

19

18

18

18

18

18

20

18

18

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

18

18

18

18

19

19

19

19

19

19

20

20

20

20

www.vinafix.vn

OUT

OUTIN

IN

IN

IN

OUT

OUT

IN

IN

IN OUT

OUTIN

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PEG Slot SupportTHIS SIGNAL NAME IS CONNECTED TO MXM

75 84

75 84 10

10

75 84

75 84

10

10

18

18

19 85 91 21

R929

PLACEMENT_NOTE=PLACE CLOSE TO U18001/16W5%

MF-LF

22

402

45 85 91

73 18

73

73

SYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

Signal Aliases

PEG_RESET_LMAKE_BASE=TRUE

MXM_RESET_L

CLK_100M_MXM_P

CLK_100M_MXM_N

PEG_R2D_C_N<0..15>MAKE_BASE=TRUE

MAKE_BASE=TRUEPEG_R2D_C_P<0..15>MAKE_BASE=TRUEGPU_CLK100M_PCIE_N

MAKE_BASE=TRUEGPU_CLK100M_PCIE_P

=PEG_R2D_C_P<0..15>

PEG_CLKREQ_LMAKE_BASE=TRUEMXM_CLKREQ_L

=PEG_D2R_N<0..15>

=PEG_R2D_C_N<0..15>

PEG_D2R_P<0..15>MAKE_BASE=TRUE

PEG_CLK100M_P

PEG_CLK100M_N

PEG_D2R_N<0..15>MAKE_BASE=TRUE

=PEG_D2R_P<0..15>

PM_CLK32K_SUSCLKPM_CLK32K_SUSCLK_R

9 OF 110

A.0.0

051-8600

9 OF 92

27 91 73

84

84

www.vinafix.vn

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PEG_TX_2*

PEG_TX_15

PEG_TX_14

PEG_TX_10

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9

PEG_TX_11

PEG_TX_13

PEG_TX_12

PEG_TX_0

PEG_RCOMPO

PEG_ICOMPO

PEG_ICOMPI

PEG_RBIAS

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_RX_14*

PEG_RX_15*

PEG_RX_13*

PEG_RX_12*

PEG_RX_10*

PEG_RX_11*

PEG_RX_9*

PEG_RX_8*

PEG_RX_7*

PEG_RX_6*

PEG_RX_5*

PEG_RX_4*

PEG_RX_3*

PEG_RX_2*

PEG_RX_1*

PEG_RX_0*

PEG_TX_0*

PEG_TX_1*

PEG_TX_3*

PEG_TX_4*

PEG_TX_7*

PEG_TX_8*

PEG_TX_9*

PEG_TX_10*

PEG_TX_11*

PEG_TX_12*

PEG_TX_13*

PEG_TX_15*

PEG_TX_6*

PEG_TX_14*

DMI_RX_1*

DMI_RX_2*

DMI_RX_3*

DMI_RX_1

DMI_RX_0

DMI_RX_2

DMI_RX_3

DMI_TX_2

DMI_TX_1

DMI_TX_0

DMI_TX_1*

DMI_TX_0*

FDI_TX_2*

FDI_TX_3*

FDI_TX_4*

FDI_TX_6*

FDI_TX_5*

FDI_TX_7*

FDI_TX_0

FDI_TX_1

FDI_TX_2

FDI_TX_4

FDI_TX_6

FDI_TX_5

FDI_FSYNC_0

FDI_TX_7

FDI_INT

FDI_FSYNC_1

FDI_LSYNC_0

FDI_LSYNC_1

PEG_TX_5*

DMI_TX_3*

DMI_TX_2*

FDI_TX_1*

FDI_TX_0*

DMI_TX_3

PEG_RX_0

PEG_RX_1

PEG_RX_2

PEG_RX_3

PEG_RX_4

PEG_RX_5

PEG_RX_6

PEG_RX_7

PEG_RX_8

PEG_RX_9

PEG_RX_10

FDI_TX_3

DMI_RX_0*

FLEXIBLE DISPLAY INTERFACE

PCI EXPRESS -- GRAPHICS

DMI

(1 OF 10)

RSVD_AM28

RSVD_AM27

RSVD_AK18

RSVD_AM21

RSVD_AH40

RSVD_AE2

RSVD_AJ39

RSVD_AK12

RSVD_AK13

RSVD_AK15

RSVD_AK16

RSVD_AK25

RSVD_AK28

RSVD_AK27

RSVD_AK26

RSVD_AK14

RSVD_AD2

RSVD_AM26

RSVD_TP_AN11

RSVD_AL17

RSVD_AM13

RSVD_A12

CFG_1

RSVD_AL26

RSVD_NCTF_AY37

RSVD_NCTF_AY3

RSVD_NCTF_AW38

RSVD_NCTF_B3

RSVD_NCTF_C2

RSVD_NCTF_D1

RSVD_AM30

RSVD_AM29

RSVD_AM25

RSVD_AM20

RSVD_AM18

RSVD_AM17

RSVD_AM16

RSVD_AM15

RSVD_AM14

RSVD_L12

RSVD_M12

RSVD_AL15

RSVD_AL14

CFG_0

CFG_5

CFG_4

CFG_3

CFG_2

RSVD_AL29

RSVD_AL27

RSVD_AL18

CFG_10

CFG_8

CFG_9

CFG_7

CFG_6

CFG_15

CFG_12

CFG_13

CFG_14

CFG_11

CFG_17

CFG_16

RSVD_NCTF_A4

RSVD_NCTF_AU40

RSVD_NCTF_AV1

RSVD_NCTF_AV39

RSVD_NCTF_AW2

RSVD_AM19

RSVD_AK29

RSVD_AL12

(5 OF 10)

RESERVED

OUT

OUT

GND

CBP

CBN

GND

GND

CFP

CFN

GND

CHP

CHN

CCP

CCNCDP

CEN

GND

CGN

CGP

GND

CAP

CAN

GND

CDN

CEP

GND

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

INTEL SUGGESTS TO KEEP THESE TPS

CFG3 :PCIE LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

FOR LYNNFIELD PROCESSOR

CFG4 :NOT USED ON DESKTOP

PLACE R1010 AND R1012 CLOSE TO CPU BALLS

FOR CLARKDALE PROCESSOR

CFG [1:0] :PCIE CONFIGURATION SELECT 11 = 1 X16 PCI EXPRESS 10 = 2 X8 PCI EXPRESS

DMI MID-BUS PROBE

CLK

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

10 19 84

15

15

15

15

15

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

2

1R1012750

1/16W

402MF-LF

1%

2

1R1010

402MF-LF

49.91%1/16W

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

25 84

15 25 84

25 84

25 84

25 84

J8

H8

K4

K3

J5

J6

G7

F7

H3

H4

G5

G6

F4

F3

F5

E5

R6

R5

N8

M8

N5

N6

L7

K7

M3

M4

L5

L6

E6

E7

D7

C7

G2

G3

F1

E1

E2

D2

D3

C3

C4

B4

B5

A5

C6

B6

A6

A7

T4

T3

P4

P3

L3

L2

K1

J1

J2

J3

H1

G1

C8

B8

D9

C9

B10

A11

C10

D11

Y5

Y6

Y3

Y4

R7

R8

W4

W5

W7

W8

U7

U8

V3

V4

U5

U6

AD3

AD4

AC2

AC3

AC4

R3

R2

P1

N1

N2

N3

M1

L1

W2

W3

V1

U1

U2

U3

T1

R1

U1000

LGA1156-SKT

OMIT

LYNNFIELD

AN11

D1

C2

B3

AY37

AY3

AW38

AW2

AV39

AV1

AU40

A4

M12

L12

AM30

AM29

AM28

AM27

AM26

AM25

AM21

AM20

AM19

AM18

AM17

AM16

AM15

AM14

AM13

AL29

AL27

AL26

AL18

AL17

AL15

AL14

AL12

AK29

AK28

AK27

AK26

AK25

AK18

AK16

AK15

AK14

AK13

AK12

AJ39

AH40

AE2

AD2

A12

H12

G12

F9

E9

H9

H10

F10

E10

L11

H7

K12

K9

L8

J12

K8

K10

G8

E8

U1000LYNNFIELD

OMIT

LGA1156-SKT

10 19 84

10 19 84

0

0

1

2

3

1

2

3

28 27

26 25

23

17

11

5

20

14

8

2

22

24

19

21

16

18

13

15

10

12

7

9

4

6

1

3

J1050LAI-TMS817

ST-SM

NOSTUFF

0

10 19 84

10 19 84

0

1

2

1

2

3

3

3

2

1

J1010

M-ST-SM

NOSTUFF

FTR-103-02-S-S

18 84

18 84

CPU DMI/PEG/FDI/RSVD

DMI_N2S_N<3..0>

DMI_N2S_P<3..0>DMI_S2N_P<3..0>

DMI_S2N_N<3..0>

=PEG_D2R_N<8>

=PEG_D2R_N<11>

=PEG_D2R_P<7>

=PEG_D2R_P<11>

DMI_MIDBUS_CLK100M_P

DMI_MIDBUS_CLK100M_N

CPU_CFG<13>

CPU_CFG<17>

CPU_CFG<1>

CPU_CFG<2>

CPU_CFG<10>

CPU_CFG<6>

CPU_CFG<9>

CPU_CFG<5>

CPU_CFG<0>

CPU_CFG<4>

CPU_CFG<12>

CPU_CFG<8>

TP_CPU_RSVD<32>

SNS_CPU_THERMD_N

TP_CPU_RSVD<22>

TP_CPU_RSVD<24>

=PEG_R2D_C_P<1>

=PEG_D2R_P<0>

CPU_CFG<14>

CPU_PEG_COMP

=PEG_D2R_N<0>

CPU_PEG_RBIAS

=PEG_D2R_P<4>

=PEG_R2D_C_N<4>

=PEG_R2D_C_P<3>

=PEG_D2R_P<2>

=PEG_D2R_N<15>

=PEG_D2R_N<10>

=PEG_D2R_N<7>

=PEG_D2R_N<6>

=PEG_D2R_N<5>

=PEG_D2R_N<4>

=PEG_D2R_N<3>

=PEG_R2D_C_N<5>

DMI_N2S_N<1>

DMI_N2S_N<2>

DMI_N2S_N<3>

DMI_N2S_P<0>

TP_CPU_FDI_TX_N<1>

TP_CPU_FDI_TX_N<2>

TP_CPU_FDI_TX_N<3>

=PEG_D2R_N<14>

TP_CPU_RSVD<21>

TP_CPU_RSVD<25>

TP_CPU_RSVD<26>

SNS_CPU_THERMD_P

DMI_S2N_N<2>

CPU_FDI_LSYNC<1>

TP_CPU_RSVD<39>

TP_CPU_RSVD<41>

TP_CPU_RSVD_NCTF<1>

TP_CPU_RSVD_NCTF<2>

TP_CPU_RSVD_NCTF<4>

TP_CPU_RSVD<7>

TP_CPU_RSVD<6>

DMI_S2N_N<0>

DMI_S2N_N<1>

TP_CPU_RSVD<11>

TP_CPU_RSVD<33>

TP_CPU_RSVD<4>

TP_CPU_RSVD<3>

TP_CPU_RSVD<5>

TP_CPU_RSVD<9>

TP_CPU_RSVD<12>

TP_CPU_RSVD<15>

TP_CPU_RSVD<14>

TP_CPU_RSVD<13>

TP_CPU_RSVD<8>

TP_CPU_RSVD<2>

TP_CPU_RSVD_TP<1>

TP_CPU_RSVD<20>

TP_CPU_RSVD_NCTF<7>

TP_CPU_RSVD_NCTF<6>

TP_CPU_RSVD_NCTF<10>

TP_CPU_RSVD_NCTF<11>

TP_CPU_RSVD<34>

TP_CPU_RSVD<29>

TP_CPU_RSVD<40>

TP_CPU_RSVD<19>

TP_CPU_RSVD<18>

CPU_CFG<3>

TP_CPU_RSVD<23>

CPU_CFG<11>

CPU_CFG<16>

TP_CPU_RSVD_NCTF<3>

TP_CPU_RSVD_NCTF<5>

TP_CPU_RSVD<31>

TP_CPU_RSVD<16>

TP_CPU_RSVD<17>

=PEG_R2D_C_N<2>

=PEG_R2D_C_P<15>

=PEG_R2D_C_P<14>

=PEG_R2D_C_P<10>

=PEG_R2D_C_P<2>

=PEG_R2D_C_P<4>

=PEG_R2D_C_P<5>

=PEG_R2D_C_P<6>

=PEG_R2D_C_P<7>

=PEG_R2D_C_P<8>

=PEG_R2D_C_P<9>

=PEG_R2D_C_P<11>

=PEG_R2D_C_P<13>

=PEG_R2D_C_P<12>

=PEG_R2D_C_P<0>

=PEG_D2R_P<12>

=PEG_D2R_P<14>

=PEG_D2R_N<12>

=PEG_D2R_N<1>

=PEG_R2D_C_N<1>

=PEG_R2D_C_N<3>

=PEG_R2D_C_N<7>

=PEG_R2D_C_N<9>

=PEG_R2D_C_N<11>

=PEG_R2D_C_N<12>

=PEG_R2D_C_N<13>

=PEG_R2D_C_N<6>

=PEG_R2D_C_N<14>

DMI_S2N_N<3>

TP_CPU_FDI_TX_N<6>

TP_CPU_FDI_TX_N<7>

TP_CPU_FDI_TX_P<1>

=PEG_D2R_P<1>

=PEG_D2R_P<9>

=PEG_D2R_P<10>

=PEG_R2D_C_N<10>

=PEG_D2R_N<9>

TP_CPU_RSVD<30>

TP_CPU_RSVD<35>

TP_CPU_RSVD<36>

TP_CPU_RSVD<37>

TP_CPU_RSVD<38>

TP_CPU_RSVD_NCTF<9>

TP_CPU_RSVD_NCTF<8>

TP_CPU_RSVD<10>

CPU_CFG<7>

=PEG_R2D_C_N<15>

TP_CPU_RSVD<1>

=PEG_D2R_N<2>

=PEG_D2R_P<15>

=PEG_D2R_P<13>

CPU_FDI_LSYNC<0>

CPU_FDI_INT

=PEG_D2R_P<3>

=PEG_D2R_P<5>

=PEG_D2R_P<8>

=PEG_D2R_P<6>

TP_CPU_FDI_TX_N<5>

TP_CPU_FDI_TX_P<2>

TP_CPU_FDI_TX_P<3>

TP_CPU_FDI_TX_P<5>

TP_CPU_FDI_TX_P<6>

CPU_FDI_FSYNC<0>

CPU_FDI_FSYNC<1>

TP_CPU_FDI_TX_P<7>

TP_CPU_FDI_TX_N<4>

DMI_N2S_P<1>

DMI_N2S_P<2>

TP_CPU_FDI_TX_N<0>

DMI_N2S_P<3>

DMI_S2N_P<2>

=PEG_D2R_N<13>

TP_CPU_FDI_TX_P<4>

DMI_N2S_N<0>

DMI_S2N_P<3>

DMI_S2N_P<1>

DMI_S2N_P<0>

=PEG_R2D_C_N<8>

=PEG_R2D_C_N<0>

TP_CPU_FDI_TX_P<0>

CPU_CFG<15>

10 OF 110

A.0.0

051-8600

10 OF 92

8

51 88

8

8

84

84 8

8

8

51 88

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8 8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

www.vinafix.vn

OUT

IN

IN

OUT

OUT

BI

BI

OUT

IN

OUT

IN

IN

IN

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

RSTIN*

TAPPWRGOOD

VTTPWRGOOD

SM_DRAMPWROK

VCCPWRGOOD_0

VCCPWRGOOD_1

PM_SYNC

RESET_OBS*

THERMTRIP*

TDO

COMP3

BPM_7*

BPM_4*

BPM_6*

BPM_5*

BPM_2*

BPM_3*

BPM_0*

BPM_1*

DBR*

TDO_M

TDI_M

TDI

TRST*

TMS

PREQ*

TCK

PM_EXT_TS_1*

PM_EXT_TS_0*

PRDY*

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

SM_DRAMRST*

PEG_CLK*

PEG_CLK

BCLK_ITP*

BCLK_ITP

BCLK_1*

BCLK_1

BCLK_0*

BCLK_0

SKTOCC*

COMP0

PROCHOT*

PECI

COMP2

CATERR*

COMP1

DDR3

MISC

JTAG & MBP

(2 OF 10)

CLOCKS

THERMAL

MISC

PWR MANAGEMENT

IN

IN

IN

OUT

IN

OUT

IN

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(GND)

DIVIDER IS BASED ON 2009 WW04 MOW

COMES FROM VTT VR

32 91

19 91

62 63 67 91

25 91

25 91

21

46

21 46 91

2

1R1101515%

MF-LF1/16W

402

2

1R1100

402MF-LF

515%1/16W

2

1R1112

1%49.9

1/16WMF-LF402

PLACE R1112 CLOSE TO AF2

2

1R1113

402

49.9

1/16W1%

MF-LF

PLACE R1113 CLOSE TO AF36

2

1R1110

PLACE R1110 CLOSE TO C11

MF-LF

1%

402

1/16W

20

2

1R1111

MF-LF

1%

PLACE R1111 CLOSE TO B11

402

1/16W

20

25

25

25

25

25

25

25 84

25 27 91

25

25 84

25 84

25 84

25 84

25 84

25 84

25 84

2

1R1162

402

1/16WMF-LF

1001%

PLACE R1162 CLOSE TO AG1

2

1R1160130

402

1/16WMF-LF

1%

PLACE R1160 CLOSE TO AE1

2

1R1161

1/16WMF-LF402

1%24.9

PLACE R1161 CLOSE TO AD1

21 84

2

1R1170

402

1/16W5%51

MF-LF

21 25 91

2

1R11201.1K

1%

MF-LF1/16W

402

2

1R1121NOSTUFF

1/16W

402

1%

MF-LF

3.01K

2

1R1103

5%1/16W

402MF-LF

1K

AG37

AH36

AH35

AM39

AN40

AF35

AF38

AM38

AF37

AM37

AN37

AK34

AE1

AD1

AG1

AV8

AH37

AK38

AF34

AL39

AH34

AK37

AJ38

AH39

AB4

AB5

AA4

AA3

AG35

AL40

C11

B11

AF2

AF36

AG39

AK31

AK30

AL30

AM31

AK32

AK33

AL32

AL33

AK40

AK39

Y8

AA8

AA6

AA7U1000

OMIT

LGA1156-SKTLYNNFIELD

21 84

18 84

18 84

25 84

18 84

25 84

18 84

19 91

2

1C1100NOSTUFF

X7R-CERM

0.1UF10%16V

402

2

1R1104

402

51

MF-LF

5%1/16W

46 91

46 91

1

6

2 Q1177

SOT-363-LFMMDT3904-X-G

4

3

5Q1177


2

1R1127

1%

MF-LF1/16W

402

150

2

1R1126

MF-LF1/16W

1%10K

402

2 1

R1125

402

1%

MF-LF1/16W

10K27 91

CPU CLOCK/MISC/JTAGCPU_RESET_L CPU_RESET_L_R

PLT_RESET_LS3V3

PM_SYNC

FSB_CPURSTOUT_L

CPU_PECI

CPU_COMP1

CPU_CATERR_L

CPU_COMP2

CPU_PROCHOT_L

CPU_COMP0

CPU_SKTOCC_L

FSB_CLK133M_CPU_P

FSB_CLK133M_CPU_N

GFX_CLK120M_DPLLSS_P

GFX_CLK120M_DPLLSS_N

FSB_CLK133M_ITP_P

FSB_CLK133M_ITP_N

PCIE_CLK100M_CPU_P

PCIE_CLK100M_CPU_N

CPU_MEM_RESET_L

XDP_PRDY_L

PM_EXT_TS_L<0>

PM_EXT_TS_L<1>

XDP_TCK

XDP_PREQ_L

XDP_TMS

XDP_TDI

XDP_DBRESET_L

XDP_BPM_L<1>

XDP_BPM_L<0>

XDP_BPM_L<3>

XDP_BPM_L<2>

XDP_BPM_L<5>

XDP_BPM_L<6>

XDP_BPM_L<4>

XDP_BPM_L<7>

CPU_COMP3

XDP_TDO

PM_THRMTRIP_L

XDP_TRST_L

CPU_SM_RCOMP1

CPU_SM_RCOMP2

CPU_SM_RCOMP0

PLT_RESET_LS1V1_L

PLT_RESET_LS1V1_L

=PPVTT_S0_CPU

=PP3V3_S5_CPURESET =PPVTT_S0_CPU

CPU_TDO_M_TDI_M

CPUVTT_REG_PGOOD

CPU_PWRGD

PM_MEM_PWRGD

XDP_CPUPWRGD

=PPVTT_S0_CPU

11 OF 110

A.0.0

051-8600

11 OF 92

84

84

84

62

84

83

83

83

11 91

11 91

6 11 13 16 46 64

6 6 11 13 16 46 64

6 11 13 16 46 64

www.vinafix.vn

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

SA_ECC_CB_7

SA_ECC_CB_6

SA_ECC_CB_5

SA_ECC_CB_3

SA_ECC_CB_4

SA_ECC_CB_2

SA_ECC_CB_1

SA_ECC_CB_0

SA_MA_15

SA_MA_14

SA_MA_13

SA_MA_12

SA_MA_11

SA_MA_9

SA_MA_10

SA_MA_7

SA_MA_6

SA_MA_8

SA_MA_4

SA_MA_5

SA_MA_1

SA_MA_2

SA_MA_3

SA_MA_0

SA_DQS_8

SA_DQS_6

SA_DQS_7

SA_DQS_5

SA_DQS_4

SA_DQS_3

SA_DQS_2

SA_DQS_1

SA_DQS_0

SA_DQS_8*

SA_DQS_7*

SA_DQS_5*

SA_DQS_6*

SA_DQS_4*

SA_DQS_3*

SA_DQS_2*

SA_DQS_1*

SA_DQS_0*

SA_CS_3*

SA_CS_2*

SA_CS_1*

SA_CS_0*

SA_CS_4*

SA_CS_7*

SA_CS_6*

SA_CS_5*

SA_CK_2*

SA_CK_1*

SA_CK_0*

SA_DIMM_VREFDQ

SA_WE*

SA_RAS*

SA_CAS*

SA_DQ_6

SA_DQ_5

SA_DQ_13

SA_DQ_18

SA_DQ_17

SA_CKE_0

SA_DQ_7

SA_DQ_62

SA_DQ_61

SA_DQ_63

SA_BS_1

SA_BS_2

SA_BS_0

SA_DQ_52

SA_DQ_54

SA_DQ_53

SA_DQ_56

SA_DQ_57

SA_DQ_55

SA_DQ_58

SA_DQ_59

SA_DQ_60

SA_DQ_51

SA_DQ_42

SA_DQ_41

SA_DQ_43

SA_DQ_46

SA_DQ_47

SA_DQ_49

SA_DQ_48

SA_DQ_50

SA_DQ_45

SA_DQ_44

SA_DQ_40

SA_DQ_34

SA_DQ_36

SA_DQ_38

SA_DQ_39

SA_DQ_33

SA_DQ_35

SA_DQ_37

SA_DQ_20

SA_DQ_21

SA_DQ_23

SA_DQ_22

SA_DQ_24

SA_DQ_25

SA_DQ_26

SA_DQ_27

SA_DQ_28

SA_DQ_11

SA_DQ_12

SA_DQ_16

SA_DQ_15

SA_DQ_19

SA_DQ_10

SA_DQ_14

SA_DQ_9

SA_DQ_8

SA_DQ_0

SA_DQ_1

SA_DQ_4

SA_DQ_2

SA_DQ_3

SA_CK_0

SA_DQ_29

SA_DQ_30

SA_DQ_31

SA_DQ_32

SA_CK_1

SA_CKE_1

SA_CK_2

SA_CKE_2

SA_CK_3

SA_CKE_3

SA_ODT_0

SA_ODT_2

SA_ODT_1

SA_ODT_3

SA_DM_0

SA_DM_2

SA_DM_1

SA_DM_3

SA_DM_4

SA_DM_5

SA_DM_6

SA_DM_7

SA_CK_3*

(3 OF 10)

DDR SYSTEM MEMORY A

SB_DQS_2*

SB_DQS_0*

SB_DQS_1*

SB_DQS_5*

SB_DQS_6*

SB_DQS_7*

SB_DQS_8*

SB_DQS_3*

SB_DQS_4*

SB_CS_0*

SB_CS_2*

SB_CS_3*

SB_CS_1*

SB_CS_7*

SB_CS_6*

SB_CS_5*

SB_CS_4*

SB_CK_2*

SB_DQ_16

SB_DQ_1

SB_DQ_0

SB_DQ_8

SB_DQ_9

SB_DQ_52

SB_DQ_51

SB_DQ_38

SB_DQ_39

SB_DQ_63

SB_DQ_62

SB_DQ_61

SB_BS_2

SB_BS_0

SB_BS_1

SB_DQ_60

SB_DQ_59

SB_DQ_58

SB_DQ_57

SB_DQ_56

SB_DQ_55

SB_DQ_54

SB_DQ_53

SB_DQ_49

SB_DQ_47

SB_DQ_48

SB_DQ_46

SB_DQ_44

SB_DQ_45

SB_DQ_42

SB_DQ_41

SB_DQ_43

SB_DQ_50

SB_DQ_40

SB_DQ_33

SB_DQ_37

SB_DQ_35

SB_DQ_34

SB_DQ_36

SB_DQ_32

SB_DQ_31

SB_DQ_27

SB_DQ_26

SB_DQ_25

SB_DQ_24

SB_DQ_23

SB_DQ_22

SB_DQ_21

SB_DQ_20

SB_DQ_19

SB_DQ_18

SB_DQ_17

SB_DQ_15

SB_DQ_14

SB_DQ_13

SB_DQ_12

SB_DQ_11

SB_DQ_7

SB_DQ_6

SB_DQ_5

SB_DQ_4

SB_DQ_2

SB_DQ_3

SB_DIMM_VREFDQ SB_MA_15

SB_MA_10

SB_MA_12

SB_MA_11

SB_MA_13

SB_MA_14

SB_MA_8

SB_MA_9

SB_MA_7

SB_MA_6

SB_MA_5

SB_MA_4

SB_MA_2

SB_MA_1

SB_MA_0

SB_MA_3

SB_DQS_8

SB_DQS_6

SB_DQS_5

SB_DQS_4

SB_DQS_3

SB_DQS_1

SB_DQS_2

SB_DQS_0

SB_ECC_CB_0

SB_ECC_CB_1

SB_ECC_CB_2

SB_ECC_CB_3

SB_ECC_CB_5

SB_ECC_CB_4

SB_ECC_CB_6

SB_ECC_CB_7

SB_DM_7

SB_DM_6

SB_DM_5

SB_DM_4

SB_DM_2

SB_DM_0

SB_ODT_3

SB_ODT_2

SB_ODT_1

SB_ODT_0

SB_CKE_3

SB_CK_3

SB_CKE_2

SB_CKE_1

SB_CK_2

SB_CK_1

SB_CKE_0

SB_CK_0

SB_DQS_7

SB_DM_3

SB_DM_1

SB_DQ_10

SB_DQ_28

SB_DQ_29

SB_DQ_30

SB_WE*

SB_CK_3*

SB_CK_1*

SB_CAS*

SB_CK_0*

SB_RAS*

(4 OF 10)

DDR SYSTEM MEMORY B

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUTOUT OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

30 83

30 83

30 83

30 83

30 83

30 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

30 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

30 83

32 83

32 83

30 83

30 83

30 83

30 83

30 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

31 83

31 83

31 83

31 83

31 83

31 83

32 83

32 83

31 83

32 83

32 83

31 83

31 83

31 83

31 83

31 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

32 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

31 83

AT22

AT20

AY24

AW23

AV24

AV23

AW12

AU14

AW13

AV14

AY13

AW14

AU15

AV15

AR10

AT11

AU24

AW11

AU13

AT19

AY15

AW18

AM11

AK11

AL9

AK9

AP11

AR11

AN10

AP10

AM10

AL10

AR38

AR39

AV35

AW36

AW32

AV32

AT29

AR28

AW6

AY6

AU3

AU4

AP3

AP2

AJ3

AK3

AN2

AN3

AK2

AP40

AP39

AU39

AU38

AK1

AN39

AN38

AT40

AT39

AW37

AV36

AW34

AY34

AU37

AV37

AH2

AY35

AW35

AW33

AU33

AW30

AV30

AU34

AV33

AU31

AU30

AG2

AN30

AR29

AR27

AN26

AP30

AP28

AT28

AN27

AW7

AV7

AL1

AV5

AU5

AY8

AU8

AY5

AW5

AV4

AV2

AT1

AT3

AL2

AW4

AW3

AU2

AT4

AR4

AP1

AM2

AM3

AR2

AR3

AJ4

AH1

AT38

AU35

AW31

AN29

AV6

AU1

AN1

AJ2

AF3

AK23

AL23

AM22

AK22

AU23

AU21AW24

AV21

AY10

AV10

AW10

AU10

AN19

AP19

AP21

AN21

AN18

AP18

AR21

AR22

AU22

AU12

AU19

AV20

U1000

OMIT


AU26

AW26

AU28

AV27

AU29

AU27

AY16

AT17

AU16

AW17

AV17

AY18

AU17

AV18

AV11

AY12

AW28

AW15

AW16

AY25

AU18

AU20

AP13

AN14

AN12

AM12

AP14

AN15

AT13

AR12

AR13

AR14

AM36

AL37

AR37

AR36

AR32

AP32

AR24

AT25

AP8

AR8

AM6

AN6

AJ5

AH6

AE5

AF4

AH7

AG5

AE6

AL36

AJ35

AM34

AN35

AF5

AJ37

AJ36

AM35

AL35

AP37

AN34

AT35

AP34

AP36

AN33

AC6

AT36

AR35

AT33

AR34

AR31

AT31

AM32

AR33

AP31

AT32

AC7

AT26

AP25

AP22

AT23

AR26

AR25

AP23

AN23

AT9

AL8

AJ8

AR6

AN8

AM8

AR9

AR7

AT6

AP5

AN7

AM4

AL5

AH8

AR5

AP6

AN5

AL6

AK7

AJ7

AG4

AG6

AL4

AK6

AD6

AD7

AK35

AM33

AN32

AN24

AT7

AM7

AH4

AE4

AG3

AK24

AL24

AM24

AM23

AV29

AV26

AW29

AY27

AV9

AU9

AY9

AW8

AR18

AR19

AN16

AN17

AR15

AT15

AR16

AR17

AW27

AV12

AW25

AU25

U1000

OMIT


28 83

30 83

30 83

30 83

30 83

32 83

32 83

30 83

32 83

32 83

30 83

32 83

32 83

31 83

32 83

32 83

31 83

31 83

31 83

31 83

31 83

28 83 30 83 31 83

CPU DDR3 INTERFACESSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

MEM_A_CLK_P<0>

MEM_A_CLK_N<0>

MEM_A_CKE<0>

MEM_A_CLK_N<1>

MEM_A_CKE<2>

MEM_A_CLK_P<3>

MEM_A_CLK_N<3>

TP_MEM_A_CS_L<5>

TP_MEM_A_CS_L<6>

TP_MEM_A_CS_L<7>

MEM_A_ODT<0>

MEM_A_ODT<1>

MEM_A_DM<2>

MEM_A_DM<3>

MEM_A_DM<4>

MEM_A_DM<5>

MEM_A_DM<6>

MEM_A_DM<7>

MEM_A_DM<1>

MEM_A_DM<0>

MEM_A_ODT<3>

MEM_A_ODT<2>

MEM_A_CKE<3>

MEM_A_CLK_P<2>

MEM_A_CKE<1>

MEM_A_CLK_P<1>

MEM_A_DQ<32>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<29>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<4>

MEM_A_DQ<0>

MEM_A_DQ<8>

MEM_A_DQ<9>

MEM_A_DQ<14>

MEM_A_DQ<10>

MEM_A_DQ<19>

MEM_A_DQ<15>

MEM_A_DQ<16>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<28>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<22>

MEM_A_DQ<23>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<37>

MEM_A_DQ<35>

MEM_A_DQ<33>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DQ<36>

MEM_A_DQ<34>

MEM_A_DQ<40>

MEM_A_DQ<44>

MEM_A_DQ<45>

MEM_A_DQ<50>

MEM_A_DQ<48>

MEM_A_DQ<49>

MEM_A_DQ<47>

MEM_A_DQ<46>

MEM_A_DQ<43>

MEM_A_DQ<41>

MEM_A_DQ<42>

MEM_A_DQ<51>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<55>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<53>

MEM_A_DQ<54>

MEM_A_DQ<52>

MEM_A_BA<0>

MEM_A_BA<2>

MEM_A_BA<1>

MEM_A_DQ<63>

MEM_A_DQ<61>

MEM_A_DQ<62>

MEM_A_DQ<7>

MEM_A_DQ<17>

MEM_A_DQ<18>

MEM_A_DQ<13>

MEM_A_DQ<5>

MEM_A_DQ<6>

MEM_A_CAS_L

MEM_A_RAS_L

MEM_A_WE_L

CPU_DIMM_VREF_A

MEM_A_CLK_N<2>

TP_MEM_A_CS_L<4>

MEM_A_CS_L<2>

MEM_A_CS_L<3>

MEM_A_DQS_N<0>

MEM_A_DQS_N<1>

MEM_A_DQS_N<2>

MEM_A_DQS_N<3>

MEM_A_DQS_N<4>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<7>

TP_MEM_A_DQS_N<8>

MEM_A_DQS_P<0>

MEM_A_DQS_P<1>

MEM_A_DQS_P<2>

MEM_A_DQS_P<3>

MEM_A_DQS_P<4>

MEM_A_DQS_P<5>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

TP_MEM_A_DQS_P<8>

MEM_A_A<0>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<1>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<8>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<10>

MEM_A_A<9>

MEM_A_A<11>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_A<14>

MEM_A_A<15>

TP_MEM_A_DQ_CB<0>

TP_MEM_A_DQ_CB<1>

TP_MEM_A_DQ_CB<2>

TP_MEM_A_DQ_CB<4>

TP_MEM_A_DQ_CB<3>

TP_MEM_A_DQ_CB<5>

TP_MEM_A_DQ_CB<6>

TP_MEM_A_DQ_CB<7>

MEM_B_RAS_L

MEM_B_CLK_N<0>

MEM_B_CAS_L

MEM_B_CLK_N<1>

MEM_B_CLK_N<3>

MEM_B_WE_L

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<10>

MEM_B_DM<1>

MEM_B_DM<3>

MEM_B_DQS_P<7>

MEM_B_CLK_P<0>

MEM_B_CKE<0>

MEM_B_CLK_P<1>

MEM_B_CLK_P<2>

MEM_B_CKE<1>

MEM_B_CKE<2>

MEM_B_CLK_P<3>

MEM_B_CKE<3>

MEM_B_ODT<0>

MEM_B_ODT<1>

MEM_B_ODT<2>

MEM_B_ODT<3>

MEM_B_DM<0>

MEM_B_DM<2>

MEM_B_DM<4>

MEM_B_DM<5>

MEM_B_DM<6>

MEM_B_DM<7>

TP_MEM_B_DQ_CB<7>

TP_MEM_B_DQ_CB<6>

TP_MEM_B_DQ_CB<4>

TP_MEM_B_DQ_CB<5>

TP_MEM_B_DQ_CB<3>

TP_MEM_B_DQ_CB<2>

TP_MEM_B_DQ_CB<1>

TP_MEM_B_DQ_CB<0>

MEM_B_DQS_P<0>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<3>

MEM_B_DQS_P<4>

MEM_B_DQS_P<5>

MEM_B_DQS_P<6>

TP_MEM_B_DQS_P<8>

MEM_B_A<3>

MEM_B_A<0>

MEM_B_A<1>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<5>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<14>

MEM_B_A<13>

MEM_B_A<11>

MEM_B_A<12>

MEM_B_A<10>

MEM_B_A<15>CPU_DIMM_VREF_B

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<4>

MEM_B_DQ<5>

MEM_B_DQ<6>

MEM_B_DQ<7>

MEM_B_DQ<11>

MEM_B_DQ<12>

MEM_B_DQ<13>

MEM_B_DQ<14>

MEM_B_DQ<15>

MEM_B_DQ<17>

MEM_B_DQ<18>

MEM_B_DQ<19>

MEM_B_DQ<20>

MEM_B_DQ<21>

MEM_B_DQ<22>

MEM_B_DQ<23>

MEM_B_DQ<24>

MEM_B_DQ<25>

MEM_B_DQ<26>

MEM_B_DQ<27>

MEM_B_DQ<31>

MEM_B_DQ<32>

MEM_B_DQ<36>

MEM_B_DQ<34>

MEM_B_DQ<35>

MEM_B_DQ<37>

MEM_B_DQ<33>

MEM_B_DQ<40>

MEM_B_DQ<50>

MEM_B_DQ<43>

MEM_B_DQ<41>

MEM_B_DQ<42>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<46>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<49>

MEM_B_DQ<53>

MEM_B_DQ<54>

MEM_B_DQ<55>

MEM_B_DQ<56>

MEM_B_DQ<57>

MEM_B_DQ<58>

MEM_B_DQ<59>

MEM_B_DQ<60>

MEM_B_BA<1>

MEM_B_BA<0>

MEM_B_BA<2>

MEM_B_DQ<61>

MEM_B_DQ<62>

MEM_B_DQ<63>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<51>

MEM_B_DQ<52>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<0>

MEM_B_DQ<1>

MEM_B_DQ<16>

MEM_B_CLK_N<2>

TP_MEM_B_CS_L<4>

TP_MEM_B_CS_L<5>

TP_MEM_B_CS_L<6>

TP_MEM_B_CS_L<7>

MEM_B_CS_L<1>

MEM_B_CS_L<3>

MEM_B_CS_L<2>

MEM_B_CS_L<0>

MEM_B_DQS_N<4>

MEM_B_DQS_N<3>

TP_MEM_B_DQS_N<8>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_B_DQS_N<2>

MEM_A_DQ<1>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

12 OF 110

A.0.0

051-8600

12 OF 92

8

8

8

8

8 83

8 83

8

8

8

8

8

8

8

8 8

8

8

8

8

8

8

8

8 83

8

8

8

8

8 83

www.vinafix.vn

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

PSI*

VID_1/MSID_1

VID_2/MSID_2

VID_3/CSC_0

VID_5/CSC_2

VID_6

ISENSE

VID_7

VID_4/CSC_1

VID_0/MSID_0

VCC_74

VCC_73

VCC_75

VCC_76

VCC_77

VCC_39

VCC_38

VCC_37

VCC_36

VTT_33

VTT_10

VTT_4

VTT_42

VTT_44

VTT_46

VTT_49

VTT_51

VTT_53

VTT_56

VTT_57

VTT_59

VTT_61

VTT_63

VTT_65

VTT_68

VTT_70

VTT_75

VTT_77

VTT_SELECT

VTT_12

VTT_13

VTT_14

VTT_16

VCC_13

VCC_12

VCC_11

VTT_5

VCC_3

VCC_2

VCC_SENSE

VSS_SENSE

VTT_3

VTT_8

VTT_6

VTT_73

VTT_74

VTT_76

VTT_66

VTT_72

VCC_80

VCC_72

VCC_89

VCC_56

VSS_SENSE_VTT

VTT_SENSE

VCC_88

VCC_87

VCC_86

VCC_85

VCC_84

VCC_4

VCC_1

VCC_9

VCC_8

VCC_7

VCC_5

VCC_10

VCC_14

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_21

VCC_22

VCC_23

VCC_24

VCC_20

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_34

VCC_33

VCC_32

VCC_31

VCC_40

VCC_45

VCC_44

VCC_43

VCC_42

VCC_41

VCC_50

VCC_49

VCC_48

VCC_47

VCC_46

VCC_55

VCC_53

VCC_52

VCC_51

VCC_60

VCC_59

VCC_58

VCC_57

VCC_64

VCC_65

VCC_62

VCC_63

VCC_61

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_71

VCC_81

VCC_82

VCC_83

VCC_90

VCC_91

VCC_92

VCC_93

VCC_94

VCC_95

VCC_96

VCC_99

VCC_97

VCC_98

VTT_2

VTT_0

VTT_1

VTT_9

VTT_11

VTT_15

VTT_17

VTT_18

VTT_23

VTT_22

VTT_24

VTT_21

VTT_25

VTT_26

VTT_29

VTT_27

VTT_34

VTT_35

VTT_50

VTT_47

VTT_48

VTT_52

VTT_54

VTT_60

VTT_58

VTT_62

VTT_64

VTT_67

VTT_69

VTT_71

VTT_43

VTT_41

VTT_39

VTT_38

VTT_37

VTT_36

VCC_0

VCC_54

VTT_55

VTT_45

VTT_40

VTT_32

VTT_31

VTT_30

VTT_28

VTT_20

VTT_19

VCC_6

VTT_7

VCC_35

VCC_78

VCC_79

POWER

1.1V RAIL POWER

SENSE LINES

CPU CORE SUPPLY

(6 OF 10)

CPU VIDS

OUT

VAXG_14

VAXG_15

VAXG_16

VAXG_17

VAXG_0

VAXG_2

VAXG_36

VAXG_34

VAXG_SENSE

VSSAXG_SENSE

GFX_VID_0

GFX_VID_1

GFX_VID_2

GFX_VID_3

GFX_VID_4

GFX_VID_5

GFX_VID_6

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

VDDQ_2

VDDQ_1

VDDQ_0

VDDQ_4

VDDQ_3

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_9

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_15

VDDQ_14

VDDQ_17

VDDQ_18

VCCPLL_0

VCCPLL_1

VAXG_9

VAXG_8

VAXG_3

VAXG_4

VAXG_7

VAXG_6

VAXG_5

VAXG_18

VAXG_19

VAXG_23

VAXG_24

VAXG_22

VAXG_21

VAXG_20

VAXG_25

VAXG_28

VAXG_29

VAXG_26

VAXG_27

VAXG_33

VAXG_35

VAXG_37

VAXG_38

VAXG_39

VAXG_40

VAXG_41

VAXG_42

VAXG_43

VAXG_44

VAXG_45

VAXG_46

VAXG_47

VAXG_48

VAXG_13

VAXG_12

VAXG_11

VAXG_10

VAXG_32

VAXG_31

VAXG_30

VAXG_1

VCCPLL_2

VDDQ_16

GRAPHICS VIDS

1.8V

DDR3-1.5V RAILS

SENSE

LINES

( 7 OF 10 )

POWER

GRAPHICS

VCC_NCTF_0

VCC_NCTF_1

CGC_TP_NCTF

FC_AE38

FC_AG40

VCC_100

VCC_104

VCC_103

VCC_102

VCC_101

VCC_105

VCC_106

VCC_107

VCC_108

VCC_109

VCC_110

VCC_111

VCC_112

VCC_114

VCC_119

VCC_118

VCC_117

VCC_115

VCC_116

VCC_124

VCC_123

VCC_122

VCC_121

VCC_120

VCC_125

VCC_126

VCC_130

VCC_134

VCC_133

VCC_132

VCC_131

VCC_135

VCC_138

VCC_139

VCC_137

VCC_136

VCC_140

VCC_145

VCC_144

VCC_143

VCC_142

VCC_141

VCC_146

VCC_150

VCC_149

VCC_148

VCC_147

VCC_155

VCC_154

VCC_153

VCC_152

VCC_151

VCC_160

VCC_159

VCC_158

VCC_157

VCC_156

VCC_165

VCC_164

VCC_163

VCC_162

VCC_161

VCC_168

VCC_169

VCC_170

VCC_167

VCC_166

VCC_171

VCC_172

VCC_173

VCC_174

VCC_175

VCC_176

VCC_177

VCC_178

VCC_179

VCC_180

VCC_181

VCC_113

VCC_129

VCC_128

VCC_127

(10 OF 10)

VCC

NCTF




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(Controlled by VTT_SELECT pin)

THIS SUPPLY IS NEEDED ONLY FOR SYSTEM WITH DALE IG

CONNECTED TO THE IMON OUT FROM CPU REG

16 64 89

16 64 89

16 64 89

16 64 89

16 64 89

16 64 89

16 64 89

16 64 89

49 67 89

67 89

64 88

64 89

49 64 89

AE35

AF39

AC35

AC34

Y38

Y37

Y36

Y35

Y34

Y33

W6

W1

AC33

V8

V7

V6

V40

V39

V38

V37

V36

V35

V34

AB7

V33

V2

T8

T7

T6

T2

P8

P7

P6

N7

AA38

M9

M11

M10

L10

AL21

AL20

AK21

AK20

AK19

AJ32

AA37

AJ31

AJ29

AJ27

AJ25

AJ23

AJ21

AJ19

AJ17

AG33

AF33

AA36

AE8

AE40

AE39

AE34

AE33

AD40

AD39

AD38

AD37

AD36

AA35

AD35

AD34

AD33

AC8

AC5

AC40

AC39

AC38

AC37

AC36

AA34

AA33

AE36

T34

U33

U34

U35

U36

U37

U38

U39

U40

T35

J19

J18

H40

H38

H37

H35

H34

H32

H31

H29

B26

H28

H26

H25

H23

H22

H20

H19

G39

G38

G36

B25

G35

G33

G32

G30

G29

G27

G26

G24

G23

G21

B23

G20

F40

F39

F37

F36

F34

F33

F31

F30

F28

A36

F27

F25

F24

F22

F21

E40

E38

E37

E35

E34

A35

E32

E31

E29

E28

E26

E25

E23

E22

D39

D38

A33

D36

D35

D33

D32

D30

D29

D27

D26

D24

D23

A27

C39

C37

C36

C34

C33

C31

C30

C28

C27

C25

A26

C24

C23

B38

B37

B35

B34

B32

B31

B29

B28

A24

A23

AG38

T40

U1000

OMIT

LYNNFIELDLGA1156-SKT

16 64 89

B13

AV19

AV16

AV13

AU11

AT21

AT18

AT10

AJ15

AY26

AY23

AY17

AY14

AY11

AW9

AV28

AV25

AV22

AJ13

AJ11

AG8

AF8

AF7

A13

C15

C14

B18

B17

B15

M16

M15

M14

L16

L15

L14

K16

K15

K14

B14

J16

J15

J14

H17

H15

H14

G18

G17

G15

G14

A18

F19

F18

F17

F15

F14

E20

E18

E17

E15

E14

A17

D21

D20

D18

D17

D15

D14

C21

C20

C18

C17

A15

A14

F12

J11

G11

C12

E11

E12

B12

G10

F6

J10

U1000

OMIT


C40

A38

R40

R39

R38

R37

R36

R35

R34

R33

P40

P39

P38

P37

P36

P35

P34

P33

N39

N38

N36

N35

N33

M40

M39

M37

M36

M34

M33

M30

M28

M27

M25

M24

M22

M21

M19

M17

L40

L38

L37

L35

L34

L32

L31

L29

L28

L26

L25

L23

L22

L20

L19

L17

K39

K38

K36

K35

K33

K32

K30

K29

K27

K26

K24

K23

K21

K20

K18

K17

J40

J39

J37

J36

J34

J33

J31

J30

J28

J27

J25

J24

J22

J21

AG40

AE38

B39

U1000

OMIT


CPU POWERSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

CPU_VID<7>

CPU_VID<6>

CPU_VID<5>

CPU_VID<3>

CPU_VID<2>

TP_CPU_VTTSELECT

=PPVTT_S0_CPU

=PPVCORE_S0_CPU

TP_GFX_VR_EN

=PPVAXG_S0_CPU

CPU_VTTSENSE_P

VR_CPU_IOUT

=PPVCORE_S0_CPU

TP_GFX_VID<0>

TP_GFX_VSENSE_P

TP_GFX_VSENSE_N

TP_GFX_VID<1>

TP_GFX_VID<2>

TP_GFX_VID<3>

TP_GFX_VID<4>

TP_GFX_VID<5>

TP_GFX_VID<6>

TP_GFX_DPRSLPVR

=PP1V5_CPU_MEM

=PP1V8_S0_CPU_PLL

CPU_PSI_L

CPU_VID<1>

CPU_VID<4>

CPU_VID<0>

CPU_VCC_PKG_SENSE_P

CPU_VCC_PKG_SENSE_N

CPU_VTTSENSE_N

=PPVCORE_S0_CPU

TP_CPU_CGC_NCTF

TP_CPU_FC_AE38

TP_CPU_FC_AG40

13 OF 110

A.0.0

051-8600

13 OF 92

6 11 16 46 64

6 13 16

6 17

6 13 16

8

8

8

8

8

8

8

8

8

6 16 29

6 16 63

6 13 16

8

8

www.vinafix.vn

VSS_27

VSS_26

VSS_84

VSS_83

VSS_82

VSS_80

VSS_81

VSS_89

VSS_88

VSS_87

VSS_85

VSS_86

VSS_94

VSS_93

VSS_92

VSS_90

VSS_91

VSS_99

VSS_98

VSS_95

VSS_96

VSS_97

VSS_104

VSS_103

VSS_102

VSS_100

VSS_101

VSS_105

VSS_109

VSS_108

VSS_107

VSS_106

VSS_110

VSS_111

VSS_114

VSS_112

VSS_113

VSS_115

VSS_119

VSS_118

VSS_117

VSS_116

VSS_120

VSS_125

VSS_124

VSS_122

VSS_121

VSS_123

VSS_130

VSS_129

VSS_128

VSS_127

VSS_126

VSS_134

VSS_133

VSS_132

VSS_135

VSS_131

VSS_140

VSS_139

VSS_138

VSS_137

VSS_136

VSS_145

VSS_144

VSS_143

VSS_141

VSS_142

VSS_150

VSS_149

VSS_148

VSS_146

VSS_147

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_159

VSS_157

VSS_158

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_11

VSS_12

VSS_13

VSS_14

VSS_10

VSS_18

VSS_15

VSS_17

VSS_16

VSS_19

VSS_23

VSS_22

VSS_21

VSS_20

VSS_24

VSS_25

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_45

VSS_44

VSS_48

VSS_49

VSS_50

VSS_47

VSS_46

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_58

VSS_59

VSS_60

VSS_65

VSS_64

VSS_63

VSS_62

VSS_70

VSS_69

VSS_68

VSS_67

VSS_66

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_78

VSS_77

VSS_79

VSS_28

VSS_61

( 8 OF 10 )

VSS

VSS_277

VSS_276

VSS_275

VSS_188

VSS_164

VSS_165

VSS_176

VSS_175

VSS_174

VSS_224

VSS_223

VSS_221

VSS_220

VSS_219

VSS_218

VSS_217

VSS_216

VSS_215

VSS_214

VSS_213

VSS_212

VSS_211

VSS_210

VSS_209

VSS_208

VSS_207

VSS_206

VSS_205

VSS_204

VSS_203

VSS_202

VSS_201

VSS_200

VSS_199

VSS_198

VSS_197

VSS_196

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_186

VSS_183

VSS_182

VSS_180

VSS_179

VSS_178

VSS_170

VSS_171

VSS_172

VSS_173

VSS_168

VSS_169

VSS_160

VSS_161

VSS_163

VSS_271

VSS_270

VSS_268

VSS_269

VSS_266

VSS_265

VSS_260

VSS_262

VSS_261

VSS_259

VSS_256

VSS_258

VSS_257

VSS_255

VSS_254

VSS_250

VSS_253

VSS_251

VSS_252

VSS_249

VSS_246

VSS_248

VSS_247

VSS_245

VSS_240

VSS_243

VSS_241

VSS_242

VSS_235

VSS_238

VSS_236

VSS_237

VSS_234

VSS_229

VSS_230

VSS_233

VSS_232

VSS_231

VSS_227

VSS_228

VSS_226

VSS_225

VSS_222

VSS_162

VSS_274

VSS_273

VSS_272

VSS_239

VSS_244VSS_185

VSS_184

VSS_195

VSS_194

VSS_192

VSS_181

VSS_167

VSS_166

VSS_267

VSS_264

VSS_263

VSS_177

(9 OF 10)

VSS

SKT MNT HOLE




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

AT12

AR40

AR30

AR23

AR20

AR1

AP9

AP7

AP4

AP38

AB35 AP35

AP33

AP29

AP27

AP26

AP24

AP20

AP17

AP16

AP15

AB34

AP12

AN9

AN4

AN36

AN31

AN28

AN25

AN22

AN20

AN13

AB33

AM9

AM5

AM40

AM1

AL7

AL38

AL34

AL31

AL3

AL28

AB3

AL25

AL22

AL19

AL16

AL13

AL11

AK8

AK5

AK4

AK36

AA5

AK17

AK10

AJ9

AJ6

AJ40

AJ34

AJ33

AJ30

AJ28

AJ26

A37

AJ24

AJ22

AJ20

AJ18

AJ16

AJ14

AJ12

AJ1

AH5

AH38

A34

AH33

AH3

AG7

AG36

AG34

AF40

AF1

AE7

AE37

AE3

A28

AD8

AD5

AC1

AB8

E21

E19

E16

E13

D8

D6

D5

D40

D4

D37

AB6

D34

D31

D28

D25

D22

D19

D16

D13

D12

D10

AB40

C5

C38

C35

C32

C29

C26

C22

C19

C16

C13

AB39

B9

B7

B36

B33

B30

B27

B24

B16

AY7

AY4

AB38

AY36

AY33

AV38

AV34

AV31

AV3

AU7

AU6

AU36

AU32

AB37

AT8

AT5

AT37

AT34

AT30

AT27

AT24

AT2

AT16

AT14

AB36

A25

A16 U1000

OMIT


AF6

Y7

W38

W37

W36

W35

W34

W33

V5

U4

T5

T39

T38

T37

T36

T33

R4

P5

P2

N40

N4

N37

N34

M7

M6

M5

M38

M35

M32

M29

M26

M23

M20

M2

M18

M13

L9

L4

L39

L36

L33

L30

L27

L24

L21

L18

L13

K6

K5

K40

K37

K34

K31

K28

K25

K22

K2

K19

K13

K11

J9

J7

J4

J38

J35

J32

J29

J26

J23

J20

J17

J13

H6

H5

H39

H36

H33

H30

H27

H24

H21

H2

H18

H16

H13

H11

G9

G40

G4

G37

G34

G31

G28

G25

G22

G19

G16

G13

F8

F38

F35

F32

F29

F26

F23

F20

F2

F16

F13

F11

E4

E39

E36

E33

E30

E3

E27

E24

1159

1158

1157

U1000

OMIT


CPU GROUNDS

14 OF 110

A.0.0

051-8600

14 OF 92

www.vinafix.vn




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

IF LIKE TO HAVE THE PEB CLOCKS ENABLED. STUFF R1535 AND UNSTUFF R1534

2

1R1500

402

1/16W5%

1.5K

MF-LF

2

1R150910K

402

5%

MF-LF1/16W 2

1R1517

1/16WMF-LF402

5%

BUF_CLK

10K

2

1R1515

402MF-LF1/16W

10K5%

2

1R152510K

MF-LF402

5%1/16W

2

1R1524

MF-LF402

5%1/16W

10K

2

1R1523

5%1/16WMF-LF

10K

4022

1R152210K

5%1/16W

402MF-LF

2

1R1530PCH_VRM

1/16W

402

5%10K

MF-LF

2

1R1527

MF-LF402

10K5%

1/16W

2

1R1528

MF-LF1/16W

5%

402

10K

2

1R1526

1/16W

402

5%

MF-LF

10K

2

1R1533

402MF-LF

10K5%

1/16W

2

1R1501

5%

MF-LF402

1/16W

10K

2

1R1532

MF-LF1/16W

5%10K

402

2

1R1534

1/16W

402MF-LF

5%10K

2

1R1535

1/16W

10K

402MF-LF

5%

2

1R1599

MF-LF

5%1/16W

402

1K

FCIM

2

1R1536

5%1/16WMF-LF402

10K

2

1R1537

1/16W5%

10K

MF-LF402

NOSTUFF

2

1R1598

402

MLB_VR

MF-LF

5%1/16W

1K

2

1R1538

1/16W5%

10K

MF-LF402 2

1R153910K

402

1/16W5%

MF-LF

2

1R1541

5%

402

1/16WMF-LF

10K

NOSTUFF

2

1R1542

402

5%1/16WMF-LF

10K

NOSTUFF

2

1R154310K

MF-LF402

1/16W5%

2

1R1550

5%1K

MF-LF1/16W

402

NOSTUFF

2

1R1551

402MF-LF1/16W

5%10K

NOSTUFF

2

1R1552

1/16W

402MF-LF

5%10K

NOSTUFF

2

1R1553

1/16W

402MF-LF

5%10K

NOSTUFF

2

1R155410K

5%

MF-LF402

1/16W

NOSTUFF

2

1R15641K

1/16W

402MF-LF

5%

2

1R15631K5%

1/16W

402MF-LF

2

1R1503

5%1/16WMF-LF

10K

402

2

1R15621K

1/16W

402MF-LF

5%

2

1R15611K

MF-LF1/16W

402

5%

2

1R15601K5%

1/16WMF-LF402

2

1R1569

1/16W5%

MF-LF402

1K

2

1R1568

MF-LF402

1/16W5%1K

2

1R1567

5%

MF-LF402

1/16W

1K

2

1R1566

5%

402

1/16WMF-LF

1K

2

1R1565

402MF-LF1/16W

5%1K

2

1R1504

402

10K5%

1/16WMF-LF

2

1R1570

402MF-LF1/16W

5%10K

2

1R1571

5%1/16WMF-LF402

10K

2

1R1572

1/16W5%

402MF-LF

10K

2

1R157310K

5%

402MF-LF1/16W

2

1R157410K

402MF-LF1/16W

5%

2

1R1575

5%1/16WMF-LF402

10K

2

1R150610K

5%1/16W

402MF-LF

2

1R1507

402MF-LF

10K5%

1/16W

2

1R1508

402

5%10K

MF-LF1/16W

2

1R1510

1/16WMF-LF402

5%10K

2

1R151110K

5%

MF-LF402

1/16W

2

1R155510K

5%

MF-LF402

1/16W

2

1R1529

MF-LF402

5%1/16W

10K

2

1R1590

MF-LF

10K5%

402

1/16W

2

1R1591

1/16W5%

10K

MF-LF402

2

1R1512

1/16W

402MF-LF

5%10K


STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU

PCH_SPKR

PCH_NV_ALE

PM_CLKRUN_L


FW_CLKREQ_L

PCH_GPIO39_SDATAOUT0

PCH_GPIO38_SLOAD

PCH_GPIO21_SATA0GP

PCH_GPIO37_SATA3GP

FW_PME_L

PCH_GPIO6_TACH2

FW_PWR_EN

PCH_GPIO15

T28_CLKREQ_L

CPU_FDI_LSYNC<1>

PCH_GPIO19_SATA1GP

PCH_GPIO0_BMBUSY_L

BRCRYPT_RESET


SPI_DESCRIPTOR_OVERRIDE_L

PCH_CLKOUTFLEX2

PCH_CLKOUTFLEX3

PCH_CLKOUTFLEX1

PCH_GPIO14_OC7_L

ENET_CLKREQ_L

PM_BATLOW_L


WOL_EN

PCH_PCI_GNT1_L

BRCRYPT_PWR_EN


PCH_GPIO34_STP_PCI_L

SMC_RUNTIME_SCI_L

PCH_GPIO49_SATA5GP

PCH_FDI_FSYNC<0>

PCH_FDI_FSYNC<1>

PCH_GPIO27_VRMEN

PCH_GPIO24




PCH_FDI_LSYNC<1>

PCH_GPIO8_FCIM_EN_L

MINI_CLKREQ_L


AP_PWR_EN

ENET_LOW_PWR

PM_LAN_PWRGD

ENET_ENERGY_DET

EXCARD_CLKREQ_L

PEB_CLKREQ_L

CPU_FDI_FSYNC<1>

CPU_FDI_INT

CPU_FDI_LSYNC<0>

CPU_FDI_FSYNC<0>

PCH_FDI_LSYNC<0>

PCH_FDI_INT

PCH_NV_CLE

PCH_INIT3V3_L

PCH_PCI_GNT0_L

PCH_PCI_GNT2_L

PCH_PCI_GNT3_L

ODD_PWR_EN_L

CPU_CFG<3>

15 OF 110

A.0.0

051-8600

15 OF 92

18

20

19 45 47 91

6 15

18 25 40

21

21

18 25

21 25

21 40

21

21

21

18

10

18 25

21 25

18 44

6 15

18 45

18

18

18

20 25

18 36

19 45 91

6 15

21 37

20

18 44

6 15

21

21 45

21 25

19

19

21

21

6 15

6 15

6 15

19

21

18 25 33

6

21 33

21 36

19 91

18 36

18

18

10

10

10

10

19

19

20

21

20

20

20

21 42

10 25 84

www.vinafix.vn

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

100A

BULK CAPS ON CPU VREG PAGE 74

INTEL RECOMMENDATION 17X 22UF 0805

CPU VCORE DECOUPLING

PSI# = Reserved (0)

CPU Gain Setting

80A

60A

40A

IMAX @ 900mV

101

Instead call out appropriate BOM GROUP defined in tables above.

30

100

011

010

001

000

45

10

15

18

22.5

1x 22uF 0805, 1x 4.7uF 0603, 1x 2.2uF 0402, 2x 1uF 0402

2x 22uF 0805, 5x 1uF 0402

Equivalent Gain

110 12.857

111

120A

140A

180A

VTT (CPU Uncore) DECOUPLING

BULK CAPS ON CPU VREG PAGE 72

VID[6] = Reserved (0)

VID[2:0] = FUNCTION MSI[2:0] DEFAULT (110)

PLACEMENT_NOTE (C1650-C1657):

PLACEMENT_NOTE (C1660-C1666):

INTEL RECOMMENDATION 9X22UF 0805 8X 22UF 0805, 7X 10UF 0805

PLL (CPU VCCSFR) DECOUPLING

Memory (CPU VCCDDR) DECOUPLING

CPU Power On Configuration (POC) StrapsIntel recommends all option straps should be provided in layout

NOTE: BOM Configurations should not call out CPUPOCnU/D BOMOPTIONs directly.

VID[7] = VRD SELECT (0)

VID[5:3] = IMON CONFIG DEFAULT (101)

MSI - MARKET SEGMENT IDENTIFICATIONPREVENTS THE PLATFORM BOOTING USING A HIGHER POWERED CPU

2

1 C1693

X5R

10%1UF

402

10V2

1 C1692

X5R

10%2.2UF

402

6.3V2

1 C1691

6.3V10%4.7UF

603X5R-CERM2

1 C1690

20%6.3V

22uF

CERM-X5R805

2

1 C1681

6.3VCERM-X5R805

22uF20%

2

1 C16851UF

X5R

10%

402

10V2

1 C1684

10V

402

1UF10%

X5R 2

1 C16861UF

10V

402

10%

X5R

2

1R1600

NO STUFF

MF-LF1/16W

5%

402

1K

2

1R16021K

MF-LF1/16W

5%

402

2

1R1601

MF-LF1/16W5%

402

1K

2

1R1603CPUPOC3U

MF-LF1/16W5%

402

1K

2

1R1606

1/16W

NO STUFF

1K

402

5%

MF-LF

2

1R1604

CPUPOC4U

MF-LF402

5%1K

1/16W

2

1R1605

MF-LF1/16W5%

402

1K

CPUPOC5U

2

1R1616

MF-LF

1K5%

1/16W

402

2

1R1615

402

CPUPOC5D

1K

MF-LF1/16W5%

2

1R1614

CPUPOC4D

MF-LF402

1/16W5%1K

2

1R1612

NO STUFF

5%1/16W

1K

402MF-LF

2

1R16131K

402

5%1/16WMF-LF

CPUPOC3D

2

1R1610

1/16W

402MF-LF

1K5%

2

1R1611NO STUFF

1K5%1/16WMF-LF402

2

1R16081K

402

5%1/16WMF-LF

NO STUFF

2

1R1618

402MF-LF1/16W

5%1K

NO STUFF

13 64 89

13 64 89

13 64 89

13 64 89

13 64 89

13 64 89

13 64 89

13 64 89

2

1R1607

MF-LF1/16W5%

402

1K

NO STUFF

2

1R16171K5%1/16WMF-LF402

13 64 89 2

1 C1609

CERM-X5R6.3V20%22UF

805-3

2

1 C1608

6.3V20%22UF

CERM-X5R805-3

2

1 C1607

6.3V20%22UF

CERM-X5R805-3

2

1 C1619

CERM-X5R

NOSTUFF

805-3

22UF20%6.3V

2

1 C1618NOSTUFF

805-3CERM-X5R

22UF20%6.3V

2

1 C161722UF

NOSTUFF

805-3CERM-X5R

20%6.3V

2

1 C1616

805-3CERM-X5R

22UF20%6.3V

2

1 C1615

805-3CERM-X5R

22UF20%6.3V

2

1 C1614

805-3CERM-X5R

22UF20%6.3V

2

1 C1613

805-3CERM-X5R

22UF20%6.3V

2

1 C1612

6.3V20%22UF

CERM-X5R805-3

2

1 C1611

805-3CERM-X5R

20%6.3V

22UF

2

1 C1610

805-3CERM-X5R

22UF

6.3V20%

2

1 C1600

6.3V20%

CERM-X5R805-3

22UF

2

1 C1601

6.3VCERM-X5R

20%22UF

805-3

2

1 C1602

805-3CERM-X5R

22UF20%6.3V

2

1 C1603

6.3V20%22UF

CERM-X5R805-3

2

1 C160422UF

6.3V20%

CERM-X5R805-3

2

1 C165022UF20%

CERM-X5R6.3V

805

Place under socket cavity on secondary side.

2

1 C1605

6.3V20%22UF

CERM-X5R805-3

2

1 C1606

6.3V20%22UF

CERM-X5R805-3

2

1 C1651

805

6.3V20%22UF


CERM-X5R 2

1 C1652

6.3V20%22UF

805CERM-X5R


2

1 C1653

6.3V20%22UF

805CERM-X5R


2

1 C165422UF

CERM-X5R6.3V20%

805


2

1 C1655

6.3V20%22UF

805CERM-X5R


2

1 C1656

6.3V20%

805


22UF

CERM-X5R 2

1 C1657

6.3V20%22UF

805


CERM-X5R

2

1 C166610uF20%6.3VX5R603

Place at edge of socket.

2

1 C1665

X5R603

10uF20%6.3V


2

1 C166410uF

603

20%6.3VX5R


2

1 C166310uF20%6.3VX5R603


2

1 C1662

603

6.3VX5R


20%10uF

2

1 C1661

20%10uF

603

6.3VX5R


2

1 C1660

X5R

10uF20%6.3V


603

2

1 C1680

805CERM-X5R

22uF

6.3V20%

2

1 C1682

X5R

10%1UF

10V

402

2

1 C1683

10V10%

X5R402

1UF

2

1 C1694

10V

402

10%

X5R

1UF

CPUPOC3D,CPUPOC4D,CPUPOC5DCPUPOC_IMAX_DIS

CPUPOC3D,CPUPOC4D,CPUPOC5UCPUPOC_IMAX_0_40

CPUPOC3D,CPUPOC4U,CPUPOC5DCPUPOC_IMAX_40_60

CPUPOC3U,CPUPOC4U,CPUPOC5DCPUPOC_IMAX_120_140

CPUPOC3U,CPUPOC4U,CPUPOC5UCPUPOC_IMAX_140_180

CPUPOC3U,CPUPOC4D,CPUPOC5UCPUPOC_IMAX_100_120


CPU NON-GFX DECOUPLING

CPUPOC3D,CPUPOC4U,CPUPOC5UCPUPOC_IMAX_60_80

CPUPOC_IMAX_80_100 CPUPOC3U,CPUPOC4D,CPUPOC5D

=PPVTT_S0_CPU

CPU_PSI_L

CPU_VID<7>

CPU_VID<6>

CPU_VID<0>

CPU_VID<3>

CPU_VID<4>

CPU_VID<5>

=PPVTT_S0_CPU

=PP1V8_S0_CPU_PLL

CPU_VID<2>

CPU_VID<1>

=PP1V5_CPU_MEM

=PPVCORE_S0_CPU

16 OF 110

A.0.0

051-8600

16 OF 92

6 11 13 16 46 64

6 11 13 16 46 64

6 13 63

6 13 29

6 13

www.vinafix.vn




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

150 MA 75 MA

69 mA

75 MA

Grounding the Rail because Integrated Graphics wont be used

69 mA

21

R1760

1/16W5%

0

402MF-LF

21

R1765

5%1/16W

0

402MF-LF

21

R1750

MF-LF1/16W5%

402

0

2

1R1700

5%1/16WMF-LF402

0


CPU/PCH GFX DECOUPLING

PP3V3_S0_PCH_VCCA_DACMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

=PP3V3_S0_PCH_VCCADAC

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP1V05_S0_PCH_VCCADPLLA

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM

PP1V05_S0_PCH_VCCADPLLB

VOLTAGE=1.05V

=PPVAXG_S0_CPU

=PP1V05_S0_PCH_VCCADPLL

17 OF 110

A.0.0

051-8600

17 OF 92

22 89 6

22 89

22 89

6 13

6

www.vinafix.vn

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

BI

BI

BI

BI

OUT

BI

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

BI

OUT

BI

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

SPI

(1 OF 10)

SATA

JTAG

IHDA

LPC

RTC

TRST*

GPIO33

GPIO13

SRTCRST*

SPKR

SPI_MOSI

SPI_MISO

SPI_CS1*

SPI_CS0*

SPI_CLK

SERIRQ

SATALED*

SATAICOMPO

SATAICOMPI

SATA5TXP

SATA5TXN

SATA5RXP

SATA5RXN

SATA4TXP

SATA4TXN

SATA4RXP

SATA4RXN

SATA3TXP

SATA3TXN

SATA3RXP

SATA3RXN

SATA2TXP

SATA2TXN

SATA2RXP

SATA2RXN

SATA1TXP

SATA1TXN

SATA1RXP

SATA1RXN

SATA1GP/GPIO19

SATA0TXP

SATA0TXN

SATA0RXP

SATA0RXN

SATA0GP/GPIO21

RTCX2

RTCX1

RTCRST*

LDRQ1*/GPIO23

LDRQ0*

JTAG_TMS

JTAG_TDO

JTAG_TDI

JTAG_TCK

INTRUDER*

HDA_SYNC

HDA_SDO

HDA_SDIN3

HDA_SDIN2

HDA_SDIN1

HDA_SDIN0

HDA_BCLK

FWH4/LFRAME*

FWH3/LAD3

FWH2/LAD2

FWH1/LAD1

FWH0/LAD0

INTVRMEN

HDA_RST*

PCI-E*

FLEX

CLOCK

PEG

SMBUS

(2 OF 10)

FROM CLK BUFFER

SML1DATA/GPIO75

SML1CLK/GPIO58

SML1ALERT*/GPIO74

SML0DATA

SML0CLK

SML0ALERT*/GPIO60

SMBDATA

SMBCLK

SMBALERT*/GPIO11

REFCLK14IN

PETP8

PETP7

PETP6

PETP5

PETP4

PETP3

PETP2

PETP1

PETN8

PETN7

PETN6

PETN5

PETN3

PETN2

PETN1

PERP8

PERP7

PERP6

PERP5

PERP4

PERP3

PERP2

PERP1

PERN8

PERN7

PERN6

PERN5

PERN4

PERN3

PERN2

PERN1

PEG_B_CLKRQ*/GPIO56

PEG_A_CLKRQ*/GPIO47

PCIECLKRQ5*/GPIO44

PCIECLKRQ4*/GPIO26

PCIECLKRQ3*/GPIO25

PCIECLKRQ2*/GPIO20

PCIECLKRQ1*/GPIO18

PCIECLKRQ0*/GPIO73

CLKOUTFLEX3/GPIO67

CLKOUTFLEX2/GPIO66

CLKOUTFLEX1/GPIO65

CLKOUTFLEX0/GPIO64

CLKOUT_PEG_B_P

CLKOUT_PEG_B_N

CLKOUT_PEG_A_P

CLKOUT_PEG_A_N

CLKOUT_PCIE5P

CLKOUT_PCIE5N

CLKOUT_PCIE4P

CLKOUT_PCIE4N

CLKOUT_PCIE3P

CLKOUT_PCIE3N

CLKOUT_PCIE2P

CLKOUT_PCIE2N

CLKOUT_PCIE1P

CLKOUT_PCIE1N

CLKOUT_PCIE0P

CLKOUT_PCIE0N

CLKOUT_DMI_P

CLKOUT_DMI_N

CLKIN_SATA_P/CKSSCD_P

CLKIN_SATA_N/CKSSCD_N

CLKIN_PCILOOPBACK

CLKIN_DOT_96P

CLKIN_DOT_96N

CLKIN_DMI_P

CLKIN_BCLK_P

CLKIN_BCLK_N

XTAL25_OUT

XTAL25_IN

XCLK_RCOMP

CLKIN_DMI_N

CLKOUT_DP_N/CLKOUT_BCLK1_N

CLKOUT_DP_P/CLKOUT_BCLK1_P

PETN4

IN

OUT

BI

OUT

OUT

IN

IN

OUT

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(IPD)

(IPD)

(IPU)

(IPD)

(IPD)

PLACE THIS RESISTOR NEAR THE PCH PIN

(IPU)

(IPU)

(IPU)

(IPU)

(IPD)

(IPU)

(IPD)

(IPU)

(IPU)

DOES THIS NEED LENGTH MATCH???

(IPD)

PLACE THESE 33 OHM RESISTORS CLOSE TO PCH (MIN 500MIL)

(IPD)

(IPD)

(IPD)

(IPD)

(IPD)

(IPU)

TIE THEM TOGETHER VERY CLOSE TO PINS. PLACE THE RESISTOR LESS THAN 200MILS FROM THE PINS

(IPD)

(IPD)

27 85

55 85

25

47 54 85

47 85

47 54 85

18 25

18 25

18 25

47 54 85

45 47 85

45 47 85

45 47 85

45 47 85

45 47 85

45 47

42 84

42 84

42 84

42 84

42 84

42 84

42 84

42 84

36 86

36 86

33 84

33 84

39 84

39 84

36 86

36 86

33 84

33 84

39 84

39 84

36 84

15 36

36 84

33 84

33 84

15 25 33

39 84

39 84

15 25 40

11 84

11 84

9

9

9

11 84

11 84

26 84

26 84

26 84

26 84

26 84

26 84

26 84

26 84

26 85

27 85

27 85

27 85

27 85

48 88

48 88

48 88

48 88

8

8

8

8

2

1R1800

402

1/16W5%

MF-LF

330K

2

1R18011M

1/16W5%

MF-LF402

2

1R180220K

1/16W

402

5%

MF-LF

2

1R1803

MF-LF402

5%20K

1/16W

2

1 C18031UF10%

X5R10V

402

2

1C1802

10V

402X5R

10%1UF

2

1R1830

MF-LF402

37.4

1/16W1%

2

1R1820

MF-LF402

1/16W5%10K

8

8

15

2

1R189090.9

1/16W1%

402MF-LF

21

R1810

5%

33

MF-LF1/16W

402

21

R1811

402MF-LF

33

1/16W5%

21

R1812

1/16W5%

MF-LF402

33

21

R181333

MF-LF

5%1/16W

402

55 85

55 85

55 85

55 85

AL35

AP28

AJ38

T34

V30

T32

V32

V31

AL40

AN39

T41

T39

AD32

AD33

AF34

AF35

AE38

AD38

AE40

AF41

AB38

AB37

AC39

AC41

AB32

AB31

AD35

AD36

AB35

AB36

Y37

Y38

AH38

V38

U38

V40

W41

AJ37

BA30

AW30

AK24

AP14

AL12

AL34

AN34

AL36

AK33

AW31

AN24

AU15

AP16

AN16

AU13

AP18

AV13

AV14

AW14

AT16

AR16

AR14

AM16

AL16AK16

AT12

U1800OMIT

FCBGA

IBEX-PEAK-DESKTOP

Y2

Y4

AA3

AR31

AV31

AY32

AT34

AW33

BA33

AM31

AV32

AL31

AF7

J12

D10

H11

G12

L14

G14

G16

D17

K12

D11

G11

H12

K14

H14

H16

D18

B8

B11

C9

B13

D13

C14

A16

C16

C7

A12

D8

C12

D14

B15

B17

D15

AW35

AV39

AW38

AW37

AP33

AP38

AM39

AN35

AL3

AB6

AK1

AD10

V8

V7

Y7

Y6

Y9

Y8

P6

P7

M10

M9

M7

M6

T9

T10

W1

V2

H38

H37

J41

H40

Y35

Y34

AL11

AL22

AM22

G20

H20

Y31

Y32

U1800FCBGA

OMIT

IBEX-PEAK-DESKTOP

2

1R1850

MF-LF402

10K5%

1/16W

15

2

1R1856515%1/16WMF-LF402

2

1R1881XDP

5%

MF-LF402

1/16W

200

2

1R1883XDP

200

MF-LF

5%

402

1/16W

48 88

48 88

2

1R1853

5%

402MF-LF

10K

1/16W

2

1R1854

402

5%1/16WMF-LF

10K

2

1R1855

MF-LF1/16W5%

402

10K

10 84

10 84

42 84

42 84

42 84

42 84

15 45

2

1R1882XDP

5%

MF-LF402

1/16W

100

2

1R1884XDP

5%

MF-LF402

1/16W

100

21R18605% 1/16W MF-LF 402

33

21R1861 33402MF-LF1/16W5%

21R1862 33402MF-LF1/16W5%

21R1863MF-LF5% 1/16W 40233

21R18641/16W

33402MF-LF5%

21R1822402MF-LF5% 1/16W

22

21R1823402

22

MF-LF1/16W5%


PCH SATA/PCIE/CLK/LPC/SPI


PCH_SATAICOMP

=PP3V3_S0_PCH

LPC_R_AD<1>

TP_LPC_DREQ0_L

LPC_SERIRQ

SATA_SSD_D2R_N

PCIE_EXCARD_D2R_P

PCIE_EXCARD_D2R_N

PCIE_EXCARD_R2D_C_N

TP_PCIE_T28_D2R_N<0>

TP_PCIE_T28_D2R_P<1>

TP_PCIE_T28_R2D_C_N<2>


TP_PCIE_T28_R2D_C_P<1>


SPI_MOSI_1_RSPI_MOSI_R

SPI_CLK_1_R

TP_JTAG_PCH_TRST_L

JTAG_PCH_TDI

=PP3V3_S5_PCH

PCH_INTRUDER_L

SPI_MISO

TP_SPI_CS1_L

PP3V3_G3_RTC

PCH_INTVRMEN_L

PCH_SRTCRST_L

SPI_CS0_R_L

TP_SATA_F_D2RP

TP_SATA_F_R2D_CN

TP_SATA_F_R2D_CP

TP_HDA_SDIN2



TP_SATA_E_D2RN


JTAG_PCH_TMSJTAG_PCH_TCK

PCH_SATALED_L

PCH_CLK32K_RTCX2

TP_PCIE_CLK100M_T28_N

TP_PCIE_CLK100M_T28_P

T28_CLKREQ_L

TP_PCIE_CLK100M_PE5P

PEB_CLKREQ_L PCH_CLKOUTFLEX3

PCH_CLKOUTFLEX2

PCH_XCLK_RCOMP

PCH_CLK25M_XTALOUT

BRCRYPT_RESET

JTAG_PCH_TMS

SML_PCH_1_ALERT_L


DMI_MIDBUS_CLK100M_P

DMI_MIDBUS_CLK100M_N

RTC_RESET_L

PCH_INTVRMEN_L

PCIE_MINI_D2R_N

PCIE_CLK100M_CPU_N

PCH_SPKR

PCH_CLK32K_RTCX1

SPI_DESCRIPTOR_OVERRIDE_LTP_SATA_D_R2D_CN

TP_SATA_D_D2RN

SATA_ODD_D2R_N

TP_SATA_E_D2RP

HDA_SYNC_R

SATA_SSD_R2D_C_P

SATA_SSD_R2D_C_N

SATA_SSD_D2R_P

TP_SATA_D_D2RP

TP_SATA_D_R2D_CP


PCIE_ENET_D2R_N

PCIE_ENET_D2R_P

PCIE_ENET_R2D_C_N

HDA_BIT_CLK

HDA_SYNC_R

SML_PCH_1_ALERT_L

SML_PCH_0_ALERT_L

SML_PCH_0_ALERT_L

HDA_SDOUT

HDA_RST_LHDA_RST_R_L

HDA_BIT_CLK_R

HDA_SYNC

SMBUS_PCH_DATA

SML_PCH_0_DATA

SML_PCH_1_CLK

SML_PCH_0_CLK

PCIE_EXCARD_R2D_C_P

GFX_CLK120M_DPLLSS_P

GFX_CLK120M_DPLLSS_N

PCH_CLK100M_SATA_N

PCH_CLK14P3M_REFCLK

PEG_CLKREQ_L

PEG_CLK100M_P

PEG_CLK100M_N

PCH_CLK33M_PCIIN

PCH_CLK96M_DOT_P

PCH_CLK96M_DOT_N

FSB_CLK133M_PCH_P

PCIE_CLK100M_PCH_N

SATA_ODD_R2D_C_P

FSB_CLK133M_PCH_N

TP_SATA_E_R2D_CN

EXCARD_CLKREQ_L

PCH_INTRUDER_L

SMBUS_PCH_CLK

SMC_WAKE_SCI_L

PCIE_ENET_R2D_C_P

PCIE_MINI_D2R_P

PCIE_MINI_R2D_C_N

SML_PCH_1_DATA

PCIE_CLK100M_PCH_PTP_PCIE_T28_D2R_P<3>


PCIE_FW_R2D_C_N

SATA_HDD_R2D_C_P

PCIE_CLK100M_ENET_P

PCH_CLK100M_SATA_P

PCH_SRTCRST_L

HDA_BIT_CLK_R

JTAG_PCH_TCK

ENET_ENERGY_DET

HDA_RST_R_L

PCH_GPIO21_SATA0GP

HDA_SDOUT_R

=PP3V3_S0_SATALED


HDA_SDOUT_R

TP_HDA_SDIN3

TP_HDA_SDIN1

HDA_SDIN0

PCH_GPIO19_SATA1GP

PCH_SATALED_L

BRCRYPT_PWR_EN

TP_PCIE_CLK100M_PE5N


PCH_CLKOUTFLEX1

PCH_CLK25M_XTALIN

=PP3V3_S5_PCH

SMC_WAKE_SCI_L

RTC_RESET_L

JTAG_PCH_TDI

PCIE_CLK100M_CPU_P

PCIE_FW_R2D_C_P

PCIE_MINI_R2D_C_P

PCIE_FW_D2R_N

PCIE_FW_D2R_P

MINI_CLKREQ_L

PCIE_CLK100M_EXCARD_P

PCIE_CLK100M_FW_P

PCIE_CLK100M_FW_N

PCIE_CLK100M_MINI_N

PCIE_CLK100M_ENET_N



ENET_CLKREQ_L

PCIE_CLK100M_MINI_P

FW_CLKREQ_L

PCIE_CLK100M_EXCARD_N

SATA_HDD_D2R_N

SATA_HDD_R2D_C_N

SATA_HDD_D2R_P

TP_SATA_E_R2D_CP

TP_SATA_F_D2RN

TP_LPC_DREQ1_L

SATA_ODD_R2D_C_N

SATA_ODD_D2R_P

LPC_AD<1>

LPC_AD<3>

LPC_FRAME_L

LPC_R_AD<3>

LPC_FRAME_R_L

LPC_R_AD<0> LPC_AD<0>

LPC_AD<2>LPC_R_AD<2>

JTAG_PCH_TDO

SPI_CLK_R

18 OF 110

A.0.0

051-8600

18 OF 92

6 22 24

85

6 21 24 68

8

6 18 19 24

18

22 24 27 89

18

18

8

8

8

8

8

18 25 18 25

18 42

8

15 15

15

85

15 44

18

18 91

18

15

8

8

8

18 85

8

8

18 85

18

18

18

18 85

18 85

8

18

18 45

18

18 85

15 36

18 85

15 25

18 85

6 42

6 19 22 24

18 85

8

8

15 25

18 42

15 44

8

15

6 18 19 24

18 45

18 91

18 25

8

8

8

www.vinafix.vn

IN

OUT

OUT

OUT

OUT

OUT

IN

BI

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

MANAGEMENT

(3 OF 10)

SYSTEM POWER

FDI

DMI

TP23

GPIO32

GPIO72

SYS_RESET*

SYS_PWROK

SUSCLK/GPIO62

SUS_STAT*/GPIO61

SUS_PWR_DN_ACK/GPIO30

SLP_S5*/GPIO63

SLP_S4*

SLP_S3*

SLP_M*

SLP_LAN*/GPIO29

RSMRST*

RI*

PWROK

PWRBTN*

PMSYNCH

LAN_RST*

FDI_RXP7

FDI_RXP6

FDI_RXP5

FDI_RXP4

FDI_RXP3

FDI_RXN5

FDI_RXN4

FDI_RXN3

FDI_RXN2

FDI_RXN1

FDI_RXN0

FDI_LSYNC1

FDI_LSYNC0

FDI_FSYNC1

FDI_FSYNC0

DRAMPWROK

DMI3TXP

DMI3TXN

DMI3RXP

DMI2TXP

DMI2TXN

DMI1TXP

DMI1TXN

DMI0TXP

DMI0TXN

DMI0RXN

DMI_ZCOMP

DMI_IRCOMP

ACPRESENT/GPIO31

WAKE*

FDI_RXN6

FDI_RXN7

FDI_RXP2

FDI_INT

FDI_RXP1

FDI_RXP0

DMI1RXN

DMI2RXN

DMI3RXN

DMI0RXP

DMI1RXP

DMI2RXP

MEPWROK

DIGITAL DISPLAY INTERFACE

(4 OF 10)

CRT

SDVO_TVCLKINP

SDVO_TVCLKINN

SDVO_STALLP

SDVO_STALLN

SDVO_INTP

SDVO_INTN

SDVO_CTRLDATA

SDVO_CTRLCLK

DDPD_HPD

DDPD_CTRLDATA

DDPD_CTRLCLK

DDPD_AUXP

DDPD_AUXN

DDPD_3P

DDPD_3N

DDPD_2P

DDPD_2N

DDPD_1P

DDPD_1N

DDPD_0P

DDPD_0N

DDPC_3P

DDPC_3N

DDPC_2P

DDPC_1P

DDPC_1N

DDPC_0P

DDPB_HPD

DDPB_AUXP

DDPB_AUXN

DDPB_3N

DDPB_2P

DDPB_2N

DDPB_1P

DDPB_1N

DDPB_0P

DDPB_0N

DAC_IREF

CRT_VSYNC

CRT_RED

CRT_IRTN

CRT_HSYNC

CRT_GREEN

CRT_DDC_DATA

CRT_DDC_CLK

DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_2N

CRT_BLUE

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(IPU)

(IPU)

(IPD)

(IPD)

(IPD)

(IPD)

PLACE CLOSE TO U1800 PIN

To R5089,R4953

To Q500

KEEPING TP, IF NEED TO USE IT LATER

(IPU)

To U6900

SHORT THESE TWO PINS VERY NEAR THE PINSPLACE THE RESISTOR VERY CLOSE TO COMMON POINT

To U3300

EXTERNAL DP

INTERNAL DP

10 84

15

15

15

15

15

2

1R1900

402MF-LF

49.9

1/16W1%

19 33 37

15 45 47 91

9 85 91

45 91

19 32 91

5 32 33 37 46 62 63 91

5 62 91

11 91

62 91

25 45 91

19

15 45 91

15 91

63 91

63 91

32 63 91

27 45 91

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

10 84

2

1R1905

1%10K

1/16WMF-LF402

AR33

AH35

AL38

AT38

AH31

AK31

AT37

AU36

AP35

AV35

AT36

BA35

AL24

AT33

AM24

AK36

C37

AL33

AY31

AY34

AJ40

B34

B32

B31

J31

G31

D32

G30

J30

C33

A33

C30

K31

F31

D31

H30

K30

D35

C35

B36

E36

E34

AW32

C21

D21

K24

L24

H18

G18

G24

H24

D20

E20

F22

G22

C19

B20

H22

J22

B18

A19

AP40

U1800OMIT

FCBGA

IBEX-PEAK-DESKTOP

L6

L7

N2

P3

M3

N4

AB12

AB13

H2

AB9

AB7

K4

L4

F9

G9

F8

G8

D6

D7

C5

B6

J3

AB11

AB10

L9

L10

D3

D2

B4

C4

F2

G3

E3

F4

J1

M1

L2

G4

H4

H6

F6

K11

J11

K10

J8

AE2

AD3

AC1

AB4

AD4

AC3

AG4

AG2

AB2

U1800

IBEX-PEAK-DESKTOP

FCBGA

OMIT

2

1R1915100K

1/16W1%

MF-LF402

11 91

45 47

2

1R1925

MF-LF

1K1%

1/16W

402

2

1R19511K5%1/16WMF-LF402

2 1

R1960

1/16W

402

0

5%

NOSTUFF

MF-LF

2

1R196110K

402

1/16W1%

MF-LF

2 1

R196633

1/16WMF-LF402

5%

2 1

R196733

MF-LF402

5%1/16W

2 1

R1968

5%

402MF-LF1/16W

33

2

1R1909

10K

1/16WMF-LF402

1%

PCH DMI/FDI/GRAPHICS

PM_BATLOW_L

PCH_ACPRESENT_GPIO31

PM_PWRBTN_L

PM_MEM_PWRGD

PM_LAN_PWRGD

PM_ME_PWRGD

PM_PCH_PWRGD

PM_SYS_PWRGD

PM_SYSRST_L

DMI_S2N_P<3>

DMI_S2N_P<2>

DMI_S2N_P<1>

PM_SLP_S4_3_L

PM_SLP_S4_L

SMC_ADAPTER_EN

PM_SLP_S4_2_L

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<0>

DMI_N2S_N<3>

DMI_N2S_N<2>

DMI_N2S_N<1>

TP_PCH_FDI_RX_P<0>

TP_PCH_FDI_RX_P<1>

PCH_FDI_INT

TP_PCH_FDI_RX_P<2>

TP_PCH_FDI_RX_N<7>

TP_PCH_FDI_RX_N<6>

PCIE_WAKE_L

DMI_N2S_N<0>

DMI_S2N_N<0>

DMI_S2N_P<0>

DMI_S2N_N<1>

DMI_S2N_N<2>

DMI_N2S_P<3>

DMI_S2N_N<3>

PCH_FDI_FSYNC<0>

PCH_FDI_FSYNC<1>

PCH_FDI_LSYNC<0>

PCH_FDI_LSYNC<1>

TP_PCH_FDI_RX_N<0>

TP_PCH_FDI_RX_N<1>

TP_PCH_FDI_RX_N<2>

TP_PCH_FDI_RX_N<3>

TP_PCH_FDI_RX_N<4>

TP_PCH_FDI_RX_N<5>

TP_PCH_FDI_RX_P<3>

TP_PCH_FDI_RX_P<4>

TP_PCH_FDI_RX_P<5>

TP_PCH_FDI_RX_P<6>

TP_PCH_FDI_RX_P<7>

PM_SYNC

PM_RSMRST_PCH_L

TP_SLP_LAN_L

PM_SLP_M_L

PM_SLP_S3_L

PM_SLP_S4_L

PM_SLP_S5_L

LPC_PWRDWN_L

PM_CLK32K_SUSCLK_R

PM_CLKRUN_L

TP_PM_SLP_DSW_L

PCH_RI_L

PM_SUS_PWR_ACK

PM_SLP_S4_1_L

PCH_ACPRESENT_GPIO31

PCH_DMI_COMP

=PP3V3_S5_PCH

=PP3V3_S5_PCH


PCIE_WAKE_L

=PP3V3_S5_PCH

TP_DP_IG_C_MLN<3>

TP_DP_IG_D_CTRL_CLK

TP_DP_IG_D_AUXP

TP_DP_IG_D_HPD

TP_DP_IG_D_MLN<0>

TP_DP_IG_C_MLP<2>

TP_DP_IG_C_MLP<1>

TP_DP_IG_C_MLN<1>

TP_DP_IG_C_MLP<0>

TP_DP_IG_C_MLN<0>

TP_DP_IG_C_AUX_P

TP_DP_IG_C_AUX_N

TP_DP_IG_C_CTRL_DATA

TP_DP_IG_C_CTRL_CLK

TP_DP_IG_B_MLP<3>

TP_DP_IG_B_MLN<3>

TP_DP_IG_B_MLN<2>

TP_DP_IG_C_HPD

TP_DP_IG_C_MLN<2>

TP_DP_IG_D_CTRL_DATA

TP_CRT_IG_DDC_DATA

TP_CRT_IG_DDC_CLK

TP_CRT_IG_VSYNC

TP_CRT_IG_RED

TP_DP_IG_D_MLP<0>

TP_DP_IG_D_MLN<1>

TP_DP_IG_D_MLP<1>

TP_DP_IG_D_MLP<2>

TP_DP_IG_D_MLP<3>

TP_DP_IG_D_AUXN

TP_DP_IG_C_MLP<3>

TP_DP_IG_B_AUX_N

TP_DP_IG_B_AUX_P

TP_DP_IG_B_DDC_CLK

TP_DP_IG_B_DDC_DATA

TP_SDVO_TVCLKINN

TP_SDVO_TVCLKINP

TP_SDVO_STALLN

TP_SDVO_STALLP

TP_SDVO_INTN

TP_SDVO_INTP

TP_CRT_IG_HSYNC

TP_CRT_IG_GREEN

TP_DP_IG_B_MLP<0>

TP_DP_IG_B_MLN<1>

TP_DP_IG_B_MLP<1>

TP_DP_IG_B_MLP<2>

PCH_DAC_IREF

TP_DP_IG_B_MLN<0>

TP_DP_IG_B_HPD

TP_CRT_IG_BLUE

TP_DP_IG_D_MLN<2>

TP_DP_IG_D_MLN<3>

19 OF 110

A.0.0

051-8600

19 OF 92

5 91

19 32 91

45 46

45 46 91

91

62 91

19

85

6 18 19 24

6 18 19 24

6 18 22 24

19 33 37

6 18 19 24

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

www.vinafix.vn

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

PCI

NVRAM

USB

(5 OF 10)

TRDY*

USBRBIAS*

USBRBIAS

USBP9P

USBP9N

USBP8P

USBP8N

USBP7P

USBP7N

USBP6P

USBP6N

USBP5P

USBP5N

USBP4P

USBP4N

USBP3P

USBP3N

USBP2P

USBP2N

USBP1P

USBP1N

USBP13P

USBP13N

USBP12P

USBP12N

USBP11P

USBP11N

USBP10P

USBP10N

USBP0P

USBP0N

STOP*

SERR*

REQ3*/GPIO54

REQ2*/GPIO52

REQ1*/GPIO50

REQ0*

PME*

PLTRST*

PLOCK*

PIRQH*/GPIO5

PIRQG*/GPIO4

PIRQF*/GPIO3

PIRQE*/GPIO2

PIRQD*

PIRQC*

PIRQB*

PIRQA*

PERR*

PCIRST*

PAR

OC7*/GPIO14

OC6*/GPIO10

OC5*/GPIO9

OC4*/GPIO43

OC3*/GPIO42

OC2*/GPIO41

OC1*/GPIO40

OC0*/GPIO59

NV_WR1_RE*

NV_WR0_RE*

NV_WE_CK1*

NV_WE_CK0*

NV_RCOMP

NV_RB*

NV_DQS1

NV_DQS0

NV_DQ9/NV_IO9

NV_DQ8/NV_IO8

NV_DQ7/NV_IO7

NV_DQ6/NV_IO6

NV_DQ5/NV_IO5

NV_DQ4/NV_IO4

NV_DQ3/NV_IO3

NV_DQ2/NV_IO2

NV_DQ15/NV_IO15

NV_DQ14/NV_IO14

NV_DQ13/NV_IO13

NV_DQ12/NV_IO12

NV_DQ11/NV_IO11

NV_DQ10/NV_IO10

NV_DQ1/NV_IO1

NV_DQ0/NV_IO0

NV_CE2*

NV_CE1*

NV_CE0*

NV_ALE

IRDY*

GNT3*/GPIO55

GNT2*/GPIO53

GNT1*/GPIO51

GNT0*

FRAME*

DEVSEL*

CLKOUT_PCI4

CLKOUT_PCI3

CLKOUT_PCI2

CLKOUT_PCI1

CLKOUT_PCI0

C/BE3*

C/BE2*

C/BE1*

C/BE0*

AD9

AD8

AD7

AD6

AD5

AD4

AD31

AD30

AD3

AD29

AD28

AD27

AD26

AD25

AD24

AD23

AD22

AD21

AD20

AD2

AD19

AD18

AD17

AD16

AD15

AD14

AD13

AD12

AD11

AD10

AD0

NV_CLE

NV_CE3*

AD1

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Unused

Unused

Unused

WM

Blu-ray transcript

(DPD)

TIE TRACES TOGETHER CLOSE TO PINS

EHCI1

(IPU)

(IPU)

EHCI2

(IPD)

(IPD)

(IPU)

Unused

Unused

(DPD)

USB HUB 1

NOTE: Internal pull-downs on all USB pins

PLACE THE RESISTOR CLOSE TO COMMON POINT

Unused

USB HUB 2

Unused

Unused

Unused

Unused

34 85

34 85

8

8

44 85

44 85

8

44 85

8

8

44 85

8

8

8

35 85

35 85

8

8

2

1R2066

402

10K

1/16WMF-LF

5%

2

1R206510K

5%

402

1/16WMF-LF

2

1R2064

MF-LF

5%1/16W

402

10K

2

1R2067

5%

MF-LF1/16W

10K

402

2

1R2062

MF-LF1/16W

402

5%10K

2

1R2061

NOSTUFF

1/16W

10K5%

MF-LF402

2

1R2060

1/16WMF-LF

10K

402

5%

8

8

8

8

2

1R2070

402

1/16WMF-LF

1%22.6

AY15

AV15

AN20

AM20

AY18

BA19

AW19

AV20

AL20

AK20

AW21

AY20

AV22

AV21

AP22

AR22

AY22

AW23

AY24

BA23

BA16

AY17

AL18

AK18

AT20

AR20

AV18

AV17

AY25

AW25

AL6

AN8

AV6

AH8

AY4

AW5

AP4

AH11

AV34

AK12

AW4

AP12

AH7

AU8

BA5

AT11

AR4

AT8

AT4

AH10

AP6

AM30

AL30

AL28

AP31

AP30

AK28

AT30

AT31

J35

J36

F38

M31

L36

M32

F40

P36

F36

M30

M34

M36

L33

M35

P33

T31

P35

F33

D40

G33

E39

F37

H33

T33

L35

E41

P32

H35

H36

J34

AP7

AM3

BA9

AK6

AK11

AL7

AT6

AD12

AD9

AF9

AD7

AF6

AW10

AP5

AY6

AV3

AR3

AW9

AV7

AR9

AV8

AP9

AN11

AH12

AY10

AN6

AK7

AN7

AL9

AV10

AL4

AT2

AL2

AT5

AL10

AU6

AY8

AM4

AM11

AM2

AN3

AU1

AP2

AU3

AR8

AW7

AP11

AT9

U1800

IBEX-PEAK-DESKTOP

OMIT

FCBGA

21R2010 10K4025% 1/16W MF-LF

21R2011402

10K5% 1/16W MF-LF

21R2012402

10K5% 1/16W MF-LF

21R20131/16W

10K4025% MF-LF

21R20155%

10KMF-LF 4021/16W

21R20161/16W MF-LF 402

10K5%

21R20175%

10K402MF-LF1/16W

21R20185%

10K402MF-LF1/16W

21R20201/16W MF-LF 4025%

10K

21R20211/16W 402MF-LF5%

10K

21R2022MF-LF 4025% 1/16W

10K

27 91

27 85

27 85

27 85

21R20234021/16W MF-LF5%

10K

21R20244021/16W MF-LF

10K5%

21R2026MF-LF1/16W5% 402

10K

21R2025 10KMF-LF5% 4021/16W

21R2027 10KMF-LF5% 4021/16W

8

8

8

8

21R20304025%

10KMF-LF1/16W

21R2031MF-LF 402

10K5% 1/16W 8

8


PCH PCI/FLASHCACHE/USB

TP_NV_DQ<10>

TP_NV_DQ<12>

=PP3V3_S5_PCH_GPIO

PCI_INTB_L

TP_USB_9N

USB_HUB_SOFT_RESET_L

PCH_GPIO59_OC0_L

PCH_GPIO10_OC6_L

PCH_GPIO41_OC2_L

TP_NV_DQ<8>

TP_USB_11N

TP_USB_12P

TP_NV_DQ<9>

TP_NV_RB_L

USB_HUB1_UP_N

PCH_GPIO43_OC4_L

PCH_GPIO14_OC7_L

PCH_GPIO42_OC3_L

PCH_GPIO9_OC5_L

TP_USB_12N

TP_USB_9P

TP_PCI_AD<12>

TP_PCI_AD<4>

TP_USB_11P

PCH_USB_RBIAS

TP_USB_10N

TP_USB_10P

USB_HUB1_UP_P

PCH_NV_CLETP_PCI_AD<24>

USB_HUB2_UP_P

TP_USB_7P

TP_NV_RCOMP

PCI_REQ0_L

PCH_PCI_GNT2_L

TP_PCI_AD<13>

TP_NV_DQ<14>

TP_NV_DQ<11>

TP_PCI_AD<2>

TP_PCI_AD<3>

TP_NV_CE_L<1>

TP_NV_DQS<0>

TP_NV_DQ<0>

TP_PCI_AD<11>

TP_PCI_AD<9>

TP_PCI_AD<14>

TP_PCI_AD<17>

TP_NV_DQS<1>

TP_NV_CE_L<2>

TP_NV_CE_L<0>

TP_NV_DQ<6>

PCH_NV_ALE

PCI_DEVSEL_L

TP_NV_DQ<4>

TP_NV_DQ<15>

TP_PCI_AD<15>

TP_PCI_AD<21>

PLT_RESET_L

TP_PCI_AD<26>

TP_PCI_AD<29>

TP_NV_DQ<1>

TP_PCI_AD<20>

TP_PCI_AD<19>

PCI_FRAME_L

PCI_PERR_L

PCI_IRDY_L

PCI_STOP_L

TP_PCI_AD<22>

TP_PCI_AD<23>

TP_PCI_AD<25>

TP_PCI_AD<27>

TP_PCI_AD<28>

TP_PCI_AD<5>

TP_PCI_C_BE_L<1>

TP_PCI_AD<18>

TP_PCI_AD<6>

LPC_CLK33M_SMC_R

LPC_CLK33M_LPCPLUS_R

TP_PCI_CLK33M_OUT2

TP_PCI_CLK33M_OUT3

PCH_CLK33M_PCIOUT

TP_NV_WR_RE_L<0>

TP_PCI_AD<0>

TP_PCI_PME_L

PCI_TRDY_L

TP_PCI_PAR

PCH_PCI_GNT3_L

TP_PCI_AD<31>

PCI_INTD_L

PCH_PCI_GNT1_L

PCI_INTA_L

PCI_INTC_L

TP_PCI_C_BE_L<2>

PCI_REQ1_L

PCI_REQ3_L

PCI_REQ2_L

=PP3V3_S0_PCH_GPIO

AUD_IP_PERIPHERAL_DET

PCI_INTE_L

PCI_INTG_L

TP_PCI_RESET_L

TP_NV_CE_L<3>

TP_NV_DQ<3>

TP_NV_DQ<13>

TP_NV_DQ<7>

AUD_I2C_INT_L

PCH_PCI_GNT0_L

TP_PCI_AD<7>

TP_PCI_AD<10>

TP_NV_WR_RE_L<1>

TP_USB_3P

USB_WM_N

TP_USB_7N

USB_HUB2_UP_N

TP_USB_13N

TP_USB_6P

TP_USB_13P

TP_PCI_AD<16>

TP_NV_WE_CK_L<1>

TP_USB_1N

PCI_PLOCK_L

TP_NV_WE_CK_L<0>

TP_PCI_AD<1>

TP_PCI_AD<8>

TP_NV_DQ<2>

TP_NV_DQ<5>

TP_USB_6N

TP_USB_5P

TP_USB_5N

USB_WM_P

TP_USB_3N

USB_BRCRYPT_P

USB_BRCRYPT_N

TP_PCI_AD<30>

PCI_SERR_L

TP_PCI_C_BE_L<0>

TP_PCI_C_BE_L<3>

TP_USB_1P

20 OF 110

A.0.0

051-8600

20 OF 92

8

8

6

25 34

25

25

25

8

8

8

25

15 25

25

25

8

8

85

15 8

8

85

15

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

15

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

8

15

8

15

8

85

6

60

8

8

8

8

8

61

15

8

8

8

8

8

8

8

8

8

8

8

8

8

www.vinafix.vn

IN

OUT

OUT

BI

OUT

IN

CPU

NCTF

(6 OF 10)

RSVD

GPIO

MISCGPIO8

VSS_NCTF0

VSS_NCTF1

VSS_NCTF2

VSS_NCTF3

VSS_NCTF4

VSS_NCTF5

VSS_NCTF6

VSS_NCTF7

VSS_NCTF8

VSS_NCTF9

VSS_NCTF10

VSS_NCTF11

VSS_NCTF12

A20GATE

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

GPIO15

GPIO24

GPIO27

GPIO28

GPIO35

GPIO57

INIT3_3V*

LAN_PHY_PWR_CTRL/GPIO12

NC0

NC1

NC2

NC3

NC4

PCIECLKRQ6*/GPIO45

PCIECLKRQ7*/GPIO46

PECI

PROCPWRGD

PWM0

PWM1

PWM2

RCIN*

SATA2GP/GPIO36

SATA3GP/GPIO37

SATA4GP/GPIO16

SATA5GP/GPIO49

SCLOCK/GPIO22

SDATAOUT0/GPIO39

SDATAOUT1/GPIO48

SLOAD/GPIO38

SST

STP_PCI*/GPIO34

TACH0/GPIO17

TACH1/GPIO1

THRMTRIP*

TP1

TP10

TP11

TP12

TP13

TP18

TP19

TP2

TP20

TP21

TP22_NCTF0

TP22_NCTF1

TP22_NCTF2

TP22_NCTF3

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TACH3/GPIO7

TACH2/GPIO6

BMBUSY*/GPIO0

PWM3

IN

OUT

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

IPU* = Only on TACH function.

(IPU*)

(IPU*)

(IPD)

(IPU*)

THIS SIGNAL IS INTEDED FOR FIRMWARE HUB AND WE ARE NOT USING IT.

(IPD)

(IPU)

(IPU*)15 45

11 84

11 84

11

11 25 91

11 46 91

2

1R215510K

402

5%1/16WMF-LF

2

1R2150

MF-LF

10K5%

1/16W

402

BA2

BA1

B41

B40

B2

AY41

AY2

AW41

E1

C41

C1

A5

A40

AT24

V34

T12

T13

P13

P12

J20

BA41

AY1

A41

A3

AH30

AU39

K18

AN36

AK35

P9

P10

V20

AR24

L18

C38

AY11

AV11

AL14

AW11

AT40

AN31

AM38

AG38

AL39

AN41

AG40

AH39

AR38

AK39

AM40

AY13

AW12

AR12

BA12

B38

D36

AP36

AV36

Y12

Y11

V11

V10

AF15

AU34

AR39

AK30

AL32

AR41

AV40

AP37

AR34

AY36

T6

T7

V4

U4

K38

L38

AK41

AG37

U1800IBEX-PEAK-DESKTOP

FCBGA

OMIT

15

15

25 32

2

1R219047K

5%

402

1/16WMF-LF

47

PCH MISCSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

=PP3V3_S0_PCH

=PP3V3_S0_PCH

SDCARD_RESET

LPCPLUS_GPIO

PCH_GPIO27_VRMEN

PCH_GPIO34_STP_PCI_L

MXM_GOOD

PCH_GPIO37_SATA3GP

PCH_GPIO38_SLOAD

PCH_A20GATEPCH_GPIO8_FCIM_EN_L

PCH_GPIO24

ISOLATE_CPU_MEM_L

ODD_PWR_EN_L

TP_PCIE_CLK100M_XDPN

PCH_GPIO39_SDATAOUT0

WOL_EN

PCH_GPIO6_TACH2

AUD_IPHS_SWITCH_EN

PCH_GPIO15

ENET_LOW_PWR

SMC_RUNTIME_SCI_L

TP_PCIE_CLK100M_XDPP

FSB_CLK133M_CPU_N

FSB_CLK133M_CPU_P

PM_THRMTRIP_L

TP_PCH_TP7

TP_PCH_TP10

PCH_RCIN_L

TP_PCH_TP8

TP_PCH_TP9

PCH_INIT3V3_L

TP_DMI_CLK100M_LAN

TP_PCH_TP4

TP_DMI_CLK100M_LAP

TP_PCH_TP3

TP_PCH_TP1

TP_PCH_PWM2

TP_PCH_SST

TP_PCH_TP18

TP_PCH_PWM0

TP_PCH_PWM3

TP_PCH_TP19

SPIROM_USE_MLB

CPU_PWRGD

TP_PCH_TP6

TP_PCH_TP13

TP_PCH_TP20

TP_PCH_TP2

TP_PCH_TP21

TP_PCH_TP12

FW_PWR_EN

PCH_GPIO49_SATA5GP

AP_PWR_EN

TP_PCH_PWM1

TP_PCH_TP11

TP_PCH_TP5

CPU_PECI

FW_PME_L

PCH_GPIO0_BMBUSY_L

21 OF 110

A.0.0

051-8600

21 OF 92

6 18 21 24 68

6 18 21 24 68

25 44 91 92

15

15

6

15 25

15

15

15 42

8

15

15 37

25 61

15

15 36

8

15

8

8

8

8

8

8

47 85

15

15 25

15 33

8

15 40

15 25

www.vinafix.vn

VCCIO54

VCCFDIPLL

VCCVRM0

VCCIO48

VCCIO49

VCCIO50

VCCIO51

VCCIO52

VCC3_3_2

VCC3_3_3

VCCCORE22

VCCCORE21

VCCCORE20

VCCCORE19

VCCCORE5

VCCIO23

VCCVRM1

VCCPNAND2

VCCPNAND1

VCCPNAND0

VCCME3_3_1

VCCME3_3_0

VCCIO53

VCCIO47

VCCIO46

VCCIO45

VCCIO44

VCCIO43

VCCIO42

VCCIO41

VCCIO40

VCCIO39

VCCIO36

VCCIO31

VCCIO30

VCCIO29

VCCIO28

VCCIO27

VCCIO26

VCCIO25

VCCIO24

VCCIO0

VCCDMI

VCCCORE57

VCCCORE56

VCCCORE55

VCCCORE54

VCCCORE53

VCCCORE52

VCCCORE51

VCCCORE50

VCCCORE49

VCCCORE48

VCCCORE47

VCCCORE46

VCCCORE45

VCCCORE44

VCCCORE43

VCCCORE42

VCCCORE41

VCCCORE40

VCCCORE39

VCCCORE38

VCCCORE37

VCCCORE36

VCCCORE35

VCCCORE34

VCCCORE33

VCCCORE32

VCCCORE31

VCCCORE27

VCCCORE26

VCCCORE25

VCCCORE24

VCCCORE23

VCCCORE18

VCCCORE17

VCCCORE16

VCCCORE15

VCCCORE14

VCCCORE13

VCCCORE12

VCCCORE11

VCCCORE10

VCCCORE9

VCCCORE8

VCCCORE6

VCCCORE4

VCCCORE3

VCCCORE2

VCCCORE1

VCCCORE0

VCCAPLLEXP

VCC3_3_1

VCC3_3_0

VCCCORE30

VCCCORE29

VCCCORE28

VCCADAC

VCCCORE7

VCCIO34

VCCIO32

VCCIO38

VCCIO37

VCCIO35

VCCIO33

VCCIO

VCC CORE

NAND / SPI

CRT

(7 OF 10)

FDI

DMI

HVCMOS

CPU

PCI/GPIO/LPC

USB

CLOCK AND MISCELLANEOUS

PCI/GPIO/LPC

SATA

HDA

RTC

(10 OF 10)

VCCVRM3

VCCVRM2

V5REF_SUS

V5REF

V_CPU_IO_NCTF

V_CPU_IO

DCPSUSBYP

DCPSUS

DCPSST

DCPRTC

VCCSUSHDA

VCCSUS3_3_NCTF1

VCCSUS3_3_NCTF0

VCCSUS3_3_16

VCCSUS3_3_15

VCCSUS3_3_14

VCCSUS3_3_13

VCCSUS3_3_12

VCCSUS3_3_11

VCCSUS3_3_10

VCCSUS3_3_9

VCCSUS3_3_8

VCCSUS3_3_7

VCCSUS3_3_6

VCCSUS3_3_5

VCCSUS3_3_4

VCCSUS3_3_3

VCCSUS3_3_2

VCCSUS3_3_1

VCCSUS3_3_0

VCCSATAPLL

VCCRTC_NCTF

VCCRTC

VCCME26

VCCME25

VCCME24

VCCME23

VCCME22

VCCME21

VCCME20

VCCME19

VCCME18

VCCME17

VCCME16

VCCME15

VCCME14

VCCME13

VCCME12

VCCME11

VCCME10

VCCME9

VCCME8

VCCME7

VCCME6

VCCME5

VCCME4

VCCME3

VCCME2

VCCME1

VCCME0

VCCLAN1

VCCLAN0

VCCIO22

VCCIO21

VCCIO20

VCCIO19

VCCIO18

VCCIO17

VCCIO16

VCCIO15

VCCIO14

VCCIO13

VCCIO12

VCCIO11

VCCIO10

VCCIO9

VCCIO8

VCCIO7

VCCIO6

VCCIO5

VCCIO4

VCCIO3

VCCIO2

VCCIO1

VCCADPLLB

VCCADPLLA

VCCACLK

VCC3_3_NCTF1

VCC3_3_NCTF0

VCC3_3_10

VCC3_3_9

VCC3_3_8

VCC3_3_7

VCC3_3_6

VCC3_3_5

VCC3_3_4




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(VCCSUS3_3 - 17 TOTAL)

(VCCIO[1-56] total)

(VCCIO[1-56] total)

40 mA (if GPIO27 is low)

196 MA (VCCVRM[0-3] TOTAL)

75 MA

(VCCIO[1-56] total)


0 1 1.5V 1.05V

0 0 1.8V 1.05V

357 mA

(VCCME[1-16] total)

1 (IPU) 0 (IPD) 1.8V Float

PLLs = VccAClk, VccSATAPLL, VccAPLLEXP & VccFDIPLL

Note: 1.5V option consumes more current than 1.8V

75 MA

357 mA

< 1 mA


(VCC3_3 - 9 TOTAL PINS)

2.222 A S0, 800 MA M-ON

< 1 mA S0-S5

196 MA ( TOTAL 4 PINS) 163 mA S0, 65 mA S3-S5

3.251 A

3.251 A

(VCCIO[1-56] total)

3.251 A


3.251 A

3.251 A

85 mA S0, 22 mA M-on

156 MA (1.8V)

65 MA

69 MA 1.629 A

357 mA (VCC3_3[1-14] total)

357 mA (VCC3_3[1-14] total)

(VCCIO[1-56] total)

6 MA S0

(VCC3_3[1-14] total)

GPIO27 HDA_SYNC VCCVRM PLL POWERS

1 (IPU) 1 1.5V Float

< 1 mA

3.251 A

2 mA S0-S5, ~6 uA G3

PCH output, for decoupling only

372 MA S0, 78 MA M-ON


2.222A S0, 800 MA M-ON

(VCCME[1-16] total)

(VCCIO[1-56] total)




2

1 C22000.1UF20%10V

402CERM

2

1 C2210

20%

CERM402

10V

0.1UF

2

1 C22200.1UF

CERM402

10V20%

2

1 C2230

10VCERM

0.1UF

402

20%

C3

C2

P30

M41

M39

N40

N38

Y36

Y29

Y26

V36

V29

V15

U19

U15

T37

T36

T30

T29

T19

T15

R40

R38

R37

P39

P38

P24

P19

P18

P16

P15

N26

N24

N22

N20

N18

N16

M26

M24

AA26

A37

A23

AD26

AD23

AD20

AD18

Y24

Y23

V26

V24

V23

U26

U23

U22

AB26

U20

T27

T26

T24

T23

T22

T20

P29

P27

P26

AB24

N28

M28

L28

K28

J28

H28

G28

F28

E29

E27

AA24

E26

D29

D28

D27

C28

C26

B29

B27

AF24

AF23

AA23

AF22

AF20

AF19

AE26

AE24

AE23

AE22

AE20

AE19

AE18

A28

A26

A21

AF1

AH16

AE27

AD27

A9

U1800

IBEX-PEAK-DESKTOP

FCBGA

OMIT

L40

L39

AJ18

BA40

AY40

AV25

AU27

AU26

AT26

AR26

AP26

AN26

AM26

BA26

AY27

AW40

AW39

AW26

AV29

AV27

AL26

AK26

P41

BA39

AY29

AE16

AE15

AD16

AD15

AD13

AB16

AB15

Y19

Y18

Y16

Y15

AJ5

AJ4

AJ2

AA18

AH6

AH4

AH3

AH13

AH1

AG5

AF8

AF16

AF13

AF10

AA16

AA15

Y22

Y20

C24

B25

B24

AT28

AJ22

AH23

AH22

M22

M20

M18

AH20

M16

L26

K26

J26

H26

G26

F26

D25

D24

C25

AA27

T1

R2

AA1

BA3

AW1

AY3

AV2

AK14

AJ16

AJ14

AH18

U40

A39

B39

AW16

AN1

AF27

AF30

AH33

AY38

U1800FCBGA

OMIT

IBEX-PEAK-DESKTOP

2

1 C22500.1UF

402

20%10VCERM

2

1C2260NOSTUFF

10V

PLACE C2260 ON THE BACK SIDE NEAR AF27

0.1UF20%

402CERM

PCH POWER


VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmPPVOUT_S0_PCH_DCPSST

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmPPVOUT_S0_PCH_VCCRTC_NCTF


PPVOUT_S5_PCH_DCPSUSBYPMIN_LINE_WIDTH=0.2 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V


PP1V05_S0_PCH_VCCADPLLA

PP1V8R1V5_S0_PCH_VCCVRMMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmPPVOUT_G3_PCH_DCPRTC

VOLTAGE=3.3V

PP3V3_G3_RTC


PP1V8R1V5_S0_PCH_VCCVRM

PP5V_S5_PCH_V5REFSUS

PP5V_S0_PCH_V5REF


PPVOUT_S5_PCH_DCPSUSMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3V


PP1V05_S0_PCH_VCCAPLL_SATA



=PP1V05_S0_PCH_VCCIO_USBPP1V05_S0_PCH_VCCA_CLK








PP1V05_S0_PCH_VCCAPLL_FDI




PP3V3_S0_PCH_VCCA_DAC =PP1V05_S0_PCH_VCC_CORE


PP1V05_S0_PCH_VCCAPLL_EXP




PP1V05_S0_PCH_VCCADPLLB

22 OF 110

A.0.0

051-8600

22 OF 92

6 22 24

89

6 22 24

89

6 24

17 89

22 24 89

89

18 24 27 89

6 22 24

22 24 89

24 89

24 89

6 24

89

6 24

24 89

6 22 24

6 22 24

6 24 24 89

6 22 24

6 24

6 24

22 24 89

6 24

6 18 22 24

22 24 89

24 89

6 22 24

6 22 24

6 18 22 24

17 89 6 24

6 24

24 89

6 18 19 24

6 22 24

6 24

17 89

www.vinafix.vn

(9 OF 10)

VSSVSS

(8 OF 10)

VSSVSS




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Y5

Y40

Y33

Y30

Y27

Y13

Y10

W5

W39

W37

W3

V9

V6

V39

V35

V33

V3

V27

V22

V19

V18

V16

V13

V12

U39

U3

U27

U24

U2

U18

U16

T8

T5

T35

T3

T18

T16

T11

R5

R4

P8

P4

P34

P31

P23

P22

P20

P11

P1

N5

N37

N14

M8

M5

M37

M33

M14

M12

M11

L8

L34

L32

L31

L30

L3

L22

L20

L16

L12

L11

K40

K39

K32

K3

K22

K20

K2

K16

J7

J6

J5

J39

J37

J24

J18

J16

J14

H9

H7

H5

H31

G41

G39

G38

G34

G1

F5

F34

F30

F24

F20

F18

F16

F14

F12

F11

E9

E8

E6

E5

E4

E37

E33

E30

E23

E22

E19

E16

E15

E13

E12

D39

D37

D34

D22

C39

C32

C31

C23

C18

C17

C11

U1800OMIT

IBEX-PEAK-DESKTOP

FCBGA

AR28

AR18

AR11

AR1

AP24

AP20

AN5

AN37

AN30

AN28

AA4

AN22

AN18

AN14

AN12

AM32

AM28

AM18

AM14

AM12

AM10

AA39

AL8

AK9

AK8

AK5

AK37

AK34

AK32

AK3

AK22

AK10

AA38

AJ28

AJ26

AJ24

AJ20

AH9

AH41

AH36

AH34

AH32

AH29

AA22

AH27

AH26

AH24

AH19

AH15

AF5

AF39

AF37

AF36

AF33

AA20

AF32

AF31

AF3

AF29

AF26

AF18

AF12

AF11

AE4

AE39

AA19

AE3

AD8

AD6

AD40

AD39

AD34

AD31

AD30

AD29

AD24

A7

AD22

AD2

AD19

AD11

AC5

AC37

AB8

AB5

AB40

AB34

A35

AB33

AB30

AB29

AB27

AB23

AB22

C10

BA7

BA37

BA28

AB20

BA21

BA14

B22

B10

AW3

AW28

AW24

AW18

AW17

AV5

AB19

AV28

AV24

AU9

AU5

AU41

AU38

AU37

AU33

AU30

AU29

AB18

AU23

AU22

AU20

AU19

AU16

AU12

AT22

AT18

AT14

AR30

AA41

A30

A14

U1800FCBGA

OMIT

IBEX-PEAK-DESKTOP

PCH GROUNDSSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

23 OF 110

A.0.0

051-8600

23 OF 92

www.vinafix.vn

NC

NC

NC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PLACEMENT_NOTE:

(PCH 1.05V ME Core PWR)

PLACEMENT_NOTE:

(PCH RTC 3.3V PWR)

6 uA G3

PCH VCCSUS3_3 BYPASS

PCH V5REF_SUS Filter & Follower

357 MA S0 /

L2412 - 155S0441

NOTE: VccVRM input also supports

GPIO27: 1 = enabled, 0 = disabled

196 MA

PLACEMENT_NOTEs:

(OR 1.5V)

(PCH Reference for 5V Tolerance on USB)1 mA S0-S5

(PCH NAND 1.8V/3.3V PWR)

PCH VCCPNAND BYPASSPCH VCCRTC BYPASS

PLACEMENT_NOTEs (all 3):

PCH V5REF Filter & Follower

(PCH Reference for 5V Tolerance on PCI)

PLACEMENT_NOTE:

PCH CORE/VCC3_3 BYPASS

(PCH MISC 3.3V PWR)

PCH VCCME BYPASS

2.22 A

PCH VCC3_3 BYPASS

(PCH SATA 3.3V PWR)

(PCH ME 3.3V PWR)

(PCH SUSPEND USB 3.3V PWR)

PCH VCCCORE BYPASS

1.629 A

(PCH 1.05V CORE PWR)

PCH VCCSATAPLL Filter

(PCH SATA PLL PWR)

2 mA S0-S5 /

PLACEMENT_NOTE:

(PCH PCI 3.3V PWR)

PLACEMENT_NOTE:

PLACEMENT_NOTEs:

PLACEMENT_NOTE:

PLACEMENT_NOTE:

(PCH DMI 1.05V PWR)

PCH VCCIO BYPASS

88 MA S3-S5

PLACEMENT_NOTE:

(PCH FDI PLL PWR)

6 MA

372 MA

65 MA

<1 MA S0-S5

196 MA

<1 MA

PLACEMENT_NOTEs:

(PCH PCIE 1.05V PWR)

PCH VCCIO BYPASS

PCH VCCFDIPLL Filter

PCH VCCACLK Filter

(PCH Misc PLL PWR)

PLACEMENT_NOTEs:

PLACEMENT_NOTE:

PCH VCC3_3 BYPASS

PLACEMENT_NOTEs:

PCH VCCIO BYPASS

PLACEMENT_NOTE:

PCH USB/VCCSUS3_3 BYPASS

(VCCSUS3_3 Total)

PLACEMENT_NOTEs:

1 mA

PCH VCCME3_3 BYPASS

1.5V, but draws more current.

(PCH PCIe PLL PWR)

PCH VCCAPLLEXP Filter

HDA_SYNC: 0 = 1.8V, 1 = 1.5V

PLACEMENT_NOTEs:

Current numbers from Ibex Peak EDS Spec Update rev 0.71, doc #386904 (Table 8-3). Pre-Silicon Mobile Estimates.

PCH VCCSUSHDA BYPASS

(PCH 1.1V/1.05V CPU I/O PWR)PLACEMENT_NOTEs:

PLACEMENT_NOTE:

PLACEMENT_NOTE:

(VCCIO TOTAL)

369 MA IDLE

3.251 A S0 /

PCH VCCIO BYPASS

(PCH CLK 1.05V PWR)


(PCH SATA 1.05V PWR)

PCH VCCIO BYPASS

PLACEMENT_NOTE:

(PCH USB 1.05V PWR)

(PCH SUSPEND USB 3.3V PWR)

(PCH HD Audio 3.3V/1.5V PWR)

PCH V_CPU_IO BYPASS

<1 MA


(PCH 1.05V LAN Core PWR)

PCH VCCLAN BYPASS

2

1C2401

PLACE C2401 NEAR BALL AN1

X5R

1UF10%10V

402

2

1C2418

6.3V20%

603X5R

10UF

Place C2418 within 2.54mm of balls

MLB_VR

2

1 C2419

6.3V10%

402CERM

1UF

PLACE C2419 AT BALL AA1

1

2R2401

MF-LF1/16W

100

402

5%

2

1C2400

PLACE C2400 NEAR BALL AW16

10V

0.1UF

CERM402

20%

6

1

D2400BAT54DW-X-GSOT-363

1

2R2400

402

5%

MF-LF1/16W

10

3

4

D2400

SOT-363BAT54DW-X-G

2

1 C2421

10%

402

16VX5R

0.1UF

PLACE C2421 NEAR BALL AY29

2

1 C24250.1UF

402X5R16V10%

PLACE C2425 NEAR BALL AV25

2

1 C2422

X5R402

10%16V

0.1UF

2

1 C2413

PLACE C2413 AT BALL A21

6.3V

402CERM

10%1UF

2

1C2412

Place C2412 within 2.54mm of ball

X5R603

20%6.3V

10UF

MLB_VR

2

1 C2415

PLACE C2415 AT BALL A37

6.3V10%

402CERM

1UF

2

1C2414

Place C2414 within 2.54mm of ball

10UF

X5R

20%6.3V

603

MLB_VR

2

1 C2417

402

PLACE C2417 AT BALL P41

1UF

CERM

10%6.3V

2

1C2416

Place C2416 within 2.54mm of balls

10UF

X5R603

20%6.3V

MLB_VR

2

1R2418

1/16W

402MF-LF

15%

MLB_VR

21

R2411

5%

0

MLB_VR

402MF-LF1/16W

21

R2410

MF-LF

5%

402

1/16W

PCH_VRM

0

2

1 C2427

16V10%0.1UF

402X5R

PLACE C2427 NEAR BALL AJ18

2

1 C2426

16V10%

402X5R

0.1UF

PLACE C2426 NEAR BALL AW39

2

1 C24300.1UF10%16VX5R402

PLACE C2430 NEAR BALL N38

2

1 C2435

16V10%

X5R402

0.1UF

PLACE C2435 NEAR BALL AE27

2

1 C2436

X5R402

10%16V

0.1UF

PLACE C2436 NEAR BALL AV2

2

1 C2440

16V10%

402

0.1UF

X5R

PLACE C2440 NEAR BALL P30

2

1 C2445

10%

CERM402

6.3V

1UF


2

1 C2452

10%0.1UF

16VX5R402

2

1 C24510.1UF

X5R

10%16V

402

2

1C2450

PLACE C2450 NEAR BALL B39

6.3VX5R603

4.7UF20%

2

1 C2469

PLACE C2469 NEAR BALL AF10

402CERM6.3V10%1UF

2

1C2466

PLACE C2466 NEAR BALL AH4

805

6.3V20%

CERM

22UF

2

1 C2477

10%1UF

CERM402

6.3V


2

1 C2476

402

1UF10%6.3VCERM

PLACE C2476 NEAR BALL H26

2

1 C2475

10%1UF

402

PLACE C2475 NEAR BALL D25

CERM6.3V

2

1 C2480

402

6.3V

1UF

CERM

10%


2

1 C2485

6.3V

1UF

CERM402

10%

PLACE C2485 NEAR BALL Y26

2

1 C24941UF

CERM6.3V

402

10%


2

1 C2493

CERM402

6.3V10%1UF

PLACE C2493 NEAR BALL U15

2

1 C24921UF

CERM402

10%6.3V


2

1 C24911UF

CERM402

10%6.3V


2

1 C2455

10%6.3V

1UF

CERM402

PLACE C2455 NEAR BALL A23

2

1 C2468

6.3V10%

CERM

1UF


402

2

1C2465

PLACE C2465 NEAR BALL AB15

22UF

CERM805

20%6.3V

2

1 C2471

402CERM6.3V10%1UF


2

1C2470

603X5R

6.3V

10UF20%


2

1C2420

6.3VCERM

10%

402

1UF

PLACE C2420 NEAR BALL AY29

2

1 C2446

16V10%

402X5R

0.1UF

PLACE C2446 NEAR BALL U40

21

L2412MLB_VR

220-OHM-1.4A

0603

21

L2414

0603

220-OHM-1.4A

MLB_VR

21

L2416

0603

220-OHM-1.4A

MLB_VR

21

L2418

0603

220-OHM-1.4A

MLB_VR

2

1 C2472

603X5R6.3V20%4.7UF


2

1 C2473

805

6.3V

22UF

CERM

20%


2

1C2467


603X5R

6.3V

10UF20%

2

1 C2437

X5R402


0.1UF10%16V 2

1 C24380.1UF

16V10%

402X5R

NOSTUFF


2

1 C2439

PLACE C2439 NEAR BALL A9

0.1UF

402X5R

10%16V

2

1C2486

6.3V20%

805CERM

22UF

PLACE C2465 NEAR BALL Y29

2

1C2488

603X5R

6.3V20%

4.7UF


2

1 C2441NOSTUFF

0.1UF

X5R402

10%16V


2

1C2490

6.3V20%

805CERM

22UF


2

1R24601K5%

MF-LF1/16W

402

PCH DECOUPLINGSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010





=PP1V05_S0_PCH_VCCIO_USB




MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.05V

PP1V05_S0_PCH_VCCAPLL_EXP

VOLTAGE=1.05V


PP1V05_S0_PCH_VCCAPLL_FDI

PP1V05_S0_PCH_VCCAPLL_SATAMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.05V

VOLTAGE=1.05VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMPP1V05_S0_PCH_VCCA_CLK

PP1V05_S0_PCH_VCCA_CLK_F


VOLTAGE=1.05V

=PP5V_S0_PCH

=PP3V3_S0_PCH

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.3MMPP5V_S0_PCH_V5REF

VOLTAGE=5V





=PP1V05_S0_PCH_VCC_CORE



=PP3V3_S5_PCH

=PP5V_S5_PCH

VOLTAGE=5VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.3MMPP5V_S5_PCH_V5REFSUS

MIN_NECK_WIDTH=0.25MMVOLTAGE=1.5V

PP1V8R1V5_S0_PCH_VCCVRMMIN_LINE_WIDTH=0.5MM

MAKE_BASE=TRUE

=PP1V8R1V5_S0_PCH_VCCVRM

=PP1V05_S0_PCH

PP3V3_G3_RTC



24 OF 110

A.0.0

051-8600

24 OF 92

5

2

6 22

6 22

6 22

6 18 19 22

6 22

6 18 22

6 22

6 22

22 89

22 89

22 89

22 89

89

6

6 18 21 68

22 89

6 22

6 22 24

6 22

6 22 24

6 22

6 22

6 22

6 18 19

6

22 89

22 89

6

6

18 22 27 89

6 22

6 22

www.vinafix.vn

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

NC

NC

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

OBSDATA_D0

1K series R on PCH Support Page

NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

PWRGD/HOOK0

HOOK1

VCC_OBS_AB

HOOK2

OBSDATA_A0

OBSFN_A1

OBSDATA_D2

ITPCLK#/HOOK5

OBSDATA_D2

HOOK1

OBSFN_B0

OBSDATA_A2

OBSDATA_B3

TMS

OBSDATA_D1

OBSDATA_D1

ITPCLK/HOOK4

VCC_OBS_CD

TCK1

SDA

TMS

TDI

SCL

SDA

HOOK3

OBSDATA_B1

OBSDATA_B2

TDI

ITPCLK/HOOK4

ITPCLK#/HOOK5

OBSDATA_D3

RESET#/HOOK6

OBSDATA_A2

OBSFN_A0

OBSFN_B1

OBSFN_D0

OBSFN_D1

OBSDATA_C1

OBSFN_C0

OBSFN_C1

HOOK2

TRSTn

TDO

OBSFN_B0

OBSDATA_B2

OBSDATA_A0

HOOK3

OBSDATA_C2

OBSDATA_B0

PLACE IT NEAR THE XDP

OBSDATA_C3

PROCESSOR XDP

516S0450

516S0450

OBSDATA_C0

OBSDATA_B1

TCK0

TCK1

OBSDATA_A3

OBSDATA_D0

OBSFN_B1

PCH XDP

PWRGD/HOOK0

SCL TRSTn

DBR#/HOOK7

VCC_OBS_CD

TDO

OBSDATA_D3

OBSDATA_C0

OBSFN_C1

OBSFN_C0

OBSFN_A1

OBSFN_A0

OBSDATA_A1

OBSDATA_B0

XDP_PRESENT#

DBR#/HOOK7

TCK0

OBSDATA_A3

OBSDATA_A1

XDP_PRESENT#

VCC_OBS_AB

OBSDATA_B3

RESET#/HOOK6

OBSDATA_C1

OBSFN_D1

OBSFN_D0

NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

OBSDATA_C3

OBSDATA_C2

10 84

11 91

20

20

20

21 44 91 92

21 61

2

1R2556

MF-LF402

1005%1/16W

XDP

21

R2511

XDP

402MF-LF1/16W5%

1K

PLACEMENT_NOTE=Place close to CPU to minimize stub.

10 84

10 84

10 84

10 84

11 84

11 84

11 25 27 91

11

10 84

11

11

11

15 21

21 32

15 18 33

15 18 40

15 18

15 18

10 84

15 21

15 21

27

18

18

18

2

1 C2501XDP

0.1uF10%

X5R16V

402

10 84

2

1C2500XDP

10%

X5R16V

0.1uF

402

11

11

10 84

10 84

10 84

5

6

7

8

4

3

2

1

RP2500XDP_CPU_BPM

1/16W5%0

SM-LF

5

6

7

8

4

3

2

1

RP2501

PLACEMENT_NOTE=Place R2501 close to R2500 to minimize stubs.

0

XDP_CPU_CFG

SM-LF1/16W5%

11 84

11 84

11 84

11 84

10 84

10 84

10 84

10 84

10 15 84

11 84

11 84

11 84

11 84

11 91

25 48

25 48

11

21

R2510

XDP

1K

402MF-LF

5%1/16W

10 84

11 21 91

20

20

15 20

20

6 32 63 91

10 84

18

2

1R2555200

1/16WMF-LF

5%

402

XDP

21

R25751/16W5%

0402MF-LF

XDP

21

R2576XDP

01/16W402MF-LF

5%

21

R2577

XDP

5% 1/16WMF-LF 402

0

19 25 45 91

2

1R251551

XDP

5%

402MF-LF1/16W

9

87

60

6

59

5857

5655

5453

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J2500XDP_CONN

BSH-030-01-L-D-A-TR

CRITICAL

F-ST-SM

9

87

60

6

59

5857

5655

5453

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J2550XDP_CONN

F-ST-SMBSH-030-01-L-D-A-TR

CRITICAL

21

R2578XDP

4025% 1/16W

MF-LF

0

21

R25795%

0

XDP

1/16WMF-LF 402

21

R2580XDP

0402

1/16WMF-LF5%

21

R2582XDP

5% 1/16WMF-LF 402

0

21

R2583

XDP

5% 1/16WMF-LF 402

0

21

R2581

XDP

5%MF-LF

0402

1/16W

20 34

SYNC_MASTER=K75F_MLB

EXTENDED DEBUG PORT(XDP)SYNC_DATE=04/14/2010

PCH_GPIO41_OC2_L

JTAG_PCH_TCK

TP_XDPPCH_OBSFN_A<0>

USB_HUB_SOFT_RESET_L_R

PCH_GPIO41_OC2_L_R

TP_XDPPCH_OBSFN_B<1>

PCH_GPIO43_OC4_L_R

=SMBUS_XDP_SDA

XDP_CPUPWRGD

XDP_PWRGD

XDP_BPM_L<7>

XDP_BPM_L<6>

MINI_CLKREQ_L_R

=PP3V3_S0_XDP

PCH_GPIO19_SATA1GP

TP_XDPPCH_OBSFN_D<0>

TP_XDPPCH_HOOK4

TP_XDPPCH_HOOK5

XDPPCH_PLTRST_L

XDP_DBRESET_L

SDCARD_RESET_R

PCH_GPIO49_SATA5GP

TP_JTAG_XDP_TRST_L

PCH_GPIO21_SATA0GP

TP_XDPPCH_OBSFN_D<1>

PCH_GPIO37_SATA3GP

PCH_GPIO10_OC6_L

ALL_SYS_PWRGD_R

TP_XDPPCH_HOOK3

PM_PWRBTN_L

=PPVTT_S0_XDP

XDP_BPM_L<5>

PCH_GPIO9_OC5_L_R

TP_XDPPCH_OBSFN_B<0>

JTAG_PCH_TMS

PCH_GPIO14_OC7_L

TP_XDPPCH_HOOK2

XDP_OBSDATA_A<0>

PM_PWRBTN_L

TP_XDP_HOOK3

=SMBUS_XDP_SCL

XDP_TCK

CPU_CFG<6>

XDP_TRST_L

FSB_CLK133M_ITP_N

CPU_PWRGD

XDP_BPM_L<3>

CPU_CFG<15>

FSB_CPURSTOUT_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_BPM_L<2>

CPU_CFG<12>

CPU_CFG<13>

CPU_CFG<14>

MINI_CLKREQ_L

=PP3V3_S5_XDP

CPU_CFG<7>

XDP_CPURST_L

FSB_CLK133M_ITP_P

XDP_TDO

XDP_PRDY_L

XDP_PREQ_L

=SMBUS_XDP_SDA

FW_CLKREQ_L_R

JTAG_PCH_TDI

PCH_GPIO59_OC0_L

TP_XDPPCH_OBSFN_A<1>

PCH_GPIO42_OC3_L


PCH_GPIO43_OC4_L

PCH_GPIO9_OC5_L

AUD_IPHS_SWITCH_EN_R

SDCARD_RESET

=SMBUS_XDP_SCL

XDP_TMS

AUD_IPHS_SWITCH_EN

PCH_GPIO0_BMBUSY_L

ISOLATE_CPU_MEM_L_R

JTAG_PCH_TDO

FW_CLKREQ_L

ISOLATE_CPU_MEM_L

XDP_TDI

XDP_DBRESET_L

CPU_CFG<0>

XDP_BPM_L<4>

XDP_OBSDATA_A<1>

XDP_OBSDATA_A<3>

XDP_OBSDATA_A<2>

CPU_CFG<17>

CPU_CFG<16>

CPU_CFG<5>

CPU_CFG<4>

CPU_CFG<11>

CPU_CFG<10>

CPU_CFG<3>

CPU_CFG<2>

CPU_CFG<1>

CPU_CFG<8>

CPU_CFG<9>

25 OF 110

A.0.0

051-8600

25 OF 92

25 48

91

6

11 25 27 91

8

19 25 45 91

6

84

6

25 48

84

84

84

www.vinafix.vn

REF

CPU

CPU*

SRC_2*

SRC_2

SATA*

SATA

27MHZ

27MHZ_SS

DOT_96*

X2

X1

SCL

SDA

CKPWRGD/PD*

VDD_CORE

VDD_REF

VDD_96_IO

VDD_27

VDD_SATA_IO

VDD_SRC_IO

VDD_CPU_IO

VSS_CPU

VSS_27

VSS_96

THRM

VSS_SATA

VSS_SRC

VSS_REF

VSS_CORE

DOT_96

27MHZ_EN

PAD

BI

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PLACE IT CLOSE TO POWER PINS

PLACE IT CLOSE TO L2650



PCH BCLK 133MHZ

PCH SATA 100MHZ

PCH DMI/PCIe 100MHz

PCH USB Clock 96MHz



2

1 C2616

402

10%16V

0.1UF

X5R

BUF_CLK

2

1 C2615

X5R402

10%16V

0.1UF

BUF_CLK

2

1C2610BUF_CLK

10UF

603X5R

20%6.3V

21

L2610BUF_CLK

0402

FERR-120-OHM-1.5A

2

1 C2605

X5R

0.1UF10%16V

402

BUF_CLK

2

1 C2604

X5R16V10%0.1UF

402

BUF_CLK

2

1 C2603

X5R

10%

402

0.1UF

BUF_CLK

16V2

1 C2602

16V

402X5R

10%0.1UF

BUF_CLK

2

1C2600BUF_CLK

603

6.3V

10UF

X5R

20%

21

L2600BUF_CLK

FERR-120-OHM-1.5A

0402

23

24

12

13

27

20

215

28

9 16

25

17

22

4831

33

11

10

2

3

15

14

26

7

6

18

19

1

30

32

29

U2600SLG2AP108

QFN

CRITICAL

OMIT

2

1 C2621BUF_CLK

CERM

18pF

402

50V5%

21

Y262014.31818

BUF_CLK5X3.2-SM

CRITICAL

2

1C2620BUF_CLK

18pF

CERM402

5%50V

48

48

5 63 64 91

2

1 C26520.1UF

X5R402

10%16V

BUF_CLK

2

1 C2651

16V10%

402X5R

0.1UF

BUF_CLK

2

1C2650

6.3V20%

603X5R

10UF

BUF_CLK21

L2650

0402

FERR-120-OHM-1.5A

BUF_CLK

18 85

21

R26502.2

5%1/16WMF-LF402

BUF_CLK

2

1R2690BUF_CLK

10K5%

402MF-LF1/16W

2

1R2616NO STUFF

10M

MF-LF

5%1/16W

402

21

R2699

PLACE R2699 NEAR PIN 26

4025%

BUF_CLK

331/16W MF-LF

2

1R2600BUF_CLK

10K

MF-LF402

1/16W5%

18 84

18 84

18 84

18 84

18 84

18 84

21

R2615

402MF-LF

1/16W5%

BUF_CLK

0

18 84

18 84

CLOCK (CK505)SYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

PP1V5_S0_CK505_R

=PP3V3_S0_CK505

=PP1V05_S0_CK505

CK505_27MHZ_EN

PCH_CLK96M_DOT_P

PM_PGOOD_PVCORE_CPU

=SMBUS_CK505_SDA

=SMBUS_CK505_SCL

CK505_XTAL_OUT

PCH_CLK96M_DOT_N

TP_CK505_CLK27M_SS

PCH_CLK100M_SATA_P

PCH_CLK100M_SATA_N

PCIE_CLK100M_PCH_P

PCIE_CLK100M_PCH_N

FSB_CLK133M_PCH_N

FSB_CLK133M_PCH_P

PCH_CLK14P3M_REFCLK_R

CK505_CLK27M

PCH_CLK14P3M_REFCLK

=PP1V5_S0_CK505

VOLTAGE=1.5V

MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

PP1V5_S0_CK505_F

CK505_XTAL_IN

CK505_XTAL_OUT_R

PP1V05_S0_CK505_FMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mmVOLTAGE=1.05V

PP3V3_S0_CK505_F

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

26 OF 110

A.0.0

051-8600

26 OF 92

89

6

6

91

85

6 89

85

89

89

www.vinafix.vn

IN OUT

NCNC

OUT

OUT

OUT

OUT

IN

OUT

IN

IN

IN

OUT

NCNC

NCNC

NCNC

OUT

OUT

OUT

OUT

IN

OUTIN

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#

TABLE_5_ITEM

UnbufferedPlatform Reset ConnectionsRTC Power Sources

VTT voltage divider on CPU page

MAY NEED TO MOVE LONGER TRACE ONES TO BUFFERED

Buffered

RESET circuit (see R4785)

Coin-Cell Holder

511-0054

R2888 not necessary with WLAN

NOTE: R2800 and D2800 form the double-

Reset Button

PCH RTC Crystal

fault protection for RTC battery.

PCH 25MHz Crystal

11 25 91 19 45 91

12

R2800

402

1K

MF-LF1/16W5%

21

C2810

CERM

12pF

5%50V

402

21

C2811

5%

12pF

402CERM50V

31

42

Y2810

CRITICAL

32.768KSM-2

21

R2896

402

1/16W

0

5%

MF-LF

XDP

3

6

4

1

D2800BAT54DW-X-G

SOT-363

21

R2883

MF-LF1/16W

402

5%

33

21

R2881

5%

402

1/16WMF-LF

33

21

R2890

402

5%

MF-LF1/16W

33

47 91

45 91

9 91

33 91

18 85

18 85

20 91

21

R2826

402

1/16WMF-LF

5%

PLACEMENT_NOTE=Place close to U1800 33

21

R2825

402

5%

MF-LF1/16W

PLACEMENT_NOTE=Place close to U1800 3320 85

21

C2815FCIM

CERM50V5%

12pF

402

21

C2816

CERM50V5%

12pF

402

OMIT

31

42

Y2815FCIM

SM-3.2X2.5MM25.0000M

CRITICAL

18 85

18 85

39 91 21

R289233

5%

402MF-LF1/16W

47 85

45 85

11 91

20 85

18 85 21

R2827

5%1/16WMF-LF402

PLACEMENT_NOTE=Place close to U1800 3320 85

25 21

R2889

1/16WMF-LF402

1K

XDP

5%

21

R288833

5%

402MF-LF1/16W

2

1C2880

402

10V20%

CERM

0.1UF

2

1R2880

MF-LF402

5%100K

1/16W

36 91 21

R2882

1/16WMF-LF

5%

402

33

1

2

J2800

SMBB10201-C1403-7H

2

1R2897

402

5%1/16WMF-LF

4.7K

2

1R2811

1/16W

402

10M5%

MF-LF

2

1R2816

1/16W

FCIM

MF-LF402

5%10M

21

R289133

402MF-LF1/16W5%

5

4

1

2

3

U2880

SOT23-5-HFMC74VHC1G08

5

4

1

2

3

U2890

SOT23-5-HFMC74VHC1G08

2

1C2890

CERM

20%10V

0.1UF

402 2

1R2893

402MF-LF

100K5%1/16W

21

R2810

MF-LF

0

5%1/16W

402

21

R2815FCIM

1/16W

0

5%

MF-LF402

43

21

SW2800

SILK_PART=SYS RESET

DEVELOPMENT

NTC020-CC1J-B260TSM

21

R2895

5%1/16WMF-LF402

3344 91

116S0004 1 RES,0,5%,0402 C2816

CHIPSET SUPPORTSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PCH_CLK32K_RTCX1

PCH_CLK25M_XTALIN

PCH_CLK25M_XTALOUT_RPCH_CLK25M_XTALOUT

=PP3V3_S0_PCH_PM

PCH_CLK32K_RTCX2_R


VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mm

PPVBATT_G3_RTC


PPVBATT_G3_RTC_RMIN_LINE_WIDTH=0.3 mm

VOLTAGE=3.3V

LAN_RESET_L

DEBUG_RESET_L

PP3V3_G3_RTCMIN_LINE_WIDTH=0.3 mm


FW_RESET_L

SMC_LRESET_L

MINI_RESET_L

LPC_CLK33M_LPCPLUS

PCH_CLK33M_PCIIN

LPC_CLK33M_SMC_R

LPC_CLK33M_LPCPLUS_R

PCH_CLK33M_PCIOUT

LPC_CLK33M_SMC

PEG_RESET_L

XDPPCH_PLTRST_L

=PP3V3_S0_RSTBUF

PCH_CLK32K_RTCX2

PM_SYSRST_LXDP_DBRESET_L

CPU_RESET_L

=PP3V3_S0_RSTBUF

PLT_RST_BUF2_L

SDCARD_PLT_RST_L

PLT_RST_BUF1_L

MAKE_BASE=TRUEPLT_RESET_L

=PP3V3_S5_RTC_D

28 OF 110

A.0.0

051-8600

27 OF 92

25

6

89 89

18 22 24 89

6 27

6 27

6

www.vinafix.vn

OUT

OUT

IN

SCL RH

RW

VDD

SDAGND

SCL RH

RW

VDD

SDAGND

BI

IN

BI

DS

G

DS

G




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PLACE IT CLOSE TO DIMM CONNECTOR PIN

I2C ADDR = 0X5C (WRITE)




353S1961

I2C ADDR = 0X7C (WRITE)

I2C ADDR = 0X7D (READ)

353S1961

353S2370

353S2369

I2C ADDR = 0X5D (READ)

28 83

28 83

2

1R29781K

MF-LF

1%1/16W

402

2

1R29791K

402

1%

MF-LF1/16W

2

1 C2902

CERM402

10%1UF6.3V

VREFMRGN

2

1R29051001%1/16WMF-LF402

VREFMRGN

2

1 C29121UF

402

10%6.3VCERM

VREFMRGN

21

R2914VREFMRGN

2.2

5%

MF-LF402

1/16W

5

2

4

1

3

U2901SOT23-5LM321

VREFMRGN

2

1 C2911

16V

402X5R

10%0.1UF

VREFMRGN

5

2

4

1

3

U2911SOT23-5

VREFMRGN

LM321

2

1R2915

1/16W

402

1001%

MF-LF

VREFMRGN

21

R2904

1/16W5%

2.2

402MF-LF

VREFMRGN

21

R2909VREFMRGN

1/16W

402MF-LF

1%

10

21

R2902

1%

MF-LF1/16W

402

12.1K

VREFMRGN2

1 C2900VREFMRGN

10%

X5R16V

402

0.1UF

21

R2900

1/16W

0

VREFMRGN

402MF-LF

5%

48

2

1 C2901

16V10%0.1UF

402X5R

VREFMRGN

2

1R29031%12.1K

VREFMRGN

402MF-LF1/16W

21

R2919VREFMRGN

1/16W

402MF-LF

1%

10

21

R2912VREFMRGN

12.1K

402MF-LF

1%1/16W

1

4

3

5

6

2

U2900SC-70VREFMRGN

ISL90728WIE627ZTK

1

4

3

5

6

2

U2910SC-70VREFMRGN

ISL90727WIE627ZTK

2

1 C291010%

402X5R16V

VREFMRGN

0.1UF

2

1R2913

1/16W

402MF-LF

1%12.1K

VREFMRGN

21

R2901VREFMRGN

MF-LF402

1/16W5%

0

21

R2910

1/16WMF-LF

5%

402

VREFMRGN

0

21

R2911

MF-LF

VREFMRGN

402

0

5%1/16W

48

48

48

2

1 C2921NOSTUFF

16V

402

0.1UF10%

X5R

2

1 C2950

16V

402

0.1UF

X5R

10%

NOSTUFF21

R2995NOSTUFF

MF-LF1/16W

402

0

5%

21

R2958

1/16WMF-LF402

0

5%

VREFMRGN

2

1 C2991NOSTUFF

0.1UF10%

402X5R16V

21

R2950INT_VREF

402MF-LF1/16W

0

5%

2

1 C2951

16VX5R402

0.1UF10%

NOSTUFF21

R2996NOSTUFF

1/16W5%

0

402MF-LF

21

R2956VREFMRGN

402MF-LF1/16W5%

0

21

R29530

5%

MF-LF402

1/16W

INT_VREF

2

1R29701K

402

1/16W1%

MF-LF

2

1R29711K

402

1%

MF-LF1/16W

2

1R29751K

402MF-LF

1%1/16W

2

1R29761K1%1/16WMF-LF402

2

1

3

Q2991

INT_VREF

SOT23-HF12N7002

2

1

3

Q2993

INT_VREF

2N7002SOT23-HF1

21

R2993NOSTUFF

402MF-LF1/16W

0

5%

21

R2991

5%

0

1/16WMF-LF402

NOSTUFF

2

1R29881K

402

1/16W1%

MF-LF

2

1R29891K1/16WMF-LF

1%

402

DDR3 VREF MARGININGSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

PP0V75_S3_MEM_VREFDQ_A

=PP3V3_S3_VREFMRGN

ISOLATE_CPU_MEM_5V_L

I2C_VREFMARGIN_DIMMB_SCL

I2C_VREFMARGIN_DIMMA_SDA

=PP3V3_S3_VREFMRGN

VREFMARGIN_DIMMA_OPFB

=PP1V5_S3_MEM_B

=I2C_VREFMRGN_B_SCL

VREFMARGIN_DIMMA_P5V

I2C_VREFMARGIN_DIMMA_SCL

VREFMARGIN_DIMMA_DACOUT

VREFMARGIN_DIMMB_P5V=PP5V_S3_VREFMRGN

I2C_VREFMARGIN_DIMMB_SDA

=I2C_VREFMRGN_A_SDA

=PP5V_S3_VREFMRGN

=I2C_VREFMRGN_B_SDA

VREFMARGIN_DIMMB_DACOUT

=PP1V5_S3_MEM_B

PP0V75_S3_MEM_VREFDQ_B

VREFMARGIN_DIMMA_DQ

=PP1V5_S3_MEM_A

VREFMARGIN_DIMMB_DQ

VREFMARGIN_DIMMA_DQ

VREFMARGIN_DIMMB_DQ

VREFMARGIN_DIMMA_DQ

VREFMARGIN_DIMMB_DQ

CPU_DIMM_VREF_A CPU_DIMM_VREF_A_SW

CPU_DIMM_VREF_B

VREFMARGIN_DIMMB_OPFB

=PP1V5_S3_MEM_A

PP0V75_S3_MEM_VREFCA_A

=PP1V5_S3_MEM_A

=PP1V5_S3_MEM_A

PP0V75_S3_MEM_VREFCA_B

CPU_DIMM_VREF_B_SW


=I2C_VREFMRGN_A_SCL

29 OF 110

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051-8600

28 OF 92

30 89

6 28

28 32

6 28

6 28 29 31

6 28

6 28

6 28 29 31

31 89

28 83

6 28 29 30

28 83

28 83

28 83

12 83 83

12 83

6 28 29 30

30 89

6 28 29 30

6 28 29 30

31 89

83

28 32

www.vinafix.vn




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

DIMM B (CLOSER TO CPU)DIMM A (FURTHER FROM CPU)

DECOUPLING CAPS FOR DIMM ON CHANNEL A - AT CONNECTOR

DECOUPLING CAPS FOR DIMM ON CHANNEL B - AT CONNECTOR

EXTRA DECOUPLING CAPS FOR CPU MEM RAIL

CAPS TO COUPLE CPU 1V5_MEM

2

1 C3058

402CERM

10%1UF6.3V

2

1 C3057

402CERM

10%1UF6.3V

2

1 C3056

402CERM

10%1UF6.3V

2

1 C3055

402CERM

10%1UF6.3V

2

1 C3054

402CERM

10%1UF6.3V

2

1 C3053

402CERM

1UF6.3V10%

2

1 C3052

6.3V

1UF

CERM

10%

4022

1 C3051

20%

X5R6.3V

10UF

603

2

1 C305010UF

X5R6.3V20%

603

2

1 C3085

6.3V

1UF10%

CERM402

2

1 C3084

6.3V

1UF10%

CERM402

2

1 C3083

6.3V

1UF10%

CERM402

2

1 C3082

6.3V

1UF10%

CERM402

2

1 C3081

402CERM

10%1UF6.3V2

1 C3080

402CERM

10%1UF6.3V2

1 C3079

402CERM

10%1UF6.3V2

1 C3078

402CERM

10%1UF6.3V2

1 C3077

402CERM

10%1UF6.3V2

1 C3076

402CERM

10%1UF6.3V2

1 C3075

402CERM

10%1UF6.3V2

1 C3074

402CERM

10%1UF6.3V2

1 C3073

402CERM

1UF6.3V10%

2

1 C3072

6.3V

1UF

CERM

10%

4022

1 C3071

20%

X5R6.3V

10UF

603

2

1 C307010UF

603X5R6.3V20%

2

1 C3094

6.3V

1UF10%

CERM402

2

1 C3093

6.3V

1UF10%

CERM402

2

1 C3092

6.3V

1UF10%

CERM402

2

1 C3091

6.3V

1UF10%

CERM402

2

1 C3090

6.3V

1UF10%

CERM402

2

1 C3049

6.3V

1UF10%

CERM402

2

1 C3048

6.3V

1UF10%

CERM402

2

1 C3047

6.3V

1UF10%

CERM402

2

1 C3045

402CERM

10%1UF6.3V

2

1 C304310%6.3V

1UF

CERM402

2

1 C30401UF6.3VCERM

10%

402

2

1 C30A41UF

CERM402

6.3V10%

2

1 C30A31UF

CERM402

6.3V10%

2

1 C30A21UF

CERM402

6.3V10%

2

1 C30A1

6.3V

1UF

CERM402

10%2

1 C30A01UF

402

10%

CERM6.3V

2

1 C30AE

402CERM

1UF6.3V10%

2

1 C30AD

402CERM

10%1UF6.3V

2

1 C30AC

402

10%1UF

CERM6.3V

2

1 C30AB

402

10%1UF6.3VCERM2

1 C30AA

402CERM

10%1UF6.3V

2

1 C30A9

402CERM

10%1UF6.3V

2

1 C30A8

CERM

10%1UF

402

6.3V2

1 C30A7

402CERM

10%1UF6.3V

2

1 C30A6

402CERM

1UF6.3V10%

2

1 C30A51UF6.3VCERM402

10%

2

1 C3066

402CERM

10%1UF6.3V

2

1 C3067

6.3V

1UF10%

CERM402

2

1 C3068

6.3V

1UF10%

CERM402

2

1 C3069

6.3V

1UF10%

CERM402

2

1 C3089

402CERM

10%1UF6.3V2

1 C3088

402CERM

10%1UF6.3V2

1 C3087

402CERM

10%1UF6.3V2

1 C3086

402CERM

10%1UF6.3V

2

1 C3016

6.3V

1UF10%

CERM402

2

1 C3017

6.3V

1UF10%

CERM402

2

1 C3018

6.3V

1UF10%

CERM402

2

1 C301910%6.3V

1UF

CERM402

2

1 C3010

402

6.3V

1UF10%

CERM 2

1 C3025

6.3V

1UF10%

CERM402

2

1 C3026

6.3V

1UF10%

CERM402

2

1 C3027

6.3V

1UF10%

CERM402

2

1 C3028

6.3V

1UF10%

CERM402

2

1 C3029

402CERM

10%1UF6.3V 2

1 C3020

6.3V

1UF10%

CERM402

2

1 C3021

6.3V

1UF10%

CERM402

2

1 C3022

6.3V

1UF10%

CERM402

2

1 C3023

6.3V

1UF10%

CERM402

2

1 C3014

6.3V

1UF10%

CERM402

2

1 C3030

6.3V

1UF10%

CERM402

2

1 C3031

6.3V

1UF10%

CERM402

2

1 C3032

6.3V

1UF10%

CERM402

2

1 C3033

402CERM

10%1UF6.3V

2

1 C30411UF

6.3VCERM

10%

4022

1 C30421UF

6.3VCERM

10%

4022

1 C30441UF

6.3VCERM

10%

4022

1 C3046

402

10%

CERM6.3V

1UF

2

1 C3065

402CERM

10%1UF6.3V

2

1 C3064

402CERM

10%1UF6.3V

2

1 C3063

6.3V

402CERM

10%1UF

2

1 C3062

CERM402

10%1UF6.3V

2

1 C3061

402CERM

10%1UF6.3V

2

1 C3060

402CERM

10%1UF6.3V

2

1 C3059

402CERM

10%1UF6.3V


MEMORY CAPS

=PP1V5_CPU_MEM

=PP1V5_CPU_MEM

=PP1V5_S3_MEM_A

=PP1V5_CPU_MEM

=PP1V5_S3_MEM_B

30 OF 110

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051-8600

29 OF 92

6 13 16 29

6 13 16 29

6 28 30

6 13 16 29

6 28 31

www.vinafix.vn

S1*

A13

VDD_14

CAS*

VDD_12

BA0

A10_AP

WE*

A3

DQ54

DQ55

VSS_44

VSS_0

VSS_2

VSS_5

DQS0

DQS0*

DQ5

DQ4

DQ6

DQ7

VREFDQ

VSS_1

VSS_3

DQ0

DQ1

DM0

VSS_4

VSS_7

DQ12

DQ20

VSS_13

DQ15

DQ14

VSS_11

RESET*

VSS_9

DQ13

DM1

DQ21

VSS_15

DQ22

VSS_16

VSS_18

DQ23

DQ28

DQS3*

VSS_20

DQ29

DM2

VSS_23

DQS3

DQ30

DQ31

VSS_25

VDD_1

CKE1

A15

A14

VDD_3

VDD_9

VDD_5

VDD_7

A7

A11

A4

A6

A2

A0

CK1

NC_1

ODT1

VDD_15

ODT0

VDD_13

RAS*

VDD_11

CK1*

BA1

S0*

DQ39

DQ38

VSS_30

VSS_29

DQ37

DQ36

VSS_27

VREFCA

VDD_17

DM4

VSS_32

DQ47

DQ44

DQ46

VSS_37

DQS5

DQS5*

VSS_39

VSS_34

DQ45

DQ52

VSS_46

DQ61

DQ60

VSS_42

VSS_41

DQ53

DM6

VTT_1

DQS7*

DQS7

EVENT*

VSS_51

DQ63

DQ62

VSS_49

SDA

SCL

DQ2

DQ3

VSS_6

DQ8

DQ9

VSS_8

DQS1*

DQS1

VSS_10

DQ16

VSS_12

DQ11

DQ10

DQ17

DQ18

DQS2

VSS_17

DQS2*

VSS_14

VSS_21

DQ24

DQ25

DQ19

VSS_19

VSS_24

DQ27

DQ26

DM3

VSS_22

CKE0

A5

VDD_4

CK0

VDD_8

A1

VDD_6

VDD_10

CK0*

DQ33

VSS_26

VDD_16

TEST

DQ32

DQ34

VSS_31

DQS4

DQS4*

VSS_28

DQ35

DQ41

VSS_33

VSS_35

DQ40

DM5

VSS_38

DQ43

DQ42

VSS_36

DQ48

VSS_43

DQS6*

DQS6

VSS_40

DQ49

DQ50

VSS_45

DQ56

DQ57

VSS_47

DM7

DQ58

VSS_48

DQ59

SA0

VSS_50

A8

A9

A12/BC*

VDD_2

BA2

NC_0

VDD_0

DQ51

VTT_0

SA1

VDDSPD

MTG PIN MTG PIN

KEY

(1 OF 2)

DQ3

VSS_10

VSS_19

DQ9

VSS_8

DQS1*

DQS1

VSS_21

DQ26

CKE0

BA2

A9

A8

VDD_6

VDD_8

CK0*

A10_AP

BA0

SA0

VTT_0

SA1

VDDSPD

VSS_50

VSS_47

DM7

DQ58

DQ59

DQ57

DQ56

VSS_45

DQ51

DQ50

DQS6

VSS_43

DQS6*

VSS_40

DQ49

DQ48

VSS_38

DQ43

DQ42

VSS_36

DM5

VSS_35

DQ41

DQ40

DQ35

DQ34

VSS_31

DQS4

DQS4*

VSS_28

VSS_26

DQ32

DQ33

TEST

VDD_16

S1*

A13

CAS*

VDD_14

WE*

VDD_12

VDD_10

CK0

A1

A3

A5

VDD_4

A12/BC*

VDD_2

VDD_0

NC_0

DQ11

DQ16

VSS_12

DQ10

DQ8

DM0

VSS_4

VSS_6

DQ2

VREFDQ

DQ0

VSS_3

DQ1

VSS_1

SCL

SDA

VTT_1

VSS_51

VSS_49

DQ63

DQS7

DQS7*

EVENT*

DQ62

DM6

DQ60

VSS_46

VSS_41

DQ53

DQ55

VSS_44

DQ54

VSS_42

DQ61

DQ52

DQ44

VSS_34

DQS5*

VSS_37

DQ46

DQ47

VSS_39

DQ45

DQS5

VSS_32

DM4

VSS_27

VSS_29

DQ36

VREFCA

VDD_17

DQ37

DQ38

DQ39

VSS_30

BA1

NC_1

VDD_13

VDD_11

VDD_15

ODT0

CK1

A0

A2

A6

A4

A7

A11

VDD_9

VDD_7

VDD_5

VDD_3

A15

A14

CKE1

VDD_1

DM1

DQ15

DQ14

DQ13

VSS_11

VSS_9

RESET*

VSS_13

DQ20

DQ12

DQ7

DQ6

DQ5

DQ4

VSS_7

DQS0*

VSS_2

VSS_0

DQS0

VSS_5

DQ21

VSS_15

DM2

VSS_16

DQ22

VSS_18

DQ23

DQ28

VSS_20

DQ29

DQS3

VSS_23

DQS3*

DQ30

DQ31

VSS_25

VSS_14

DQ17

DQS2*

VSS_17

DQS2

DQ18

DQ19

DQ25

DQ24

DM3

VSS_22

DQ27

VSS_24

CK1*

RAS*

S0*

ODT1

VSS_33

VSS_48

KEY

(2 OF 2)




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

DIMM 0

DIMM 2

(NONE)

- =PP0V75_S0_MEM_VTT_A

- =PPSPD_S0_MEM_A (2.5 - 3.3V)

Power aliases required by this page:

DIMM2 SPD ADDR=0XA2(WR)/0XA3(RD)

- ALL DQ, DQS, DM SIGNALS;TO FACILITATE BITSWAPS WITH ALIASES

- =I2C_SODIMMA_SCL

Page Notes

- =PP1V5_S3_MEM_A

- =I2C_SODIMMA_SDA

DIMM0 SPD ADDR=0XA0(WR)/0XA1(RD)

- =PP1V5_S0_MEM_A

Signal aliases required by this page:

BOM options provided by this page:

2

1 C3131

402

10V

0.1UF20%

CERM2

1 C3130

CERM

2.2UF20%6.3V

402-LF

2

1 C3136

10V20%0.1UF

402CERM2

1 C3135

402-LF

20%

CERM6.3V

2.2UF

2

1 C3151

CERM402-LF

6.3V

2.2UF20%

2

1 C3150

6.3V

2.2UF20%

402-LFCERM

2

1R3141

MF-LF

5%

402

10K

1/16W

2

1R3140

5%10K

1/16W

402MF-LF

2

1 C3140

402-LF

6.3VCERM

20%2.2UF

2

1R314210K5%

402

1/16WMF-LF

2

1R314310K

402

5%1/16WMF-LF

113A

204A203A

26A25A

20A19A

14A

196A195A

13A

190A189A

185A

184A

179A

178A

173A

172A

168A167A

9A

162A161A

156A155A

151A

150A

145A

144A

139A

138A

8A

134A133A

128A127A

72A71A

66A65A

61A

60A

3A

55A

54A

49A

48A

44A43A

38A37A

32A31A

2A1A

126A

199A

100A99A

94A93A

88A87A

82A81A

76A

124A123A

118A117A

112A111A

106A105A

75A

125A

200A

202A201A

197A

121A

114A

30A

110A

120A

116A

122A

77A

410409

198A

186A

188A

169A

171A

152A

154A

135A

137A

62A

64A

45A

47A

27A

29A

10A

12A

23A

21A

18A

16A

194A

192A

182A

180A

6A

193A

191A

183A

181A

176A

174A

166A

164A

177A

175A

4A

165A

163A

160A

158A

148A

146A

159A

157A

149A

147A

17A

142A

140A

132A

130A

143A

141A

131A

129A

70A

68A

15A

58A

56A

69A

67A

59A

57A

52A

50A

42A

40A

7A

53A

51A

41A

39A

36A

34A

24A

22A

35A

33A

5A

187A

170A

153A

136A

63A

46A

28A

11A

74A73A

104A

102A

103A

101A

115A

79A

108A

109A

85A

89A

86A

90A

91A 92A

95A 96A

97A

78A

80A

119A

83A 84A

107A

98A

J3100

DDR3-SODIMM-DUAL

F-RT-TH

CRITICAL

113B

204B203B

26B25B

20B19B

14B

196B195B

13B

190B189B

185B

184B

179B

178B

173B

172B

168B167B

9B

162B161B

156B155B

151B

150B

145B

144B

139B

138B

8B

134B133B

128B127B

72B71B

66B65B

61B

60B

3B

55B

54B

49B

48B

44B43B

38B37B

32B31B

2B1B

126B

199B

100B99B

94B93B

88B87B

82B81B

76B

124B123B

118B117B

112B111B

106B105B

75B

125B

200B

202B201B

197B

121B

114B

30B

110B

120B

116B

122B

77B

198B

186B

188B

169B

171B

152B

154B

135B

137B

62B

64B

45B

47B

27B

29B

10B

12B

23B

21B

18B

16B

194B

192B

182B

180B

6B

193B

191B

183B

181B

176B

174B

166B

164B

177B

175B

4B

165B

163B

160B

158B

148B

146B

159B

157B

149B

147B

17B

142B

140B

132B

130B

143B

141B

131B

129B

70B

68B

15B

58B

56B

69B

67B

59B

57B

52B

50B

42B

40B

7B

53B

51B

41B

39B

36B

34B

24B

22B

35B

33B

5B

187B

170B

153B

136B

63B

46B

28B

11B

74B73B

104B

102B

103B

101B

115B

79B

108B

109B

85B

89B

86B

90B

91B 92B

95B 96B

97B

78B

80B

119B

83B 84B

107B

98B

J3100F-RT-TH

DDR3-SODIMM-DUALCRITICAL

DDR3 SO-DIMMs 0 & 2SYNC_MASTER=MASTER SYNC_DATE=N/A

=MEM_A_DQS_N<2>

=MEM_A_DQS_P<2>

=MEM_A_DQ<18>

=MEM_A_DQ<8>

=MEM_A_DQ<4>

=MEM_A_DQ<5>

=MEM_A_DQ<6>

=MEM_A_DQ<7>

=MEM_A_DQ<12>

=MEM_A_DQ<13>

=MEM_A_DM<1>

=MEM_A_DQ<14>


=MEM_A_DQ<1>

MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<3>

MEM_A_A<0>

MEM_A_A<2>

MEM_A_A<7>

MEM_A_A<11>

=MEM_A_DQ<3>

=MEM_A_DQ<9>

=MEM_A_DQS_N<1>

=MEM_A_DQS_P<1>

=MEM_A_DQ<26>

MEM_A_CKE<0>

MEM_A_BA<2>

MEM_A_A<9>

MEM_A_A<8>

=PP1V5_S3_MEM_A

=MEM_A_CLK_N<0>

MEM_A_A<10>

MEM_A_BA<0>

MEM_DIMM0_SA<0>

=MEM_A_DM<7>

=MEM_A_DQ<59>

=MEM_A_DQ<57>

=MEM_A_DQ<56>

=MEM_A_DQ<51>

=MEM_A_DQ<50>

=MEM_A_DQS_N<6>

=MEM_A_DQ<42>

=MEM_A_DM<5>

=MEM_A_DQ<41>

=MEM_A_DQ<40>

=MEM_A_DQ<35>

=MEM_A_DQ<34>

=MEM_A_DQS_P<4>

=MEM_A_DQS_N<4>

=MEM_A_DQ<32>

=MEM_A_DQ<33>

MEM_A_CS_L<1>

MEM_A_A<13>

MEM_A_CAS_L

MEM_A_WE_L

=MEM_A_CLK_P<0>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<12>

=MEM_A_DQ<11>

=MEM_A_DQ<16>

=MEM_A_DQ<10>

=MEM_A_DQ<8>

=MEM_A_DM<0>

=MEM_A_DQ<2>


=MEM_A_DQ<0>

=MEM_A_DQ<1>

=I2C_SODIMMA_SCL

=I2C_SODIMMA_SDA

=PP0V75_S0_MEM_VTT_A

=MEM_A_DQ<63>

=MEM_A_DQS_P<7>

=MEM_A_DQS_N<7>

MEM_EVENT_L

=MEM_A_DQ<62>

=MEM_A_DQ<60>

=MEM_A_DQ<53>

=MEM_A_DQ<55>

=MEM_A_DQ<54>

=MEM_A_DQ<61>

=MEM_A_DQ<52>

=MEM_A_DQ<44>

=MEM_A_DQS_N<5>

=MEM_A_DQ<46>

=MEM_A_DQ<47>

=MEM_A_DQ<45>

=MEM_A_DQS_P<5>

=MEM_A_DM<4>


=MEM_A_DQ<37>

MEM_A_BA<1>

MEM_A_ODT<0>

MEM_A_A<2>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

MEM_A_A<15>

MEM_A_A<14>

MEM_A_CKE<1>

=MEM_A_DM<1>

=MEM_A_DQ<15>

=MEM_A_DQ<14>

=MEM_A_DQ<13>

MEM_RESET_L

=MEM_A_DQ<20>

=MEM_A_DQ<12>

=MEM_A_DQ<7>

=MEM_A_DQ<6>

=MEM_A_DQ<5>

=MEM_A_DQ<4>

=MEM_A_DQS_N<0>

=MEM_A_DQS_P<0>

=MEM_A_DQ<21>

=MEM_A_DM<2>

=MEM_A_DQ<22>

=MEM_A_DQ<23>

=MEM_A_DQ<28>

=MEM_A_DQS_N<3>

=MEM_A_DQ<30>

=MEM_A_DQ<31>

=MEM_A_DQ<17>

=MEM_A_DQS_N<2>

=MEM_A_DQS_P<2>

=MEM_A_DQ<18>

=MEM_A_DQ<19>

=MEM_A_DQ<25>

=MEM_A_DQ<24>

=MEM_A_DM<3>

=MEM_A_DQ<27>

=MEM_A_CLK_N<1>

MEM_A_RAS_L

MEM_A_CS_L<0>

MEM_A_ODT<1>

MEM_A_CS_L<3>

MEM_A_A<13>

MEM_A_CAS_L

MEM_A_WE_L

=MEM_A_DQ<54>

=MEM_A_DQ<55>

=MEM_A_DQS_P<0>

=MEM_A_DQ<15>

MEM_RESET_L

=MEM_A_DQ<22>

=MEM_A_DQ<23>

=MEM_A_DQ<28>

=MEM_A_DQS_N<3>

=MEM_A_DQ<29>

=MEM_A_DQS_P<3>

=MEM_A_DQ<30>

=MEM_A_DQ<31>

=MEM_A_CLK_P<3>

MEM_A_ODT<3>

MEM_A_ODT<2>

MEM_A_RAS_L

=MEM_A_CLK_N<3>

MEM_A_BA<1>

MEM_A_CS_L<2>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

=MEM_A_DQ<37>

=MEM_A_DQ<36>


=MEM_A_DM<4>

=MEM_A_DQ<47>

=MEM_A_DQ<44>

=MEM_A_DQ<46>

=MEM_A_DQS_P<5>

=MEM_A_DQS_N<5>

=MEM_A_DQ<45>

=MEM_A_DQ<52>

=MEM_A_DQ<60>

=MEM_A_DQ<53>

=MEM_A_DM<6>


=MEM_A_DQS_N<7>

=MEM_A_DQ<62>

=MEM_A_DQS_N<1>

=MEM_A_DQ<11>

=MEM_A_DQ<10>

=MEM_A_DQ<24>

=MEM_A_DQ<26>

=MEM_A_DM<3>

=MEM_A_DQ<33>

=MEM_A_DQ<32>

=MEM_A_DQ<34>

=MEM_A_DQS_P<4>

=MEM_A_DQS_N<4>

=MEM_A_DQ<35>

=MEM_A_DQ<41>

=MEM_A_DQ<40>

=MEM_A_DQ<43>

=MEM_A_DQ<48>

=MEM_A_DQ<49>

=MEM_A_DQ<50>

=MEM_A_DQ<56>

=MEM_A_DQ<57>

MEM_A_A<12>

MEM_A_BA<2>

=MEM_A_DQ<51>


MEM_DIMM2_SA<1>

MEM_DIMM2_SA<1>

MEM_DIMM2_SA<0>

MEM_DIMM0_SA<1>




=PPSPD_S0_MEM_A

MEM_DIMM0_SA<0>

=MEM_A_DQS_P<1>

=MEM_A_DQ<16>

=MEM_A_DQ<25>

=MEM_A_DQ<27>

MEM_A_CKE<2>

=MEM_A_CLK_N<2>

MEM_A_BA<0>

MEM_A_A<10>

=MEM_A_CLK_P<2>

=MEM_A_DQS_N<0>

=MEM_A_DQ<19>

MEM_A_A<5>

=MEM_A_DQS_P<3>

MEM_A_A<14>

MEM_A_A<4>

MEM_A_A<6>

=PP1V5_S3_MEM_A

=MEM_A_DM<2>

=MEM_A_DQ<9>

=MEM_A_DQ<3>

=MEM_A_DQ<2>

=MEM_A_DM<0>

=MEM_A_DQ<0>

MEM_A_A<15>

=PP1V5_S3_MEM_A

MEM_A_CKE<3>

=MEM_A_DQ<17>

=MEM_A_DQ<43>

=MEM_A_DQ<48>

=MEM_A_DQ<49>

=MEM_A_DQS_N<6>

=MEM_A_DQ<36>

=MEM_A_DM<6>

=MEM_A_CLK_P<1>

MEM_A_A<0>

=PPSPD_S0_MEM_A

MEM_A_A<4>

=MEM_A_DQ<29>

=PP1V5_S3_MEM_A

=MEM_A_DQ<42>

=I2C_SODIMMA_SCL

=I2C_SODIMMA_SDA

MEM_EVENT_L

=MEM_A_DQ<63>

=MEM_A_DQS_P<7>

=MEM_A_DQ<61>

=MEM_A_DQ<20>

=MEM_A_DQ<21>


MEM_DIMM0_SA<1>

=PPSPD_S0_MEM_A

=MEM_A_DQ<58>

=MEM_A_DQS_P<6>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

MEM_A_A<1>

=MEM_A_DM<5>

=PPSPD_S0_MEM_A

MEM_DIMM2_SA<0>

=MEM_A_DQ<59>

=MEM_A_DQ<58>

=MEM_A_DM<7>

=MEM_A_DQS_P<6>

31 OF 110

A.0.0

051-8600

30 OF 92

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

28 30 89

30 32

12 30 83

12 30 83

12 30 83

12 30 83

12 30 83

12 30 83

12 30 83

30 32

30 32

30 32

30 32

30 32

12 83

12 30 83

12 30 83

12 30 83

6 28 29 30

32

12 30 83

12 30 83

30

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

12 83

12 30 83

12 30 83

12 30 83

32

12 30 83

12 30 83

12 30 83

12 30 83

30 32

30 32

30 32

30 32

30 32

30 32

28 30 89

30 32

30 32

30 48

30 48

6 30

30 32

30 32

30 32

30 31 46

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

28 30 89

30 32

12 30 83

12 83

12 30 83

12 30 83

12 30 83

12 30 83

12 30 83

12 30 83

12 83

30 32

30 32

30 32

30 32

30 31 32 91

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

32

12 30 83

12 83

12 83

12 83

12 30 83

12 30 83

12 30 83

30 32

30 32

30 32

30 32

30 31 32 91

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

32

12 83

12 83

12 30 83

32

12 30 83

12 83

30 32

30 32

30 32

30 32

28 30 89

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

6 30

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

30 32

12 30 83

12 30 83

30 32

6 30

30

30

30

30

28 30 89

28 30 89

6 30

6 30 46

30

30 32

30 32

30 32

30 32

12 83

32

12 30 83

12 30 83

32

30 32

30 32

12 30 83

30 32

12 30 83

12 30 83

12 30 83

6 28 29 30

30 32

30 32

30 32

30 32

30 32

30 32

12 30 83

6 28 29 30

12 83

30 32

30 32

30 32

30 32

30 32

30 32

30 32

32

12 30 83

6 30 46

12 30 83

30 32

6 28 29 30

30 32

30 48

30 48

30 31 46

30 32

30 32

30 32

30 32

30 32

6 30

30

6 30 46

30 32

30 32

30 32

30 32

12 30 83

30 32

6 30 46

30

30 32

30 32

30 32

30 32

www.vinafix.vn

S1*

A13

VDD_14

CAS*

VDD_12

BA0

A10_AP

WE*

A3

DQ54

DQ55

VSS_44

VSS_0

VSS_2

VSS_5

DQS0

DQS0*

DQ5

DQ4

DQ6

DQ7

VREFDQ

VSS_1

VSS_3

DQ0

DQ1

DM0

VSS_4

VSS_7

DQ12

DQ20

VSS_13

DQ15

DQ14

VSS_11

RESET*

VSS_9

DQ13

DM1

DQ21

VSS_15

DQ22

VSS_16

VSS_18

DQ23

DQ28

DQS3*

VSS_20

DQ29

DM2

VSS_23

DQS3

DQ30

DQ31

VSS_25

VDD_1

CKE1

A15

A14

VDD_3

VDD_9

VDD_5

VDD_7

A7

A11

A4

A6

A2

A0

CK1

NC_1

ODT1

VDD_15

ODT0

VDD_13

RAS*

VDD_11

CK1*

BA1

S0*

DQ39

DQ38

VSS_30

VSS_29

DQ37

DQ36

VSS_27

VREFCA

VDD_17

DM4

VSS_32

DQ47

DQ44

DQ46

VSS_37

DQS5

DQS5*

VSS_39

VSS_34

DQ45

DQ52

VSS_46

DQ61

DQ60

VSS_42

VSS_41

DQ53

DM6

VTT_1

DQS7*

DQS7

EVENT*

VSS_51

DQ63

DQ62

VSS_49

SDA

SCL

DQ2

DQ3

VSS_6

DQ8

DQ9

VSS_8

DQS1*

DQS1

VSS_10

DQ16

VSS_12

DQ11

DQ10

DQ17

DQ18

DQS2

VSS_17

DQS2*

VSS_14

VSS_21

DQ24

DQ25

DQ19

VSS_19

VSS_24

DQ27

DQ26

DM3

VSS_22

CKE0

A5

VDD_4

CK0

VDD_8

A1

VDD_6

VDD_10

CK0*

DQ33

VSS_26

VDD_16

TEST

DQ32

DQ34

VSS_31

DQS4

DQS4*

VSS_28

DQ35

DQ41

VSS_33

VSS_35

DQ40

DM5

VSS_38

DQ43

DQ42

VSS_36

DQ48

VSS_43

DQS6*

DQS6

VSS_40

DQ49

DQ50

VSS_45

DQ56

DQ57

VSS_47

DM7

DQ58

VSS_48

DQ59

SA0

VSS_50

A8

A9

A12/BC*

VDD_2

BA2

NC_0

VDD_0

DQ51

VTT_0

SA1

VDDSPD

MTG PIN MTG PIN

KEY

(1 OF 2)

DQ3

VSS_10

VSS_19

DQ9

VSS_8

DQS1*

DQS1

VSS_21

DQ26

CKE0

BA2

A9

A8

VDD_6

VDD_8

CK0*

A10_AP

BA0

SA0

VTT_0

SA1

VDDSPD

VSS_50

VSS_47

DM7

DQ58

DQ59

DQ57

DQ56

VSS_45

DQ51

DQ50

DQS6

VSS_43

DQS6*

VSS_40

DQ49

DQ48

VSS_38

DQ43

DQ42

VSS_36

DM5

VSS_35

DQ41

DQ40

DQ35

DQ34

VSS_31

DQS4

DQS4*

VSS_28

VSS_26

DQ32

DQ33

TEST

VDD_16

S1*

A13

CAS*

VDD_14

WE*

VDD_12

VDD_10

CK0

A1

A3

A5

VDD_4

A12/BC*

VDD_2

VDD_0

NC_0

DQ11

DQ16

VSS_12

DQ10

DQ8

DM0

VSS_4

VSS_6

DQ2

VREFDQ

DQ0

VSS_3

DQ1

VSS_1

SCL

SDA

VTT_1

VSS_51

VSS_49

DQ63

DQS7

DQS7*

EVENT*

DQ62

DM6

DQ60

VSS_46

VSS_41

DQ53

DQ55

VSS_44

DQ54

VSS_42

DQ61

DQ52

DQ44

VSS_34

DQS5*

VSS_37

DQ46

DQ47

VSS_39

DQ45

DQS5

VSS_32

DM4

VSS_27

VSS_29

DQ36

VREFCA

VDD_17

DQ37

DQ38

DQ39

VSS_30

BA1

NC_1

VDD_13

VDD_11

VDD_15

ODT0

CK1

A0

A2

A6

A4

A7

A11

VDD_9

VDD_7

VDD_5

VDD_3

A15

A14

CKE1

VDD_1

DM1

DQ15

DQ14

DQ13

VSS_11

VSS_9

RESET*

VSS_13

DQ20

DQ12

DQ7

DQ6

DQ5

DQ4

VSS_7

DQS0*

VSS_2

VSS_0

DQS0

VSS_5

DQ21

VSS_15

DM2

VSS_16

DQ22

VSS_18

DQ23

DQ28

VSS_20

DQ29

DQS3

VSS_23

DQS3*

DQ30

DQ31

VSS_25

VSS_14

DQ17

DQS2*

VSS_17

DQS2

DQ18

DQ19

DQ25

DQ24

DM3

VSS_22

DQ27

VSS_24

CK1*

RAS*

S0*

ODT1

VSS_33

VSS_48

KEY

(2 OF 2)




36

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DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

DIMM 1

DIMM 3

DIMM1 SPD ADDR=0XA4(WR)/0XA5(RD) DIMM3 SPD ADDR=0XA6(WR)/0XA7(RD)


- =I2C_SODIMMB_SDA

- =PPSPD_S0_MEM_B (2.5 - 3.3V)

- =PP0V75_S0_MEM_VTT_B

- =PP1V5_S3_MEM_B

- =PP1V5_S0_MEM_B

Page NotesPower aliases required by this page:

(NONE)

- ALL DQ, DQS, DM SIGNALS;TO FACILITATE BITSWAPS WITH ALIASES


- =I2C_SODIMMB_SCL

2

1 C3231

402CERM10V20%0.1UF

2

1 C3230

402-LF

6.3V20%2.2UF

CERM

2

1 C3236

20%0.1UF

CERM402

10V2

1 C32352.2UF

6.3VCERM

20%

402-LF

2

1 C32512.2UF20%6.3V

402-LFCERM2

1 C3250

CERM402-LF

20%2.2UF

6.3V

2

1R3243

402MF-LF1/16W5%10K

2

1R3242

402

5%1/16WMF-LF

10K

2

1 C3240

CERM402-LF

6.3V

2.2UF20%

2

1R3240

MF-LF1/16W

402

5%10K

2

1R324110K

402

5%1/16WMF-LF

113A

204A203A

26A25A

20A19A

14A

196A195A

13A

190A189A

185A

184A

179A

178A

173A

172A

168A167A

9A

162A161A

156A155A

151A

150A

145A

144A

139A

138A

8A

134A133A

128A127A

72A71A

66A65A

61A

60A

3A

55A

54A

49A

48A

44A43A

38A37A

32A31A

2A1A

126A

199A

100A99A

94A93A

88A87A

82A81A

76A

124A123A

118A117A

112A111A

106A105A

75A

125A

200A

202A201A

197A

121A

114A

30A

110A

120A

116A

122A

77A

410409

198A

186A

188A

169A

171A

152A

154A

135A

137A

62A

64A

45A

47A

27A

29A

10A

12A

23A

21A

18A

16A

194A

192A

182A

180A

6A

193A

191A

183A

181A

176A

174A

166A

164A

177A

175A

4A

165A

163A

160A

158A

148A

146A

159A

157A

149A

147A

17A

142A

140A

132A

130A

143A

141A

131A

129A

70A

68A

15A

58A

56A

69A

67A

59A

57A

52A

50A

42A

40A

7A

53A

51A

41A

39A

36A

34A

24A

22A

35A

33A

5A

187A

170A

153A

136A

63A

46A

28A

11A

74A73A

104A

102A

103A

101A

115A

79A

108A

109A

85A

89A

86A

90A

91A 92A

95A 96A

97A

78A

80A

119A

83A 84A

107A

98A

J3200

DDR3-SODIMM-DUAL

F-RT-TH

CRITICAL

113B

204B203B

26B25B

20B19B

14B

196B195B

13B

190B189B

185B

184B

179B

178B

173B

172B

168B167B

9B

162B161B

156B155B

151B

150B

145B

144B

139B

138B

8B

134B133B

128B127B

72B71B

66B65B

61B

60B

3B

55B

54B

49B

48B

44B43B

38B37B

32B31B

2B1B

126B

199B

100B99B

94B93B

88B87B

82B81B

76B

124B123B

118B117B

112B111B

106B105B

75B

125B

200B

202B201B

197B

121B

114B

30B

110B

120B

116B

122B

77B

198B

186B

188B

169B

171B

152B

154B

135B

137B

62B

64B

45B

47B

27B

29B

10B

12B

23B

21B

18B

16B

194B

192B

182B

180B

6B

193B

191B

183B

181B

176B

174B

166B

164B

177B

175B

4B

165B

163B

160B

158B

148B

146B

159B

157B

149B

147B

17B

142B

140B

132B

130B

143B

141B

131B

129B

70B

68B

15B

58B

56B

69B

67B

59B

57B

52B

50B

42B

40B

7B

53B

51B

41B

39B

36B

34B

24B

22B

35B

33B

5B

187B

170B

153B

136B

63B

46B

28B

11B

74B73B

104B

102B

103B

101B

115B

79B

108B

109B

85B

89B

86B

90B

91B 92B

95B 96B

97B

78B

80B

119B

83B 84B

107B

98B

J3200F-RT-TH

CRITICAL

DDR3-SODIMM-DUAL

DDR3 SO-DIMM CONNECTOR BSYNC_MASTER=MASTER SYNC_DATE=N/A

=MEM_B_DQ<46>

=MEM_B_DQ<24>

=MEM_B_DQ<19>

=MEM_B_DQ<18>

=MEM_B_DQ<20>

=MEM_B_DQ<19>

MEM_B_A<14>

=MEM_B_DQ<25>

=MEM_B_DQ<26>

=MEM_B_DQ<27>

=MEM_B_DQS_P<2>

MEM_B_A<8>

=PP1V5_S3_MEM_B

MEM_B_A<9>

MEM_B_BA<2>

MEM_B_CKE<2>

MEM_B_A<15>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<1>

=MEM_B_CLK_N<2>

MEM_B_A<10>

MEM_B_BA<0>

=PP1V5_S3_MEM_B

=MEM_B_DQS_N<3>

=MEM_B_DQ<22>

=MEM_B_DQ<12>

=MEM_B_CLK_P<1>

=MEM_B_CLK_N<1>

MEM_B_BA<1>

MEM_B_RAS_L

MEM_B_CS_L<0>

MEM_B_ODT<0>

MEM_B_ODT<1>

=PP1V5_S3_MEM_B

MEM_B_A<0>

=MEM_B_DQ<3>

=MEM_B_DQ<9>

=MEM_B_DQS_N<1>

=MEM_B_DQS_P<1>

=MEM_B_DQ<26>

MEM_B_CKE<0>

MEM_B_BA<2>

MEM_B_A<9>

=PP1V5_S3_MEM_B

=MEM_B_CLK_N<0>

MEM_B_A<10>

MEM_B_BA<0>

MEM_DIMM1_SA<0>


MEM_DIMM1_SA<1>

=PPSPD_S0_MEM_B

=MEM_B_DM<7>

=MEM_B_DQ<58>

=MEM_B_DQ<59>

=MEM_B_DQ<57>

=MEM_B_DQ<56>

=MEM_B_DQ<51>

=MEM_B_DQ<50>

=MEM_B_DQS_P<6>

=MEM_B_DQS_N<6>

=MEM_B_DQ<49>

=MEM_B_DQ<48>

=MEM_B_DQ<43>

=MEM_B_DQ<42>

=MEM_B_DM<5>

=MEM_B_DQ<41>

=MEM_B_DQ<40>

=MEM_B_DQ<35>

=MEM_B_DQ<34>

=MEM_B_DQS_P<4>

=MEM_B_DQS_N<4>

=MEM_B_DQ<32>

=MEM_B_DQ<33>

MEM_B_CS_L<1>

MEM_B_A<13>

MEM_B_CAS_L

MEM_B_WE_L

=MEM_B_CLK_P<0>

MEM_B_A<1>

MEM_B_A<3>

MEM_B_A<5>

MEM_B_A<12>

=MEM_B_DQ<11>

=MEM_B_DQ<16>

=MEM_B_DQ<10>

=MEM_B_DQ<8>

=MEM_B_DM<0>

=MEM_B_DQ<2>


=MEM_B_DQ<0>

=MEM_B_DQ<1>

=I2C_SODIMMB_SCL

=I2C_SODIMMB_SDA


=MEM_B_DQ<63>

=MEM_B_DQS_P<7>

=MEM_B_DQS_N<7>

MEM_EVENT_L

=MEM_B_DQ<62>

=MEM_B_DM<6>

=MEM_B_DQ<60>

=MEM_B_DQ<53>

=MEM_B_DQ<55>

=MEM_B_DQ<54>

=MEM_B_DQ<61>

=MEM_B_DQ<52>

=MEM_B_DQ<44>

=MEM_B_DQS_N<5>

=MEM_B_DQ<47>

=MEM_B_DQ<45>

=MEM_B_DQS_P<5>

=MEM_B_DM<4>

=MEM_B_DQ<36>


=MEM_B_DQ<37>

=MEM_B_DQ<38>

=MEM_B_DQ<39>

MEM_B_A<2>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_A<15>

MEM_B_A<14>

MEM_B_CKE<1>

=MEM_B_DM<1>

=MEM_B_DQ<15>

=MEM_B_DQ<14>

=MEM_B_DQ<13>

MEM_RESET_L

=MEM_B_DQ<20>

=MEM_B_DQ<12>

=MEM_B_DQ<7>

=MEM_B_DQ<6>

=MEM_B_DQ<5>

=MEM_B_DQ<4>

=MEM_B_DQS_N<0>

=MEM_B_DQS_P<0>

=MEM_B_DQ<21>

=MEM_B_DM<2>

=MEM_B_DQ<22>

=MEM_B_DQ<23>

=MEM_B_DQ<28>

=MEM_B_DQ<29>

=MEM_B_DQS_P<3>

=MEM_B_DQS_N<3>

=MEM_B_DQ<30>

=MEM_B_DQ<31>

=MEM_B_DQ<17>

=MEM_B_DQS_N<2>

=MEM_B_DQS_P<2>

=MEM_B_DQ<25>

=MEM_B_DM<3>

=MEM_B_DQ<27>

MEM_B_CS_L<3>

MEM_B_A<3>

=MEM_B_DQ<54>

=MEM_B_DQ<55>

=MEM_B_DQS_P<0>

=MEM_B_DQS_N<0>

=MEM_B_DQ<5>

=MEM_B_DQ<4>

=MEM_B_DQ<6>

=MEM_B_DQ<7>


=MEM_B_DQ<0>

=MEM_B_DQ<1>

=MEM_B_DM<0>

=MEM_B_DQ<15>

=MEM_B_DQ<14>

MEM_RESET_L

=MEM_B_DM<1>

=MEM_B_DQ<21>

=MEM_B_DQ<23>

=MEM_B_DQ<28>

=MEM_B_DQ<29>

=MEM_B_DM<2>

=MEM_B_DQS_P<3>

=MEM_B_DQ<30>

MEM_B_CKE<3>

MEM_B_A<11>

MEM_B_A<2>

MEM_B_A<0>

=MEM_B_CLK_P<3>

MEM_B_ODT<3>

MEM_B_ODT<2>

MEM_B_RAS_L

=MEM_B_CLK_N<3>

MEM_B_BA<1>

MEM_B_CS_L<2>

=MEM_B_DQ<39>

=MEM_B_DQ<38>

=MEM_B_DQ<37>

=MEM_B_DQ<36>

=MEM_B_DM<4>

=MEM_B_DQ<47>

=MEM_B_DQ<44>

=MEM_B_DQ<46>

=MEM_B_DQS_P<5>

=MEM_B_DQS_N<5>

=MEM_B_DQ<45>

=MEM_B_DQ<52>

=MEM_B_DQ<60>

=MEM_B_DQ<53>

=MEM_B_DM<6>


=MEM_B_DQS_N<7>

=MEM_B_DQS_P<7>

MEM_EVENT_L

=MEM_B_DQ<62>

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

=MEM_B_DQ<2>

=MEM_B_DQ<3>

=MEM_B_DQ<8>

=MEM_B_DQ<9>

=MEM_B_DQS_N<1>

=MEM_B_DQS_P<1>

=MEM_B_DQ<16>

=MEM_B_DQ<11>

=MEM_B_DQ<17>

=MEM_B_DQ<18>

=MEM_B_DQS_N<2>

=MEM_B_DQ<24>

=MEM_B_CLK_P<2>

=MEM_B_DQ<33>

=MEM_B_DQ<34>

=MEM_B_DQS_N<4>

=MEM_B_DQ<35>

=MEM_B_DQ<41>

=MEM_B_DQ<40>

=MEM_B_DM<5>

=MEM_B_DQ<43>

=MEM_B_DQ<42>

=MEM_B_DQ<48>

=MEM_B_DQS_N<6>

=MEM_B_DQS_P<6>

=MEM_B_DQ<49>

=MEM_B_DQ<56>

=MEM_B_DQ<57>

=MEM_B_DM<7>

=MEM_B_DQ<58>

=MEM_B_DQ<51>


MEM_DIMM3_SA<1>

=PPSPD_S0_MEM_B

MEM_DIMM3_SA<0>

MEM_DIMM3_SA<1>

=PPSPD_S0_MEM_B=PPSPD_S0_MEM_B




=PPSPD_S0_MEM_B

MEM_B_A<12>

MEM_B_WE_L

MEM_DIMM1_SA<1>

MEM_DIMM1_SA<0>

=MEM_B_DQ<13>

=MEM_B_DQ<31>


=MEM_B_DQ<32>

=MEM_B_DQ<61>

MEM_B_A<13>

MEM_B_CAS_L

=MEM_B_DQ<10>

=MEM_B_DM<3>

=MEM_B_DQS_P<4>

=MEM_B_DQ<63>

=MEM_B_DQ<50>

=MEM_B_DQ<59>

MEM_DIMM3_SA<0>

32 OF 110

A.0.0

051-8600

31 OF 92

31 32

31 32

31 32

31 32

31 32

31 32

12 31 83

31 32

31 32

31 32

31 32

12 31 83

6 28 29 31

12 31 83

12 31 83

12 83

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

32

12 31 83

12 31 83

6 28 29 31

31 32

31 32

31 32

32

32

12 31 83

12 31 83

12 83

12 83

12 83

6 28 29 31

12 31 83

31 32

31 32

31 32

31 32

31 32

12 83

12 31 83

12 31 83

6 28 29 31

32

12 31 83

12 31 83

31

6 31

31

6 31

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

12 83

12 31 83

12 31 83

12 31 83

32

12 31 83

12 31 83

12 31 83

12 31 83

31 32

31 32

31 32

31 32

31 32

31 32

28 31 89

31 32

31 32

31 48

31 48

6 31

31 32

31 32

31 32

30 31 46

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

28 31 89

31 32

31 32

31 32

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

12 31 83

12 83

31 32

31 32

31 32

31 32

30 31 32 91

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

12 83

12 31 83

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

28 31 89

31 32

31 32

31 32

31 32

31 32

30 31 32 91

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

12 83

12 31 83

12 31 83

12 31 83

32

12 83

12 83

12 31 83

32

12 31 83

12 83

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

6 31

31 32

31 32

30 31 46

31 32

31 48

31 48

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

31 32

6 31

31

6 31

31

31

6 31 6 31

28 31 89

28 31 89

6 31

6 31

12 31 83

12 31 83

31

31

31 32

31 32

28 31 89

31 32

31 32

12 31 83

12 31 83

31 32

31 32

31 32

31 32

31 32

31 32

31

www.vinafix.vn

G

D

S

G

D

S

DS

G

G S

D

G

D

SG

D

S

G S

D

PAD

VCC

THRMGND

1RD*

1Q

2SD*

2D

2CP

2RD*

2Q

2Q*

1CP

1D 1Q*

1SD*

G

S D




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

S5

CPU CHANNEL B DQS 2 -> DIMM B DQS 5


CPU CHANNEL A DQS 5 -> DIMM A DQS 2













MEMORY CLOCK ALIASING

DDR3 RESET SupportL H X X H L

0 0 1.5V

1.5V 3.3V 1.5V

0 3.3V 0

0 3.3V 0

CPU_RESET_L ISOLATE_L MEM_RESET_L

0 3.3V 0

1.5V 3.3V 1.5V

S0

S5

S0

S0

S3

H H POSEDGE H H L

H H POSEDGE L L H

H L X X L H

S R CLK D Q QBCPU CHANNEL B DQS 0 -> DIMM B DQS 7

L L X X H H

LFD CANNOT CONTROL THIS SIGNAL DIRECTLY SINCE IT MUST BE HIGH IN SLEEP AND CPU MEM RAILS ARE NOT POWERED IN SLEEP.

1

2

6

Q3306

SOT-3632N7002DW-X-G

2

1R3350

1/16W5%

402MF-LF

20K

2

1R3351

5%1/16W

20K

402MF-LF

2

1R3353

402MF-LF

5%20K

1/16W

4

5

3

Q33062N7002DW-X-GSOT-363

2

1R3352

MF-LF1/16W

402

5%20K

2

1

3

Q33042N7002SOT23-HF1

21

R3355NOSTUFF

402

0

MF-LF

5%1/16W

2

1R3388

5%

402MF-LF

10

1/16W

2

1 R3382MEM_RESET_HW

5%

402

1/16WMF-LF

10K

2

1R3381MEM_RESET_HW

10K

MF-LF1/16W

402

5%

21

R3380MEM_RESET_HW

402

5%

MF-LF1/16W

10K

21

R3383

402MF-LF

NOSTUFF

5%

0

1/16W

2

1

3

Q3350MEM_RESET_HW

SOT23-HF12N7002

2

3

1 Q3360SOT23-HF

MEM_RESET_HW

2N3904

21

R3385

5%

0

1/16WMF-LF402

2

1R3384

MF-LF402

5%20K

1/16W2

1R338720K5%1/16W

402MF-LF

4

5

3

Q3370

SOT-3632N7002DW-X-G

1

2

6

Q3370

SOT-3632N7002DW-X-G

2

1

3

Q3380SOT23-HF12N7002

21

R3386

MF-LF402

5%1/16W

0

NOSTUFF

14

15

10

4

13

1

8

6

9

5

7

12

2

11

3

U3300

MEM_RESET_HW

74LVC74ABQDHVQFN

2

1C3300

10VCERM

20%0.1UF

402

MEM_RESET_HW

3

2

1

4

5

Q3375POWER33

FDMC8296

2

1R3340

5%

402MF-LF1/16W

100K

2

1C3390

CERM

20%10V

0.1UF

402

5

4

1

2

3

U3390

NOSTUFFMC74VHC1G08SOT23-5-HF21

R3391

MF-LF1/16W

0

5%

402

NOSTUFF

21

R3390NOSTUFF

0

5%

MF-LF1/16W

402

21

R3394

402

5%

0

1/16WMF-LF

21

R3393NOSTUFF

402MF-LF

5%

0

1/16W

2

1 C3353

CERM402

10%0.0022UF50V


DDR3 SUPPORT AND BITSWAPSSYNC_DATE=04/14/2010

=PP1V5_S3_MEMRESET

MEM_RESET_L

=PP5V_S3_MEMRESET


CPU_MEM_RESET_L

=MEM_B_DQ<61>

=MEM_B_DQ<46>TP_ISOLATE_CPU

ISOLATE_CPU_MEMHW_L

=MEM_B_DQ<48>

=MEM_B_DQ<50>

=PP3V3_S3_MEMRESET

PM_SLP_S3_L

CPU_MEM_RESET_L

ISOLATE_CPU_MEM_L

ISOLATE_CPU_MEM_L_R1

PM_SLP_S3_5V_LPM_SLP_S3_5V

=PP5V_S3_MEMRESET

PM_SLP_S3_5V_R2

CPU_MEM_RESET3V3_L

=PP3V3_S5_MEMRESET

=MEM_B_DQ<39>

=MEM_B_DQ<62>

MEM_B_DQ<7>MAKE_BASE=TRUE

=MEM_A_DQ<53>

=MEM_A_DQ<31>

CPU_MEM_RESET_R_L

TP_PM_SLP_S4_D

CPU_MEM_RESET3V3_L

=PP3V3_S3_MEMRESET

PM_SLP_S4_D_L

SLP_S3_CTL_L

PM_SLP_S3_L

PM_SLP_S3_L

=PP3V3_S5_MEMRESET

ISOLATE_CPU_MEM_L_R1

ISOLATE_CPU_MEM

=PP3V3_S3_MEMRESET



=MEM_B_DQ<58>

=MEM_B_DQS_N<3>

PPVTT_S0_DDR_FET

=MEM_B_DQ<28>

=MEM_B_DQ<24>

=MEM_B_DQ<29>

=MEM_B_DQ<25>

=PP0V75_S0_MEM_VTT_S0FET

=MEM_B_DQ<27>

=MEM_A_DQ<12>

=MEM_A_DQ<3>

=MEM_A_DQ<57>

MAKE_BASE=TRUEMEM_A_DQS_N<1>

=MEM_A_DQS_P<6>

=MEM_A_DM<6>

=MEM_A_DQ<49>



=MEM_A_DQ<58>

=MEM_A_DQ<52>

=MEM_A_DQ<45>

=MEM_A_DQ<44>

MEM_A_DQS_N<3>MAKE_BASE=TRUE

MEM_A_DQ<11>MAKE_BASE=TRUE

=MEM_B_DQ<40>

=MEM_B_DQ<45>

=MEM_B_DM<5>

=MEM_B_DQS_P<5>

=MEM_B_DQ<53>

MAKE_BASE=TRUEMEM_B_DQS_P<0>

MEM_B_DM<6>MAKE_BASE=TRUE

=MEM_A_CLK_N<1>

=MEM_A_CLK_N<2>

MAKE_BASE=TRUEMEM_B_DQS_N<0>

MEM_B_CLK_N<3>MAKE_BASE=TRUE

=MEM_B_CLK_N<3>

MEM_B_CLK_P<3>MAKE_BASE=TRUE

=MEM_B_CLK_P<3>


=MEM_B_CLK_N<1>


=MEM_B_CLK_P<2>


=MEM_B_CLK_N<2>


=MEM_B_CLK_P<1>MAKE_BASE=TRUE

MEM_B_CLK_N<0> =MEM_B_CLK_N<0>

MEM_A_CLK_N<3>MAKE_BASE=TRUE

=MEM_A_CLK_N<3>

MAKE_BASE=TRUEMEM_B_CLK_P<0> =MEM_B_CLK_P<0>


MEM_A_CLK_P<3>MAKE_BASE=TRUE

=MEM_A_CLK_P<3>


=MEM_A_CLK_P<2>


MAKE_BASE=TRUEMEM_A_CLK_P<0> =MEM_A_CLK_P<0>


=MEM_A_CLK_N<0>


=MEM_A_CLK_P<1>

=MEM_B_DQ<22>

=MEM_B_DQ<19>

=MEM_B_DQ<23>

=MEM_B_DQ<20>

=MEM_B_DQ<18>

=MEM_B_DM<2>

=MEM_B_DQS_P<2>

=MEM_B_DQS_N<2>MAKE_BASE=TRUE

MEM_B_DQS_N<5>


MAKE_BASE=TRUEMEM_B_DM<5>


MAKE_BASE=TRUEMEM_B_DQ<46>






MAKE_BASE=TRUEMEM_B_DQ<40> =MEM_B_DQ<16>


=MEM_B_DQS_N<1>

=MEM_B_DQS_P<1>

=MEM_B_DM<1>

=MEM_B_DQ<8>

=MEM_B_DQ<14>

=MEM_B_DQ<12>

=MEM_B_DQ<13>

=MEM_B_DQS_N<0>

=MEM_B_DM<0>

=MEM_B_DQ<2>

=MEM_B_DQ<1>

=MEM_B_DQ<3>

=MEM_B_DQ<7>

=MEM_B_DQ<11>

=MEM_B_DQ<21>

=MEM_B_DQ<9>





=MEM_B_DQS_P<0>

=MEM_B_DQ<10>






MEM_B_DQS_P<6>MAKE_BASE=TRUE

=MEM_B_DQ<17>

=MEM_B_DQ<26>






=MEM_B_DQ<15>


=MEM_A_DQ<13>

=MEM_A_DM<1>



=MEM_B_DQ<56>


=MEM_A_DQ<59>

=MEM_A_DQ<62>

=MEM_A_DQ<56>

=MEM_A_DQS_N<7>

MAKE_BASE=TRUEMEM_A_DQ<5>


=MEM_A_DQ<51>

=MEM_A_DQ<55>


=MEM_B_DQ<44>

=MEM_A_DQ<19>

=MEM_A_DQ<18>

=MEM_A_DQ<20>

MAKE_BASE=TRUEMEM_A_DM<3>



=MEM_A_DQ<38>

=MEM_A_DQ<32>

=MEM_A_DQ<36>

=MEM_A_DQ<34>

=MEM_A_DQS_P<3>

=MEM_A_DQ<35>

=MEM_A_DQ<33>

=MEM_A_DQ<37>

=MEM_A_DQS_P<4>

=MEM_A_DQS_N<4>





MAKE_BASE=TRUEMEM_A_DQS_P<3>



MEM_A_DM<2>MAKE_BASE=TRUE







=MEM_A_DQS_N<6>


MEM_B_DQS_N<2>MAKE_BASE=TRUE

=MEM_A_DQ<63>









=MEM_B_DQ<34>

=MEM_B_DM<4>

=MEM_B_DQ<38>

=MEM_B_DQ<35>

=MEM_B_DQ<36>

=MEM_B_DQ<33>

=MEM_B_DM<3>

=MEM_B_DQ<31>

=MEM_B_DQ<30>

=MEM_B_DQ<47>

=MEM_B_DQ<0>

=MEM_B_DQ<4>

=MEM_B_DQ<5>

=MEM_B_DQ<6>

=MEM_B_DM<7>

=MEM_B_DQS_P<7>

=MEM_B_DQS_N<7>

=MEM_A_DM<4>



=MEM_A_DQ<30>

=MEM_A_DQ<25>

=MEM_A_DQ<29>

=MEM_A_DQS_N<3>

=MEM_A_DM<3>

=MEM_A_DQ<28>

=MEM_A_DQ<27>

=MEM_A_DQ<24>

=MEM_A_DQ<26>

=MEM_A_DQ<17>

=MEM_A_DQ<22>

=MEM_A_DQ<21>

=MEM_A_DQ<23>

=MEM_A_DQ<16>

=MEM_A_DM<2>

=MEM_A_DQS_P<2>

=MEM_A_DQS_N<2>


=MEM_A_DQ<42>

=MEM_A_DQ<43>

=MEM_A_DM<5>

=MEM_A_DQ<41>

=MEM_A_DQ<47>

=MEM_A_DQ<50>

=MEM_A_DQ<14>

=MEM_A_DQ<10>

=MEM_A_DQS_P<1>

=MEM_A_DQS_N<1>

=MEM_A_DQ<11>

=MEM_A_DQ<9>

=MEM_A_DQ<15>

=MEM_A_DQS_N<0>

=MEM_A_DQ<5>

=MEM_A_DQ<6>

=MEM_A_DQ<4>

=MEM_A_DQ<1>

=MEM_A_DQ<7>

=MEM_A_DQ<0>

=MEM_A_DM<0>

=MEM_A_DQ<2>







MAKE_BASE=TRUEMEM_A_DQS_P<5>














MEM_A_DQS_P<2>MAKE_BASE=TRUE
































































=MEM_B_DQS_N<5>

=MEM_B_DQ<37>




=MEM_B_DQ<52>

=MEM_B_DM<6>




=MEM_A_DQ<60>

=MEM_A_DQ<54>

=MEM_A_DQ<40>

=MEM_A_DQS_P<5>


=MEM_A_DQS_N<5>


=MEM_B_DQ<42>

=MEM_B_DQS_P<4>

=MEM_B_DQ<60>

=MEM_B_DQ<57>


=MEM_A_DQ<39>

=MEM_A_DQS_P<0>

=MEM_A_DQ<8>




=MEM_B_DQ<51>

=MEM_B_DQ<54>

=MEM_B_DQ<63>



=MEM_B_DQS_P<6>

PM_SLP_S3_5V

=MEM_B_DQ<41>

=MEM_B_DQS_P<3>

PM_SLP_S3_5V_L

VTT_R



=MEM_B_DQ<59>

=MEM_B_DQS_N<6>

CPU_MEM_RESET3V3


=MEM_A_DQ<46>

=MEM_A_DQ<48>

=MEM_A_DQ<61>

=MEM_A_DM<7>

=MEM_A_DQS_P<7>

=MEM_B_DQ<49>

=MEM_B_DQ<55>

PM_SLP_S4_L

PM_SYS_PWRGD

PM_SLP_S4_D_L

=PP3V3_S5_MEMRESET

=MEM_B_DQ<43>

=MEM_B_DQS_N<4>

=MEM_B_DQ<32>

ALL_SYS_PWRGD_R

DDRVTT_EN DDRSYS_EN

33 OF 110

A.0.0

051-8600

32 OF 92

6

30 31 91

6 32

28

11 32 91

31

31

31

31

6 32

5 19 32 33 37 46 62 63 91

11 32 91

21 25

32

32

32

6 32

32

6 32

31

31

12 83

30

30

32

6 32

32

5 19 32 33

37

46 62 63 91

5 19 32 33 37 46

62 63

91

6 32

32

6 32

12 83

12 83

31

31

6

31

31

31

31

6

31

30

30

30

12 83

30

30

30

12 83

12 83

30

30

30

30

12 83

12 83

31

31

31

31

31

12 83

12 83

30

30

12 83

12 83 31

12 83 31

12 83 31

12 83 31

12 83 31

12 83 31

12 83 31

12 83 30

12 83 31

12 83

12 83 30

12 83 30

12 83

12 83 30

12 83 30

12 83 30

31

31

31

31

31

31

31

31 12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83 31

12 83

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

12 83

12 83

12 83

12 83

31

31

12 83

12 83

12 83

12 83

12 83

12 83

31

31

12 83

12 83

12 83

12 83

12 83

31

12 83

30

30

12 83

12 83

31

12 83

30

30

30

30

12 83

12 83

30

30

12 83

31

30

30

30

12 83

12 83

12 83

30

30

30

30

30

30

30

30

30

30

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

30

12 83

12 83

30

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

30

12 83

12 83

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

12 83

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

12 83

31

31

12 83

12 83

12 83

31

31

12 83

12 83

12 83

30

30

30

30

12 83

30

12 83

31

31

31

31

12 83

30

30

30

12 83

12 83

12 83

31

31

31

12 83

12 83 31

32

31

31

32

12 83

12 83

31

31

12 83

30

30

30

30

30

31

31

19 91

19 63 91

32

6 32

31

31

31

6 25 63 91

62 70 91

www.vinafix.vn

IN

OUT

OUT

IN

IN

OUT

OUT

SYM_VER-1

IN

IN

SYM_VER-2

G

D

S

G S

D

S

G

D




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

518S0731

AP_PWR_ON = S0 || (S3 && AP_EN)

AP POWER ENABLE CIRCUIT

2

1C3400

CERM

20%

402

0.1uF10V 2

1C34010.1uF

10V

402

20%

CERM 2

1C3402

X5R603

20%6.3V

10uF

21

C3431

402X5R

10%16V

0.1uF

PLACEMENT_NOTE=PLACE CLOSE TO U1400.

21

C3430

16VX5R

10%

402

0.1uF

PLACEMENT_NOTE=PLACE CLOSE TO U1400.

27 91

19 37

15 18 25

18 84

18 84

18 84

18 84

21

L3400

0402

FERR-120-OHM-1.5A

4 3

21

L3430

PLACEMENT_NOTE=PLACE CLOSE TO J3400.

90-OHM-100MADLP11S

18 84

18 84

9

8

7

6

5

4

3

2

18

17

16

15

14

13

12

11

10

1

J3400F-ST-SM

CRITICAL

20247-916E-01F

4

3 2

1

L3440TCM1210-4SM12-OHM-100MA

PLACEMENT_NOTE=PLACE CLOSE TO J3400.

1

2

6

Q3403SOT-3632N7002DW-X-G

NOSTUFF

2

1

3

Q34072N7002SOT23-HF1

NOSTUFF

21

R3462

402

100K

1/16W5%

MF-LF

NOSTUFF2

1R34615%

MF-LF402

1/16W

10K

NOSTUFF

2

1 C346110%16V

402X5R

0.1UF

NOSTUFF

4

3

65

21

Q3401FDC606P_G

SOT-6

NOSTUFF

21

C3462

40216VX5R

0.1UF

10%

NOSTUFF

21

R3466

5%

MF-LF1/8W

805

0

PCI-E Wireless ConnectorSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PCIE_MINI_R2D_L_N

PCIE_MINI_R2D_L_P

PCIE_CLK100M_MINI_CON_PPCIE_CLK100M_MINI_CON_N

PCIE_MINI_R2D_NPCIE_MINI_R2D_P

VOLTAGE=3.3V


PP3V3_MINI

AP_PWR_ENABLE

=PP3V3_S3_MINI

AP_PWR_EN_L


VOLTAGE=3.3VPP3V3_MINI_FILT

PCIE_MINI_R2D_C_N

PCIE_MINI_R2D_C_P

PM_SLP_S3_L

PCIE_CLK100M_MINI_P

AP_PWR_EN

PCIE_MINI_D2R_NPCIE_MINI_D2R_P

MINI_RESET_LPCIE_WAKE_L

MINI_CLKREQ_L

PCIE_CLK100M_MINI_N

PP3V3_MINI

34 OF 110

A.0.0

051-8600

33 OF 92

33 89

6

5 19 32 37 46 62 63 91

15 21

33 89

www.vinafix.vn

IN

IN

IN

G

D

SG

D

S

SCL

A2

A1

A0

WP

SDA

GND

VCC

TEST

RESET*

USBDM_DN1/PRT_DIS_M1

USBDP_DN1/PRT_DIS_P1







PRTPWR2/BC_EN2*

PRTPWR1/BC_EN1*

PRTPWR4/BC_EN4*

PRTPWR3/BC_EN3*

OCS2*

OCS1*

OSC3*

OSC4*

RBIAS

USBDP_UP

USBDM_UP

VBUS_DET

THRM_PAD

XTALIN/CLKIN

XTALOUT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

CRFILT

PLLFILT

VDD33




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

TABLE_5_ITEM



1 1 EEPROM Supported

0 1 SMBUS Slave Config

0 0 All ports are Non removable

0 1 Port1 is non removable

1 0 Port 1 and 2 are non removable

1 1 Port1,2 and 3 are non Removable

NON_REM1 NON_REM0 DESCRIPTION

DEFAULT K23F ==>

0 0 Internal Default with Self powered Operation

1 0 Internal Default with Bus powered Operation

SEL1 SEL0 DESCRIPTION

DEFAULT K23F ==>

USB HUB-1

BOM TABLE

21

Y3500

5X3.2X1.4-SM

24.000M-60PPM-16PF

CRITICAL

2

1 C3520

50V5%18PF

CERM402

21

R3591

5%1/16W

1M

MF-LF402

2

1 C3519

50VCERM

5%

402

18PF

2

1 C35340.1UF10%16V

402X5R

2

1R3599NOSTUFF

MF-LF1/16W

5%100K

402

2

1 C3537

402CERM

5%50V

100PF

2

1 C35435%100PF50VCERM402

2

1R3597

402MF-LF1/16W

5%10K

NOSTUFF

2

1 C3539

X7R-CERM

10%0.1UF

402

16V

2

1 C3545

X7R-CERM

0.1UF16V

402

10%2

1 C35460.1UF10%16VX7R-CERM402

2

1 C3547

402X7R-CERM16V10%0.1UF

2

1 C3525

16V10%

X7R-CERM402

0.1UF

2

1 C352310%

402

16V

0.1UF

X7R-CERM

2

1 C3524

402

10%16VX7R-CERM

0.1UF

2

1 C3528

402

0.1UF10%

X7R-CERM16V

2

1 C3536

402CERM16V10%0.01UF

2

1 C35420.01UF

402CERM16V10% 2

1 C3529

CERM16V

402

10%0.01UF

2

1 C3526

402

0.01UF16VCERM

10%

20 85

20 85

34 35 91

21

R3500

402

1/16WMF

12K

1%

2

1R354110K

402

1/16W5%

MF-LF

4

5

3

Q35402N7002DW-X-GSOT-363

2

1R3540

MF-LF402

5%1/16W

20K

1

2

6Q35402N7002DW-X-GSOT-363

2

1C3541NOSTUFF

50V

402

5%100PF

CERM

2

1 C354010%0.47UF6.3V

402

NOSTUFF

CERM-X5R

2

1 C3518

X5R

10UF6.3V

603

20%

21

L3559FERR-120-OHM-1.5A

0402

2

1R3598

5%10K1/16WMF-LF402

2

1R359210K

5%1/16WMF-LF402 2

1R3594NOSTUFF

10K

MF-LF402

1/16W5%

2

1R3504

1/16WMF-LF

10K5%

402

2

1R3550

402

10K5%1/16WMF-LF

2

1R3580

402MF-LF1/16W5%10K

2

1R3581

402MF-LF

10K5%1/16W

7

8

5

6

4

3

2

1

U3514SOI

AT24C02B

NOSTUFF

2

1R356510K1/16WMF-LF402

5%

2

1R3566

402

10K5%1/16WMF-LF

NOSTUFF

2

1R3567

MF-LF402

10K5%1/16W

21

R3545

MF-LF1/16W5%

402

0

2

1R350110K

5%1/16WMF-LF

402

2

1 C353010%16VX5R402

1UF

2

1 C352710%16V

1UF

X5R402

2

1 C353810UF

X5R6.3V

603

20%

2

1 C3544

X5R

10UF20%6.3V

603

21


0402

32

33

36

29

23

15

10

5

27

31

9

7

4

2

30

8

6

3

1

37

11

28

22

24

26

35

20

18

16

12

34

21

19

17

13

25

14

U3500

QFN

USB2514-AEZG

OMIT

338S0721 2 CRITICALU3500,U3600SMSC USX2061-AEZG

USB HUB 1SYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

USB_HUB1_VDDPLL3V3MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

USB_HUB1_RBIAS

USB_HUB1_VDDA3V3MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM


USB_HUB1_VBUS_DET

=PP3V3_S3_USB_HUB


USB_HUB_RESET

=PP3V3_S3_USB_RESET

USB_HUB1_VDD1V8PLL


USB_HUB1_CFG_SEL1

USB_HUB1_LOCAL_PWR

USB_HUB_RESET_L

USB_HUB1_SMBCLK

USB_HUB1_SMBDATA

USB_HUB1_XTAL2

USB_CAMERA_N

TP_USB_HUB1_PRTPWR1

USB_EXTC_P

USB_CAMERA_P

USB_IR_N

USB_EXTA_OC_L

WP_HUB1

USB_IR_P

USB_EXTA_N

USB_EXTA_P

USB_EXTC_N

TP_USB_HUB1_PRTPWR2

TP_USB_HUB1_PRTPWR3

TP_USB_HUB1_OCS1_L

TP_USB_HUB1_PRTPWR4

TP_USB_HUB1_OCS2_L

USB_HUB1_UP_N

USB_HUB1_UP_P

USB_EXTC_OC_L

=PP3V3_S3_USB_HUB

USB_HUB1_TEST


USB_HUB1_VDD1V8

=PP3V3_S3_USB_HUB

=PP3V3_S3_USB_HUB

USB_HUB1_XTAL1

=PP3V3_S3_USB_HUB

USB_HUB_RESET_L

PGOOD_P3V3_S3

35 OF 110

A.0.0

051-8600

34 OF 92

85

6 34 35

20 25

6

85

44 85

43 85

44 85

44 85

43

44 85

43 85

43 85

43 85

43

6 34 35

6 34 35

6 34 35

85

6 34 35

34 35 91

72 91

www.vinafix.vn

IN

IN

IN

SCL

A2

A1

A0

WP

SDA

GND

VCC

TEST

RESET*









PRTPWR2/BC_EN2*

PRTPWR1/BC_EN1*

PRTPWR4/BC_EN4*

PRTPWR3/BC_EN3*

OCS2*

OCS1*

OSC3*

OSC4*

RBIAS

USBDP_UP

USBDM_UP

VBUS_DET

THRM_PAD

XTALIN/CLKIN

XTALOUT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

CRFILT

PLLFILT

VDD33




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

USB HUB-2

21

1

Y360024.000M-60PPM-16PF

5X3.2X1.4-SM

CRITICAL

2

1 C362018PF

402

5%50VCERM

21

R36911M

402

1/16W5%

MF-LF

2

1 C3619

402

5%18PF50VCERM

2

1 C36340.1UF10%16VX5R402

2

1 C3637

50V5%

CERM402

100PF

2

1 C3643

CERM402

100PF5%50V

2

1 C36390.1UF10%

402

16VX7R-CERM

2

1 C3645

402

0.1UF10%16VX7R-CERM 2

1 C3646

16VX7R-CERM

10%0.1UF

4022

1 C3647

X7R-CERM

0.1UF10%16V

402

2

1 C3625

16VX7R-CERM

0.1UF

402

10%2

1 C3623

X7R-CERM402

0.1UF10%16V

2

1 C36240.1UF16V10%

402X7R-CERM 2

1 C3628

16V

402

10%

X7R-CERM

0.1UF

2

1 C36360.01UF

402

10%16VCERM

2

1 C364210%16VCERM402

0.01UF2

1 C362910%0.01UF

402CERM16V2

1 C36260.01UF

402CERM16V10%

20 85

20 85

34 91

2

1 C361810UF6.3VX5R603

20%

2

1R3697

1/16W5%

10K

402MF-LF

NOSTUFF

2

1R3698

MF-LF402

5%10K1/16W

2

1R3699NOSTUFF

100K

MF-LF1/16W

402

5%

21


0402

2

1R3692

1/16W

10K5%

MF-LF402 2

1R3694

5%1/16WMF-LF402

10K

NOSTUFF

2

1R3604

5%1/16WMF-LF402

10K

2

1R3682

5%

402

1/16W

10K

MF-LF

2

1R3680

402

1/16W5%

MF-LF

10K

2

1R368110K

MF-LF

5%1/16W

402

7

8

5

6

4

3

2

1

U3614

NOSTUFF

SOIAT24C02B

2

1R3666

MF-LF1/16W5%

402

10K

2

1R3665NOSTUFF

10K

402

5%1/16WMF-LF

2

1R366710K5%

402MF-LF1/16W

2

1R3601

1/16W5%

10K

402MF-LF

2

1 C36301UF10%16VX5R402

2

1 C36271UF

X5R16V

402

10%

2

1 C363820%

X5R

10UF6.3V

603

2

1 C364410UF6.3VX5R603

20%

21


0402

21

R3600

402MF

1/16W

12K

1%

32

33

36

29

23

15

10

5

27

31

9

7

4

2

30

8

6

3

1

37

11

28

22

24

26

35

20

18

16

12

34

21

19

17

13

25

14

U3600OMIT

QFN

USB2514-AEZG


USB HUB 2

USB_HUB2_XTAL2

=PP3V3_S3_USB_HUB


USB_HUB2_VDDA3V3

USB_HUB2_VDDPLL3V3



=PP3V3_S3_USB_HUB

USB_HUB2_TEST

USB_HUB_RESET_L

USB_HUB2_LOCAL_PWR

USB_HUB2_CFG_SEL1


USB_HUB2_VDD1V8

USB_HUB2_VDD1V8PLL



USB_HUB2_SMBCLK

USB_HUB2_RBIAS

USB_HUB2_SMBDATA

=PP3V3_S3_USB_HUB

USB_EXTD_OC_L

USB_EXTB_OC_L

TP_USB_HUB2_OCS2

=PP3V3_S3_USB_HUB

USB_HUB2_XTAL1

USB_HUB2_VBUS_DET

=PP3V3_S3_USB_HUB

WP_HUB2

USB_HUB2_UP_P

USB_EXTD_P

TP_USB_HUB2_PRTPWR3

TP_USB_HUB2_PRTPWR4

TP_USB_HUB2_OCS1

USB_EXTB_P

TP_USB_HUB2_PRTPWR1

TP_USB_HUB2_PRTPWR2

USB_EXTB_N

USB_SDCARD_P

USB_HUB2_UP_N

USB_EXTD_N

USB_BT_P

USB_BT_N

USB_SDCARD_N

36 OF 110

A.0.0

051-8600

35 OF 92

85

6 34 35

6 34 35

85

6 34 35

43

43

6 34 35

85

6 34 35

43 85

43 85

43 85

44 85

43 85

44 85

44 85

44 85

www.vinafix.vn

OUT

OUT

IN

IN

IN

OUT

IN

IN

AVDDH AVDDL

THRM_PADNC

SPD1000LED*

TRAFFICLED*

SCLK/EECLK

SO/EEDATA

SI

CS*

ENERGY_DET

SMB_CLK

SMB_DATA

VAUX_PRSNT

VMAIN_PRSNT

DC1

TRD3_P

TRD3_N

TRD2_N

TRD2_P

TRD1_P

TRD1_N

TRD0_N

TRD0_P

DC0

RDAC

BIASVDDH

GPHY_PLLVDDL

PCIE_RXD_N

PCIE_RXD_P

PCIE_REFCLK_P

PCIE_REFCLK_N

PCIE_TXD_P

PCIE_TXD_N

PCIE_VDDL

XTALVDDH

XTALO

XTALI

REGOUT12_IO

SUPER_IDDQ

REGCTL12

VDDC

UART_MODE

GPIO_2

GPIO_1/SERIAL_DI

VDDIOVDDC_IO

GPIO_0/SERIAL_DO

LOW_PWR

SPD100LED*

WAKE*

PERST*

CLKREQ*LINKLED*

PCIE_PLLVDDL

NCNC

NC

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

NCNCNC

OUT

OUT

RESET*

CS*

SCK

SOWP*

SI

GND

VCC

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(CAESAR II)

- =PP1V2_ENET

197S0167

CL = 20PF

Page Notes- PP3V3_ENET

Note: CAESAR II has internal pullups on SPI pins

Atmel SO, CS, SCLK logic high; SI logic low

Pullup provisions will be removed in Proto 2

SI PIN OF CAESAR II SHOULD BE CONNECTED TO SO OF

AT45DB011D, AND VICE VERSA

Flash Strapping Support

ST Micro CS logic high; SCLK, SI, SO logic low

Must Isolate from PCIE WAKK# ifPhy is powered-down in S3/S5.

WAKE#


2

1 C3721

CERM402

50V5%27PF

18 86

18 86

21C37160.1uF

10% 16V X5R 402

21C371740216V

0.1uF10% X5R

21C37180.1uF

X5R16V10% 402

21C3719

PLACEMENT_NOTE=PLACE C3718,C3719 CLOSE TO SB

X5R 40216V10%0.1uF

18 86

18 86

27 91

15 18

18 84

18 84

21

Y370025.0000M

SM-3-LF

CRITICAL

23

22

21

12

53

61

56

19

15

655

17

560

34

20

13

54

9

50

49

46

47

44

43

40

41

66

69

16

1

67

64

57

58

63

65

18

14

37

10

33

24

26

25

31

32

29

28

30

27

3

2

8

7

4

35

59

52

38

62

11

36

51

45

39

48

42

U3700CRITICAL

QFNBCM5764M

OMIT

21 R3703

402

1/16W5%

1K

MF-LF

21 R37021K

5%1/16WMF-LF402

21 R3700NOSTUFF

0

1/16W

402

5%

MF-LF

21

R3701

402

1%

MF-LF1/16W

1.24K

6

36 37 89

38 86

38 86

38 86

38 86

38 86

38 86

38 86

38 86

37

36

5

6

8

12

3

7

4

U3701

OMIT

AT45DB011DSOIC-8S1

2

1R3715

MF-LF

4.7K

1/16W

402

5%

NOSTUFF

2

1R3714

1/16W

4.7K

MF-LF

5%

402

NOSTUFF

2

1R3716

5%1/16W

402MF-LF

4.7K

2

1R3717

NOSTUFF

4.7K

1/16WMF-LF

5%

402

2

1 C3713

402

10%0.1UF

X7R-CERM16V2

1 C3712

402

10%0.1UF

X7R-CERM16V

21

L3700CRITICAL

SM

FERR-600-OHM-0.5A

2

1 C3753

X7R-CERM402

10%0.1UF

16V

2

1 C3751

16V

0.1UF

402

10%

X7R-CERM

21

L3701CRITICAL

FERR-600-OHM-0.5A

SM

2

1 C37504.7UF

6.3VX5R-CERM603

10%

2

1 C3752

16V10%

402

0.1UF

X7R-CERM

21


CRITICAL

SM

2

1 C3749

402

10%0.1UF

X7R-CERM16V

2

1 C37484.7UF

603X5R-CERM6.3V10%

2

1 C3747

10%

X7R-CERM402

16V

0.1UF

2

1 C37464.7UF

X5R-CERM

10%

603

6.3V

21


SM

CRITICAL

2

1 C3762

402

10%

X7R-CERM

0.1UF

16V

21

L3718CRITICAL

SM

FERR-600-OHM-0.5A

21

L3711CRITICAL

FERR-600-OHM-0.5A

SM

2

1 C3723

X7R-CERM16V

0.1UF10%

402

2

1 C37240.1UF

402X7R-CERM16V10%

21

L3710

SM

CRITICAL

FERR-600-OHM-0.5A

2

1 C37250.1UF

16V10%

402X7R-CERM2

1 C3727

603

10%4.7UF

6.3VX5R-CERM

2

1 C3726

X5R805

10%10UF

6.3V

2

1R3765

402MF-LF

5%1/16W

10K

2

1R376610K5%1/16W

402MF-LF

2

1 C3715

402

10%0.1UF

X7R-CERM16V2

1 C3714

6.3VX5R-CERM

10%

603

4.7UF

21

R3704200

5%

402

1/16WMF-LF

2

1 C3788

X7R-CERM402

0.1UF

16V10%

2

1R3718

5%1/16WMF-LF

4.7K

402

NOSTUFF

2

1R3719

1/16W5%4.7K

402MF-LF

NOSTUFF

15 18

21

R37230

1/16W

402

5%

MF-LF

2

1C3720

CERM50V5%

402

27PF

ETHERNET (CAESAR II)SYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

ENET_WAKE_L BCM5764M_WAKE_L

ENET_RDAC

PP1V2_ENET_VDDCIO

=PP1V2_ENET

PP3V3_ENET

ENET_MISO

ENET_MOSI

PP3V3_ENET

=PP1V2_ENET

MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.2V

PP1V2_LAN_GPHY_PLLVDDL

PP3V3_ENET

PP3V3_ENET

=PP1V2_ENET

=PP1V2_ENET

VOLTAGE=1.2V

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.4MMPP1V2_LAN_VDDL

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.4MMVOLTAGE=1.2V

PP1V2_LAN_PLL_VDDL

VOLTAGE=3.3VMIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMPP3V3_LAN_AVDDH

VOLTAGE=1.2VMIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMPP1V2_LAN_AVDDL=PP1V2_ENET

PCIE_ENET_R2D_C_N

PCIE_ENET_R2D_C_P

PCIE_ENET_D2R_P

PCIE_ENET_D2R_N

PCIE_ENET_R2D_N

PCIE_ENET_R2D_P

PCIE_ENET_D2R_C_N

PCIE_ENET_D2R_C_P

PP3V3_ENET

ENET_CLK25M_XTALI

PP3V3_ENET

=PP3V3_S0_ENET VMAIN_PRSNT

VAUX_PRSNT

ENET_LOW_PWR

PP3V3_ENETUART_MODE

ENET_MDI_P<2>

ENET_MDI_N<1>

ENET_SMB_CLK

ENET_MDI_P<0>

ENET_ENERGY_DET

ENET_LED_ACT_L

ENET_MDI_N<0>

ENET_MDI_P<1>

PP3V3_LAN_BIASVDDH



ENET_CLK25M_XTALO

ENET_CLKREQ_L

ENET_MISO

ENET_CTRL12

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.4MM

PP1V2_ENET_VDDCIO

PP3V3_ENET

ENET_LED_LINK1000_L

ENET_SCLK

ENET_LED_LINK10_100_L

ENET_SCLK

ENET_CS

ENET_MDI_N<3>

ENET_MDI_P<3>

ENET_MDI_N<2>

ENET_SMB_DATA

ENET_CS

ENET_MOSI

ENET_LED_LINK_L

PP3V3_LAN_XTALVDDH


VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM

PCIE_CLK100M_ENET_P

LAN_RESET_L

PCIE_CLK100M_ENET_N

ENET_CLK25M_XTAL

37 OF 110

A.0.0

051-8600

36 OF 92

68

37

86

36

36 37

36 37 89

36

36

36 37 89

36 37

36 37 89

36 37 89

36 37

36 37

36 37

86

86

86

86

36 37 89

86

15 21

36 37 89

37

86

36

36 37 89

37

36

37

36

36

36

36

37

86

www.vinafix.vn

G

D

S

G

D

S

D

G

S

D

GS




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SILKSCREEN:ACT SILKSCREEN:10/100

CAESAR II LED SUPPORT

SILKSCREEN:10/1000 SILKSCREEN:LINK

MAX CURRENT = 396MA

CAESAR II 1V2 RAIL SUPPLY

CAESAR II DECOUPLING

ENET POWER ENABLE CIRCUIT

ENET_PWR_ON = "S0" || (S3 power && WOL_EN)

2

1 C3826

X5R402

0.1UF10%16V

3

4 2

1

Q3810PBSS5540ZDG

CRITICAL

SOT223

2

1 C3825

603-2

10UF

X5R6.3V20%

2

1 C3818

402

10%

X5R16V

0.1UF

2

1 C38174.7UF

603

20%6.3VCERM

21

R38021.5

MF-LF

5%1/4W

1206

K

A

LED3801DEVELOPMENT


2

1R3805330

DEVELOPMENT

5%1/16WMF-LF402 2

1R3806DEVELOPMENT

3305%1/16WMF-LF402

K

A

LED3802DEVELOPMENT


2

1R3807330

DEVELOPMENT

5%1/16WMF-LF402

K

A

LED3803DEVELOPMENT


2

1R3808330

DEVELOPMENT

5%

MF-LF402

1/16W

K

A

LED3804DEVELOPMENT


2

1C38004.7UF

6.3V20%

603CERM 2

1 C3801

402

10%0.1UF

X7R-CERM16V

2

1 C3802

402

10%0.1UF

X7R-CERM16V

2

1 C3803

402

0.1UF

X7R-CERM16V10%

2

1 C3804

402

10%0.1UF

16VX7R-CERM 2

1 C3805

16VX7R-CERM

0.1UF10%

402

2

1 C3806

16V

0.1UF

402

10%

X7R-CERM 2

1 C3807

402

10%0.1UF

X7R-CERM16V

2

1 C3808

402

16V10%0.1UF

X7R-CERM2

1C3810

CERM6.3V

4.7UF20%

603

2

1 C3811

402

10%0.1UF

X7R-CERM16V

2

1 C3812

16VX7R-CERM

0.1UF10%

402

2

1 C3813

16VX7R-CERM

0.1UF10%

402

21

R3832

5%

100K

402

1/16WMF-LF

2

1R38315%

MF-LF402

10K1/16W

2

1 C383110%

X5R402

0.1UF16V

21

C3832

402

CERM

0.01UF

16V

10%

1

2

6

Q3803SOT-3632N7002DW-X-G4

5

3 Q3803

SOT-363

2N7002DW-X-G

2

1

3

Q3802CRITICAL

SOT-23-HFNTR4101P

2

1R38415%

MF-LF402

10K1/16W

21

3

Q3841SSM3K15FV

SOD-VESM-HF


CAESAR II SUPPORTSYNC_MASTER=K75F_MLB

=PP3V3_S3_ENET

ENET_PWR_L

ENET_WAKE_L


PP_ENET_CTRL12

VOLTAGE=3.3V

PP3V3_ENET

ENET_LED_LINK1000_L

ENET_LED_LINK_L

ENET_LED_ACT_L

ENET_LED_LINK10_100_L

ENET_LINKENET_LINK1000ENET_LINK10

PP3V3_ENET

ENET_ACT

PP3V3_ENETMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM

VOLTAGE=3.3V

=PP1V2_ENET

ENET_CTRL12

PP3V3_ENET

WOL_EN_L

WOL_EN


PP1V2_S5_ENETMAKE_BASE=TRUE


=PP1V2_ENET

PM_SLP_S3_L

ENET_WAKE_LPCIE_WAKE_L

PP3V3_ENET

38 OF 110

A.0.0

051-8600

37 OF 92

6

36 37

89

36 37 89

36

36

36

36

36 37 89

36 37 89

36 37

36

36 37 89

15 21

89

36 37

5 19 32 33 46 62 63 91

36 37 19 33

36 37 89

www.vinafix.vn

MCT1

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

MX4-

TD1+

TCT1

TCT2

TD1-

TD2+

TD2-

TD3+

TCT3

TD3-

TD4+

TCT4

TD4-

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

ENET_MDITRAN_P0

TRAN_N0

TRAN_P1

TRAN_P2

TRAN_N2

TRAN_N1

TRAN_P3

TRAN_N3

PINSSHIELD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

514-0654

NOTE: BOB SMITH TERMINATION FOR EMC INVESTIGATION.

PLACE ONE CAP PER TCT PIN

NOTE: DELTA RECOMMENDS CENTER-TAP BE FLOATING

2

1R3900755%

MF-LF402

1/16W

2

1R3901

MF-LF

75

402

5%1/16W

2

1R3902751/16WMF-LF402

5%

2

1R3903

MF-LF402

1/16W5%75

2

1 C3900NOSTUFF

1206

1000PF10%2KVCERM

2

1 C3901

10V

402

20%0.1UF

CERM 2

1 C39020.1UF20%

402

10VCERM 2

1 C3903

402

20%0.1UF10VCERM 2

1 C3904

402

20%0.1UF10VCERM

11

12

8

9

5

6

2

3

10

7

4

1

14

13

17

16

20

19

23

22

15

18

21

24

T3900LFE9287APF

SOI

7

4

3

1

8

5

6

2

9

10

J3900CRITICAL

F-ANG-THRJ45-10/100TX-K22


ETHERNET CONNECTOR

ENET_TCT

ENET_MDI_T_N<1>

ENET_MCT2

ENET_MDI_T_P<2>

ENET_MDI_T_P<0>

ENET_MDI_T_N<0>

ENET_MDI_T_P<1>

ENET_MCT0

ENET_MCT1

ENET_MCT_BS

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 MM

ENET_MCT3

ENET_MDI_T_P<0>

ENET_MDI_T_P<1>

ENET_MDI_T_N<2>

ENET_MDI_T_P<3>

ENET_MDI_T_N<3>

ENET_MDI_T_N<0>

ENET_MDI_T_P<3>

ENET_MDI_T_N<2>

ENET_MDI_T_N<1>

ENET_MDI_T_N<3>

ENET_MDI_T_P<2>

ENET_MDI_P<0>

ENET_MDI_N<0>

ENET_MDI_P<1>

ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_N<2>

ENET_MDI_P<3>

ENET_MDI_N<3>

39 OF 110

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OUT TRI-ST/NC

VCC

GND

NC

NCNC

NCNCNCNCNCNCNCNC

NCNCNCNCNCNCNCNCNC

NCNCNC

NCNCNCNCNCNCNCNC

OUT

IN

IN

OUT

IN

OUT

OUT

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

RSVD_19

LKON_DS2_P

XI

CNA

CPS

PD

R1

R0

D6

D5

D4

D3

D2

D1

D0

CTL0

CTL1

LREQ_P

LREQ_L

LPS_P

LPS_L

PINT_P

PCLK_P

PINT_L

LCLK_P

LCLK_L

LINKON_L

DS1

DS0

PC2

PC0

PC1

PHY_RESET*

TPB2_N

TPB2_P

TPB1_N

TPB1_P

TPB0_N

TPB0_P

TPA2_N

TPA2_P

TPA1_N

TPA1_P

TPA0_N

TPA0_P

TPBIAS2

TPBIAS1

TPBIAS0

SE

TESTW_VREG_PD

SM

TESTM

BMODE

PLLGNDGND

DVDD_3_3

PLLVDD_3_3

VDDA_33 AVDD_3_3 VDD_15 VDDA_15 DVDD_CORE

VDD_15_COMB

VDD_33_COM_IO

VDD_33_COMB

VDD_33

PLLVDD_CORE

PCLK_L

VSSA_PCIEVSSAVSS

REF0_PCIE

REF1_PCIE

PERST*

RXN

RXP

TXN

TXP

CLKREQ*

REFCLK_P

REFCLK_M

REFCLK_SEL

SCL

SDA

GPIO0

GPIO2

GPIO1

GPIO3

GPIO4

GPIO5

GPIO7

GPIO6

OHCI_PME*

GRST*

RSVD_1

RSVD_0

RSVD_3

RSVD_2

RSVD_4

RSVD_6

RSVD_5

RSVD_9

RSVD_7

RSVD_8

RSVD_10

RSVD_11

RSVD_14

RSVD_12

RSVD_13

RSVD_16

RSVD_17

RSVD_18

RSVD_15

D7

CYCLEOUT

PCI EXPRESS

1394B OHCI & PHY

IN

IN

IN




36

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PAGE


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345678

D

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8 7 5 4 2 1

Alias =FWPHY_PC0

(JTAG_TCK)

(JTAG_TDI)

(JTAG_TDO)

(JTAG_TMS)

(IPU)

(IPU)

Ground TPBx_P/TPBx_N

PC[0:2] = ’100’

Multiple-ports:

Unused Ports:

TP/NC TPAx_P/TPAx_N

TP/NC TPBIASx

Single-port:

DS2 hard-strapped to 1,

page assumes no more than

2 FW800 connectors

Strap DSx high on unused ports.

PC[0:2] = ’000’

as appropriate

(VDD_33_AUX)

Power Aliases:

FWRS0_FWXIO nets are OHCI/PCIe power, and

can be S0.

5K pull-down device detect circuit.

For single-port systems, all FW power should

be tied together and powered by S0 or by the

FW_FWPHY nets are PHY power, and for

multi-port systems must come from bus power.

(IPU)

(JTAG_TRST)

(Snoop Enable, for FireBug)

2

1R4181

1/16W

402

5%1K

MF-LF

2

1C41251UF10%

402

6.3VCERM

2

1C4130

10%6.3VCERM

1UF

402

2

1C4120

CERM

1UF

402

6.3V10%

2

1R4125

5%1/16WMF-LF

1

402

2

1R4190

402

1/16W5%

MF-LF

4.7

4

13

2

Y4190SM

98P3040MHZ2

1C41900.22UF

402CERM-X5R

6.3V10%

2

1R4135

402

1/16WMF-LF

5%1

2

1R4160

1/16W

1K

MF-LF402

5%

2

1R415347K5%

402

1/16WMF-LF

NO STUFF

2

1R4189

MF-LF

1K5%

402

1/16W

NO STUFF

40

2

1R4150

MF-LF1/16W

402

5%1K

21C41460.1uF

X5R 40210% 16V

PLACEMENT_NOTE=Place C4146 next to C4145

21C41450.1uF

X5R 40210% 16V

PLACEMENT_NOTE=Place C4145 close to UA200

2

1R41821K

1/16WMF-LF

5%

402

2

1R4151220

MF-LF402

5%1/16W

2

1R4152220

MF-LF402

5%1/16W

21C4141X5R 40210% 16V

0.1uF

PLACEMENT_NOTE=Place C4141 next to C4140

21C41400.1uF

X5R 40210% 16V

PLACEMENT_NOTE=Place C4140 close to U1400

2

1R41412321%1/16W

402MF-LF

2

1C4117

10%6.3VCERM402

1UF

18 84

18 84

40

2

1R41801K5%

402

1/16WMF-LF

27 91

2

1R4140

402MF-LF1/16W

1%14.3K

2

1C4118

10%6.3VCERM402

1UF

2

1C4119

10%6.3VCERM402

1UF

2

1R4119

402

1/16W5%1

MF-LF

2

1R4117

402

1/16WMF-LF

5%1

2

1R4110

402

1/16W5%1

MF-LF

2

1C4110

6.3V10%

CERM402

1UF

2

1C4111

402

10%6.3VCERM

1UF

18 84

2

1C4112

10%

CERM402

1UF

6.3V

2

1C4100

10%6.3VCERM402

1UF

2

1C4101

10%6.3VCERM402

1UF

2

1C4102

10%6.3VCERM402

1UF

2

1C4113

10%6.3VCERM402

1UF

2

1C4114

10%6.3VCERM402

1UF

2

1C4106

10%6.3VCERM402

1UF

2

1C4107

10%6.3VCERM402

1UF

2

1C41151UF10%6.3VCERM402

2

1C4108

10%6.3VCERM402

1UF

18 84

2

1C4103

10%6.3VCERM402

1UF

2

1C4104

10%6.3VCERM402

1UF

2

1C4105

10%6.3VCERM402

1UF

40

18 84

40 86

40 86

40 86

40 86

40

40

40

40

40 2

1 C4189

402CERM-X5R6.3V

0.22UF10%

18 84

2

1R4185

MF-LF1/16W

402

6.34K1%

2

1R4186390K

402

1/16WMF-LF

5%

P4

C7

C6

C5

C4

B6

C10

F5

A7

A14

A10

C3

B5

B7

B9

B10

B11

C11

B12

M5

J10

H10

G10

E3

C12

B8

P7

M6

K10

H3

G3

A9

A8

E13

G13

K13

D14

E14

H14

J14

M14

N14

B14

C14

F14

G14

K14

L14

A6

B2

P14

P13

H12

J13

A4

A3

M12

M11

M8

L13

L12

K12

G12

F13

P3

D13

D12

P11

P10

N13

N12

N11

N10

M13

F12

E12

H13

A1

B1

A12

A13

M1

N1

M7

N7

N5

D3

D2

B4

B13

B3

F1

G1

A11

E8

E9

P8

E2

F2

C2

C1

D1

E1

H2

G2

C13

N6

P6

P5

N4

N3

P2

N2

P1

G8

G7

G6

G5

F9

F8

F7

K8

K7

K6

K5

F6

J8

J7

J6

J5

H9

H8

H7

H6

H5

G9

E7

E6

M9

F3

C9

K3

J3

C8

P9

N9

M3

M2

L3

L2

L1

K1

K2

J2

N8

J1

H1

P12

A2

J12

A5

M4

M10

K9

J9

F10

E10

U4100XIO2213B

BGA

OMIT

CRITICAL

2

1C4137

10%1UF

CERM6.3V

402

2

1 C4138

6.3V10%

402

1UF

CERM

2

1R4175

402

1/16W5%10K

MF-LF

40

21

R41701K

1/16WMF-LF

5%

402

40

40

2

1 C4139

10%6.3VCERM402

1UF

2

1C4135

10%6.3VCERM402

1UF

21

R419122

MF-LF

5%

402

1/16W

2

1R4171

MF-LF1/16W5%

402

470

2

1C4124

402CERM6.3V10%1UF

2

1C4128

CERM

1UF

6.3V10%

402

2

1C4127

402CERM6.3V

1UF10%

2

1C41261UF

402

10%

CERM6.3V

2

1C4123

10%1UF

6.3V

402CERM 2

1C4122

10%

402CERM

1UF

6.3V2

1C4121

CERM402

1UF10%6.3V

2

1C4132

6.3V10%

402

1UF

CERM 2

1C4131

CERM402

1UF10%6.3V


FireWire LLC/PHY (XIO2213B)FWPHY_TESTW

=PP3V3_FW_FWPHY

FWPHY_BMODE

FWPHY_TESTM

TP_FWXIO_JTAG_TDI

FWXIO_SNOOP_EN

FW_P0_TPB_N

=PP1V5_FWRS0_FWXIO


PP1V5_FW_VDDAMIN_LINE_WIDTH=0.3 mm

MIN_NECK_WIDTH=0.2 mmVOLTAGE=1.96V

MIN_LINE_WIDTH=0.3 mmPP1V96_FW_PLLVDD

=PP3V3_FW_FWPHY

FWXIO_VDD15COMB

FWXIO_VDD33COMB

FWXIO_VDD33COMIO

PP1V95_FW_FWPHY


PP3V3_FW_VDDA

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mmPP3V3_FW_AVDD

VOLTAGE=3.3V

PCIE_FW_R2D_P

PCIE_FW_R2D_N

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mmPP1V96_FW_XTAL

VOLTAGE=1.96V

=PP3V3_FWRS0_FWXIO

MIN_LINE_WIDTH=0.3 mmPP3V3_FW_PLLVDD


TP_FWPHY_CNA

FWPHY_CPS

FWPHY_RESET_L

FWPHY_R0

FWPHY_R1

FWPHY_CLK98M_PCLK

FWOHCI_CLK98M_LCLK

FWPHY_PINT

FWOHCI_LPS

FWOHCI_LINKON_L

=FWPHY_PC0

=PP3V3_FW_FWPHY

FWPHY_LKON_DS2

CLK98M_FW_XI_R

FWXIO_CYCLEOUT

PCIE_FW_D2R_N

PCIE_FW_D2R_P

PCIE_FW_R2D_C_N

PCIE_FW_R2D_C_P

=FW_PME_L

PCIE_CLK100M_FW_N

PCIE_CLK100M_FW_P

=FW_CLKREQ_L

FW_P1_TPA_N

FW_P0_TPA_N

FW_P0_TPBIAS

FWXIO_REF0_PCIE

=FWPHY_DS0

=FWPHY_DS1

TP_FWOHCI_XO

PCIE_FW_D2R_C_N

PCIE_FW_D2R_C_P

FWXIO_REF_PCIE

FWXIO_REF1_PCIE

FW_P0_TPA_P

=PPVP_FW_PHY_CPS

FW_P0_TPB_P

FW_P1_TPA_P

FW_P2_TPA_P

FW_P2_TPA_N

FW_P2_TPBIAS

FW_P1_TPBIAS

FWXIO_SCL

FWXIO_SDA

FWXIO_REFCLK_SEL

FW_RESET_L

TP_FWXIO_GRST_L

TP_FWXIO_JTAG_TMS

TP_FWXIO_JTAG_TDO

CLK98M_FW_XI

FWOHCI_LREQ

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84

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OUTINNR

NC THRML

EN

GND PAD




36

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PAGE


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345678

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8 7 5 4 2 1

1394 PHY 1.95V SUPPLY

TI PHY "Peaking Inductors" To improve Data Eye.

TI PHY requires 1UF, not 0.33uF spec value.

THERE ARE THREE FIREWIRE PORTS, BUT ONLY ONE IS USED.NO STUFF MEANS THAT

iMacs are now one port only and have Power Code "000"

TerminationPlace close to FireWire PHY

2ND & 3RD TPA/TPB PAIR UNUSED

IT IS IN BILINGUL MODE PULL-UPS ASSERT/ENABLE DATA STROBE ONLY MODE.

1394 PHY STRAPPING OPTIONS

FireWire Aliases For Connectivity

2

1R425510K1/16W5%

NOSTUFF

MF-LF402 2

1R425610K5%1/16WMF-LF402

2

1 C4250

CERM

1UF6.3V10%

402

2

1R4251

MF-LF402

1%1/16W

56.2

2

1R42501%

MF-LF402

1/16W

56.2

2

1R425356.21%1/16W

402MF-LF

2

1R425256.2

1%

MF-LF402

1/16W

2

1R4254

MF-LF1/16W1%4.99K

4022

1C4254

402

220PF

CERM

5%25V

2

1R425810K

402MF-LF

5%1/16W

2

1R425710K

402MF-LF

5%1/16W

7

1

2

6

3

4

U4200TPS799195

SON

CRITICAL

2

1 C4202

X5R

2.2UF20%4V

4022

1C420110%

0.01UF

CERM16V

402

2

1C420010%1UF

CERM402

6.3V

21

L425218NH-250MA

0402

21

L425318NH-250MA

0402

21

L4250

0402

18NH-250MA21

L4251

0402

18NH-250MA

FW: 1394B MISCSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PP1V95_FW_FWPHY


MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.5 mmMAKE_BASE=TRUE


VOLTAGE=1.96V

FW_P2_TPA_P

FW_P2_TPBIAS

FW_CLKREQ_LMAKE_BASE=TRUE

FW_PORT0_TPB_PMAKE_BASE=TRUE

FW_P0_TPB_PFW_PORT0_TPB_N

MAKE_BASE=TRUE

FW_PORT0_TPA_NMAKE_BASE=TRUE

FW_P0_TPA_C

FW_PHY_DS1MAKE_BASE=TRUE

MAKE_BASE=TRUEFW_PHY_DS0

P1V95_FW_NR

FW_P2_TPA_N NC_FW_PORT2_TPA_NNO_TEST=TRUEMAKE_BASE=TRUE

NC_FW_PORT2_TPA_PNO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUENC_FW_PORT2_TPBIAS

NO_TEST=TRUE

FW_P1_TPA_NNO_TEST=TRUEMAKE_BASE=TRUENC_FW_PORT1_TPA_N

FW_P1_TPA_PNO_TEST=TRUEMAKE_BASE=TRUENC_FW_PORT1_TPA_P

FW_P1_TPBIASNO_TEST=TRUEMAKE_BASE=TRUE

NC_FW_PORT1_TPBIAS

=FW_CLKREQ_L

=PP3V3_FW_FWPHY

=FWPHY_PC0MAKE_BASE=TRUE

FW_PHY_PC0

=FWPHY_DS1

=FWPHY_DS0

=PP3V3_FW_FWPHY

=FW_PME_LMAKE_BASE=TRUE

FW_PME_L

PPVP_FW_PHY_CPSMAKE_BASE=TRUE

=PPVP_FW_PHY_CPS

FW_PORT0_TPA_PMAKE_BASE=TRUE


FW_P0_TPBIAS


VOLTAGE=1.86V

FW_P0_TPA_PFW_P0_TPA_N

FW_P0_TPB_N

FW_P0_TPB_L_N

NO_TEST=TRUEVOLTAGE=0V

FW_P0_TPA_L_NNO_TEST=TRUEVOLTAGE=1.86V

NO_TEST=TRUEVOLTAGE=0V

FW_P0_TPB_L_P

FW_P0_TPA_L_PNO_TEST=TRUEVOLTAGE=1.86V

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39

39

6 39 40 41

39

39

39

6 39 40 41

39 15 21

41 89 39

41 86

39

39

39

39

86

86

86

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V+

GND

SHIELDPINS

VGTPA-

TPA(R)

TPB- TPB(R)

TPB+ VP

TPA+

SC/NC




36

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PAGE


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345678

D

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8 7 5 4 2 1

INRUSH RESETABLE PTC

PLACE CLOSE TO COMPARITOR

5.1V

12 VOLTS

PORT 0

514-0656

[ LATE VG NOTES ]

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

ESD Rail

PLACE CLOSE TO COMPARATOR

NC5.1V

1394B

SHOULD BE DONE AS A POWER STRIP(SUBPLANE)

FAST NON-RESETABLE FUSETHIS FUSE WILL NOT BLOW

IT IS HERE FOR SAFETY ONLY

"Snapback" & "Late VG" Protection

POUR COPPER TO SINK HEAT

7 WATTS MAX PER PORT

3

5

4

DP4310CRITICAL

SOT-363BAV99DW-X-G

3

5

4

DP4311BAV99DW-X-G

CRITICAL

SOT-363

6

2

1

DP4310BAV99DW-X-G

CRITICAL

SOT-363

6

2

1

DP4311CRITICAL

BAV99DW-X-GSOT-363

31

D4390MMBZ5227BLT1H

SOT23

CRITICAL

21

R4390

1/16WMF-LF

1%

402

332

2

1C4312

X7R402

50V10%

0.01UF

2

1C4313

X7R

0.01UF50V

402

10%

2

1C4310

402

0.01UF50V10%

X7R 2

1C43110.01UF

50V

402

10%

X7R

21

L4300

SM

CRITICAL

FERR-250-OHM

2

1C433210%

402

0.001UF

CERM50V

NOSTUFF

2

1 C4335

603-1

0.1UF10%50VX7R

2

1R4335

402

1%

MF-LF1/16W

1M

2

1 C430010%50VX7R

0.01UF

603-13

1

D4301MMBZ5231BXG

SOT23

21

F43010.3AMP-60V

CRITICAL

SMD030F-SM

4

3

65

21

Q4300

SSOT6

FDC610PZ

CRITICAL

21

R4300

5%

0.33

MF1W

2512

2 3

1 Q4301

SOT2360V-600MA

MMBT2907AXG

21

R4352

MF-LF

1%1/16W

51.1K

402

21

D4300SM

CRITICAL

CRS08-1.5A-30V

2

1R4303

MF-LF1/16W

402

5%20K

2

1R4302

603

1/10W5%

MF-LF

15K

2

1R4307

402MF-LF1/16W5%20K

2

1 C430220%

CERM402

16V

0.01UF

2

1R43015%1/16W

10K

MF-LF402

2

3

1Q4302

SOT23MMBT2222A7F

31

D4302BAS40XG

SOT23

2

1 C430410%16V

402

0.1UF

X7R-CERM8

1

7

3

5

2

6

4

U4300

SOI-HFLM393

21

R4304

402MF-LF1/16W5%

100K

2

1R4306200K1/16WMF-LF

5%

4022

1C4305

16VX5R

10%2.2UF

603

3 1

D4303SOT23

MMBZ5231BXG

21

R4305100K

1/16W

402MF-LF

5%

21

F43003AMP-32V

603

CRITICAL

21XW4300

SM

PLACEMENT_NOTE=PLACE CLOSE TO F4300

8

6

9

2

1

5

4

3

7

11

10

J4300F-ANG-TH

CRITICAL

1394B-K22


FIREWIRE CONNECTOR

=PP12V_S5_FWMIN_LINE_WIDTH=1.7MMP12V_S5_FW_R

VOLTAGE=12VMIN_NECK_WIDTH=0.5MM

PP3V3_FW_ESD


P12V_S5_FW_DMIN_LINE_WIDTH=1.7MM

VOLTAGE=12V

FW_PORT0_VP

MIN_NECK_WIDTH=0.5MMVOLTAGE=12V


FW_PORT0_VP_F


VOLTAGE=12V

FW_CURRENT_LIMIT

=PP12V_S5_FW

FW_CURRENT_LIMIT

FW_FET_LINEAR_LIMIT_OUTFW_FET_LINEAR_LIMIT_IN

FW_CURRENT_LIMIT_R

PP3V3_FW_ESD

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V

=PP3V3_FW_FWPHY

FW_FET_LINEAR_LIMIT_FB

FW_CURRENT_LIMIT_RD

FW_PORT0_TPA_N

FW_PORT0_TPA_PFW_PORT0_TPA_R

FW_PORT0_TPB_P

FW_PORT0_TPB_N

FW_FET_LINEAR_LIMIT_IN

FW_FET_LINEAR_LIMIT_OUT

FW_CURRENT_LIMIT_Q

FW_TURN_ON_V

P12V_S5_FW_CLMIN_LINE_WIDTH=1.7MMMIN_NECK_WIDTH=0.5MMVOLTAGE=12V

PPVP_FW_PHY_CPSVOLTAGE=12V


PP3V3_FW_ESD

43 OF 110

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051-8600

41 OF 92

6 41

41 89

89 89

41

6 41

41

41 41

41 89 6 39 40

40 86

40 86

40 86

40 86

41

41

40 89

41 89

www.vinafix.vn

OUTKEY

GNDGND

MD

+5V

+5V

DP

B-B+

GND

GND

A-

A+

GNDIN

IN

OUT

OUT

SG

D

G

D

S

G

D

S

IN

IN

OUT

OUT

IN

IN

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SATA PORT A1 FOR SLIMLINE ODD

518S0251

SATA PORT A0 FOR HDD

SATA PORT A2 FOR SSD518-0361

SILKSCREEN:HDD

518S0251

SILKSCREEN:ODD

ODD PWR CONTROL

SATA Activity LED

18 84

21C452110% 402CERM16V0.01UF

21C452016V 402CERM10%0.01UF

21C452310% 402CERM16V0.01UF

21C452210%0.01UF 402CERM16V

2

1 C4524

CERM

10%6.3V

402

1UF

2

1 C452510%6.3VCERM402

1UF

2

1R4520

1/10WMF-LF603

33K5%

7

6

5

4

3

2

1

J4510EP00-081-91

M-ST-SM

CRITICAL

P3

P2

P4

15

14

S7

S4

S1

P6

P5

P1

S6

S5

S2

S3

J45201735574M-ST-TH

18 84

18 84

18 84

18 84

21C453010%0.01UF 16V 402CERM

21C453110% 16V0.01UF 402CERM

21C4532

0.01UF 16V CERM10% 402

21C4533CERM 40216V10%0.01UF

7

6

5

4

3

2

1

J4530CRITICAL

M-ST-SMEP00-081-91

32

1

4

87

65

Q4500TPCP810223V1K-SM

NOSTUFF

2

1R4501

402

1/16W5%

100K

MF-LF

NOSTUFF

21

R4500

MF-LF1/16W

402

5%

100K

NOSTUFF

2

1R4502

402MF-LF1/16W

5%100K

NOSTUFF

2

1 C4501

402

10%10VCERM

0.068UF

NOSTUFF

21

C4500

10%16VCERM402

0.01UF

NOSTUFF

1

2

6

Q45022N7002DW-X-GSOT-363

4

5

3

Q4502

SOT-3632N7002DW-X-G

NOSTUFF

21

R4550

MF-LF

5%1/8W

805

0

21C4510CERM 40210%0.01UF 16V

21C4511CERM 4020.01UF 16V10%

21C4515402CERM16V0.01UF 10%

21C451610%0.01UF 40216V CERM

18 84

18 84

18 84

18 84

2

1R4599

MF-LF603

3305%

DEVELOPMENT

1/10W

K

A

DS4599DEVELOPMENT


SILK_PART=SATA ACTIVE

18 84

18 84

18 84

SATA ConnectorsSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

ODD_PWR_EN

ODD_PWR_LS5V_L

SATA_HDD_R2D_C_N

ODD_PWR_EN_L

SATA_HDD_D2R_N

SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_ODD_R2D_C_N

SATA_ODD_R2D_C_P

SATA_HDD_D2R_P

SATA_HDD_R2D_C_P

SATA_SSD_D2R_P

SATA_SSD_D2R_N

SATA_SSD_R2D_C_N

SATA_SSD_R2D_C_P

SATALED_LMAKE_BASE=TRUE

SATA_HDD_D2R_C_P

SATA_HDD_D2R_C_N

SATA_HDD_R2D_P

SATA_HDD_R2D_N

=PP3V3_S0_SATALED

SATALED_R_L

SATA_SSD_R2D_P

SATA_SSD_R2D_N

=PP3V3_S0_ODD

PCH_SATALED_L

SATA_ODD_R2D_P

ODD_PWR_SS=PP3V3_S0_ODD

=PP5V_S0_SATA

SMC_ODD_DETECT

SATA_SSD_D2R_C_P

SATA_SSD_D2R_C_NSATA_ODD_D2R_C_P

SATA_ODD_D2R_C_N

SATA_ODD_R2D_N

PP5V_S0_SATA_FETNET_PHYSICAL_TYPE=POWER

45 OF 110

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051-8600

42 OF 92

15 21

84 92

84 92

84 92

84 92

6 18

84

84

6 42

18

84 92

6 42

6

45 92

84

84

84 92

84 92

84 92

89

www.vinafix.vn

EN1*

OC1*

IN OUT1

GND TPAD

OUT2

OC2*

EN2*

G S

D

EN1*

OC1*

IN OUT1

GND TPAD

OUT2

OC2*

EN2*

IO

IO

NC

GND

VBUS

NC

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

VCC

GND

SELOE*

D+

D-

Y+

Y-

M+

M-

VBUS

DATA-

GND

DATA+

VBUS

DATA-

GND

DATA+

VBUS

DATA-

GND

DATA+

VBUS

DATA-

GND

DATA+

IO

IO

NC

GND

VBUS

NC

IO

IO

NC

GND

VBUS

NC

IO

IO

NC

GND

VBUS

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

USB/SMC DEBUG MUX

514-0659

514-0659

514-0672

514-0672

(PUT CAP ON CONNECTOR SIDE)

SEL=0: CHOOSE SMC

PORT 3

D+

GND

D-

VDD

PORT 2

D+

D-

VDD

VDD

D-

D+

GND

GND

VDD

D-

PORT 0

GND


SEL=1: CHOOSE USB


D+


PORT 1

21

L4620FERR-250-OHM

SM

CRITICAL

21

L4610CRITICAL

SM

FERR-250-OHM

2

1 C4650

402CERM

20%0.1UF10V

21

R4651PRODUCTION

1/16WMF-LF

5%

0

40221

R4652PRODUCTION

0

MF-LF

5%

402

1/16W

9

6

7

5

8

2

1

4

3

U4600

MSOP

TPS2060

CRITICAL

2

1 C4602

POLY-TANT6.3V20%

CRITICAL

CASE-D3L-SM

330UF

2

1

3Q4600SOT23-HF1

2N7002

2

1R46005%1/16W

402

10K

MF-LF

2

1 C46050.1UF10V

402CERM

20%

2

1 C4601

10V20%0.1UF

CERM402

2

1 C4603

CERM

0.1UF20%

402

10V 2

1 C4611

402CERM

20%10V

0.1UF

9

6

7

5

8

2

1

4

3

U4601

CRITICAL

TPS2060

MSOP

2

1 C46310.1UF20%10V

402CERM

2

1 C4630

402

16VCERM

20%0.01uF

6

45

1

D4630SLP1210N6

RCLAMP0502N

CRITICAL

21

L4630

SM

FERR-250-OHM

CRITICAL

2

1 C46210.1UF20%

402

10VCERM

2

1 C4606

POLY-TANT

20%

CRITICAL

6.3V

CASE-D3L-SM

330UF

2

1 C462020%

0.01uF16V

CERM402

2

1 C4610

402CERM16V20%

0.01uF

2

1 C46000.01uF

CERM402

16V20%

4 3

21

L4601DLP0NS

120-OHM-90MA

CRITICAL

4 3

21

L4611CRITICAL

DLP0NS120-OHM-90MA

4 3

21

L4621DLP0NS

120-OHM-90MA

CRITICAL

4 3

21

L4631CRITICAL

DLP0NS120-OHM-90MA

1

2

9

108

5

4

3

7

6

U4650

CRITICAL

PI3USB102ZLE

MOJOMUX

TQFN

1

6

5

4

3

2

J4600CRITICAL

USB-K22F-ANG-TH1

1

6

5

4

3

2

J4610USB-K22

CRITICAL

F-ANG-TH1

1

6

5

4

3

2

J4630CRITICAL

USB-K22F-ANG-TH

1

6

5

4

3

2

J4620USB-K22

CRITICAL

F-ANG-TH

21

L4600

SM

CRITICAL

FERR-250-OHM

6

45

1

D4620RCLAMP0502N

SLP1210N6

CRITICAL

6

45

1

D4610SLP1210N6

CRITICAL

RCLAMP0502N

6

45

1

D4600SLP1210N6

RCLAMP0502N

CRITICAL

EXTERNAL USB CONNECTORSSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

PP5V_USB2_PORT2_F


MIN_NECK_WIDTH=0.2MMMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5VPP5V_USB2_PORT2

USB_PORT1_N



PP5V_USB2_PORT1_F

USB_EXTD_N

PP5V_USB2_PORT1VOLTAGE=5V

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMUSB_EXTB_OC_L

USB_EXTC_OC_L

USB_EXTD_OC_L

USB_D_MUXED_P

USB_D_MUXED_N

=PP3V3_G3H_SMCUSBMUX

USB_EXTC_P

PP5V_USB2_PORT0



USB_EXTC_N

USB_EXTB_N

USB_EXTB_P

USB_EXTA_N

USB_EXTA_P

PM_EN_USB_PWR

USB_EXTA_OC_L

USB_EXTD_P

USB_DEBUGPRT_EN_L

=PP5V_S3_USB

SMC_TX_L

SMC_RX_L

USB_PORT0_P

USB_PORT0_N

PP5V_USB2_PORT0_FVOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM

USB_PORT1_P

USB_PORT3_P

USB_PORT3_N

PP5V_USB2_PORT3_F



USB_PORT2_P

USB_PORT2_N


PP5V_USB2_PORT3


VOLTAGE=5V

USB_PWR_ENA_L

=PP5V_S3_USB

46 OF 110

A.0.0

051-8600

43 OF 92

2 3

2 3

2 3

2 3

89 89

85

89

35 85

89

35

34

35

85

85

6

34 85

89

34 85

35 85

35 85

34 85

34 85

62

34

35 85

45 46

6 43

45 46 47

45 46 47

85

85

89

85

85

85

89

85

85

89

6 43

www.vinafix.vn

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

NC

NC

NCNCNC

SYM_VER-1

SYM_VER-1

NC

G

D

S

G

D

S




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CAMERA CONNECTOR & FILTERBLURAY DECRYPTOR CONN & FLTR

SD Card Reader Board Connector

516S0823

518S0667

WM CONNECTOR

518S0690

GNDBRAID

518S0761

K37L (BLUETOOTH) CONNECTOR

518S0688

LAYOUT NOTE:

BOTH SIDES OF THE PIN.ORDER LISTED, AND NOT ONNEAR J4700 PINS 4 AND 5 IN THEPLACE C4700, C4701 & L4700

518S0668

IR RECEIVER CONNECTOR

2

1

C4781

4026.3VCERM

10%1UF

21

L4703

CRITICAL

FERR-250-OHM

SM

4 3

21

L4702CRITICAL

DLP0NS120-OHM-90MA

4

3

2

1

6

5

J4780

CRITICAL

M-RT-SM53261-8604

4 3

21

L4750CRITICAL

120-OHM-90MADLP0NS

21

L4751FERR-250-OHM

SM

CRITICAL

2

1C4750

402CERM6.3V

1UF10%

2

1 C4740NOSTUFF 1UF

402CERM6.3V10%

4 3

21

L4740NOSTUFF

120-OHM-90MADLP0NS

21

L4741NOSTUFF

SM

FERR-250-OHM

21

L4742FERR-250-OHM

NOSTUFF

SM

2

1 C4741NOSTUFF 10%

1UF

603X5R16V

21

R4750

402MF-LF

10K

1%1/16W

4 3

21

L4760DLP0NS

BRAYCRITICAL

120-OHM-90MA

7

6

5

4

3

2

1

9

8

J4740

NOSTUFF

M-RT-SMSM07B-SRKHFS-G

2

1 C4700

CERM

10UF6.3V20%

805-1

21

L4700FERR-250-OHM

CRITICAL

SM

4 3

21

L4701DLP0NS

120-OHM-90MA

CRITICAL

2

1C47010.1UF

20%10V

402CERM

5

4

3

2

1

7

6

J4700M-RT-SM

53780-8605

CRITICAL

4 3

21

L4720CRITICAL

DLP0NS120-OHM-90MA

21

L4721

CRITICAL

SM

FERR-250-OHM

2

1 C472010UF

CERM6.3V

805-1

20%2

1 C4721

CERM402

10V20%0.1UF

6

5

4

3

2

1

8

7

J4750CRITICAL

53261-8606M-RT-SM

5

4

3

2

1

7

6

J4720M-RT-SM

CRITICAL

53261-8605

2

1R4751

MF-LF1/16W1%10K

402

9

87

65

43

22

21

20

2

19

1817

1615

1413

1211

10

1

J4760BRAY

AXK820225WGM-ST-SM

1

2

6

Q4710SOT-3632N7002DW-X-G

4

5

3

Q4710SOT-3632N7002DW-X-G


Internal USB Connections

SDCARD_PLT_RST_L

SDCARD_PLT_RST_R_L

USB_SDCARD_P

PP3V3_S3_SDCARD_FLT


VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5VPP5V_S3_IR_FLT

USB_IR_N

BRCRYPT_RESET

=PP3V3_S3_BRCRYPT

USB_BRCRYPT_P

USB_IR_L_NUSB_IR_L_P

NET_PHYSICAL_TYPE=POWER=PP5V_S3_CAMERA

USB_CAMERA_L_N

USB_CAMERA_P

USB_CAMERA_NUSB_CAMERA_L_P

PP5V_S3_CAMERA_FLT

VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM

USB_IR_P

NET_PHYSICAL_TYPE=POWER

=PP5V_S3_IR

=PP3V3_S3_BTNET_PHYSICAL_TYPE=POWER

USB_BT_N

USB_BT_P


VOLTAGE=3.3V

PP3V3_S3_BT_FLT

USB_BT_L_PUSB_BT_L_N

USB_WM_L_PUSB_WM_L_NUSB_WM_N

USB_WM_P


=PP12V_S3_WM

=PP3V3_S3_WM


PP3V3_S3_WM_FLTVOLTAGE=3.3V


PP12V_S3_WM_FLT VOLTAGE=12V


USB_SDCARD_L_P

USB_SDCARD_NUSB_SDCARD_L_N

USB_BRCRYPT_N

BRCRYPT_PWR_EN

=PP5V_S3_BRAYUSB_BRCRYPT_L_PUSB_BRCRYPT_L_N

SDCARD_RESET_L

SDCARD_RESET


=PP3V3_S3_SDCARD

47 OF 110

A.0.0

051-8600

44 OF 92

27 91

35 85

89

89

34 85

15 18

6

20 85

85 92

85 92

6

85 92

34 85

34 85

85 92

89

34 85

6

6

35 85

35 85

89

85 92

85 92

85

85 20 85

20 85

6

6 89

89

85 92

35 85 85 92

20 85

15 18

6

85

85

21 25 91 92

6

www.vinafix.vn

IN IN

IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

BI

IN

IN

OUT

OUT

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

IN

IN

OUT

ININ

BI

OUT

IN

OUT

OUT

OUT

OUT

OUTNC

NC

NCNC

NCNCNC

NC

NC

NC

NC

NCNC

IN

OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

NC

IN

NC

OUT

OUT

BI

IN

OUT

ININ

OUT

IN

IN

P13

P14

P15

P16 P66

P10

P11

P12

P17

P20

P21

P22

P23

P24

P25

P26

P27

P30

P31

P32

P33

P34

P36

P37

P40

P41

P42

P43

P44

P45

P46

P47

P50

P51

P52

P60

P61

P62

P63

P64

P65

P67

P70

P71

P72

P73

P74

P75

P76

P77

P80

P81

P84

P85

P86

P90

P91

P92

P93

P94

P95

P96

P97

P35

P83

P82

(1 OF 3)

PH5

PH4

PH3

PH2

PH1

PH0

PG7

PG6

PG5

PG4

PG3

PG2

PG1

PG0

PF7

PF6

PF5

PF4

PF3

PF2

PF1

PF0

PE0

PD7

PD6

PD5

PD4

PD3

PD2

PD1

PD0

PC7

PC6

PC5

PC4

PC3

PC2

PB2

PB1

PB0

PA7

PA6

PA3

PA2

PA1

PA0

PA4

PA5

PB3

PB4

PB5

PB6

PB7

PC1

PC0

PE4*

PE3*

PE2*

PE1*

(2 OF 3)

AVCC AVREF

AVSS

MD1

MD2

VCC VCL

VSS

NMI

XTAL

RES*

EXTAL

ETRST*

(3 OF 3)BI

BI

BI

BI

IN

IN

IN

BI

IN

IN

BI

BI

IN




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NOTE: SMS Interrupt can be active high or low, rename net accordingly.

If SMS interrupt is not used, pull up to SMC rail.

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(See below)

(OC)

(OC)

Otherwise, TP/NC okay (was ISENSE_CAL_EN)

SMC_IG_THROTTLE_L for MG systems.

(OC)

(DEBUG_SW_1)(DEBUG_SW_2)

SMC_PB3:

(OC)

(OC)

(OC)

Peak/Ave/Standby= 2mA/1mA/5uA

Peak/Ave/Sleep/Standby = 40mA/25mA/20mA/50uA

Peak/Ave/Standby = 2mA/1mA/5uA

(OC)

Remove R4950,R4951 after Proto-1

REMOVE R4953/4/5 AFTER PROTO-1

NOTE: P94 and P95 are shorted, P95 could be spare.

NOTE: Rename to BaseArch

pins designed as outputs can be left floating,

those designated as inputs require pull-ups.

NOTE: Unused pins have "SMC_Pxx" names. Unused

2

1C4902

805

22UF

CERM

20%6.3V

19 47 46 47 91

46

2

1C4907

402CERM-X5R

0.47UF

6.3V10%

PLACEMENT_NOTE=Place C4907 close to U4900 pin 13

2

1 C49030.1UF

10V

402CERM

20%

2

1C4920

PLACEMENT_NOTE=Place C4920 close to U4900 pin 76

10V

402

0.1UF

CERM

20%

21

R49994.7

1/16W5%

MF-LF402

PLACEMENT_NOTE=Place R4999 close to U4900 pin 76

2

1 C4904

10V

402

0.1UF

CERM

20%

2 1

XW4900SM

19 25 91

46

2

1 C4905

10V

402

0.1UF

CERM

20%

62 91

63 91

63 91

46

2

1 C4906

402

20%

CERM

0.1UF

10V

49 88

49 88

50 88

50 88

46

46

46

46

46

46

43 45 46 47

43 45 46 47

48

2

1R4909

402

10K

MF-LF

5%1/16W

47

47

2

1R490110K

MF-LF

5%1/16W

402

2

1R4902

402

10K5%

MF-LF1/16W

2

1R4903

402

1/16W5%

MF-LF

0

NOSTUFF

2

1R499810K

1/16WMF-LF402

5%

43 46

15 19 91

42 92

51

15 21

46

52

52

53

46

46

53

52

52

46

46

46

46

46

46

46

46 47

46

46 47

46 47

46 47

46 81

48

48

48

48

48

48

46

46

46

46

43 45 46 47

43 45 46 47

46 46

18 47

19 27 91

47

18

15 19 47 91

46

46

19 46

46

46

46

81

81

81

81

81

81

81

46

81

81

78 81

15 18

46

46

46

46 46

2

1R4951

1/16W

402MF-LF

5%10K

NOSTUFF

21

R4950

402

5%

MF-LF1/16W

03

2

1R4952NOSTUFF

1/16WMF-LF

5%10K

402

21

R49540

1/16WMF-LF402

5% 19 91

19 46 91

21

R4953NOSTUFF

5%

402MF-LF1/16W

0

21

R4955

402

5%

MF-LF1/16W

0

17

18

19

20

21

22

23

24

135

134

133

132

131

130

129

75

74

73

72

71

70

69

68

85

84

83

82

81

80

79

78

14

15

16

6

5

4

3

2

138

137

136

128

127

126

125

124

123

122

121

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

112U4900

TQFP

OMIT

H8S2117

142

141

140

26

12

10

51

52

53

54

55

56

57

58

43

44

45

46

47

48

49

50

28

29

30

31

32

59

60

61

62

63

64

65

66

87

88

89

90

91

92

93

94

113

114

115

116

117

118

119

120

33

34

35

37

38

39

40

41U4900

TQFP

OMIT

H8S2117

143

139

111

95

427

13

86

36

1

8

11

25

9

144

27

67

77

76

U4900TQFP

OMIT

H8S2117

18 47 85

18 47 85

18 47 85

18 47 85

18 47 85

27 91

27 85

48

6 46

9 85 91

48

48

46

SMCSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

BIDIVI_AUDIO_MUX_SEL

LPC_AD<3>

SMC_LRESET_L

ALS_GAIN

SMC_PH2

SMC_THRMTRIP

SMC_PROCHOT

SMB_B_S0_CLK

SMB_B_S0_DATA

SMB_A_S3_CLK

SMB_A_S3_DATA

SMB_BSA_CLK

SMB_BSA_DATA

=SMC_SMS_INT

SMC_PNL_BL_PWM

BIDIVI_BKL_PWM

BIDIVI_BKL_ON

SMC_PF5

BIDIVI_PNL_PWR_EN

BIDIVI_AUX_TERM_EN

SMC_LID

SMC_SYS_LED

G3_POWERON_L

SMC_CASE_OPEN

ALS_RIGHT

ALS_LEFT

SMC_NB_DDR_ISENSE

SMC_NB_CORE_ISENSE

SMC_ANALOG_ID

SMS_Z_AXIS

SMS_Y_AXIS

SMS_X_AXIS

SMC_FAN_3_TACH

SMC_FAN_2_TACH

SMC_FAN_1_TACH

SMC_FAN_0_TACH

SMC_FAN_3_CTL

SMC_FAN_2_CTL

SMC_ODD_DETECT

SMC_RUNTIME_SCI_L

PM_BATLOW_L

SYS_ONEWIRE

USB_DEBUGPRT_EN_L

PM_SYSRST_L

SPI_DESCRIPTOR_OVERRIDE_L

SMC_PA0

MEM_EVENT_A_L

MEM_EVENT_B_L

SMC_PB3

SMC_EXCARD_CP

SMC_EXCARD_OC_L

SMC_GFX_OVERTEMP_L

SMC_FAN_1_CTL

SMC_FAN_0_CTL

SMC_TMS

SMC_TDO

SMC_TDI

SMC_TCK


PP3V3_G3H_SMC_AVCC

VOLTAGE=3.4V

PP3V3_G3H_AVREF_SMC

GND_SMC_AVSS

SMC_MD1

SMC_KBC_MDE

=PP3V3_G3H_SMC

SMC_VCL

SMC_NMISMC_XTAL

SMC_RESET_L

SMC_EXTAL

SMC_TRST_L

RSMRST_PWRGD

PM_RSMRST_L

CPUIMVP_VR_ON SMC_PROCHOT_3_3_L

SMC_EXCARD_PWR_EN

SMC_RSTGATE_L

ALL_SYS_PWRGD_SMC

PM_PWRBTN_L

ESTARLDO_EN

SMC_VIDEO_ON

AUXCH_P_STATE

AUXCH_N_STATE

SMC_DP_HPD

DPMUX_VIDEO_IN_SEL

LPC_AD<0>

LPC_AD<1>

LPC_AD<2>

LPC_FRAME_L

LPC_CLK33M_SMC

LPC_SERIRQ

SMC_P41

SMB_MGMT_DATA

SMS_ONOFF_L

SMC_GFX_THROTTLE_L

SMC_TX_L

SMC_RX_L

SMB_0_S0_CLK

SMC_PM_G2_R

SMC_ADAPTER_EN

SMC_BIL_BUTTON_L

SMC_CPU_ISENSE

SMC_CPU_VSENSE

SMC_GPU_ISENSE

SMC_GPU_VSENSE

SMC_DCIN_ISENSE

SMC_PBUS_VSENSE

SMC_BATT_ISENSE

SMC_NB_MISC_ISENSE

SMC_WAKE_SCI_L

SMC_TX_L

SMC_RX_L

SMB_MGMT_CLK

SMC_ONOFF_L

SMC_BC_ACOK

SMC_BS_ALRT_L

PM_SLPS3_BUF2_L

SMC_P94

PM_SLP_S4_S5

PM_CLK32K_SUSCLK

SMB_0_S0_DATA

LPC_PWRDWN_L

PM_CLKRUN_L

PM_SLP_S4_2_L

SMC_PM_G2_EN

PM_SLP_S5_L

=PP3V3_G3H_SMC

=PP3V3_G3H_SMC

49 OF 110

A.0.0

051-8600

45 OF 92

46

46

46

46

89

46 89

46 49 50 88

6 45 46

46 88

46 88

46

6 45 46

6 45 46

www.vinafix.vn

G

D

S

GND

OUTIN

OUT

IN

BI

OUT

G

D

S

OUT

ININ G

D

S

G

D

S

CD

GNDNC

OUTIN

G

D

SIN

G

D

S

OUT

TABLE_ALT_ITEM


TABLE_ALT_HEAD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PM_EXTTS_L / MEM_EVENT LEVEL SHIFTING

TO CPU

MISC. SIGNAL ALIASES

FROM SMCFROM MXM

SMC & MXM THERMTRIP LEVEL SHIFTING

PULL-UP ON PAGE 14

FROM SMC

TO CPUTO SMC

5uA

NC

1.3uA

TO/FROM SMC

FROM DIMMS

POWER BUTTON

PORT 7 ANALOG SENSORS

PORT D ANALOG SENSORS (INTERNAL PULLUPS)

UNUSED TP/NC ALIASES

SMC Reset Button / Brownout Detect

518S0665

SMC AVREF Supply

SMC PROCHOT 3.3V LEVEL SHIFTING

SMC Crystal Circuit

2

1C5000

402

10V20%

0.1uF

CERM

4

5

3

Q5095

SOT-3632N7002DW-X-G2

1 C5065

6.3V10%

CERM-X5R402

0.47UF

2

1 C50670.01UF

16V

402CERM

10%

2

1C5066

20%10uF

603

6.3VX5R

21

3

VR5065SOT23-3

REF3333

CRITICAL

21R5032MF-LF1/16W

10K5% 402

21R5033402MF-LF1/16W5%

100K

21R5034 10K5% 402MF-LF1/16W

21R50355% 402

10KMF-LF1/16W

21R50361/16W MF-LF 402

100K5%

21R5037 2.0K1/16W MF-LF5% 402

21R5038 100K5% MF-LF1/16W 402

21R5039 10K5% 4021/16W MF-LF

21R5040402

10K5% 1/16W MF-LF

21R50415% 1/16W

10KMF-LF 402

21R5042 10K5% MF-LF 4021/16W

21R50461/16W

10K5% 402MF-LF

2

1Y5020

SM-4

CRITICAL

20.000M

21R50941/16W5% 402MF-LF

100K

45 47 91

45

2

1 C5010

10V

0.1UF20%

CERM402

21

R5010

5%

MF-LF1/16W

402

1K

21R5043 10K5% 4021/16W MF-LF

1

6

2Q5077


21

R50713.3K

402

5%1/16WMF-LF

4

3

5Q5077MMDT3904-X-GSOT-363-LF

2

1R50703.3K

5%

MF-LF402

1/16W

2

1R50784705%

MF-LF1/16W

402

11

45

21R5091 10K5% MF-LF 4021/16W

2

1R5000

1/16WMF-LF402

1K5%

21R5096MF-LF5%

10K4021/16W

21R50891/16W

100K5% MF-LF 402

21R5092 10K402MF-LF5% 1/16W

21R50954021/16W MF-LF5%

100K

21R5097 100K5% 4021/16W MF-LF

21R5047 10K5% 1/16W 402MF-LF

21R5049MF-LF1/16W 402

10K5%

21R50985% MF-LF 4021/16W

10K

1

2

6

Q5095

SOT-3632N7002DW-X-G

11 21 91

45 74

21

R5018MXM

402

0

5%

MF-LF1/16W

21R50995% 402

10K1/16W MF-LF

1

2

6

Q50962N7002DW-X-G

MXM

SOT-363

4

5

3

Q5096

SOT-3632N7002DW-X-G

MXM

2

1R5069

1/16WMF-LF402

5%3.3K

MXM

2

1R5068MXM

10K5%1/16WMF-LF402

1

2

3

5

U5000NCP303LSN

CRITICAL

SOT23-5-HF

2

1

4

3

J5010

CRITICAL

M-RT-SM53261-8602

SILK_PART=PWR BTN

21R5087402

10KMF-LF1/16W5%

4

5

3

Q5080NOSTUFF

2N7002DW-X-GSOT-363

2

1R5080

1/16W

402MF-LF

5%10K

30 31

2

1R5082

402MF-LF1/16W5%10K

NOSTUFF 2

1R5083

402

10K5%1/16WMF-LF

1

2

6

Q5080SOT-3632N7002DW-X-G

NOSTUFF

21R50865% 1/16W

10K402MF-LF

2

1R5085

402

5%10K1/16WMF-LF

21

R5079

1/16W

NOSTUFF

MF-LF

5%

0

402

21R5093MF-LF1/16W

10K4025%

2 1

R500110K

1/16W5%

402MF-LF

2 1

R5002

402

5%

MF-LF1/16W

10K

2 1

R5004

1/16W5%

10K

402MF-LF

2 1

R5003

1/16WMF-LF402

5%

10K

43

21

S5000

SILK_PART=SMC RESET

NTC020-CC1J-B260T

DEVELOPMENT

SM

43

21

S5010

SILK_PART=SYS POWER

SM

DEVELOPMENT

NTC020-CC1J-B260T45 46

21

C502022PF

CERM402

5%50V

21

C5021

402

22PF

5%

CERM50V

2

1C5001

16VCERM

0.01UF

402

10%


SMC Support

Intersil ISL60002-33353S1381 ALL353S1912

SMC_TDO

SMC_TCK

SMC_EXCARD_OC_L

SMC_FAN_3_CTL

SMC_BIL_BUTTON_L

=PP3V3_G3H_SMC

SMC_RX_L

SMC_BS_ALRT_L

SMC_TDI

SMC_PA0

ESTARLDO_EN

SMC_P41

SMC_RSTGATE_L

SMC_CASE_OPEN

PM_SLPS3_BUF2_L

PM_SLPS3_BUF1_LMAKE_BASE=TRUEPM_SLP_S3_L

SMC_FAN_3_TACH

USB_DEBUGPRT_EN_L

MEM_EVENT_B_L

MAKE_BASE=TRUENC_ALS_RIGHT

SMC_CPU_1V8_VSENSEMAKE_BASE=TRUE

POWER_BUTTON_L


PP3V3_G3H_AVREF_SMC

VOLTAGE=3.3V


SMC_XTAL

SMC_MANUAL_RST_L

GND_SMC_AVSS

MAKE_BASE=TRUESMC_CPU_VTT_ISENSE

MAKE_BASE=TRUETP_SMC_RSTGATE_L

SMC_SYS_LED

NC_ALS_LEFTMAKE_BASE=TRUE

SMC_BC_ACOK

SMC_PBUS_VSENSE

MAKE_BASE=TRUESMC_CPU_1V5_VSENSE

PM_SLP_S4_2_L MAKE_BASE=TRUE

SMC_DIMM_1V5_VSENSEMAKE_BASE=TRUE

MAKE_BASE=TRUESMC_CPU_1V8_ISENSE

MAKE_BASE=TRUETP_SMC_P41

GND_SMC_AVSS

MAKE_BASE=TRUENC_ALS_GAIN

NO_TEST=TRUE

=PP3V42_G3H_AVREF

=PPSPD_S0_MEM_A

MAKE_BASE=TRUEMEM_EVENT_A_L

MEM_EVENT_L

=PP3V3_S0_SMC

=PP3V3_G3H_SMC

SMC_ONOFF_L

SMC_EXTAL

VOLTAGE=0VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmGND_SMC_AVSS

SMC_RESET_L

CPU_PROCHOT_L_R

SMC_PROCHOT

MXM_THRMTRIP_L PM_THRMTRIP_L

=PP3V3_S0_SMC_LS

MXM_THRMTRIP

MXM_OVERT_LSMC_THRMTRIP

SMC_PROCHOT_3_3_L

CPU_PROCHOT_BUF

=PPVTT_S0_CPU

=PP3V3_S0_SMC_LS

SMC_DCIN_ISENSE

SMC_BATT_ISENSE

SMS_X_AXIS

SMS_Z_AXIS

SMS_Y_AXIS

MAKE_BASE=TRUESMC_CPU_VTT_VSENSESMC_NB_MISC_ISENSE

SMC_NB_CORE_ISENSE

SMC_ANALOG_ID

MAKE_BASE=TRUESMC_DIMM_1V5_ISENSESMC_NB_DDR_ISENSE

ALS_LEFT

ALS_RIGHT

MEM_EVENT

PM_EXT_TS_L<0>

PM_EXT_TS_L<1>

=PPVTT_S0_CPU

MAKE_BASE=TRUESMC_CPU_1V5_ISENSE

MAKE_BASE=TRUESMC_CPU_INPUT_ISENSE

MAKE_BASE=TRUESMC_CPU_INPUT_VSENSE

SMS_ONOFF_L

ALS_GAIN

SMC_EXCARD_PWR_EN

SMC_PF5

SMC_PB3

MAKE_BASE=TRUETP_SMS_ONOFF_L

TP_SMC_EXCARD_PWR_ENMAKE_BASE=TRUE

TP_SMC_SYS_LEDMAKE_BASE=TRUE

MAKE_BASE=TRUETP_SMC_PF5

TP_SMC_PB3MAKE_BASE=TRUE

MAKE_BASE=TRUETP_ESTARLDO_EN

CPUIMVP_VR_ON

SMC_GFX_THROTTLE_L

SMC_GFX_OVERTEMP_L

SMC_DELAYED_PWRGDMAKE_BASE=TRUE

MAKE_BASE=TRUEMXM_PWR_LEVEL

MAKE_BASE=TRUEMXM_ALERT_L

CPU_PROCHOT_L

=PP3V3_S0_SMC

SMC_ONOFF_L

SMC_PH2

SMC_PNL_BL_PWM

SMC_TX_L

SYS_ONEWIRE

SMC_TMS

SMC_ADAPTER_EN

SMC_LID

G3_POWERON_L

SMC_GFX_OVERTEMP_L

SMC_SMS_INTMAKE_BASE=TRUE

=SMC_SMS_INT

50 OF 110

A.0.0

051-8600

46 OF 92

445 47

45 47

45

45

6 45 46

43 45 47

45

45 47

45

45

45

45

45

6 45

80

5 19 32 33 37 62 63 91

45

43 45

45

49 88

45 89

45 88

45 46 49 50 88

49 88

45

45

45

49 88

19 45 91

50 88

49 88

45 46 49 50 88

6

6 30

45

6 46 49 50

6 45 46

45 88

45 46 49 50 88

6 46 51

6 11 13 16 46 64

6 46 51

45

45

45

45

45

49 88 45

45

45

50 88 45

45

45

11 91

11 91

6 11 13 16 46 64

49 88

88

88

45

45

45

45

45

45

45

45 46

63 91

74

74

6 46 49 50

45 46

45

45 81

43 45 47

45

45 47

19 45

45

45

45 46

45

www.vinafix.vn

IN

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

BI

IN

BI

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

IN

IN

OUT

BI

BI

IN

INOUT

INOUT

OUTIN

OUT

OUT

VER 1

VCC

A

1

0

B1

GND

B0

SEL




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

LPC+SPI Connector

Pull-up on debug card

SPI Bus Series Resistance Option

FRANK CONNECTOR

Alternate SPI ROM Support

516S0573

2

1 C51440.1UF10V20%

402CERM

21

R5145

PLACEMENT_NOTE=Place near U1400

LPCPLUS

402

5%

MF-LF

0

1/16W

18 85

43 45 46

45

45 46

45

27 91

45 46

15 19 45 91

47 85

18 45 85

18 45 85

47 85

18 45 85

9

87

65

4

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J510055909-0374

CRITICALLPCPLUS

M-ST-SM

21

43 45 46

45

45 46 91

45 46

45 46

19 45

18 45

47 85

47 85

21 47 85

18 45 85

18 45 85

27 85

18 54 85 21

R5156

LPCPLUS

402

PLACEMENT_NOTE=Place next to R6150 5%

MF-LF

0

1/16W

47 85

18 54 85 21

R5157

PLACEMENT_NOTE=Place next to R6152

402

0

MF-LF

5%1/16W

LPCPLUS

47 85

18 54 85 21

R5158

PLACEMENT_NOTE=Place next to R6105

402

1/16W5%

MF-LF

0

LPCPLUS

47 85

2

1R5140

MF-LF402

5%1/16W

100K

47 85

54 85

5

6

2

1

3 4

U5100

LPCPLUS

PATH=I96SC70

CRITICAL

NC7SB3157P6XG2

1R5144

402MF-LF1/16W

5%20K

21

R5146PRODUCTION

5%

MF-LF

0

402

1/16WPLACEMENT_NOTE=PLACE NEXT TO U5100


LPC+SPI Debug Connector

=PP3V3_G3H_LPCPLUS=PP5V_S0_LPCPLUS

SMC_TRST_L

SMC_TX_L

LPC_AD<1>

SPI_ALT_MOSI

LPCPLUS_GPIO

LPC_CLK33M_LPCPLUSLPC_AD<2>

SPIROM_USE_MLB

SPI_ALT_CS_LLPC_SERIRQ

LPC_AD<0>

SPI_MLB_CS_L

=PP3V3_S5_ROM

SPI_CS0_LSPI_ALT_CS_L

PM_CLKRUN_LLPC_FRAME_L

LPC_AD<3>

SPI_ALT_CLK

LPC_PWRDWN_LSMC_TDI

SPI_ALT_CLK

SMC_TDODEBUG_RESET_LSMC_TMS

SPI_ALT_MISO

SMC_NMISMC_RESET_L

SPI_MISO

SPI_MOSI_R

=PP3V3_S5_LPCPLUS

SPI_ALT_MISO

SPI_ALT_MOSI

SPI_CLK_R

SMC_TCK

SMC_RX_L

=PP3V3_S5_LPCPLUS

SPI_CS0_R_L

SPIROM_USE_MLBMAKE_BASE=TRUE

SMC_MD1

51 OF 110

A.0.0

051-8600

47 OF 92

6

6

6 54

85

6 47

6 47

21 47 85

www.vinafix.vn




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

U6806

(WRITE: 0XA2 READ: 0XA5)

SMC "MANAGEMENT" SMBUS CONNECTIONS

DP TX EQLZ CONTROL

DP RX EQLZ CONTROL

U9100

(WRITE: 0X9C READ: 0X9D)

(WRITE: 0XD2 READ: 0XD3)

THIS CONNECTION IS BROKEN THROUGH

NOSTUFF RESISTORS ON PAGE 90

DISPLAY TCON

(WRITE: 0X90 READ: 0X91)

EMC1047-2, U5500, SEE TABLE


ALS

DP RX MASTER FOR MCCS

SMC SLAVE ADDRESS TBD

POTENTIAL SMC SLAVE SMBUS CONNECTIONS

PCH "SML 0" CONNECTIONS

(WRITE: 0X98 OR 0X9A, READ: 0X99 OR 0X9B)

3 SENSE POINTS - PRIMARY, SECONDARY, AMB


MEMORY B DIMMS

(Write: 0xA0 Read: 0xA1)

MEMORY A DIMMS

MEMORY A VREF


PCH "SMBUS" CONNECTIONS

PCH "SML 1" CONNECTIONS


J2500/J2550

CPU HEATSINK

MXM HEATSINK

SMCU4900

(MASTER)

OUTPUT VOLTAGE, CURRENT, POWER

AC/DC PS POWER

(WRITE: 0X80, READ: 0X81))

INA219: ACDC THRU J600

FUNCTION

ODD TEMP

LCD TEMP

AMBIENT TEMP

EMC1047-2 HEX DIODE SENSOR

3

4

1

2

DIODE

5

PCHU1800

(MASTER)

U4900

SMC

(MASTER)

U4900

SMC

(MASTER)

SMC

U2900


MEMORY B VREFU2910

U1800

PCH

J3200-A/B

J3100-A/B


MIKEY


(MASTER)

XDP

MXM TEMPGPU ON CARD - J8400

SMC "0" SMBus Connections

MXM CARD (WRITE: 0X98 READ: 0X99)

U4900

SMC

(MASTER)

PCH

(SLAVE)

U1800

(MASTER)

NV INSIDE (WRITE: 0X9E READ: 0X9F)

(MASTER)

U4900

U2600

CK505

SMC "B" SMBus Connections

REMOTE TEMPS

NOTE: SMC RMT BUS REMAINS POWERED AND MAY BE ACTIVE IN S3 STATE

SMC "A" SMBus Connections

Also reserve 0x56 and 0x32 per spec

DIE TEMPSEMC1402-2: U5535

(WRITE: 0X9A READ: 0X9B)

DIODE1: CPU

EMC1403-[1,2]: ACDC THRU J600

AC/DC PS TEMPS


U9200

2

1R5200

402

6.8K

MF-LF

5%1/16W

NOSTUFF

2

1R5201

402

6.8K5%

NOSTUFF

MF-LF1/16W

2

1R5280100K

1/16W5%

MF-LF402 2

1R5281100K

MF-LF

5%

402

1/16W

2

1R52914.7K5%1/16W

402MF-LF

2

1R52904.7K

MF-LF1/16W

5%

402

2

1R52612.2K

1/16W5%

402MF-LF

2

1R5260

MF-LF

2.2K

1/16W5%

402

2

1R5251

1/16WMF-LF

5%

402

4.7K

2

1R5250

1/16W

402

5%

MF-LF

4.7K

2

1R52038.2K5%1/16WMF-LF402

2

1R5202

402MF-LF1/16W

8.2K5%

2

1R52048.2K

5%

402

1/16WMF-LF

NOSTUFF

2

1R52058.2K

NOSTUFF

5%

402

1/16WMF-LF

21

R5206

1/16WMF-LF402

5%

0

21

R5207

1/16WMF-LF

0

5%

402

2

1R5209

MF-LF1/16W5%3.3K

4022

1R5208

MF-LF1/16W

5%3.3K

402

2

1R5210

1/16W

402MF-LF

5%0

2

1R5211

MF-LF402

05%1/16W

2

1

3

Q5201NOSTUFF

SOT23-3-HFSI2302ADSE3

2

1

3

Q5200NOSTUFF

SOT23-3-HFSI2302ADSE3

2

1R5270

MF-LF1/16W

4.7K5%

402 2

1R5271

1/16W

402MF-LF

5%4.7K


SMBus Connections

=I2C_DP_DRV_SCL

=I2C_DP_DRV_SDA

=I2C_DP_EQLZ_SCL

=PP3V3_S0_SMBUS_SMC_MGMT

MAKE_BASE=TRUESMBUS_SMC_0_S0_SCL

=SMB_CPU_THRM_SDA

=SMB_CPU_THRM_SCL

MAKE_BASE=TRUESMBUS_SMC_A_S3_SCL TP_I2C_ALS_SCL

SMB_MGMT_DATA

SMB_MGMT_CLK

=SMB_MXM_THRM_SCL

MAKE_BASE=TRUESMBUS_SMC_0_S0_SDA

=I2C_SODIMMA_SCL

=SMBUS_CK505_SDA

=PP3V3_S3_SMBUS

SMB_0_S0_DATA

SMB_0_S0_CLK

=SMB_MXM_THRM_SDA

SML_PCH_1_DATAMAKE_BASE=TRUE

MAKE_BASE=TRUESML_PCH_1_CLK

=PP3V3_S0_SMBUS

=PP3V3_S0_SMBUS_SMC_0_S0

=SMBUS_XDP_SCL =SMBUS_CK505_SCL

=I2C_AUDIO_SDA

=I2C_AUDIO_SCL

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

=I2C_VREFMRGN_B_SDA

=I2C_VREFMRGN_B_SCL

=I2C_VREFMRGN_A_SDA

=I2C_VREFMRGN_A_SCL

=PP3V3_S0_SMBUS

=PP3V3_S0_SMBUS_SMC_B_S0

SMBUS_SMC_B_S0_SCLMAKE_BASE=TRUE

SMB_A_S3_CLK

SMB_A_S3_DATA

SML_PCH_0_CLKMAKE_BASE=TRUE

=PP3V3_S0_SMBUS

SMB_B_S0_CLK

SMB_B_S0_DATA

=SMB_ACDC_SDA

=SMB_ACDC_SCL

=SMB_REMOTE_TEMP_SDA

=SMB_REMOTE_TEMP_SCL

SMB_BSA_CLK

SML_PCH_0_DATAMAKE_BASE=TRUE

=SMBUS_XDP_SDA

=I2C_SODIMMA_SDA

MAKE_BASE=TRUESMBUS_PCH_CLK

MAKE_BASE=TRUESMBUS_PCH_S0_CLK

PGOOD_P3V3_S0

SMBUS_PCH_S0_DATAMAKE_BASE=TRUE

SMBUS_SMC_B_S0_SDAMAKE_BASE=TRUE

SMBUS_SMC_BSA_SCLMAKE_BASE=TRUE

TP_I2C_ALS_SDA

=PP3V3_S3_SMBUS_SMC_A_S3

SMB_BSA_DATAMAKE_BASE=TRUESMBUS_SMC_BSA_SDA =SMB_DP_TCON_SDA

=SMB_DP_TCON_SCL

MAKE_BASE=TRUESMBUS_SMC_A_S3_SDA

=PP3V3_S0_SMBUS_SMC_BSA

SMBUS_SMC_MGMT_SCLMAKE_BASE=TRUE

=I2C_DP_EQLZ_SDASMBUS_SMC_MGMT_SDAMAKE_BASE=TRUE

SMBUS_PCH_DATAMAKE_BASE=TRUE

52 OF 110

A.0.0

051-8600

48 OF 92

78

78

79

6

88

51

51

88

45

45

74

88

30

26

6

45

45

74

18 88

18 88

6 48

6

25 26

61

61

31

31

28

28

28

28

6 48

6

88

45

45

18 88

6 48

45

45

6

6

51

51

45

18 88

25

30

18 88

88

63 72 91

88

88

88

6

45 88 77

77

88

6

88

79 88

18 88

www.vinafix.vn

OUT

IN

V+

REFIN+

IN- OUT

GND

OUTIN-

IN+ REF

V+

GND

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CPU 1.5V VOLTAGE SENSE

GAIN = 200V/V353S2073

IMAX = 6A

AMPLIFIED AND FILTERED ISNS TO SMC

IMAX = 2.79V

IMAX = 35A

GAIN = 100V/V

353S2208

PLACE R CLOSE TO CPU

CPU Voltage Sense / Filter

IMAX = 0.9V

PLACE C CLOSE TO SMC

CPU CURRENT SENSE AMP & FILTER

PCB: PLACE R5364, C5362 WITHIN 1" OF SMC (U4900)

CPU 1.8V CURRENT SENSE

CPU 1.5V CURRENT SENSE

CPU VTT CURRENT SENSE

CPU 1.8V VOLTAGE SENSE

IMAX = 1.35A

WOULD PREFER A GAIN OF 150V/V

CPU VTT VOLTAGE SENSE

45 88

2

1 C5362

CERM-X5R

10%0.22UF6.3V

402

21

R53645.1K

MF-LF1/16W5%

402

21

C5360

402

16V20%

0.01UF

CERM

21

R5363

MF-LF1/16W

21K

402

1%

21

R5360

1%1/16WMF-LF402

10K64 89

5

2

4

1

3

U5360OPA348SC70-5

CRITICAL

2

1R5361

1/16W1%

MF-LF402

10K

3

1

6

4

5

2

U5300SC70

INA210

2

1 C5301

X5R402

0.22UF6.3V20%

43

21

R53000.002

1206MF-LF1/4W1%

2

1 C53000.22UF

X5R

20%6.3V

402

21

R5301

MF-LF1/16W

4.53K

402

1%

21

R5302

1/16WMF-LF402

4.53K

1%

2

1 C5302

402

20%6.3VX5R

0.22UF

2

1 C53110.22UF20%

402X5R6.3V

2

1 C5310

402X5R6.3V20%0.22UF

21

R53114.53K

1%

402

1/16WMF-LF

21

R53124.53K

1%

MF-LF1/16W

402

2

1 C53120.22UF20%

402X5R6.3V

2

1 C5321NOSTUFF

6.3VX5R402

20%0.22UF

21

R53224.53K

MF-LF1/16W1%

402

2

1 C53220.22UF6.3V20%

402X5R

2

1R5303NOSTUFF

MF-LF

5%10K

402

1/16W

3

1

6

4

5

2

U5310

CRITICAL

SC70INA214

2

1R5324

MF-LF1/16W

5%10K

402

43

21

R5309NOSTUFF

1%1/4WMF-LF1206

0.002

2

1R5307

1/16W

NOSTUFF

402MF-LF

05%

2

1R5308NOSTUFF

1/16W

402

5%

MF-LF

0

2

1R5305

MF-LF

5%01/16W

4022

1R53060

MF-LF1/16W

5%

402

4 3

2 1

R5319

0612

1%1WMF

0.0005

21

R5320

1/8W5%

0

805MF-LF

45 88 21

R5359

MF-LF

4.53K

402

1%1/16W

2

1 C5359

X5R

0.22UF20%6.3V

402

CPU POWER SENSESYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

PP1V5_S0_FET

GND_SMC_AVSS

SMC_CPU_1V8_ISENSE

PP1V8_S0_REG

PP1V8_S0_CPU

SENSE_CPU_VTT_P

PPVTT_S0_CPU

SENSE_CPU_1V5_S3_N

SMC_CPU_1V5_ISENSE

SENSE_CPU_1V5_P

SMC_CPU_1V8_VSENSE

VR_ISNS_CPU_N

VR_CPU_IMON VR_ISNS_CPU_P

=PP5V_S0_ISENSE

CPU_VCC_PKG_SENSE_P SMC_CPU_VSENSE

GND_SMC_AVSS

SENSE_CPU_1V5_S0_N

SENSE_CPU_1V5_S0_P

SMC_CPU_VTT_ISENSE_R

SNS_PS_CPU_ISNS

SMC_CPU_ISENSE

GND_SMC_AVSS

SMC_CPU_VTT_ISENSE

GND_SMC_AVSS

GND_SMC_AVSS

=PP3V3_S0_SMC

SENSE_CPU_VTT_N

PPVTT_S0_CPU_REG

GND_SMC_AVSS

SMC_CPU_VTT_VSENSECPU_VTTSENSE_P

SENSE_CPU_1V5_S3_P

PP1V5_S3_REG PP1V5_CPU_MEM

SMC_CPU_1V5_VSENSE

GND_SMC_AVSS

SENSE_CPU_1V5_N

=PP3V3_S0_SMC

SMC_CPU_1V5_ISENSE_R

GND_SMC_AVSS

53 OF 110

A.0.0

051-8600

49 OF 92

6 72

45 46 49 50 88

46 88

6 70

6 89

88

6 89

88

46 88

88

46 88

88

88

6

13 64 89

45 46 49 50 88

88

88

88

88

45 46 49 50 88

46 88

45 46 49 50 88

45 46 49 50 88

6 46 49 50

88

6 67

45 46 49 50 88

46 88 13 67 89

88

6 50 70 6 89

46 88

45 46 49 50 88

88

6 46 49 50

88

45 46 49 50 88

www.vinafix.vn

V+

REFIN+

IN- OUT

GND




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PLACE RC CLOSE TO SMC

GAIN = 200V/V

353S2073

IMAX = 6A

MXM PWRSRC VOLTAGE SENSEMXM PWRSRC CURRENT SENSE

IMAX = 11.3A

1.5V S3 VOLTAGE SENSE

2

1R5403

MF-LF

5%10K

402

1/16W

21

R5433MXM

MF-LF1/16W1%

18.2K

402

2

1 C5432MXM

0.22UF6.3VX5R402

20%

2

1R5434

MF-LF1/16W

1%6.04K

402

2

1 C5431MXM

0.22UF20%

402X5R6.3V

2

1R5432NOSTUFF

402

10K5%

1/16WMF-LF

21

R5431MXM

MF-LF1/16W

402

4.53K

1%

2

1 C5430MXM

402X5R6.3V20%0.22UF

43

21

R5430CRITICAL

1206MF1/4W1%

0.002

MXM

3

1

6

4

5

2

U5430INA210

SC70

MXM

21

R5402

MF-LF1/16W

402

4.53K

1%

2

1 C54020.22UF20%

402X5R6.3V

GRAPHICS / DIMM POWER SENSESYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PP1V5_S3_REG

GND_SMC_AVSS

SMC_DIMM_1V5_ISENSE

SMC_DIMM_1V5_VSENSE

GND_SMC_AVSS

MAKE_BASE=TRUEPPV_S0_MXM_PWRSRC

MXM_ISENSE_P

MXM_ISENSE_N SMC_GPU_ISENSE

GND_SMC_AVSS

SMC_MXM_ISENSE_R

=PP3V3_S0_SMC

SMC_GPU_VSENSE

GND_SMC_AVSS

=PPV_S0_MXM_PWR

=PPV_S0_MXM_PWRSRC

54 OF 110

A.0.0

051-8600

50 OF 92

6 49 70

45 46 49 50 88

46 88

46 88

45 46 49 50 88

89

88

88 45 88

45 46 49 50 88

88

6 46 49

45 88

45 46 49 50 88

6

73

www.vinafix.vn

DP2/DN3

DN2/DP3

DP1/DN6

DN1/DP6

GND

SMDATA

SMCLK

DN4/DP5

DP4/DN5

VDD

GND

V+

OUT

OUT

DN2/DP3

DP1

DN1

DP2/DN3

SMCLKGND

THERM*

SMDATA

VDD

ALERT*

BI

BI




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

518S0698

518S0677

is on csa 70 with power sequencingpower/gnd and ref for this dual part

Must pull high to 2.5V for compatibility with all drives

Cannot pull low because some drives use this bit todetermine 1.5 Gbps vs. 3.0 Gbps SATA

Drive disconnected = pulled highDrive asleep = HDD drives HDD_OOB_TEMP lowDrive active = valid signal protocol

FROM DRIVE:

LOW: -0.3V TO 0.5V

HIGH: 2.0V TO 3.6V

TO SMC

518S0678

SENSOR CH4

518S0678

SENSOR CH5

HDD OUT OF BAND TEMPERATURE SENSING LEVEL SHIFTINGREMOTE THERMAL SENSORS (HEATSINKS AND ODD)

Chan-1 is not used

I2C Address is 9A/9B

PLACE HSK SENSOR CONN. TOP SIDE NEAR MXM OR CPU

518S0698

REMOTE THERMAL SENSORS

518S0698

SENSOR CH2

SENSOR CH6SENSOR CH1

SENSOR CH3

518S0665

HEATSINKS, AMBIENT, PANEL AND ODD

353S2224

CPU T-DIODE THERMAL SENSOR

2

1C5504

402

50VCERM

0.0022UF10%

2

1C5503

50VCERM402

10%0.0022UF

2

1C5502

402CERM50V10%

0.0022UF

21

R5500

402

22

1/16WMF-LF

5%

2

1C5501

10%1UF

402-1X5R10V

21

L5552

0402

FERR-220-OHM

21

L5553

0402

FERR-220-OHM

21

L5554FERR-220-OHM

0402

21

L5522

0402

FERR-220-OHM

21

L5523FERR-220-OHM

0402

21

L5512MXM

0402

FERR-220-OHM

21

L5513

0402

FERR-220-OHM

MXM2

1

4

3

J5510M-ST-SM

53398-8602

CRITICAL

SILK_PART=CPU HSK

21

L5520FERR-220-OHM

0402

21

L5521

0402

FERR-220-OHM

21

L5510

0402

FERR-220-OHM

21

L5511

0402

FERR-220-OHM2

1

4

3

J5511SILK_PART=MXM HSK

MXM

53398-8602

CRITICAL

M-ST-SM

3

2

1

5

4

J5521SILK_PART=AMBIENT TEMP

53780-8603M-RT-SM

CRITICAL

1

9

10

6

8

4

2

7

5

3

U5500TSSOP

EMC10472AIZL

CRITICAL

2

1R5551

402

1K5%1/16WMF-LF

2

1R5554

402

62K

1/16W5%

MF-LF

21

R55503.3K

1/16W5%

402MF-LF

2

1R5553

402

200K

1/16W5%

MF-LF

8

1

3

2

4

U7030CRITICAL

SOI-HFLM393

2

1R553710K

MF-LF1/16W5%

402

CPU_TDIODE

2

1 C5535CPU_TDIODE

X5R402-1

10%1UF

10V

21

R553522

5%1/16WMF-LF

CPU_TDIODE

402

2

1

4

3

J5551M-RT-SM

53780-8602

SILK_PART=ODD TEMP

CRITICAL

2

1

4

3

J5520SILK_PART=LCD TEMP

53780-8602M-RT-SM

CRITICAL

2

1

4

3

J555053780-8602

SILK_PART=LCD TEMP

CRITICAL

M-RT-SM

2

1C5537CPU_TDIODE

10%

CERM

0.0022UF

402

50V

SIGNAL_MODEL=EMPTY

10 88

10 88

1

7

9

10

6

4

2

5

3 8

U5535EMC1403-2-AIZL

CPU_TDIODECRITICAL

TSSOP

48

48

2

1C5536

SIGNAL_MODEL=EMPTYNOSTUFF

CERM

0.0022UF10%

402

50V

2

1R5536

MF-LF402

1/16W5%

CPU_TDIODE

100K

2

1R5538

402MF-LF1/16W

CPU_TDIODE

5%10K

2

1R5539CPU_TDIODE

10K5%

402MF-LF1/16W

21

L5563FERR-220-OHM

0402

21

L5564

0402

FERR-220-OHM2

1

4

3

J5560

CRITICAL

SILK_PART=SKIN TEMP

M-RT-SM53261-8602


Thermal Sensors

EMC1403_PD2

SNS_CPU_THERMD_P

=SMB_CPU_THRM_SCL

=SMB_CPU_THRM_SDA

CPU_THMSNS_ALERT_L

CPU_THMSNS_THERM_L

PP3V3_S0_CPU_THMSNS

VOLTAGE=3.3V


=PP3V3_S0_TSENS

EMC1403_PD1

SNS_SKIN_P

SNS_AMB_N

SNS_SKIN_NSNS_ODD_N

SNS_LCD_P

SNS_T_DP1_DN6DIFFERENTIAL_PAIR=SNS_T1

SNS_T_DN4_DP5

SNS_T_DP1_DN6 SNS_T_DN1_DP6

SNS_T_DP1_DN6

SNS_ODD_P

SNS_T_DN1_DP6

SNS_CPU_THERMD_N

DIFFERENTIAL_PAIR=SNS_T3SNS_T_DN4_DP5

=PP3V3_S0_TSENS

HDD_OOB_TEMP

PP3V3_S0_TSENS_RVOLTAGE=3.3V


SNS_T_DN1_DP6DIFFERENTIAL_PAIR=SNS_T1

DIFFERENTIAL_PAIR=SNS_T2SNS_T_DP2_DN3

DIFFERENTIAL_PAIR=SNS_T3SNS_T_DP4_DN5

DIFFERENTIAL_PAIR=SNS_T2SNS_T_DN2_DP3

SNS_CPU_H_P

SNS_T_DN4_DP5

SNS_CPU_H_N

SNS_T_DN2_DP3

SNS_T_DP2_DN3 SNS_T_DN2_DP3

SNS_T_DP2_DN3

SNS_T_DP4_DN5

=SMB_REMOTE_TEMP_SCL

SNS_MXM_P

SNS_MXM_N

=SMB_REMOTE_TEMP_SDA

SNS_T_DP4_DN5

1V60_COMP_REF

HDD_OOB_TEMP_R

=PP3V3_S0_SMC_LS

MAKE_BASE=TRUESMC_HDD_OOB_TEMP SMC_EXCARD_CP

SNS_AMB_P

SNS_LCD_N

HDD_OOB_TEMP_FILT

55 OF 110

A.0.0

051-8600

51 OF 92

6 51

88 92

88 92

88 92 88 92

88 92

51 88

51 88

51 88 51 88

51 88

88 92

51 88

51 88

6 51

88

89

51 88

51 88

51 88

51 88

88

51 88

88

51 88

51 88 51 88

51 88

51 88

48

88

88

48

51 88

63

88

6 46

88 45

88 92

88 92

88 92

www.vinafix.vn

G S

D

G S

D




36

BRANCH

REVISION

DRAWING NUMBER SIZE

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C

345678

D

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8 7 5 4 2 1

TACH

ODD FAN

12V DC

12V DC

FAN 0

HD FAN

NOTE: ADDED TO PROTECT SMC

FAN 1

GND

MOTOR CONTROL

TACH

GND

MOTOR CONTROL

518S0730

518S0730

2

1R5600

402MF-LF1/16W

10K5%

2

1R5601

MF-LF

5%10K1/16W

402

2

1R5602

1206MF-LF1/4W

1.5K5%

5

4

876321

Q5600NTHS5443T1H

CRITICAL

1206A-03-HF

2

1R5603

805

5%1/8WMF-LF

1.5K

3

1

D5600

SOT23

MMBD914XG

2

1 C5601

805

16V10%

X7R

0.47UF

21

R56053.9K

MF-LF

5%1/8W

805

2

1R56065%

402

10K1/16WMF-LF

5

4

876321

Q5603NTHS5443T1H

CRITICAL

1206A-03-HF

2

1R5607

805MF-LF

5%1.5K1/8W

2

1 C560316VX7R805

10%0.47UF

21

R56093.9K

MF-LF1/8W5%

805

3

1

D5601MMBD914XGSOT23

2

1R56101/4W

1206

5%

MF-LF

1.5K2

1R561110K

MF-LF402

5%1/16W

21

R5699

MF-LF

5%

47K

1/16W

402

21

R569847K

5%1/16WMF-LF402

2

1

3

Q56022N7002SOT23-HF1

2

1

3

Q56052N7002SOT23-HF1

2

1 C560220%

CRITICAL

16VELEC6.3X5.5-SM1-HF

100UF

4

3

2

1

6

5

J5601CRITICAL

53780-8604M-RT-SM

4

3

2

1

6

5

J5600CRITICAL

M-RT-SM53780-8604

2

1 C5607

402

20%

CERM16V

0.01UF2

1 C560620%

CERM1206-1

16V

4.7UF

2

1 C560916V20%0.01UF

402CERM2

1 C5608

X5R603

10%16V

2.2UF

21

L5600

0402

CRITICAL

FERR-220-OHM

21

L5601

0402

FERR-220-OHM

CRITICAL

21

L5610220-OHM-1.4A

CRITICAL

0603

21

L5620220-OHM-1.4A

0603

CRITICAL

21

L5630CRITICAL

220-OHM-1.4A

0603

21

L5640220-OHM-1.4A

0603

CRITICAL

2

1R5620

MF-LF1/10W5%0

603

PLACEMENT_NOTE=PLACE R5620 CLOSE TO J5600 Pin3

2

1R56300

603MF-LF1/10W5%


2

1 C562816V10%2.2UF

603X5R

2

1 C5605CRITICAL

20%16VELEC6.3X5.5-SM1-HF

100UF

HD AND OD FANSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

FAN_TACH0_L


PP12V_S0_FAN1_LMIN_LINE_WIDTH=0.5MM

VOLTAGE=12V

VOLTAGE=12V

MIN_LINE_WIDTH=0.5MMPP12V_S0_FAN0_L


FAN_1_GNDMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

FAN_0_GNDMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

SMC_FAN_1_CTL

FAN_TACH0


FAN_0_PWR

F1_GATESLOWDN

=PP3V3_S0_FAN

SMC_FAN_1_TACH

SMC_FAN_0_TACH

F1_VOLTAGE8R5

=PP3V3_S0_FAN

=PP3V3_S0_FAN

=PP3V3_S0_FAN

FAN_TACH1

F0_GATESLOWDN

=PP12V_S0_FAN

SMC_FAN_0_CTL


FAN_0_PWR_L

FAN_1_PWR


FAN_TACH1_L

FAN_1_PWR_L


F0_VOLTAGE8R5

=PP12V_S0_FAN

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89 92

89 92

92

92

45

6 52 53

45

45

6 52 53

6 52 53

6 52 53

6 52 53

45

92

92

92

6 52 53

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G S

D




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D

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8 7 5 4 2 1

MOTOR CONTROL

12V DC

TACH

GND

518S0730

CPU FAN

FAN 2

2

1

3

Q5702SOT23-HF12N7002

2

1 C5702100UF20%16VELEC6.3X5.5-SM1-HF

CRITICAL

2

1 C57084.7UF

1206-1CERM16V20%

2

1 C5709

402CERM

0.01UF16V20%

21

L5701

0402

FERR-220-OHM

CRITICAL

21

L5710

0603

220-OHM-1.4A

CRITICAL

21

L5720

0603

CRITICAL

220-OHM-1.4A

2

1R5720


603

1/10W5%0

MF-LF

4

3

2

1

6

5

J5700M-RT-SM

53780-8604

CRITICAL

2

1R57001/16WMF-LF402

5%10K

5

4

876321

Q5700NTHS5443T1H1206A-03-HF

CRITICAL

3

1

D5700SOT23MMBD914XG

2

1R5701

MF-LF

1.5K5%

805

1/8W

2

1 C5701

805X7R16V10%0.47UF

21

R5703

1/8W5%

3.9K

MF-LF805

2

1R57045%1/4W

1.5K

1206MF-LF

2

1R5705

1/16W5%

402

10K

MF-LF

21

R579747K

5%1/16WMF-LF402

CPU FANSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

FAN_TACH2

=PP3V3_S0_FAN

=PP12V_S0_FAN

=PP3V3_S0_FAN

SMC_FAN_2_CTL

SMC_FAN_2_TACH


FAN_2_PWR_L


F2_VOLTAGE8R5

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFAN_2_GND


FAN_2_PWR

F2_GATESLOWDN

FAN_TACH2_L

VOLTAGE=12V


PP12V_S0_FAN2_L

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6 52 53

6 52

6 52 53

45

45

92

92

92

89 92

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OUTIN

IN IN

WP*

SI

HOLD*VSS

SCK

CE*

VDD

SO




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8 7 5 4 2 1

2

1C6100

402

20%

CERM

0.1UF

10V

2

1R6101

402MF-LF

3.3K5%1/16W

2

1R6100

402

3.3K

MF-LF

5%1/16W

18 47 85 47 85

18 47 85 18 47 85

21

R61050

1/16W5%

MF-LF402

21

R6152

PLACEMENT_NOTE=PLACE CLOSE TO U6100

402

0

1/16W5%

MF-LF

21

R6150

PLACEMENT_NOTE=PLACE CLOSE TO U6100

MF-LF

5%1/16W

0

402

3

48

2

56

7

1

U6100

SST25VF032B

32MBIT

OMIT

CRITICAL

SOIC


SPI ROMSYNC_DATE=04/14/2010

SPI_CLK_R SPI_MOSI_R

SPI_MISO

SPI_CLK

SPI_MISO_RSPI_WP_L

SPI_MLB_CS_L

SPI_MOSI

=PP3V3_S5_ROM

SPI_HOLD_L

61 OF 110

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85

85

85

6 47

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IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

OUT

NR/FB

NC

IN

EN

GND

IN

OUT

IN

IN

OUT

IN

VL_HD

SENSE_A

GPIO1/DMIC_SDA2

GPIO0/DMIC_SDA1

VHP_FILT+

GPIO2

RESET*

LINEOUT_L1-

VBIAS_DAC

FLYP

VA_REFVD

GPIO3

VHP_FILT-

LINEOUT_R1-

LINEOUT_R1+

LINEOUT_R2-

SPDIF_OUT

LINEIN_C-

FLYC

FLYN

SPDIF_IN

LINEOUT_L1+

THRM_PAD

VA_HP

HPOUT_R

HPREF

VCOM

AGND

VA

LINEIN_R+

LINEIN_L+

MICIN_L+

MICIN_L-

MICBIAS

SYNC

DGND

DMIC_SCL

HPOUT_L

SDI

SDO

VL_IF

BITCLK

MICIN_R-

MICIN_R+

VREF+_ADC

LINEOUT_L2+

LINEOUT_L2-

LINEOUT_R2+

/SPDIF_OUT2IN




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8 7 5 4 2 1

4.5V POWER SUPPLY FOR CODEC

DAC1 FSOUTPUT= 1.34VRMS

DIFF FSINPUT= 2.45VRMS

APPLE P/N 353S2456

NC

DAC2/3 FSOUTPUTSE= 1.34VRMS

HP OUT ZOBEL NETWORK

SE FSINPUT= 1.22VRMS

DAC2/3 FSOUTPUTDIFF= 2.67VRMSNCNC

NC

NC

NC

NC

NC

K22 = NC

APPLE P/N 353S2592

K23 LOW = S/PDIF IN, HIGH = DP SPDIF

AUDIO CODEC

21

XW6201SM

2

1C6206

6.3V

2.2UF

402-LF

20%

CERM 2

1 C62082.2UF

402-LF

20%6.3VCERM

2

1C6211

20VTANT

1UF10%

CRITICAL

CASE-P3-HF

2

1C62034.7UF4VX5R402

20%

18 85

18 85

18 85

18 85

18 85

60

57 58 61

57 61

55 56

55 56

57

57

58

58

60

56

56

61

61

60

60

2

1 C621320%

CRITICAL

6.3V

603X5R

10UF

56

56

21

L6201FERR-220-OHM

0402

21

R6201

1/16WMF-LF402

1%

2.21K

2

1 C6201

402-1

1UF

X5R

10%10V

2

1C62640.47UF

10%10VX5R402

2

1 C6258

402

10VX5R

10%0.47UF

2

1C6265

X5R402

10%10V

0.47UF

2

1R6255

402MF-LF

2.67K1/16W1%

2

1R6263NOSTUFF

MF-LF

05%

402

1/16W 2

1R6267NOSTUFF

100K5%

402MF-LF1/16W

21

R6254

402

5%

MF-LF

22

1/16W

2

1C6261

X5R

10%10V

402

0.47UF

2

1 C6263CRITICAL

10UF

CASE-B2-SMPOLY-TANT

20%16V

2

1 C6262

CASE-B2-SM

16V20%

POLY-TANT

10UF2

1C6260

16V

10UF20%

CASE-B2-SMPOLY-TANT

6 55 61

6 55 57 58 59 60 61

55 89

55 89

59

55 89

6 55 57 58 59 60 61

6 55 61

2

1C62591UF

402-1

10%10VX5R

1

3

6

2

4

VR6201

CRITICAL

SONTPS71745

2

1C6266

16VX7R-CERM

402

10%0.1UF

2

1R6299

MF-LF402

5%100K

BETTER

1/16W

2

1R6298EDUCATION

1/16WMF-LF

5%10K

402

6 55 57 58 59 60 61

55

21

R6257

402

22

1/16W5%

MF-LF

2

1R6296

MF-LF

5%39

402

1/16W

2

1R6297

402MF-LF1/16W

5%39

2

1C62980.1UF

X7R-CERM

10%16V

4022

1C6297

X7R-CERM

0.1UF16V

402

10%

55 56

55 56

59 85

81

2

1R6295

1/16W

402

100K1%

MF-LF

2

1C6204

X5R6.3V20%

10UF

603

27

1

3

44

41

9

28

29

24

46

25

49

10

48

47

13

5

8

1119

20

18

17

16

32

33

36

37

31

30

35

34

23

21

22

39

40

38

15

14

12

2

45

42

43

4

7

6

26

U6201CRITICAL

QFNCS4206ACNZC

55

2

1 C620510UF

X5R6.3V20%

603

2

1 C6202

402-1

1UF

X5R

10%10V

2

1 C6207

402-1

1UF

X5R

10%10V


AUDIO: CODEC/REGULATOR


4V5_REG_IN

VOLTAGE=4.5V

AUD_LO1_P_LTP_AUD_LO1_N_L

AUD_LO1_P_R

AUD_LI_COMMAKE_BASE=TRUE

AUD_LI_P_L

TP_AUD_LO1_N_R

AUD_LO2_P_RTP_AUD_LO2_N_R

TP_AUD_LO2_N_LCS4206_FLYP

PP4V5_AUDIO_ANALOG

AUD_LO2_P_L

CS4206_FLYN

AUD_MIC_INP_L

AUD_MIC_INN_RAUD_MIC_INP_R

AUD_SPDIF_OUT

GND_AUDIO_HP_AMP_L

GND_AUDIO_HP_AMP_L


AUD_Z_L

AUD_LI_N_L

=PP3V3_S0_AUDIO

=PP5V_S0_AUDIO

AUD_HP_PORT_RMIN_LINE_WIDTH=0.30MMMIN_NECK_WIDTH=0.20MM

HDA_SDIN0AUD_LI_N_R

4V5_NR

AUD_Z_R


AUD_HP_PORT_L


AUD_GPIO_1

=PP5V_S0_AUDIO

MIN_NECK_WIDTH=0.20MM AUD_HP_PORT_RMIN_LINE_WIDTH=0.30MM

4V5_REG_EN

=PP3V3_S0_AUDIO

AUD_SPDIF_IN_CODEC

PP4V5_AUDIO_ANALOG

VOLTAGE=4.5V


GND_AUDIO_CODEC

CS4206_FN

CS4206_FLYC

AUD_GPIO_3

VBIAS_DAC

VOLTAGE=4.5V


PP4V5_AUDIO_ANALOG

=PP1V5_S0_AUD_DIG

GND_AUDIO_HP_AMP_L

AUD_MUX_CNTRL

AUD_GPIO_2

AUD_SENSE_A

AUD_CODEC_MICBIAS

TP_AUD_DMIC_CLK

CS4206_VREF_ADC

AUD_MIC_INN_L

CS4206_VCOM

AUD_LI_P_R

AUD_GPIO_1

CS4206_FP

=PP3V3_S0_AUDIO

AUD_HP_PORT_REFMIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM

MIN_NECK_WIDTH=0.20MM AUD_HP_PORT_LMIN_LINE_WIDTH=0.30MM

GND_AUDIO_CODEC

VOLTAGE=0VGND_AUDIO_HP_AMP_L

HDA_RST_LHDA_SDOUT

AUD_SDI_R

HDA_SYNC

HDA_BIT_CLK

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.2MMVOLTAGE=0V

GND_AUDIO_CODEC

AUD_SPDIF_CHIP

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89

55 56 59

55 56 59

91

55 56 57 58 60 61

6

55 56 59

81

55 56 57 58 60 61

55 56 59

85

55 56 57 58 60 61

85

www.vinafix.vn

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN




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8 7 5 4 2 1

NET RIN = 18K OHMS

FC = 5 HZ Max

1ST ORDER DAC FILTER PLACEHOLDER

VIN = 2VRMS, CODEC VIN = 1.14 VRMS

CODEC Nom SE RIN = 20K OHMS

21

R6324

603

5%1/10WMF-LF

0

2

1C6320

NOSTUFFCRITICAL

603

50V5%

C0G-CERM

2200PF

2

1C6321

NOSTUFF

5%50V

C0G-CERM

2200PF

CRITICAL

603

55

55

59

59 21

R6325

1/10W5%

0

MF-LF603

55 59

55

55

55

55

21

C6300CRITICAL

3.3UF

10V10%

CERM-X5R805-1

21

C6302

CERM-X5R

3.3UF

10%

805-1

10V

CRITICAL

21

C6303CRITICAL

805-1

3.3UF

CERM-X5R

10%10V

21

C6305

CERM-X5R

CRITICAL

10V

3.3UF

805-1

10%

59

56 59

55 57 58 60 61

59

56 59

2

1R6303

402

101%1/16WMF-LF

21

R6300

402

1/16W

7.87K

MF-LF

1%

2

1R63011%

MF-LF402

21.5K1/16W

2

1R630521.5K

1%

MF-LF402

1/16W

21

R6306

402MF-LF1/16W1%

7.87K

2

1 C630410%820PF

CERM50V

NOSTUFF

402

2

1 C630110%820PF50V

NOSTUFF

CERM402

AUDIO: FILTER/BUFFERSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB


AUD_LI_GND

MIN_LINE_WIDTH=.3MMMIN_NECK_WIDTH=.2MM

AUD_LI_RF


AUD_LI_GND

MIN_NECK_WIDTH=.2MMMIN_LINE_WIDTH=.3MM

AUD_LI_LF

AUD_LI_P_R



AUD_LI_R


AUD_HP_PORT_L AUD_HP_L


AUD_HP_PORT_R

GND_AUDIO_HP_AMP_L

AUD_HP_R


GND_AUDIO_CODEC


AUD_LI_L AUD_LI_P_L

MIN_NECK_WIDTH=.2MMMIN_LINE_WIDTH=.3MM

AUD_LI_N_L



AUD_LI_N_R

63 OF 110

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IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

REG

VS

C1P

BOOT

C1N

OUTL1-

OUTL1+

OUTL2-

OUTL2+

OUTR1-

OUTR1+

OUTR2-

OUTR2+

NC1

NC2

NC3

FBL

COM

INL

INR

FBR

MONO

SHDN*

MOD

REGEN

MUTE*

THMPGNDAGND

PVDD

PAD




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8 7 5 4 2 1

RIN = 17.4 OHMS

TURN ON TIME: 110MSTURN ON DELAY: 150MS

FC = 19.5 HZAMP VOUT = 7.355VRMS

GAIN = -4.8(20K/17.4K)

MAX9736B APN:353S2042TWEETER SPEAKER AMPLIFIER

CODEC OUT = 1.335VRMS

POUT = 6.76 W INTO 8 OHMS @ 1% THD+N

2

1 C6405

10V

1UF

X5R

10%

402-1

21

C6413

NOSTUFF10%50VX7R

0.001UF

402

21

R640320.0K

1/16W

402MF-LF

1%

2

1 C6404100PF5%

CERM50V

402

21

R6402

402

1%

17.4K

1/16WMF-LF

21

R6404

402

0

5%1/16WMF-LF

58 60 89

57 58 60

21

C6496

10V

402

0.47UF

10%

X5R

57 58 60

55

21

C6495

10VX5R402

10%

0.47UF55

6 55 57 58 59 60 61

6 55 57 58 59 60 61

55 58 61

57 58 60

2

1C649920%

220UF

SM-CASE-C1-HFELEC16V

2

1R6406

MF-LF1/16W5%100K

402

21

R64050

MF-LF402

5%1/16W

21

R6407NOSTUFF

1/16W5%

402MF-LF

055 61

59 85 92

59 85 92

59 85 92

59 85 92

21

L6400180-OHM-1.5A

0603-LF

CRITICAL

2

1 C6409

NP0-C0G

5%1000PF25V

402

2

1C6408

25V

402NP0-C0G

5%1000PF

21

L6402CRITICAL

180-OHM-1.5A

0603-LF

21

L6401180-OHM-1.5A

CRITICAL

0603-LF

2

1 C64110.1UF

603-1

10%50VX7R

2

1C640120%16V

603CERM

0.1UF

2

1C64061000PF

5%

NP0-C0G402

25V

2

1 C6407

402

25V

1000PF5%

NP0-C0G

21

L6403CRITICAL

0603-LF

180-OHM-1.5A

2

1 C64100.1UF

X7R-CERM50V10%

805

16

10

11

15

30

27

29

28

26

24

25

23

32

2

31

1

17

8

7

9

4

20

18

6

19

5

33

12

22

21

3

14

13

U6400MAX9736BETJ+

CRITICAL

TQFN

2

1C640210%10V

1UF

X5R402-1

2

1C6403

10V

1UF10%

X5R402-1

21

C6412NOSTUFF

10%50VX7R

0.001UF

402

21

R640020.0K

1/16WMF-LF402

1%

21

R6401

402

1%

17.4K

MF-LF1/16W

AUDIO: Tweeter Amp 1SYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

0.5MM0.2MMAUD_R_P1

AUD_MAX9736_1COM

AUD_MAX9736_1FBRAUD_MAX9736_1INR

=PP3V3_S0_AUDIO

GND_AUDIO_SPKRAMP_PLANE

MAX9736_INT_1REG


PP12V_AUD_SPKRAMP_PLANE




L01_P_L

AUD_MAX9736_1INL

AUD_MAX9736_1VREG



AUD_R_N1


AUDSAMPCPN1MIN_LINE_WIDTH=0.2MM

AUDSAMPCPP1



L01_P_R

AUD_LO1_P_L


AUD_LO1_P_R





AUD_MAX9736_1FBL

AUD_SPKRAMP_1SHDN_L=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_GPIO_3

AUD_GPIO_2

AUD_SPKRAMP_1MUTE_L

AUD_BOOT1

0.2MM0.5MMAUD_L_N1


AUD_L_P1 AUD_SPKR_OUTLO1L_POUT

AUD_SPKR_OUTLO1L_NOUT

AUD_SPKR_OUTLO1R_POUT

AUD_SPKR_OUTLO1R_NOUT

64 OF 110

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REG

VS

C1P

BOOT

C1N

OUTL1-

OUTL1+

OUTL2-

OUTL2+

OUTR1-

OUTR1+

OUTR2-

OUTR2+

NC1

NC2

NC3

FBL

COM

INL

INR

FBR

MONO

SHDN*

MOD

REGEN

MUTE*

THMPGNDAGND

PVDD

PAD

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN




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PAGE


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C

345678

D

B

8 7 5 4 2 1

RIN = 17.4 OHMS

WOOFER SPEAKER AMPLIFIERMAX9736B APN:353S2042

POUT = 6.76 W INTO 8 OHMS @ 1% THD+N

CODEC OUT = 1.335VRMSFC = 19.5 HZ

TURN ON DELAY: 150MSGAIN = -4.8(20K/17.4K)TURN ON TIME: 110MS

AMP VOUT = 7.355VRMS

2

1C6506

NP0-C0G

1000PF5%

402

25V

2

1 C65100.1UF

X7R-CERM50V

805

10%

16

10

11

15

30

27

29

28

26

24

25

23

32

2

31

1

17

8

7

9

4

20

18

6

19

5

33

12

22

21

3

14

13

U6500

CRITICAL

MAX9736BETJ+TQFN

2

1 C6504100PF5%

CERM50V

402

21

R65050

MF-LF402

5%1/16W

2

1C6501

CERM

20%16V

603

0.1UF

2

1C6502

10V

1UF

X5R

10%

402-1

21

L6500180-OHM-1.5A

0603-LF

CRITICAL

21

L6503CRITICAL

0603-LF

180-OHM-1.5A

2

1 C65110.1UF

603-1

10%50VX7R

21

R6504

MF-LF1/16W5%

0

402

2

1 C6509

402

25V

1000PF5%

NP0-C0G

59 85 92

59 85 92

59 85 92

59 85 92

21

L6501CRITICAL180-OHM-1.5A

0603-LF

21

L6502180-OHM-1.5A

0603-LF

CRITICAL

2

1C6508

25V

402NP0-C0G

5%1000PF

2

1 C6507

402

25V

1000PF5%

NP0-C0G

21

R6501

1/16WMF-LF402

1%

17.4K21

R650020.0K

1/16WMF-LF402

1%

21

R6502

402

1%

17.4K

1/16WMF-LF

21

R650320.0K

1/16W

402MF-LF

1%

21

C6512

50V

0.001UF

NO STUFF

10%

X7R402

21

C6513

NO STUFF10%50VX7R402

0.001UF

57 60 89

55

55

6 55 57 58 59 60 61

6 55 57 58 59 60 61

55 57 61

57 58 60

57 58 60

57 58 60

21

C6596

10V

402

0.47UF

10%

X5R

21

C6595

10%

402

10VX5R

0.47UF

2

1C6503

10V

1UF10%

X5R402-1

2

1 C6505

10V

1UF

X5R

10%

402-1

2

1C659920%

220UF

SM-CASE-C1-HFELEC16V

2

1R6506100K5%1/16WMF-LF402


AUDIO: Woofer Amp




AUD_MAX9736_INL AUD_BOOT

AUD_MAX9736_FBRAUD_MAX9736_INR

AUD_MAX9736_COM

AUD_MAX9736_FBL

L02_P_L



AUD_MAX9736_VREG

MAX9736_INT_REG



AUD_L_POUT

0.2MM0.5MMAUD_L_NOUT

AUD_LO2_P_R


L02_P_R



AUD_R_NOUT

AUDSAMPCPPMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM


AUD_LO2_P_L



AUDSAMPCPN

=PP3V3_S0_AUDIO AUD_SPKRAMP_SHDN_L

0.5MM0.2MMAUD_R_POUT

AUD_SPKRAMP_MUTE_L

=PP3V3_S0_AUDIO

AUD_GPIO_3

GND_AUDIO_CODEC




VOLTAGE=12V


AUD_SPKR_OUTLO2L_POUT

AUD_SPKR_OUTLO2L_NOUT



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IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

INOUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT




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345678

D

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8 7 5 4 2 1

PROPERTIES FOR ALL SPKR NETS

APPLE P/N 518S0677 INTERNAL MIC CON APPLE P/N 518S0748

APPLE P/N 518S0656

SPEAKER CABLE CONNECTORS

REMOTE I/O CONNECTOR

TWEETER (SECONDARY)

WOOFER (PRIMARY)WOOFER (PRIMARY)

PROPERTIES FOR ALL SPKR NETS

TWEETER (SECONDARY)

NC

APPLE P/N 518S0723

PP3V3_AUDIO_SPDIF_JACK

AUD_LI_GND_JACK

AUD_HP_GND_JACK

21

L6602FERR-1000-OHM

0402

21

L6600

0402

FERR-1000-OHM

21

L6603

0402

FERR-1000-OHM

21

L6601FERR-1000-OHM

0402

21

L6604FERR-1000-OHM

0402

2

1

DZ6600CRITICAL

6.8V-100PF402

2

1

DZ66016.8V-100PF402

CRITICAL

2

1

DZ6613CRITICAL

4026.8V-100PF

2

1

DZ66116.8V-100PF402

CRITICAL2

1

DZ6605CRITICAL

4026.8V-100PF

2

1

DZ66096.8V-100PF

CRITICAL

402

21

L6614FERR-1000-OHM

0402

2

1

DZ6604402

CRITICAL

6.8V-100PF

2

1

DZ6607CRITICAL

4026.8V-100PF

55 85

60

6 55 57 58 60 61

57 85 92

58 85 92

58 85 92

57 85 92

57 85 92

57 85 92

58 85 92

58 85 92

60 86

60 86

2

1R6600

1/16W

0

402MF-LF

5%

2

1 C6601

10VX5R

10%0.47UF

402

21

L6607FERR-1000-OHM

0402

56

21

L6608FERR-1000-OHM

0402

56

21

L6609FERR-1000-OHM

0402

61

61

55 56

60

2

1

DZ6614402

CRITICAL

6.8V-100PF

2

1

DZ6612CRITICAL

4026.8V-100PF

2

1

DZ66106.8V-100PF

402

CRITICAL2

1

DZ66086.8V-100PF

402

CRITICAL2

1

DZ66066.8V-100PF

402

CRITICAL

2

1

DZ6615CRITICAL

4026.8V-100PF

2

1

DZ66036.8V-100PF402

CRITICAL

2

1C6600

10VX5R

402-1

1UF10%

21

L6615FERR-1000-OHM

0402

3

2

1

5

4

J660153780-8603

CRITICAL

M-RT-SM

9

8

7

6

5

4

3

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J660020143-020E-20F

CRITICAL

F-RT-SM

21

L6605

0402

FERR-1000-OHM

21

R6601

5%1/16W

402

22

MF-LF

81 85

60

21

L6606FERR-1000-OHM

0402

21

L6612

0402

FERR-1000-OHM

21

L6613

0402

FERR-1000-OHM

55

60

56

56

56

21

XW6617

SM

21

R6617

MF-LF603

5%

0

1/10W

21

R6610

603

5%

0

1/10WMF-LF

21

L6616220-OHM-0.7A-0.28-OHM

0402

21

L6618220-OHM-0.7A-0.28-OHM

0402

5

4

3

2

1

J6603CRITICAL

M-RT-SM78048-0573

4

3

2

1

J6602M-RT-SM

78048-0473

CRITICAL


Audio: MLB to I/O Conn.

AUD_SPKR_OUTLO1L_NOUTAUD_SPKR_OUTLO1L_POUT


AUD_SPKR_OUTLO2L_NOUTAUD_SPKR_OUTLO2R_NOUTAUD_SPKR_OUTLO2R_POUT

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM AUD_HP_GND_JACKAUD_HP_L_JACKMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM

MIN_LINE_WIDTH=0.2MM VOLTAGE=3.3VMIN_NECK_WIDTH=0.1MM PP3V3_AUDIO_SPDIF_JACK

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM AUD_HP_TIPDET_JACK

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM HS_MIC_HI_JACKMIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM HS_MIC_LO_JACK



AUD_SPDIF_OUT_JACK

MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MM AUD_LI_DET_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM AUD_LI_L_JACK


AUD_SPKR_OUTLO2L_POUT

NC_J6702_3NO_TEST

MIN_NECK_WIDTH=0.1MMVOLTAGE=0VMIN_LINE_WIDTH=0.2MM

GND_AUDIO_MIC1_CONN

AUD_SPDIFIN_JACK

MIN_NECK_WIDTH=0.2MM AUD_LI_GND_JACKMIN_LINE_WIDTH=0.3MM

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM AUD_LI_R_JACK

AUD_MIC_IN1_P_CONN


GND_AUDIO_HP_AMP_LMIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MM


AUD_HP_PORT_REF

AUD_HP_TYPEDET_JACKMIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM

AUD_HP_R


AUD_HP_L


AUD_HP_TIP_DET


AUD_LI_R


AUD_LI_TIP_DET

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMAUD_LI_GND

MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.1MMAUD_IP_PERPH_DET

HS_MIC_LOVOLTAGE=0VMIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.15MM

AUD_SPDIF_OUT


AUD_HP_TYPE

AUD_LI_L


HS_MIC_HI


AUD_SPDIF_IN

AUD_MIC_IN1_N_EMI


AUD_MIC_IN1_P_EMI


AUD_MIC1_IN_N

=PP3V3_S0_AUDIO

AUD_MIC1_IN_P


AUD_MIC_IN1_N_CONN

AUD_HP_R_JACKMIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_IP_PERPH_JACKMIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MM

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G

S

D

G

S

D

G

S

D

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN OUT

OUT

OUT

IN

OUT

OUT

G

S

D

IN

IN

G

S

D

G

S

D

IN

G

S

D

G

S

D

IN




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SHEET

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PAGE


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B

C

345678

D

B

8 7 5 4 2 1

Internal Microphone Impedance Matching Audio Ground Returns

IPHS HS Detect Debounce CKT

LI Insert DetectDigital Out Headphone Out

DP Audio Enable

NCNC

Place Across Ground Split

21

C67950.1UF

402

16VX5R

10%

21

XW6702SM

21

XW6705OMITSM21

R67432.2K

5%

402MF-LF1/16W

21

XW6703SM OMIT

21

XW6704SM OMIT

21

L6738

SM-1

FERR-250-OHM

21

L6739

SM-1

FERR-250-OHM

1

2

6

Q6700SOT-563-HFNTZD3154NT1H

1

2

6


4

5

3


2

1R6790

MF-LF1/16W5%100K

4022

1R67955%

402

1/16W

100K

MF-LF

2

1C6750

402

10%25V

0.0082UF

X7R

2

1R6744

1/16W

39.2K

MF-LF

1%

4022

1R6794

MF

CRITICAL

20K1/16W

402

0.1%

20 21

R6799

MF-LF1/16W5%

0

402

2

1 C6797

16V10%

NOSTUFF

X5R402

0.1UF

21

R67960

1/16WMF-LF402

5%

2

1R6701

1/16W

402

1%10K

MF-LF

21

C6796

10%

X5R402

16V

0.1UF2

1R6791

MF-LF402

1/16W5%100K

59 86

59 86

55 60

6 55 57 58 59 60 61

59

59

6 55 57 58 59 60 61

55 60

59

55 60

6 57 58 89

57 58

55 56 57 58 60 61

2

1R6798

402

100K

MF-LF

5%1/16W

55

2

1C6751

603-HF

6.3V20%

TANT

4.7UF

CRITICAL

21

R6747

402

5%

0

MF-LF

NOSTUFF

1/16W

55

55

2

1R67933.40K

MF-LF1/16W1%

402

2

1R67923.40K

402

1/16W1%

MF-LF

4

5

3

Q6701NTZD3154NT1HSOT-563-HF

2

1R6797

MF-LF

5%100K

402

1/16W

21

R6700

1%1/16WMF-LF402

17.4K

2

1 C6740

16VX5R402

10%0.1UF

59

21

R6732NOSTUFF

402

5%

0

MF-LF1/16W

2

1R6731

402MF-LF1/16W5%0

2

1R67305%

MF-LF402

1/16W

100K

6 55 57 58 59 60 61

1

2

6


4

5

3


2

1R6762

402

100K5%1/16WMF-LF

6 55 57 58 59 60 61

2

1R6768

1/16W5%

MF-LF402

10K

1

2

6


4

5

3


81

21

R6748

402

5%

0

MF-LF

NOSTUFF

1/16W

21

R6749

1/16W

NOSTUFF

MF-LF

0

5%

402

AUDIO: Detects/GroundingSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

GND_AUDIO_CODEC

AUD_MIC_INN_R


AUD_SENSE_AAUD_SENSE_A

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_IP_PERPH_DET_DB

AUD_MIC1_IN_P


=PP3V3_S0_AUDIO

AUD_IP_PERPH_DET AUD_IP_PER_DEB

AUD_IP_PERPH_DET_INV

AUD_IP_PERIPHERAL_DET

=PP12V_S0_AUDIO_SPKRAMP


VOLTAGE=12VMIN_NECK_WIDTH=0.2MM


=PP3V3_S0_AUDIO

AUD_HP_TIP_DET

=PP3V3_S0_AUDIO

AUD_SENSE_A

GND_AUDIO_CODEC

AUD_Q6702_D3 AUD_Q6701_D6

GND_AUDIO_CODEC

GND_AUDIO_CODEC

AUD_MIC1_IN_G


AUD_MIC1_IN_N



AUD_CODEC_MICBIAS


GND_AUDIO_CODEC


AUD_MIC_INP_R

=PP3V3_S0_AUDIO

AUD_IP_PERPH_DET_R

AUD_LI_TIP_DAUD_LI_TIP_DET

MUX_CNTRL

AUD_HP_TYPE

AUD_HP_TIP_DET_INV

AUD_HP_TYPE_INV

AUD_LI_TIP_DET_INV


AUD_INTMICBIAS




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IN

BI

OUT

IN

IN

IN

OUT

OUT

IN

INOUT

OUTIN

IN

GND THMENABLE

AVDD

SDA

MICBIAS

DETECT

BYPASSINT*

SCL




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C

345678

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8 7 5 4 2 1

MIKEY RECEIVER CKT

0X0B

APN 353S2256WRITE: 0X72 READ: 0X73

0X0C

GPIO 3CNTRL

FHP = 80 HZ

MIKEY

FLP = 8.82 KHZ

MICBIAS 80%

N/A

0X04

N/A

PIN

0X0A

0X100X0F

FUNCTIONPRIMARYSECONDARY

0X09

LINE INPUTBUILT-IN MICROPHONEHEADSET MICROPHONE

0X0D(13,B,RIGHT)

TYPE DETECT/INTERRUPTN/A

N/ALINE IN

N/A

N/AMCP GPIO_5

0X09 (A)

GPIO 3

ENABLE/VOLUME

0X05

N/AN/A

0X06

0X03

N/A

0X06

0X02

N/A

0X080X060X06

0X020X030X04

N/A0X07

0X05

CONVERTER

0X0D (13,V22,B,LEFT)SPDIF OUTSPDIF IN

HEADPHONES

MIKEY

MIKEYN/AN/AMCP GPIO_38

0X0C (B)

21

L6840

0402

FERR-1000-OHM

2

1R6807100K

5%

MF-LF402

1/16W

2

1R680610K

402

5%

MF-LF1/16W

21

R6802

MF-LF402

5%

0

1/16W

21

R6803

MF-LF402

1/16W

0

5%

21

R68040

5%1/16W

402MF-LF

21

R6805

5%

0

MF-LF402

1/16W

48

48

20

21 25

2

1 C68544.7UF

603-HF

6.3V20%

TANT

CRITICAL

59

59

55

55

6 55

6 55 57 58 59 60

2

1C6852CRITICAL

10UF6.3VX5R

20%

603

2

1R6808100K1/16WMF-LF402

5%

21

R68102.2K

402

5%

MF-LF1/16W

2

1 C6853

402

25VX7R

10%0.0082UF

55 57 58

55 57 55 57

55 57 58

2

1D68001N4148WS-X-GSOD-323-HF

NOSTUFF

21

C68010.1UF

402

16VX5R

10%

21

C6802

X5R

10%16V

402

0.1UF

11

5

6 1

7

4 9

8

2

10

3

U6806

CRITICAL

DRCCD3275

2

1 C6851

402X5R

0.1UF16V10%

2

1C6850

50VCERM

0.001UF20%

402

2

1 C6857

402-1

10VX5R

1UF10%

2

1R6809

MF-LF

2.2K1/16W

402

5%

2

1R6852

1/16W5%

402

1K

MF-LF

2

1 C6899

25VX7R402

10%0.01UF


AUDIO: Mikey

AUD_IPHS_SWITCH_EN

AUD_I2C_INT_L

=I2C_AUDIO_SDA

=PP5V_S0_AUDIO

AUD_GPIO_2


HS_MIC_HI

AUD_GPIO_3


AUD_MIC_INP_L


AUD_MIC_INN_LHS_MIC_LO


HS_RX_BP


HS_SW_DET


GND_AUDIO_CODEC


AUD_MIC_INF

=PP3V3_S0_AUDIO

VOLTAGE=3.3VPP3V3_S0_HS_F


HS_RST

HS_INT_L

GND_AUDIO_CODEC

HS_SDA

HS_MIC_BIASMIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.15MM

=I2C_AUDIO_SCL

HS_SCL

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OUTIN

08

08

G

D

S

G

D

S

08

OUT

OUT




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Apple Inc.

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8 7 5 4 2 1

SLP_S4 ENABLES

ENABLE FET

MEMVTT_EN SEQUENCE

Enable FET

Enable regulator

(PM_SLP_S3_L_BUF)

PCHCORE VREG

Enable regulator

Enable regulator

SLP_M ENABLESTHIS SLP_M CIRCUIT IS A BACKUP IN CASE

VCC_ME IS REQUIRED IN ANY STATE

switch to alias after proto1

Off

Battery Off (G3Hot)

Run (S0/M0)

Sleep (S3/M1)

Soft-Off (S5/M1)

Sleep (S3/M-Off)

Soft-Off (S5/M-Off)

State

N/A

Off

On

On

0

1

1

1

1

1

0

0

1

0

0

0

0

0

0

111N/A

PM_S4_STATE_LSMC_PM_G2_ENABLEManageability PM_SLP_S3_L

0

0

1

1

1

0

0

1

0

1

11

PM_SLP_M_LPM_SLP_S4_L

PP1V8_S0 VREG (CPU PLL)

Enable FET

PLACE TOP SIDE

Enable FET

ENABLE REGULATOR

Enable FET

OTHER RAILS ENABLED BY P3V3_S0 AND P5V_S0:

Enable FET

REWORK TO POWER UP WITH NO CPU

Enable regulator

TO ENABLE OF CPU VREG

CPUVTT VREG

switch to alias after proto1

Enable FET

Enable FET

PLACE SERIES R’S NEAR SOURCE

OTHER THAN S0. DELETE AFTER PROTO1

SLP_S3 ENABLES

19 91 45 91

21

R6946

MF-LF402

1/16W

33

5%

2

1R6916100K1/16W5%

MF-LF402

2

1R69155%1/16WMF-LF

10K

402

14

8

9

10

7

U6900

74LVC08TSSOP-HF

14

3

2

1

7

U6900

TSSOP-HF74LVC08

2

1R69175%0

NOSTUFF

MF-LF402

1/16W

21

R6922

1/16W

402MF-LF

1K

5%

2

1 C69440.47UF10%

CERM-X5R

6.3V

NOSTUFF

402

2

1

R6944

10K 1%

1/16W

402MF-LF

21

R691433

MF-LF1/16W5%

402

1

2

6

Q69102N7002DW-X-GSOT-363

4

5

3

Q69102N7002DW-X-GSOT-363

2 1

C6910

402

10VCERM

20%

0.1UF

2

1 C6923

CERM-X5R

0.47UF10%

6.3V

402

NOSTUFF

2

1 C6921NOSTUFF

10%

402

0.47UF

CERM-X5R

6.3V2

1 C6920NOSTUFF

0.47UF

CERM-X5R

402

6.3V

10%

2

1 C6946

402

CERM-X5R

6.3V

0.47UF10%

NOSTUFF

2

1 C6945NOSTUFF

CERM-X5R

10%

6.3V

402

0.47UF

2

1R6910100K

MF-LF402

5%1/16W

2

1 C6924

CERM-X5R

6.3V

10%

402

0.47UF

NOSTUFF

21

R69480

5%

MF-LF402

1/16W

2

1 C69470.47UF

402

10%

CERM-X5R

6.3V

NOSTUFF

2

1 C69421UF10%

6.3V

CERM

402

2

1

R6942

402MF-LF1/16W

10K 5%

21

R69490

MF-LF402

1/16W5%

14

6

5

4

7

U6900

TSSOP-HF74LVC08

21

R692510K

1/16W

402MF-LF

5%

21

R6926

1/16W

402MF-LF

5%

10K

2

1 C6926

6.3V

402

10%

1UF

CERM

2

1 C6925

CERM

402

1UF10%

6.3V

2

1R692705%1/16WMF-LF402

2

1 C6952NOSTUFF

6.3V10%

402

0.47UF

CERM-X5R

1

6


2

1 C6951NOSTUFF

100PF50V5%

402CERM

2

1R6951

MF-LF1/16W5%

402

10K

4

3

5Q6911


21

R69530

1/16WMF-LF

5%

402

2

1 C6953NOSTUFF

16V

402X5R

10%0.1UF

21

R6950

402

5%

MF-LF1/16W

100K

2

1R695210K

402

1/16WMF-LF

5%

21

R69010

1/16W5%

402MF-LF

72 91

72 91

2

1

R6941

402MF-LF

5%

10K

1/16W

NOSTUFF

2

1 C6941

6.3V

10%

0.47UF

NOSTUFF

CERM-X5R

402

21

R6911

5%1/16W

33

MF-LF402

21

R6912

MF-LF

33

402

1/16W5%

21

R6920NOSTUFF

MF-LF402

1/16W

33

5%

21

R6947

5%

33

402

1/16WMF-LF


POWER SEQUENCING ENABLESSYNC_MASTER=K75F_MLB

CPUVTT_RP_R

VTT_REG_PGOOD_R1

P1V5_S0_EN

DDRVTT_EN

P3V3S0_EN

PM_SLP_S3_BUF_L

MAKE_BASE=TRUE

=PP3V3_S5_PWRCTL

PM_SLP_M_L

P3V3ME_EN

P1V05_ME_SM_EN

PM_SLP_S3_B_R

=PP3V3_S5_PWRCTL

P1V05_SM_DIS_L

P1V05_ME_SM_DIS

PM_SLP_S3_L

=PP3V3_S5_PWRCTL

=PP3V3_S0_PWRCTL

PCHCORE_PGOOD_R

PM_SLP_S3_BUF_L

PCHCORE_REG_PGOOD

P1V05_ME_S0_ENPCHCORE_REG_PGOODMAKE_BASE=TRUE

MAKE_BASE=TRUECPUVTT_REG_PGOOD

PM_PGOOD_DDRREG_S3

PM_EN_PVCORE_CPU

P12V_S3_EN

P5VS3_EN

MAKE_BASE=TRUEP5VS3_REG_PGOOD

=PP5V_S3_PWRCTL

=DDRREG_EN

PM_EN_USB_PWR

CPU_SKTOCC_L

=PP3V3_S0_PWRCTL

PGOOD_P12V_S0

PM_RSMRST_PCH_LPM_RSMRST_L

DDRVTT_EN

=PP3V3_S0_PWRCTL

VTT_REG_PGOOD_R2

PGOOD_P5V_S0MAKE_BASE=TRUE

CPUVTT_REG_EN

PCHCORE_REG_EN

P5VS0_EN

P3V3S3_ENS4_ENABLES

CPU_SKTOCC

CPUVTT_REG_PGOOD

=PP3V3_S5_PWRCTL

PM_SLP_S4_1_L

69 OF 110

A.0.0

051-8600

62 OF 92

72 91

32 62 70 91

62

5 6 62 63

5 19 91

72 91

72 91

5 6 62 63

5 19 32 33 37 46 63 91

5 6 62 63

5 6 62 63 72

62

5 62 63 68 91

72 5 62 63 68 91

11 62 63 67 91

5 70 91

64

72 91

69 91

69

6

70

43

11

5 6 62 63 72

63

32 62 70 91

5 6 62 63 72

72 91

67 91

68 91

72 91

11 62 63 67 91

5 6 62 63

19 91

www.vinafix.vn

OUT

OUT

OUT

08

08

08

08

GND

V+

08

GND

V+

GND

V+

G

D

S

G

D

S




36

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REVISION

DRAWING NUMBER SIZE

DR


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PAGE TITLE

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Apple Inc.

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NEED TO VERIFY TIMINGS

(9.91V/9.58V; 330mV Hysteresis)

TO BE DRIVEN BY SAME SIGNAL

ME PGOOD SEQUENCE

DISABLE CPUVTT_REG_PGOOD WHEN SLP_S3_L = 0 (PER PIKETON PDG)

ALL_SYS_PWRGD CIRCUIT

SMC

OPTION FOR SMC TO OUPUT

WHICH GOES INTO RSMRST_L OF PCHDELAY IS ABOUT 200MS

To SMC (2)

OPTION FOR PCH PWROK AND SYSPWROK

PULL-UP ON MXM PAGE

FROM THIS SMC GENERATES PM_RSMRST_L

S0 RAILS PGOOD

SPARE

APPROXIMATE DELAY OF 10-15MS

IBEX PEAK EDS

ASK INTEL: NEED 100K PULL-DOWN?

(1.67V/1.22V; 132mV Hysteresis)

PGOOD COMPARATORS FOR PP1V8_S0 AND PP12V_S0

COMPONENT VALUES FROM CRB

8.3 MS ON RISE/ 2.8MS ON FALL

DELAY REQUIREMENTS

DELAYED PWRGD (BY 99MS)

45 91

45 91

2

1 C70220.1UF

402CERM

20%10V

2

1 C70100.1UF

603CERM16V20%

2

1R7050

1/16W

1K

402

MF-LF

5%

2

1 C7050

402X5R16V10%0.1UF

2

1R700749.9K

402

1/16W1%

MF-LF

21

R7022

1/16W

402MF-LF

5%

33

21

R7023

5%

33

1/16WMF-LF402

6 25 32 91

2

1R7020

MF-LF

64.9K1%

402

1/16W

2

1R7021

1%

MF-LF402

1/16W

10K

21

R70022.0K

1%1/16W

402MF-LF

2

1R7017

MF-LF402

5%1/16W

10K

2

1R701810K5%1/16WMF-LF402

14

6

5

4

7

U7000TSSOP-HF74LVC08

14

8

9

10

7

U7000

74LVC08TSSOP-HF

14

11

12

13

7

U7000

TSSOP-HF74LVC08

14

3

2

1

7

U7000

TSSOP-HF74LVC08

21

R7024

402

NOSTUFF

5%1/16W

10K

MF-LF

4

3


1

6

2Q7011


2

1R7043NOSTUFF

5.6K

MF-LF

5%1/16W

4022

1R7040NOSTUFF

5%

MF-LF1/16W

402

33K

4

3

5Q7040NOSTUFF

MMDT3904-X-GSOT-363-LF

1

6


2

1R7041NOSTUFF

MF-LF1/16W

402

1%30.1K

2

1R7042NOSTUFF

1/16WMF-LF402

1%301K

2

1 C7040NOSTUFF

6.3V10%

402

0.47UF

CERM-X5R

2

1 C7042

X5R402

0.1UF10%16V

NOSTUFF

2

1 C7041NOSTUFF

100PF

CERM402

5%50V

21

R7028

1/16WMF-LF402

5%

33

21

R7030

402

5%1/16WMF-LF

0

2

1 C7023NOSTUFF

0.47UF

CERM-X5R6.3V10%

4022

1R7031100K5%

NOSTUFF

MF-LF402

1/16W

2

1R702510K1/16W

402MF-LF

5%

8

7

5

6

4

U7030CRITICAL

SOI-HFLM393

4

3


2

1R7061

MF-LF402

1/16W

10K5%

1

6

2Q7060


21

R7060

1/16WMF-LF

5%

402

10K

14

11

12

13

7

U6900

74LVC08TSSOP-HF

21

R702733

1/16WMF-LF

5%

402

21

R7029

1/16W5%

MF-LF

0

402

NOSTUFF

21

R703233

5%1/16WMF-LF402

2

1 C7080

603

0.1UF

16V20%

CERM

2

1R708610K

MF-LF402

5%1/16W

2

1R708410K

MF-LF1/16W5%

402

2

1R708349.9K

1%1/16W

402MF-LF

8

1

3

2

4

U7080SOI-HF

CRITICAL

LM393

2

1R7080

1/16WMF-LF

33.2K1%

402

2

1R7081

402

1%1/16WMF-LF

100K

21

R7082

1/16W1%

MF-LF402

2.0K 8

7

5

6

4

U7080CRITICAL

LM393SOI-HF

1

2

6

Q7080

SOT-3632N7002DW-X-G 4

5

3

Q70802N7002DW-X-GSOT-363

21

R7070NOSTUFF

402

5%

MF-LF1/16W

0

21

R7071

5%

33

1/16WMF-LF402


POWER SEQUENCING PGOOD

SMC_DELAYED_PWRGD

PM_ME_PWRGD

ALL_SYS_PWRGD

PGOOD_SYSPWROK

ALL_SYS_PWRGD_R

PM_SYS_PWRGD

PM_PCH_PWRGD

PM_ME_PWRGD_R

PM_ME_PWRGD

PGOOD_1V05ME_G2

=PP3V3_S5_PWRCTL

12V_COMP_REF

1V80_COMP_REF

=PP12V_S0_PWRCTL

PGOOD_1V8_S0_G1

PM_SPARE_PGOOD

=PP3V3_S0_PWRCTL

=PP12V_S5_PWRCTL

=PP12V_S5_PWRCTL

=PP12V_S0_PWRCTL

1V60_COMP_REF

=PP3V3_S3_PWRCTL

=PP1V8_S0_CPU_PLL

PP12V_S0

=PP3V3_S0_PWRCTL

=PP3V3_S0_PWRCTL

PGOOD_P1V8_S0

=PP3V3_S0_PWRCTL

PGOOD_1V8_S0_G2

PGOOD_PCH_S0

=PP3V3_S0_PWRCTL

ALL_SYS_PWRGD_SMC

=PP3V3_S0_MXM =PM_MXM_PGOOD_PULLUP

PM_MXM_PGOOD

PM_PGOOD_PVCORE_CPU

PGOOD_CPU_GFX_DDR

=PP3V3_S0_PWRCTL

=PP3V3_S5_PWRCTL

PM_MXM_EN

RSMRST_PWRGD

=PP3V3_S5_PWRCTL

PGOOD_P1V8_S0

PGOOD_P3V3_S0

=PP3V3_S0_PWRCTL

PCHCORE_REG_PGOOD

PM_SLP_S3_L VTTS3PG_1

VTTS3PG_2

CPUVTT_REG_PGOOD

PGOOD_12V_S0_G1

PGOOD_P12V_S0

PGOOD_12V_S0_G2

PGOOD_SYSPWROK_R

PGOOD_PCH_AND_P1V8

PGOOD_1V05ME_G1

9V_91_COMP_REF

=PP1V05_SM_ME

=PP3V3_SM_PWRCTL

70 OF 110

A.0.0

051-8600

63 OF 92

46 91

19 63 91

91

19 32 91

19 91

19 63 91

5 6 62 63

6 63

5 6 62 63 72

6 63 72

6 63 72

6 63

51

6 72

6 13 16

6 89

5 6 62 63 72

5 6 62 63 72

63 91

5 6 62 63 72

91

5 6 62 63 72

6 73 74 74

74 91

5 26 64 91

91

5 6 62 63 72

5 6 62 63

74

5 6 62 63

63 91

48 72 91

5 6 62 63 72

5 62 68 91

5 19 32 33 37 46 62 91

11 62 67 91

62

91

91

6

6 72

www.vinafix.vn

IN

OUT

OUT

OUT

IN

IN

IN

OUT

IN

IN

OUT

IN

IN

IN

ISEN4-

EN_VTT

THRM_PAD

VR_HOT

VR_FAN

ISEN4+

ISEN3-

ISEN3+

ISEN2-

ISEN2+

ISEN1+

PWM2

FB

PWM1

TCOMP

PSI*

IMON

OFS

VCC

VID0

VR_RDY

VID7

VID5

VID4

VID3

VID2

VID6

VID1

SS

FSPWM3

PWM4TM

REF

DAC

EN_PWR

RGND

VSEN

VDIFF

ISEN1-

COMP SYM_VER_2

IN

IN

IN

OUT

IN

OUT




36

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Apple Inc.

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8 7 5 4 2 1

CPU CORE INPUT Filtering152-0104

IMAX = 10.5A

PEAK = 110AAVG = 90A

VOUT = VCORECPU VCORE

CPU CORE REG 1.1V/110A O/P= PPVCORE_S0_CPU_REG

LOCAL 5V1.25 mOhm loadline

VR_HOT goes HIGH when VTM/VCC < 28%and LOW when VTM/VCC > 33%.

LAYOUT: PLACE RT7101 NEAR HOT SPOT.

2

1R71351K5%

1/16WMF-LF

402

21

XW7101OMIT

SM

2

1

C7135

0.001UF50V10%

402CERM

7

6

5

4

3

2

1

0

2

1

R7115

49.9K

MF-LF402

1%1/16W

2

1

R7114

402

1/16WMF-LF

1%49.9K

2

1R7112

5%

MF-LF

2.0K1/16W

402

2

1 C7109

16V10%

NOSTUFF

0.01UF

CERM402

62

5 26 63 91

13 88 VR_CPU_IOUT

2

1 C7103

402

50VCERM

10%0.0022UF

2

1 C7102

402

50VCERM

10%0.0022UF

2

1 C71010.0022UF

402CERM50V10%

SIGNAL_MODEL=EMPTY

NOSTUFF

21

R7110

402

1%

MF-LF1/16W

1K

21

C7110

10%

402

25VX7R

1500PF2

1 R71091%100K

402MF-LF1/16W

2

1R7107

1%

MF-LF402

1/16W

21K

2

1R7105

MF-LF

NOSTUFF

1%

402

1/16W

20.0K

2

1R7100

402MF-LF

1%1.02K

1/16W

2

1R7106

5%0

402MF-LF1/16W

65 89

65 89

65 89 2

1 C71320.1UF

402X5R16V10%

2

1 C71315%50VCERM402

150PF

65 89

65 89

65 89

2

1 C71520.1UF

402X5R16V10%

2

1 C71515%50VCERM402

150PF

65 89

65 89

65 89 2

1 C71420.1UF

402X5R16V10%

2

1 C71415%50VCERM402

150PF

13 16 89

21

R7145

5%

MF-LF1/16W

402

0

2

1R710405%1/16WMF-LF402

13 16 89

17

36

38

37

40

1

2

3

4

5

6

7

15

19

39

41

18

35

16

12

25

31

20

26

8

9

23

24

29

30

22

21

28

27

10

34

14

33

32

11

13

U7100

ISL6334

CRITICAL

QFN

2

1R7178

1/16W

0

NOSTUFF

402MF-LF

5%

2

1R7177NOSTUFF

402

5%

MF-LF

01/16W

2

1 C7180

402

0.1UF10VCERM

20%

2

1

R7147NOSTUFF

402

5%1/16WMF-LF

0

2

1

R7148

1/16WMF-LF

5%

NOSTUFF

402

0

2

1

R7144

5%

MF-LF1/16W

402

NOSTUFF

0

2

1C7130NOSTUFF

402C0G50V1%

15PF

2

1C7140NOSTUFF

1%

402C0G50V

15PF

2

1C7150

402C0G50V1%

NOSTUFF

15PF

2 1

R71500

1/16WMF-LF

5%

402

2 1

R7140

5%

0

MF-LF402

1/16W

2 1

R71320

1/16WMF-LF

5%

402

2 1

R7142

MF-LF

5%1/16W

402

0

2 1

R71520

1/16WMF-LF

5%

402

21

R7149

1%

402MF-LF1/16W

47.5

2

1R71461M5%1/16WMF-LF402

NOSTUFF

13 49 89

21

R713910

5%

MF-LF402

1/16W

21

R7137

MF-LF1/16W5%

402

10

21

R7127

402

5%1/16W

1K

MF-LF

21

R7128

402

5%

MF-LF1/16W

0

21

R7129

1/16W5%

MF-LF

0

402

21

R71381K

5%1/16WMF-LF402

13 89

21

XW7120

SM

OMIT

21

XW7130SM

OMIT

2

1

RT71016.8K

0603

66 89

66 89

66 89

2 1

R71620

1/16WMF-LF

5%

402

2

1 C71620.1UF

402X5R16V10%

2

1 C71615%50VCERM402

150PF

2 1

R7160

5%

0

MF-LF1/16W

402

2

1C7160NOSTUFF

15PF

402C0G50V1%

21

R7136

402

5%

MF-LF1/16W

10K

49 89

2

1 C71335%220PF

402CERM25V

21

R7133

MF-LF1/16W

402

1.02K

1%

2

1 C71435%220PF

402CERM25V

21

R7143

MF-LF1/16W1%

1.02K

402

2

1 C7153220PF

402CERM25V5%

21

R7153

MF-LF1/16W

402

1.02K

1%

2

1 C71635%220PF

402CERM25V

21

R7163

MF-LF1/16W

402

1.02K

1%

2 1

D7171

SOD-923-HF

NOSTUFF

NSR0140P2T5G

2

1R7172

1/16W

1.02K

NOSTUFF

1%

MF-LF402

2

1 C7171

50VCERM402

0.020UF10%

NOSTUFF

21

R7171

402

5%

MF-LF1/16W

0

21R7111 0

MF-LF

5%

402

1/16W

2

1R710875K1/16WMF-LF

1%

402

21

L71000.36UH-45A-0.76MOHM

MSQ1211R36LF-TH

CRITICAL

21

R7102

402MF-LF

1%

1K

1/16W

21

R7131

MF-LF1/16W

402

165

1%

21

R7141

MF-LF1/16W

402

165

1%

21

R7151

MF-LF1/16W

402

165

1%

21

R7161

MF-LF1/16W

402

165

1%

2

1R7188

1/16W

NOSTUFF

MF-LF402

200K5%

2

1 C711210%0.0033UF

402CERM50V

2

1R71171%1/16WMF-LF402

10K

2

1R7116201%1/16WMF-LF402

21

R7103

1%

806

402

1/16WMF-LF

2

1R715520.0K

1/16W

402

1%

NOSTUFF

MF-LF

2 1

R7118

805

5%

MF-LF1/8W

2.2

21

C7106470PF

10%

CERM50V

402

21

R71790

5%1/16WMF-LF402

21

C710422PF

402CERM50V5%

2

1 C7107

10V

402X5R

1UF10%

21

C7105

10%50V

402CERM

560PF21

R7101

402

1/16W

16.5K

MF-LF

1%


VREG: PPVCORE_S0_CPU

CPU_VID<7..0>

PM_EN_PVCORE_CPUVR_CPU_TM

AGND_CPU

NET_PHYSICAL_TYPE=SNS_DIFF

VR_CPU_VSNS_XW_NVOLTAGE=0V

CPU_VCC_PKG_SENSE_N

CPU_VCC_PKG_SENSE_P

VR_CPU_VSNS_XW_P

NET_PHYSICAL_TYPE=SNS_DIFFVOLTAGE=1.1V

VR_CPU_OFS

PP5V_S0_CPU_VCORE_VCC

VR_CPU_TCOMP

VR_CPU_FS

VR_CPU_SS

AGND_CPU

VR_CPU_VSNS_R_N

=PP5V_S0_VRD

VR_CPU_VSEN

VR_VDF_R1

VR_CPU_VDIFF

VR_CPU_IOUT_PD

VR_CPU_PSI_L


VR_CPU_EN_VTT

VR_CPU_RGND

VR_CPU_PWM3_R

VR_CPU_PWM3

VR_CPU_DAC

VR_CPU_ISNS2_R_P

CPU_PSI_L

VR_CPU_PWM2_R

VR_CPU_ISNS3_R_N

VR_CPU_FB

MAX_NECK_LENGTH=3MM

VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MM


VR_CPU_FAN

VR_CPU_COMP

VR_CPU_ISNS1_R_P

VR_CPU_ISNS1_RR_2

VR_CPU_ISNS2_RR_2

VR_CPU_ISNS3_RR_2

VR_CPU_ISNS4_RR_2

VR_CPU_COMP_R

VR_CPU_PWM4

VR_CPU_PWM1

VR_CPU_PWM2

VR_CPU_ISNS2_P

VR_CPU_COMP_RC

VR_CPU_ISNS3_P

VR_CPU_ISNS1_P

VR_CPU_ISNS4_P


VOLTAGE=0VMIN_LINE_WIDTH=0.6MM

AGND_CPUMAX_NECK_LENGTH=3MM

VR_CPU_ISNS1_N

VR_CPU_ISNS4_N

VR_CPU_ISNS3_N

VR_CPU_ISNS2_N

VR_CPU_VRDHOT

=PP12V_S0_VRD PP12V_S0_CPU_FLTRDNET_PHYSICAL_TYPE=POWERVOLTAGE=12V

AGND_CPU

VR_CPU_ISNS1_R_N

VR_CPU_REF

VR_CPU_VSNS_R_P

VR_CPU_FB_R

VR_VDF_R2

PPVCORE_S0_CPU_REG

VR_CPU_IMON

VR_CPU_EN_PWR

VR_CPU_ISNS4_R_N

VR_CPU_ISNS4_R_P

VR_CPU_PWM4_R

VR_CPU_ISNS3_R_P

VR_CPU_ISNS2_R_N

AGND_CPU

=PP3V3_S0_VRD=PPVTT_S0_CPU

PM_PGOOD_PVCORE_CPU

=PP3V3_S0_VRD

71 OF 110

A.0.0

051-8600

64 OF 92

89

64

89

89

64 89

89

89

89

64

6

89

89

64 89

89

89

89

89

89

89

89

64 89

89

89

89

89

89

64

6 65 66 89

64

89

89

89 6 65 66

89

89

89

89

89

64

6 64

6 11 13 16 46

6 64

www.vinafix.vn

OUT

IN

IN

S

G

D

D

G

S

S

G

D

D

G

S

S

G

D

D

G

S

OUT

OUT

OUT

OUT

BOOT

UGATE

PHASENC

NC

GND

LGATE

VCC PVCC

THRML

PWM

PAD

BOOT

UGATE

PHASENC

NC

GND

LGATE

VCC PVCC

THRML

PWM

PAD

IN

GDSEL

LGATE

VCC

PWM

BOOT

UGATE

GND THRML

PHASE

LVCCUVCC

PAD

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

152-0114

THESE TWO CAPS ARE FOR EMC

376S0771


376S0771

110A MAX

376S0772

152-0114

152-0114

128S0209

376S0772

376S0771


OUTPUT BULK DECOUPLING:

PHASE 2

PHASE 3

PHASE 1376S0772

64 89

2

1

XW7202SIGNAL_MODEL=EMPTYSM

OMIT

2

1 C722710%1UF

X5R16V

6032

1 C722610%16V

10UF

X5R-CERM0805

CRITICAL

2

1R7226NOSTUFF

805MF-LF

2.21/8W

5%

2

1 C7206

16V

10UF10%

0805

CRITICAL

X5R-CERM

2

1 C7228

NOSTUFF

0.001UF

402

50V10%

CERM

2

1 C7223

603X7R16V

0.22UF10%

2

1R7224

MF-LF1/10W

5%0

603

2

1 C7221

16V

603

1UF10%

X5R

2

1R7221

603MF-LF

101/10W5%

2

1R7225

MF-LF

5%0

603

1/10W

NOSTUFF

2

1R722210

MF-LF603

5%1/10W

2

1 C7220

603X5R

1UF16V10%

NOSTUFF

2

1C72221UF10%16VX5R603

2

1R7227NOSTUFF

MF-LF603

1/10W5%0

64 89

2

1

XW7201SIGNAL_MODEL=EMPTY

SM

OMIT

2

1 C7247

603X5R16V

1UF10%

2

1 C724610UF16V10%

0805X5R-CERM

CRITICAL

2

1R72062.2

805MF-LF

NOSTUFF

1/8W5%

2

1R7246NOSTUFF

1/8W5%

MF-LF

2.2

805

2

1 C7248

NOSTUFF

50VCERM

0.001UF10%

402

2

1 C72430.22UF16V10%

X7R6032

1R724405%

MF-LF603

1/10W

2

1 C724110%1UF16VX5R603

2

1 C7208

50VCERM

NOSTUFF402

10%0.001UF

2

1R7241

MF-LF603

1/10W5%10

2

1R724505%

1/10WMF-LF

NOSTUFF

6032

1R7242

603

105%

1/10WMF-LF

2

1 C7240

603X5R

1UF16V10%

NOSTUFF

2

1C7242

16VX5R

1UF10%

603

2

1R72470

603MF-LF1/10W5%

NOSTUFF

64 89

2

1 C7207

X5R603

16V10%1UF

2

1 C7211

402

10%50VX7R

0.001UF2

1 C7215

X5R-CERM0805

16V10%10UF

CRITICAL

2

1 C7229CRITICAL

X5R-CERM

10%16V

0805

10UF

2

1 C7249

X5R-CERM

CRITICAL

0805

10%10UF16V

2

1 C7265

CRITICAL

CASE-D2-SM

2VPOLY

20%330UF-0.006OHM

2

1 C7264330UF-0.006OHM2VPOLYCASE-D2-SM

20%

CRITICAL

2

1 C7263

2VPOLY

20%

CRITICAL

330UF-0.006OHM

CASE-D2-SM2

1 C7262

2VPOLYCASE-D2-SM

20%

CRITICAL

330UF-0.006OHM2

1C7261

2VPOLYCASE-D2-SM

20%

CRITICAL

330UF-0.006OHM

2

1 C7260

20%

CASE-D2-SMPOLY2V

CRITICAL

330UF-0.006OHM

3

4 6

5

2

1

Q7201IRF6710

S1

CRITICAL

43

5

7621

Q7202IRF6795DIRECTFET-MX

CRITICAL

3

4 6

5

2

1

Q7221S1

IRF6710

CRITICAL

43

5

7621

Q7222

CRITICAL

DIRECTFET-MXIRF6795

3

4 6

5

2

1

Q7241CRITICAL

S1IRF6710

43

5

7621

Q7242IRF6795DIRECTFET-MX

CRITICAL

43

21

R7208CRITICAL

MF1W

0.00051%

0612

43

21

R7228

0612MF1W

0.00051%

CRITICAL

2

1

XW7222SIGNAL_MODEL=EMPTYSM

OMIT2

1


SM

OMIT

64 89

64 89

64 89

64 89

43

21

R7248

MF1W

0.00051%

CRITICAL

0612

2

1

XW7242SM

SIGNAL_MODEL=EMPTY

OMIT2

1

XW7241SM

OMIT

SIGNAL_MODEL=EMPTY

2

1 C7270

8X9-TH1

16V

CRITICAL

20%

ELEC

270UF

2

1 C7271

8X9-TH1

CRITICAL

ELEC16V

270UF20%

2

1 C720310%0.22UF

603

16VX7R

2

1 C7205

8X9-TH1

CRITICAL

16VELEC

270UF20%

2

1 C7225

8X9-TH1

CRITICAL

16VELEC

270UF20%

2

1 C7245

8X9-TH1

CRITICAL

16VELEC

20%270UF

7

1

11

4

9

10

8

3

6

5

2

U7221QFN1

CRITICAL

ISL6612

7

1

11

4

9

10

8

3

6

5

2

U7241

CRITICAL

QFN1ISL6612

21

L7201CRITICAL

0.36UH-35A

MSQ1208-TH

21

L7221CRITICAL

MSQ1208-TH

0.36UH-35A

21

L72410.36UH-35A

MSQ1208-TH

CRITICAL

2

1 C7210

402

10%50VX7R

0.001UF

2

1 C723010%

402

50VX7R

0.001UF

2

1 C723110%

402

50VX7R

0.001UF

2

1 C7250

402

10%50VX7R

0.001UF

2

1 C7251

402

10%50VX7R

0.001UF

2

1R7204

603

1/10W5%

MF-LF

0

64 89

9 8

1

11

4

10

7

6

5

3 2

U7201

CRITICAL

DFNISL6622

2

1C7202

16V

603X5R

10%1UF

64 89

2

1 C7201

X5R

1UF10%

603

16V

2

1

R7201

1/10W

10

MF-LF603

5%

NOSTUFF

2

1R7202

1/10WMF-LF

603

105%

2

1R72075%1/10WMF-LF603

0

NOSTUFF

2

1R7205

MF-LF603

05%

1/10W

2

1 C7200

16V10%

X5R603

1UF


VREG: CPU CORE - PHASES 1-3

DIDT=TRUE

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_BOOT1_RC

DIDT=TRUENET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV1_UGATE

DIDT=TRUENET_PHYSICAL_TYPE=POWERVR_CPU_PHASE1

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV2_VCC

VR_CPU_DRV1_VCCNET_PHYSICAL_TYPE=VR_CTL_PHY

VR_CPU_ISNS2_XW_PVR_CPU_ISNS2_XW_N


PPVCORE_S0_CPU_REG3


PPVCORE_S0_CPU_REG1

VR_CPU_DRV2_GDSEL

VR_CPU_DRV3_GDSEL

VR_CPU_PWM3VR_CPU_DRV3_BOOT

NET_PHYSICAL_TYPE=VR_CTL_PHY DIDT=TRUE

DIDT=TRUE

NET_PHYSICAL_TYPE=VR_CTL_PHY

VR_CPU_DRV3_UGATE

VR_CPU_DRV3_LGATEDIDT=TRUE


PPVCORE_S0_CPU_REG

VR_CPU_ISNS3_N

VR_CPU_ISNS3_P

VR_CPU_ISNS2_N

VR_CPU_ISNS1_P

VR_CPU_ISNS1_N

VR_CPU_PH3_SNUBNET_PHYSICAL_TYPE=VR_CTL_PHY

DIDT=TRUE


VR_CPU_BOOT2_RC

DIDT=TRUE

DIDT=TRUE

VR_CPU_BOOT3_RCNET_PHYSICAL_TYPE=VR_CTL_PHY

VR_CPU_DRV1_GDSEL

VR_CPU_PWM1

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV1_BOOT

DIDT=TRUE

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV3_UVCC

VR_CPU_DRV2_PVCCNET_PHYSICAL_TYPE=VR_CTL_PHY


VR_CPU_DRV3_PVCC

VR_CPU_PHASE3


DIDT=TRUE

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV1_UVCC

DIDT=TRUENET_PHYSICAL_TYPE=VR_CTL_PHY

VR_CPU_PH2_SNUB

PPVCORE_S0_CPU_REG2

VR_CPU_DRV2_LGATENET_PHYSICAL_TYPE=VR_CTL_PHY DIDT=TRUE


VR_CPU_PWM2

VR_CPU_DRV2_UVCCNET_PHYSICAL_TYPE=VR_CTL_PHY

NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV2_BOOT

DIDT=TRUE

DIDT=TRUEVR_CPU_PHASE2


NET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV2_UGATE

DIDT=TRUE

PPVCORE_S0_CPU_REG

PPVCORE_S0_CPU_REG


VR_CPU_PH1_SNUB

VR_CPU_ISNS2_P

PPVCORE_S0_CPU_REG

DIDT=TRUENET_PHYSICAL_TYPE=VR_CTL_PHYVR_CPU_DRV1_LGATE

VR_CPU_DRV1_PVCC


PP12V_S0_CPU_FLTRD

72 OF 110

A.0.0

051-8600

65 OF 92

89

89

89

89 89

89 89

89

89 89

89

89

89

89

89

89

6 64 65 66

89

89

89

89 89

89

89

89

89

89

89

89

6 64 65 66

6 64 65 66

89

6 64 65 66

89

64 66 89

www.vinafix.vn

IND

G

S

S

G

D

OUT

OUT

BOOT

UGATE

PHASENC

NC

GND

LGATE

VCC PVCC

THRML

PWM

PAD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PHASE 4

376S0771


152-0114

376S0772

2

1C7305

X5R-CERM0805

10%16V

10UF

CRITICAL

2

1R73022.25%

805MF-LF1/8W

NOSTUFF

2

1 C7302

CERM402

50V

NOSTUFF

0.001UF10%

2

1 C7303

X7R603

16V10%0.22UF

2

1R7303

603

5%1/10WMF-LF

02

1C7311

X5R16V

1UF10%

603

2

1R7313

MF-LF603

1/10W5%10

2

1R7312NOSTUFF

603

5%

MF-LF

01/10W

2

1R7311

1/10WMF-LF

5%10

603

2

1 C7310NOSTUFF

10%16VX5R603

1UF

2

1C7312

16V10%

X5R

1UF

603

2

1R7310

1/10WMF-LF603

05%

NOSTUFF

64 89

43

5

7621

Q7302CRITICAL

DIRECTFET-MXIRF6795

3

4 6

5

2

1

Q7301S1

CRITICAL

IRF6710

43

21

R7301

MF1W

0.00051%

CRITICAL

0612

2

1


SM

OMIT2

1

XW7302OMIT

SMSIGNAL_MODEL=EMPTY

64 89

64 89

2

1 C7304

8X9-TH1ELEC

20%270UF16V

CRITICAL

7

1

11

4

9

10

8

3

6

5

2

U7301QFN1

CRITICAL

ISL6612

21

L7301CRITICAL

MSQ1208-TH

0.36UH-35A

2

1 C7330

CERM10V20%0.1UF

4022

1 C7331

402

0.1UF20%10VCERM

2

1 C7340

603

1UF10%16VX5R 2

1 C7341

603

1UF10%16VX5R

2

1 C7333

CERM10V20%0.1UF

4022

1 C7332

402

0.1UF20%10VCERM 2

1 C7335

CERM10V20%0.1UF

4022

1 C73340.1UF20%

CERM402

10V2

1 C7337

CERM10V20%0.1UF

4022

1 C7336

402

0.1UF20%10VCERM 2

1 C7339

CERM10V20%0.1UF

4022

1 C7338

402

0.1UF20%10VCERM

2

1 C7343

X5R16V10%1UF

6032

1 C7342

X5R16V10%1UF

6032

1 C7345

X5R16V10%1UF

6032

1 C7344

X5R16V10%1UF

6032

1 C7347

X5R16V10%1UF

6032

1 C7346

16V10%1UF

603X5R 2

1 C7349

X5R16V10%1UF

6032

1 C7348

X5R16V10%1UF

603

2

1 C730810%

402

50VX7R

0.001UF

2

1C7307

10%

603

1UF16VX5R 2

1 C7309

402

10%50VX7R

0.001UF

2

1C7306

0805X5R-CERM

CRITICAL

16V

10UF10%

VREG: CPU CORE - PHASE 4SYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB


VR_CPU_PWM4

VR_CPU_DRV4_UVCCNET_PHYSICAL_TYPE=VR_CTL_PHY


VR_CPU_DRV4_PVCC

VR_CPU_PH4_SNUBNET_PHYSICAL_TYPE=VR_CTL_PHY

DIDT=TRUE

VR_CPU_BOOT4_RCNET_PHYSICAL_TYPE=VR_CTL_PHY

DIDT=TRUE

VR_CPU_ISNS4_P

VR_CPU_DRV4_GDSEL

VR_CPU_ISNS4_N

PPVCORE_S0_CPU_REG4

VR_CPU_ISNS4_XW_N VR_CPU_ISNS4_XW_P

PPVCORE_S0_CPU_REG


VR_CPU_DRV4_LGATE

PPVCORE_S0_CPU_REG


DIDT=TRUEVR_CPU_DRV4_BOOT


VR_CPU_DRV4_UGATEDIDT=TRUE

DIDT=TRUENET_PHYSICAL_TYPE=POWER

VR_CPU_PHASE4

PP12V_S0_CPU_FLTRD

73 OF 110

A.0.0

051-8600

66 OF 92

89

89

89

89 89

6 64 65 66

89

6 64 65 66

89

89

89

64 65 89

www.vinafix.vn

S

D

G

IN

OUT

PVCCVCC

OCSET

PGOOD

ENLLIREF

ICOMP

ISUM

RGND

VDIFF

VID4

VID3

VID2

VID1

VID0

VID12.5

REF

FB

VSEN

COMP

OFS

UGATE1

BOOT1

PHASE1

LGATE1

FS

BOOT2UGATE2

PHASE2LGATE2

ISEN1

ISEN2

THRM_PAD

S

D

G




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#TABLE_5_ITEM

Internal Pu on VID lines

CPU VTT

"PULL-UP" TO VTT RAIL ON CPU PAGE

OUTPUT BULK DECOUPLING

VOUT = 1.1V OR 1.05VPEAK = 35AAVG = 30A

CPU VTT REG 1.1V/30A O/P= PPVTT_S0_CPU_REG

VID0=0, VID[4-1]=1, VTT VR o/p= 1.10V

(SELECT MODE= VRM10)

5

4321

D7450TLM833CTLSH3-30M833

CRITICAL

321

4

5

Q7450RJK0365DPA

CRITICAL

MLP5X6-LFPAK-WPAK

2

1 C744210%

CRITICAL

16VX5R-CERM

10UF

1206

2

1 C7452

CRITICAL

16VX5R-CERM

10%10UF

1206

2

1 C7450

CRITICAL

X5R-CERM

10%16V

10UF

1206

2

1C7423NOSTUFF

5%25V

NP0-C0G402

1000PF

2

1C7426100PF

NOSTUFF

402CERM50V5%

2

1 C7422NOSTUFF

100PF5%50VCERM402

2

1C7406

25V

402

5%1000PF

NOSTUFF

NP0-C0G 2

1 C7405

NP0-C0G

NOSTUFF

25V

1000PF5%

402

2 1

C74041000PF

40225V5%

NP0-C0G

2

1C7402

1.0UF

805X7R

10%16V

21

R7404

1%1/16W

402MF-LF

10.5K

21

R7402

402

1%

MF-LF1/16W

20.0K

21

R740342.2K

1/16W1%

MF-LF402

21

R7407NOSTUFF

10

1%

402MF-LF1/16W

21

R74084.99

MF-LF1/16W1%

402

2

1 C7444

16VX5R-CERM

10%10UF

1206

CRITICAL

21

R7460NOSTUFF

75K

1/16WMF-LF

1%

402

21

R7419

402

0

1/16WMF-LF

5%

21

R7462

MF-LF1/10W

603

5%

4.7

62 91

2 1

XW7421OMIT

SM

2 1

XW7422

SM

OMIT

2

1 C7440NOSTUFF

NP0-C0G402

1000PF25V5%

11 62 63 91

21

R7417

1/10W

1.0K

MF-LF

1%

60321

R7422

PLACEMENT_NOTE=PLACE R7422 WITHIN 25.4MM OF CPU, NO STUBS.1/16W

402MF-LF

5%

0

21

R7423PLACEMENT_NOTE=PLACE R7423 WITHIN 25.4MM OF CPU, NO STUBS.

0

1/16WMF-LF

5%

40221

R742510

1%1/16W

402MF-LF

21

R7424

402

10

1/16WMF-LF

1%

2 1

C7431

10%

0.1UF

402 16VX7R-CERM

21

R7431

603

1/10W

0

MF-LF

5%

21

R7405

MF-LF402

1%1/16W

35.7K

21

R7406

MF-LF

1%

402

1/16W

35.7K

21

L74410.36UH-45A-0.76MOHM

CRITICAL

MSQ1211R36LF-TH

21

L7454CRITICAL

0.36UH-45A-0.76MOHM

MSQ1211R36LF-TH

21

R74321K

1%1/16W

402MF-LF

21

R74331K

402MF-LF1/16W1%

21

R7434

MF-LF402

1/16W1%

88.7K

21

R7416

402

3.01K

MF-LF1/16W1%

21

R7418100

MF-LF1/16W

402

1%

21

R7421100

402

1/16WMF-LF

1%

21

R7420

1%

100

402

1/16WMF-LF

21

R7401487

1/16W

402

1%

MF-LF

2

1C7492100PF

402

50VCERM

5%2

1R74551%1.11/10WMF-LF603

NOSTUFF

9

22

21

30

1

31

32

7

4

17

25

33

8

2

15

19

23

28

3

10

14

27

12

16

26

13

11

29

6

20

5

18

24

U7400CRITICAL

QFNISL6568

2

1R74401.1

NOSTUFF

1/10WMF-LF603

1%

2

1R746128K1%1/10W

603MF-LF

2

1 C7445CRITICAL

16VELEC

270UF20%

8X9-TH1

2

1 C7453CRITICAL

270UF16VELEC

20%

8X9-TH1

21

R74141K

5%

402

1/16WMF-LF

21

R7411

5%

1K

402

1/16W

NOSTUFF

MF-LF21

R7412

1/16W

1K

5%

402MF-LF

NOSTUFF

21

R74131K

MF-LF

5%1/16W

402

21

R7410

1/16W5%

1K

402MF-LF

NOSTUFF21

R7409NOSTUFF

1K

402

1/16WMF-LF

5%

2

1 C7443

16V

402

10%1UF

X5R

2

1 C7451

16V

402

10%1UF

X5R

321

4

5Q7441CRITICAL

RJK0348DPAWPAK

321

4

5

Q7451CRITICAL

RJK0348DPAWPAK

21

R7430

MF-LF1/10W

603

5%

0

21

TH7401

10KOHM

OMIT

0603-LF

21

C7418

603

50V10%CERM

4700PF

2

1 C7460330UF-0.0045OHM

CRITICAL

20%

CASE-D2-SMPOLY2V

2

1 C7461CRITICAL

330UF-0.0045OHM

2VPOLYCASE-D2-SM

20%

2

1 C7462

2V

CRITICAL

330UF-0.0045OHM20%

CASE-D2-SMPOLY

2

1 C7463

POLY

330UF-0.0045OHM

2V

CASE-D2-SM

20%

CRITICAL

2 1

C7403

402X7R25V10%

0.012UF

21

C7417390PF

402CERM50V10%

2

1 C742510%50VCERM402

0.0022UF

21

C74160.022UF

0402X7R25V10%

321

4

5

Q7440RJK0365DPA

CRITICAL

MLP5X6-LFPAK-WPAK

2

1C7401

1.0UF

X7R

10%16V

805

2 1

C7430

X7R-CERM10%16V

0.1UF

402

5

4321

D7440

CRITICAL

CTLSH3-30M833TLM833

2

1 C7455

5%

402NP0-C0G25V

1000PF

NOSTUFF

1 TH7401RES,68k,0603,5%113S0127

CPU VTT REGULATORSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

VTT_REG_ICOMP

VTT_REG_ISUM

CPUVTT_REG_EN

VTT_REG_COMP1

VTT_REG_FB

VTT_REG_VSEN

VTT_REG_COMP

VTT_REG_VIDFF

VTT_REG_IREF

VTT_VID2

VTT_VID4

PPVTT_S0_CPU_REG

VTT_VID0

VTT_VID12P5

VTT_OFST

VTT_REG_RGND

VTT_REG_REF

VTT_REG_RGND_1

VTT_REG_FS

VTT_VID1

VTT_VID3

VTT_ICOMP1

VTT_REG_ISEN1

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6MM

DIDT=TRUE

VTT_REG_PHASE2NET_PHYSICAL_TYPE=POWER

SWITCHNODE

DIDT=TRUE

VTT_REG_LGATE1



VTT_REG_OCSET


PP5V_CPUVTT_VR

VTT_REG_PHASE1

CPU_VTTSENSE_R_N

VTT_REG_BOOT1



DIDT=TRUE

CPU_VTTSENSE_R_P


DIDT=TRUE

VTT_REG_BOOT2_R


VTT_REG_PH2_SNUBDIDT=TRUE

CPU_VTTSENSE_P

CPU_VTTSENSE_N


MIN_NECK_WIDTH=0.2 mm VTT_REG_UGATE2

DIDT=TRUE

PPVTT_S0_CPU_REGVTT_REG_VSEN_1PP5V_CPUVTT_VR

DIDT=TRUE

VTT_REG_PH1_SNUB

VTT_REG_ISEN2

DIDT=TRUEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6MM

VTT_REG_BOOT1_R

VTT_ICOMP2

VTT_REG_PHASE2

VTT_REG_VIDFF1

VTT_REG_VIDFF2




DIDT=TRUE



VTT_REG_BOOT2

CPUVTT_REG_PGOOD


PPVTT_S0_CPU_REG

DIDT=TRUE

VTT_REG_UGATE1



MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2 mm

VTT_REG_LGATE2

DIDT=TRUEMIN_LINE_WIDTH=0.6MM


=PP12V_S0_CPU_VTT_VREGNET_PHYSICAL_TYPE=POWERDIDT=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6MM

VTT_REG_PHASE1

DIDT=TRUE

SWITCHNODE

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89

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89

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89

67 89

89

89

67 89

67 89

89

89

89

89

13 49 89

13 89

89

6 49 67

67 89

89

67 89

6

6 67

89

6 49 67

89

89

6 67

67 89

www.vinafix.vn

VBST

TON

LL

DRVH

DRVL

V5FILT V5DRV

PGNDGND

EN_PSV

VOUT

TRIP

VFB

THRM_PAD

PGOOD

SYM 2

OUT

IND1

G1

S2

G2

S1/D2




36

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REVISION

DRAWING NUMBER SIZE

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PAGE TITLE

C

A

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Apple Inc.

PAGE


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C

345678

D

B

8 7 5 4 2 1

(PPCHCORE_REG_FB)

OUTPUT BULK DECOUPLING

376S0801

Vout= 0.75*( 1 + 8.45/21) = 1.05Vout= 0.75*( 1+R7615/R7616)

IBEX PEAK CORE REG 1.05V OUTPUT = PP1V05_S0_REG

AVG = 3APEAK = 7.5AVOUT = 1.05V

PP1V05_S0_REG

(PP1V05_S0_FB)3

5

14

4 10

11

2

15

6

812

7

1

9

13

U7600TPS51117RGY_QFN14

CRITICAL

QFN

2

1 C7614

603

25V

NOSTUFF

CERM

5%1000PF

2

1R76140.499

603MF1/10W1%

NOSTUFF

21

L7614CRITICAL

SM-IHLP-1

1.0UH-13A-5.6M-OHM

2

1R76158.45K1%

402MF-LF1/16W

2

1 C7607CRITICAL

330UF

CASE-D3L-SMPOLY-TANT6.3V20%

2

1 C7609

X5R-CERM16V

10UF

0805

10%

CRITICALNOSTUFF

2

1 C7608CRITICAL

0805X5R-CERM

10%16V

10UF

2

1R76703001/16W5%

MF-LF402

2

1 C767010%16VX5R402

1UF

21

XW7600SM

OMIT

2

1 C761210%

0805

10UF16V

CRITICAL

X5R-CERM

5 62 63 91

62 91

21

XW7601SM

OMIT

21

XW7614SM

OMIT

2

1R7660

1/16W

6.98K1%

MF-LF402

21

R7651

1%

200K

402

1/16WMF-LF

2

1 C7613

CRITICAL

10UF

X5R-CERM0805

10%16V

2 1

C7650

X5R

10%25V

402

0.1UF

2 1

R76500

1/10WMF-LF

5%

603

2

1C7601

6.3V20%

603X5R

10UF

2

1R768010K

1%1/16WMF-LF

402

2

1R761621K1%1/16WMF-LF402

543

7

6

1

2

Q7601WPAK

CRITICAL

RJK0384DPA

2

1 C762010%50VX7R402

0.001UF2

1 C7611

16V10%

402X5R

0.1UF

2

1 C762110%50VX7R402

0.001UF

2

1 C7610

0805

10UF

CRITICAL

10%16VX5R-CERM

IBEX PEAK CORE

PCHCORE_REG_VFB

AGND_PCHCORE_REG

PCHCORE_REG_PGOOD

PCHCORE_REG_EN

PCHCORE_PGND_XW

PCHCORE_REG_TRIP

PCHCORE_REG_PHASE_C


DIDT=TRUE

PCHCORE_REG_BOOT_R

=PP5V_S0_PCH_CORE_VREG NET_PHYSICAL_TYPE=POWER

=PP3V3_S0_PCH

PCHCORE_REG_5V_FLT

DIDT=TRUE MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PCHCORE_REG_UGATE

DIDT=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PCHCORE_REG_BOOT

PCHCORE_REG_TON

MIN_LINE_WIDTH=0.6MMPCHCORE_REG_LGATE

DIDT=TRUEMIN_NECK_WIDTH=0.2MM

PP1V05_S0_REGNET_PHYSICAL_TYPE=POWER

SWITCHNODEMIN_LINE_WIDTH=0.6MMDIDT=TRUEMIN_NECK_WIDTH=0.2MM

PCHCORE_REG_PHASE

OP_1V05_S0_FB


NET_PHYSICAL_TYPE=POWERDIDT=TRUE

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89

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89

89

89

89

6

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OUT

D1

G1

S2

G2

S1/D2

S

D

G

S

D

G

UGATE2

VCC2

VCC1

PGOOD1

LDO5

UGATE1

BOOT1

PHASE2PHASE1

LGATE2LGATE1

OCSET2OCSET1

ISEN1 ISEN2

VOUT1 VOUT2

FB2

EN1

PGNDTHRM

BOOT2

FSET2

EN2

FSET1

FB1

VIN

FCCM

PGOOD2

PAD




36

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PAGE


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345678

D

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8 7 5 4 2 1


(P3V3S5_LGATE)

EMC: C7754,C7755

376S0801

128S0237


5V S3 REGULATOR

(P3V3S5_PHASE)

RATO LPLACE CLOSEEMC CAPS

PLACE AT Q7330

<Ra>

RB

5V OUTPUT

Power Rating ?

PLACE AT L7750.2EMC: C7763,C7764

EMC CAPSPLACE CLOSE TO FET

(P3V3S5_UGATE)

376S0631

<Rb>

Vout = 0.6V * (1 + Ra / Rb)

3V3 S5 REGULATOR

3V3 OUTPUT

376S0631

2

1 C7762330UF

POLY-TANTCASE-D3L-SM

20%6.3V

CRITICAL

2

1R774716.5K1%1/16WMF-LF402

2

1 C77470.01UF

402CERM16V10%

2

1 C7777NOSTUFF

CERM50V10%

402

0.001UF

2

1C7757NOSTUFF

0.001UF

CERM402

10%50V

21

L7750CRITICAL

2.2UH-10A-12.5MOHMPAB0705AR-SM

2

1C7721

6.3V20%

CRITICAL

POLY-TANTCASE-D3L-SM

330UF

2

1R7723

1/16WMF-LF402

33K5%

2

1R7722

402MF-LF1/16W

68K5%

62

2

1R7724

1/16WMF-LF

402

1%976

2

1R7759

402MF-LF1/16W

1%976

2

1R7755

402MF-LF1/16W

1%75K

2

1 C7750270UF20%

ELEC16V

CRITICAL

8X9-TH1

5 4 3

7

6

1

2

Q7710WPAK

RJK0384DPA

321

4

5

Q7750MLP5X6-LFPAK-Q5ACSD58851Q5A

CRITICAL

2

1C776410%

402

50VX7R

0.001UF

321

4

5

Q7751CSD58851Q5A

CRITICAL

MLP5X6-LFPAK-Q5A

2

1 C7722

X5R402

16V

0.1UF10%

2

1C7763

10%

402

50VX7R

0.001UF

2

1

XW7751OMITSM

2

1C7761

6.3VPOLY-TANT

20%330UF

CASE-D3L-SM

CRITICAL

2

1 C7760

6.3V20%805-1CERM

10UF

2

1C7759

25VNP0-C0G

1000PF

402

5%

2

1 R775610K1%1/16WMF-LF402

5

4

3

2

1

D7750CTLSH3-30M833

TLM833

CRITICAL

2 1

C7756

10%

0.1UF

25VX5R402

2

1C775310UF

0805

16VX5R-CERM

10%

2

1R7752

NOSTUFFMF

1/10W1%603

0.499

2 1

R7750

1/10W

0

5%

603MF-LF

2

1 C7711

X5R402

10%16V

0.1UF

2

1C7752

16V10%

10UF

0805X5R-CERM

2

1C771010UF

X5R-CERM16V10%

0805

2 1

XW7716

PLACEMENT_NOTE=PLACE NEXT TO C7716

OMIT

SM

2

1C77201000PF

NP0-C0G25V5%

402

2

1R7720

MF-LF

1%

402

1/16W

45.3K

2

1C7755

10%0.1UF

25VX5R402

2

1R7721

MF1/16W

10.0K

402

0.5%

2

1C7712

X5R-CERM

10%

0805

16V

10UF

2

1C7717

10%10UF

X5R-CERM16V

0805

2

1C7754

25V

402X5R

0.1UF10%

2

1C7715

10%16V

0805X5R-CERM

10UF

279

17

45

2214

29

2313

17

19

2511

2016

18

2610

26

3

288

2412

2115

U7700

QFNISL62383

CRITICAL

2

1C7713100UF

20%16V

POLY6.3X9-TH

CRITICAL

2

1 C7716

CERM16V20%

603

0.1UF

2

1 C7723

20%

603CERM16V

0.1UF

21

C7790

10%

CERM

8200PF

603

50V

2

1R7791

402

1%1/16WMF-LF

16.5K

2

1 C77301000PF

NOSTUFF

5%

NP0-C0G25V

402

2

1R77300.4991%1/10W

NOSTUFF

MF603

21

C7714X7R10%

0.1UF

50V 603-121

R7710

5%1/10W

0

MF-LF603

21

R7790

MF-LF1/16W1%

402

16.5K

2

1C775110UF

10%

X5R-CERM0805

16V

2 1

R7770

1%402

1/16WMF-LF

14.3K21

C7770

CERM402

0.01UF

10%16V

2

1R7771

402MF-LF1/16W

1%14.3K

21

L7710CRITICAL

MMD06CZ-SM

2.2UH-14A

2

1C7740

603

16VX5R

1UF10% 2

1 C7741

X5R

1UF10%16V

603

2

1R77402.2

1/8WMF-LF805

5%2

1 C774220%

603

6.3VCERM

4.7UF

5

4

3

2

1

D7700

TLM833

CRITICALCTLSH3-30M833

2

1 C7701

402CERM

0.01UF16V10%

2

1R770116.5K1%1/16WMF-LF402


5V_S3 / 3V3_S5 VREGS

P5VS3_REG_OCSET

PP5V_S3_REG


P5VS3_REG_PHASEDIDT=TRUE

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6MM

SWITCHNODE

DIDT=TRUE NET_PHYSICAL_TYPE=POWER

P3V3S5_REG_OCSET

P3V3S5_REG_SNUB

DIDT=TRUE

DIDT=TRUE

NET_PHYSICAL_TYPE=POWERSWITCHNODE


P3V3S5_REG_PHASEDIDT=TRUE

P3V3S5_REG_ISEN

P3V3S5_12VE_EN1

P3V3S5_REG_FSET1

P5VS3_REG_ISEN

P5VS3_REG_VOUT2

P5VS3_REG_FB

P5VS3_REG_FSET2

P3V3S5_REG_VOUT1

P3V3S5_REG_FB


5V_SNUBBER

DIDT=TRUE

MIN_NECK_WIDTH=0.2 MM


DIDT=TRUE


P5VS3_REG_BOOT_R

TP_P3V3S5_REG_PGOOD

P3V3S5_REG_BOOT

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM DIDT=TRUE

P3V3S5_REG_BOOT_RMIN_NECK_WIDTH=0.2MM

DIDT=TRUEMIN_LINE_WIDTH=0.6MM

P5VS3_EN

P5V_S5_VCC1

P3V3S5_REG_FB_R

P5VS5_REG_FB_R


DIDT=TRUE MIN_LINE_WIDTH=0.6MMP5VS3_REG_LGATE

PP3V3_S5_REG

P5V_S5_LDO_R

DIDT=TRUE

P5VS3_REG_UGATE

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2 MM

DIDT=TRUE

P5VS3_REG_BOOT

TP_P5VS3_REG_FCCM


GATE_NODE=TRUEMIN_LINE_WIDTH=0.6MM

P3V3S5_REG_LGATEDIDT=TRUE

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMGATE_NODE=TRUE

DIDT=TRUE

P3V3S5_REG_UGATE

P5VS3_REG_PGOOD

=PP12V_S5_P3V3S5_VREG

NET_PHYSICAL_TYPE=POWERDIDT=TRUE

DIDT=TRUE


=PP12V_S5_P5VS3_VREG


PP5V_S5_LDO

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89

6

6

6

www.vinafix.vn

S

D

G

S

D

G

MODE

VDDQSNSCOMP

NC0

NC1

VTTSNS

VTT

VTTREF

PGOOD

S3

S5

VTTGND THRM_PAD GND CS_GNDPGND

CS

LL

DRVL

DRVH

VDDQSET

VBST

VLDOINV5FILTV5IN

SYM (2 OF 2)

NCNC

IN

IN

VIN

LX

VFB

RSI

EN

POR

SKIP

GND THRM_PAD

OUT




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

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C

A

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Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

1.8 V SUPPLY

VDDQ PGOOD

VDDQ/VTTREF Enable

(DDRREG_LL)

FEEDBACK THROUGH SHORT

Vout = VTTREF

Vout = VDDQSNS/2

10mA max load

OFF

(DDRREG_DRVH)

(DDRREG_CSGND)

ONON

Vo=0.8*(1+ 59/47)=1.804V

Vo=0.8*(1+ Ra/Rb)

<Rb>

<Ra>

Vout = 0.75V * (1 + Ra / Rb)

<Rb>

<Ra>

(NOT USED)

AVG = 6.7APEAK = 11AVOUT = 1.5V

PPDDR_S3_REG

S3S5

S0 HI

LOLO HI

S5HI

LOONOFF

ON

OFF

SHOULD NOT NEED TP

ONVTT

(DDRREG_DRVL)

EMC CAPSPLACE CLOSE TO FET

EMC CAPSPLACE CLOSE TO L7830


(DDRREG_VDDQSNS)

(DDRREG_FB)

VTT Enable

1.5 V DDR SUPPLY

OFF

VDDQS3STATE VTTREF

2

1 C7834

603

0.1UF

CERM16V20%

2

1 C7837

603X5R6.3V20%10UF

2

1C7836CRITICALNOSTUFF

POLY

20%2V

330UF-0.009OHM

CASE-D2-HF

21

L7830CRITICAL

MSQ12111R5LF-TH

1.5UH-22A-4MOHM

2

1 C7835CRITICAL

20%

CASE-D2-HFPOLY2V

330UF-0.009OHM2

1C78411000PF

NP0-C0G402

25V5%

NOSTUFF

321

4

5

Q7830MLP5X6-LFPAK-Q5A

CRITICAL

CSD58851Q5A

2

1 C7832

16V

0805

10UF10%

X5R-CERM

2

1 C78330.1UF20%

603

16VCERM

321

4

5

Q7831MLP5X6-LFPAK-Q5ACSD58850Q5A

CRITICAL

2

1R78310.499

NOSTUFF

603MF1/10W1%

21

XW7831SM

OMITPLACEMENT_NOTE=PLACE NEXT TO Q7831

21

C7840

CERM25V

603

20%

0.1UF

21

R78400

603

1/10W5%

MF-LF

2

1 C781510UF

6.3V

603X5R

20%

2

1 C7839

10%0.001UF

402X7R50V

2

1R7810

1/16WMF-LF

402

1%6.04K

2

5

1

24

23

8

9

22

15

14

25

11

10

13

18

12

7

4

20

3

19

21

17

16

6

U7800

QFN

CRITICAL

TPS51116

2

1

XW7801SM OMIT

2

1

XW7800OMIT

SM

2

1C78011UF

X5R402

10%10V

21

R7801

402MF-LF1/16W5%

4.7

2

1C7805

402

0.033UF

X5R16V10%

2

1C7800

603

6.3VCERM

20%4.7UF

21

XW7803SM

OMIT

2

1 C7803

20%22UF

CRITICAL

CERM-X5R805-3

6.3V2

1C7804

CERM-X5R805-3

CRITICAL

22UF20%

6.3V

32 62 91

62

1

6

9

4 5

3

8

7

2

U7850ISL8009B

CRITICAL

DFN

2

1R7853

100K5%1/16WMF-LF402

2

1

XW7830SM

OMIT

PLACEMENT_NOTE=PLACE NEXT TO L7830

2

1

R7852

1/16WMF-LF402

100K5%

21

L7850CRITICAL

MMD04BZ-SM

2.2UH-3.25A-68M-OHM

2

1R7851

4021%

MF-LF1/16W

47.0K

2

1R7850

MF-LF1%

59.0K

4021/16W2

1

C7850402

50V

CERM

5%120PF

2

1R7832

402

1%1/16WMF-LF

15.0K

2

1

C7854

6.3VX5R805

10UF10%

2

1

C7855

6.3VX5R805

10UF10%

5

4 3 2 1

D7831CRITICAL

CTLSH3-30M833

TLM833

5 62 91

2

1 C7852

6.3V

805

22UF20%

CERM 2

1 C7853

CERM

20%22UF

805

6.3V

2

1C7820NO STUFF

50V5%

CERM402

100PF

2

1C7830CRITICAL

20%270UF

16VELEC

8X9-TH1

2

1C7831

16VELEC

20%270UF

CRITICAL

8X9-TH1

2

1 C78511UF16VX5R

10%

402

2

1R7833

MF-LF

1%15.0K

402

1/16W

2

1 C7838

10%0.001UF

402X7R50V

1.5V / 1.8V VREGSSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PM_PGOOD_DDRREG_S3

=DDRREG_ENDDRVTT_EN

DIDT=TRUE

DDR_REG_UGATE


NET_PHYSICAL_TYPE=POWERMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

VOLTAGE=5V

PP5V_S3_DDR_REG_V5FILT

DDR_REG_CSGNDMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

DDR_REG_VDDQSNS


DDR_REG_VTTSNSNO_TEST=TRUE


DIDT=TRUEDDR_REG_LGATE

PP1V8_S0_REG


SWITCHNODEDIDT=TRUENET_PHYSICAL_TYPE=POWER

P1V8_REG_PHASE

DDR_REG_FB

P1V8_REG_VFB


DDR_REG_PGND


P1V8_REG_POR

MIN_NECK_WIDTH=0.4MMDIDT=TRUE


1V5_SNUBBER

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmDDR_REG_BOOT

DIDT=TRUE

P1V8_REG_SKIP

DIDT=TRUE


DDR_REG_BOOT_R

PPVTT_S0_DDR_LDO

PPVTT_S3_DDR_BUF

DDR_REG_CS


SWITCHNODE

MIN_LINE_WIDTH=0.6 mmDDR_REG_PHASE

DIDT=TRUEMIN_NECK_WIDTH=0.2 mm


PP1V5_S3_REG



=PP12V_S5_DDR_VREGDIDT=TRUE

=PP5V_S3_DDR_VREG


VOLTAGE=0VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

AGND_DDR_REG

=PP5V_S0_P1V8_VREG

78 OF 110

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051-8600

70 OF 92

89

89

89

89

89

89

6 49

89

89

89

89

89

89

6

89

89

89

6 49 50

6

6

6

www.vinafix.vn

SW

BOOSTVIN

BIAS

SHDN*

GND

NC

FB

PADTHRM

NC

VIN

LX

VFB

RSI

EN

POR

SKIP

GND THRM_PAD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

1.05V S5 SUPPLY

Vout = 1.25V * (1 + Ra / Rb)

<Ra>

<Rb>

Vout = 3.425250mA max output(Switcher limit)

Remove R7911 after Proto-1

3.425V "G3Hot" Supply

353S2171

R7911 allow G3H current measuremnet

Supply needs to guarantee 3.31V delivered to SMC VRef generator

REMOVE for K60/K61

2

1R7980

402MF-LF

100K5%1/16W

NOSTUFF

21

L79502.2UH-3.25A-68M-OHM

MMD04BZ-SM

NOSTUFF

2

1 C7950

6.3VX5R603

10UF20%

NOSTUFF

2

1 C794010UF6.3V20%

603X5R

NOSTUFF2

1R798131.6K1%

402MF-LF1/16W

NOSTUFF

2

1R7982

402

1/16W1%100K

MF-LF

NOSTUFF

2

1 C796010UF6.3VX5R805

10%

NOSTUFF

2

1 C796110UF6.3VX5R805

10%

NOSTUFF

2

1C7910

25V10%

X5R

10UF

805

21

R7910

1/16W5%

402MF-LF

0

6

9

48

5

1

3

2

U7900DFN

LT3470A

CRITICAL

2

1C79000.22UF

X5R402

20%6.3V

21

L7900CRITICAL

33UH

CDPH4D19FHF-SM

2

1R7901

1/16W1%

402MF-LF

200K

2

1C790122pF

CERM

5%50V

402 2

1R7900348K

402

1%1/16WMF-LF

2

1 C7902

X5R-CERM603

20%6.3V

22UF

21

R7911

5%

0

MF-LF1/16W

402

2

1R79865%1/16WMF-LF402

100K

NOSTUFF

2

1R79871K

402MF-LF1/16W5%

NOSTUFF

2

1 C7962

16V

402X5R

1UF10%

NOSTUFF

2

1

C798150V

CERM402

5%120PF

NOSTUFF

1

6

9

4 5

3

8

7

2

U7950DFN

ISL8009B

NOSTUFF

2

1R7985100K

402

5%1/16WMF-LF

NOSTUFF


1.05 S5 SUPPLY

MIN_NECK_WIDTH=0.4 mmVOLTAGE=12V

PP12V_G3HMIN_LINE_WIDTH=0.6 mm MIN_LINE_WIDTH=0.6 mm

MIN_NECK_WIDTH=0.4 mmVOLTAGE=12V

PP12V_G3H_R

PP3V42_G3H_R

DIDT=TRUE

P3V42G3H_SW

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

P3V42G3H_BOOST

PP3V42_G3H_REG

P3V42G3H_FB

P1V05S5_REG_VFB


PP1V05_S5_REG

SWITCHNODEDIDT=TRUE


P1V05_S5_REG_PHASE

P1V05S5_REG_POR

P1V05S5_REG_SKIP

P1V05S5_REG_EN_R


=PP3V3_S5_P1V05S5_VREG

79 OF 110

A.0.0

051-8600

71 OF 92

7

6 89

89

89 89

89

6

89

89

6

89

6

www.vinafix.vn

G

SD

G

SD

G

SD

G S

D

G

DS

G

PG

THRMGND

NC

D

VCC

S

ON

PAD

G

D

S

G

D

S

IN

G

PG

THRMGND

NC

D

VCC

S

ON

PAD

G

PG

THRMGND

NC

D

VCC

S

ON

PAD

IN

IN

G

PG

THRMGND

NC

D

VCC

S

ON

PAD

IN

G

SD

G

D

S

G

D

S

G

PG

THRMGND

NC

D

VCC

S

ON

PAD

IN

IN

G

SD

G

S D

G

SD

G

SD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

ALIAS =PP3V3_ME_PWRCTL TO

BYPASS FET CIRCUIT FOR PROTO 11.5V S0 FET (6.2A PK / 3A AVG)

KEEP PADS IN CASE VCC_3V3 ME IS REQUIRED

IN STATES OTHER THAN S0. DELETE AFTER PROTO1

BYPASS FET CIRCUIT FOR PROTO 1

IN STATES OTHER THAN S0. DELETE AFTER PROTO1

3.3V S0 FET (3.4APK / 1.9A AVG)

ON PAGE 6

NOTE:

3.3V S3 FET (2.9A PK / 1.2A AVG)

3.3VME FET (86MA MAX)KEEP PADS IN CASE VCC ME IS REQUIRED

PP3V3_ME_FET

R8063 ADD FOR PROTO1 TO KEEP Q8060 OFF

REMOVE ALL OF THIS FOR PROTO2

12V S3 FET ( < 200MA )

5V S0 FET (7A PK/2.7A AVG)

1V05 ME FETS (S0: 2.2A MAX SM: 387MA)

2

1 C8050

16VX5R

10%0.1UF

4023

2

1

4

5

Q8000POWER33

CRITICAL

FDMC8296

3

2

1

4

5

Q8050CRITICAL

POWER33FDMC8296

3

2

1

4

5

Q8070POWER33

FDMC8296

NOSTUFF

2

1

3

Q8031NOSTUFF

SOT23-HF12N7002

2

1

3

Q8030NOSTUFF

TP0610S0T23-3

21

R8031NOSTUFF

402

5%

MF-LF1/16W

10K

2

1 C8030NOSTUFF

0.47UF

805

16V10%

X7R

1

9

6

8

2

4

7

5

U8053TDFN

CRITICAL

SLG5AP001

1

2

6

Q80632N7002DW-X-GSOT-363

NOSTUFF

4

5

3

Q8063

SOT-3632N7002DW-X-G

2

1 C806016VX7R805

10%0.47UF

NOSTUFF

2

1R806010K

402

5%

MF-LF1/16W

NOSTUFF

2

1R8061

402MF-LF

10K5%

NOSTUFF

1/16W

21

R806210K

5%

402

1/16WMF-LF

NOSTUFF

2

1 C8082

603X5R

20%10UF6.3V

NOSTUFF

2

1 C808310UF

X5R603

20%6.3V

NOSTUFF

62 91

2

1R8063

402MF-LF1/16W5%10K

NOSTUFF

2

1R80895%1/16WMF-LF

100K

402

NOSTUFF

2

1R8075100K

402MF-LF1/16W5%

NOSTUFF

2

1 C8000

402X5R16V10%0.1UF

1

9

6

8

2

4

7

5

U8000SLG5AP001

TDFN

CRITICAL

2

1 C802510%

X5R16V

402

0.1UF

1

9

6

8

2

4

7

5

U8025

CRITICAL

TDFNSLG5AP001

62 91

62 91

2

1 C8070

402

0.1UF16VX5R

10%

NOSTUFF

2

1 C8053

16VX5R

10%0.1UF

402

1

9

6

8

2

4

7

5

U8070TDFN

SLG5AP001

CRITICAL

NOSTUFF

62 91

3

2

1

4

5

Q8053POWER33

FDMC8296

CRITICAL

1

2

6

Q80822N7002DW-X-GSOT-363

4

5

3

Q8082

SOT-3632N7002DW-X-G

NOSTUFF2

1R8080NOSTUFF

1/16W5%

402

10K

MF-LF

1

9

6

8

2

4

7

5

U8050SLG5AP001

CRITICAL

TDFN

2

1R8081

MF-LF1/16W5%

402

10K

NOSTUFF

21

R8082NOSTUFF

10K

1/16WMF-LF

5%

402

2

1 C8080

805

16V10%

X7R

0.47UF

NOSTUFF

2

1R8000NOSTUFF

402MF-LF

10K1/16W5%

2

1R8050

MF-LF1/16W5%

402

10K

2

1R805110K

402

5%1/16WMF-LF

2

1R807010K5%1/16WMF-LF402

NOSTUFF

2

1R8020NOSTUFF

402MF-LF

10K1/16W5%

21

R8084

1206

1/4W

0

5%

MF-LF

21

R8071

5%

0

MF-LF1/10W

603

62 91

2

1R8030NOSTUFF

5%1/16W

10K

MF-LF402

62 91

3

2

1

4

5

Q8080NOSTUFF

POWER33FDMC8296

3

2

1

4

5

Q8081POWER33

FDMC8296

NOSTUFF

3

2

1

4

5

Q8060POWER33

FDMC8296

NOSTUFF

3

2

1

4

5

Q8025CRITICAL

POWER33FDMC8296

S3+S0 FETSSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PP3V3_S3_FET

=PP3V3_S5_S3FET

PGOOD_P3V3_S3

=PP12V_S5_PWRCTL

=PP12V_S5_PWRCTL

=PP1V05_S0_SM_FET

=PP3V3_S5_S0FET

PP5V_S0_FET

P1V5_S0_EN

=PP1V05_S5_SM_FET

PM_ME_S0_EN_R

P1V05_ME_SM_EN_G

PM_ME_S0_EN_G1

=PP3V3_S3_PWRCTL

P1V05_ME_SM_EN

P1V5_S0_EN_G

P3V3_S0_EN_G

P3V3_S3_EN_G

P5V_S0_EN_G

=PPDDR_S3_S0FET

P1V05_ME_S0_EN

=PP3V3_S0_PWRCTL

P3V3S3_EN

=PP12V_S5_PWRCTL

=PP3V3_S0_PWRCTL

PP3V3_S0_FET

P3V3S0_EN

=PP5V_S3_S0FET

PGOOD_P5V_S0

=PP3V3_S0_PWRCTL

PGOOD_P3V3_S0

PGOOD_P1V5_S0

P12V_S3_EN

P12V_S3_EN_D

=PP12V_S5_S3_FET

P12V_S3_EN_G

=PP12V_S5_PWRCTL

=PP12V_S5_PWRCTL

PP1V05_SM_SOURCE

VOLTAGE=12VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mm


MAKE_BASE=TRUEPP12V_S3_FET

P5VS0_EN

=PP12V_S5_PWRCTL


VOLTAGE=3.3V


MAKE_BASE=TRUEPP3V3_SM_FET


=PP3V3_S0_ME

=PP3V3_SM_PWRCTL

P3V3ME_EN

PP1V05_SM_FETMAKE_BASE=TRUE




VOLTAGE=1.5V


PP1V5_S0_FETMAKE_BASE=TRUE



P3V3_ME_EN_G

P1V05_ME_SM_EN_D P1V05_ME_SM_EN_G2

=PP12V_S5_PWRCTL

=PP3V3_S5_SM_FET

PM_ME_S0_EN_G

PGOOD_P3V3_ME

80 OF 110

A.0.0

051-8600

72 OF 92

3

3

3

3

3

6

6

34 91

6 63 72

6 63 72

6

6

6

6

91

91

6 63

62 91

6

62

5 6 62 63 72

6 63 72

5 6 62 63 72

6 6

62 91

5 6 62 63 72

48 63 91

6

6 63

72

6 63 72

6

6 63 72

6

6

6 63

6

6 49

6 63 72

6

91

www.vinafix.vn

3V3

5V

PWR_SRC

(4 OF 4)

PCI-E

DP

(2 OF 4)

PEX_TX15*

DP_A_AUX*

PEX_TX1*

PEX_TX13

PEX_TX11*

PEX_TX7*

PEX_TX8*

PEX_TX9

PEX_TX10

PEX_STD_SW*

PEX_TX15

PEX_TX14*

PEX_TX14

PEX_TX13*

PEX_TX12*

PEX_TX12

PEX_TX11

PEX_TX10*

PEX_TX9*

PEX_TX8

PEX_TX7

PEX_TX6*

PEX_TX6

PEX_TX5*

PEX_TX5

PEX_TX4*

PEX_TX4

PEX_TX3*

PEX_TX3

PEX_TX2*

PEX_TX2

PEX_TX1

PEX_TX0*

PEX_TX0

PEX_REFCLK*

PEX_REFCLK

PEX_RST*

DP_C_HPD

DP_D_HPD

DP_B_HPD

DP_A_HPD

PEX_RX15*

PEX_RX15

PEX_RX14*

PEX_RX14

PEX_RX13*

PEX_RX13

PEX_RX12*

PEX_RX12

PEX_RX11*

PEX_RX11

PEX_RX10*

PEX_RX10

PEX_RX9*

PEX_RX9

PEX_RX8*

PEX_RX8

PEX_RX7*

PEX_RX7

PEX_RX6*

PEX_RX6

PEX_RX5*

PEX_RX5

PEX_RX4*

PEX_RX4

PEX_RX3*

PEX_RX3

PEX_RX2*

PEX_RX2

PEX_RX1*

PEX_RX1

PEX_RX0*

PEX_RX0

CLK_REQ*

DP_C_L0*

DP_C_L0

DP_C_L1*

DP_D_L0*

DP_C_L1

DP_D_L0

DP_C_L2*

DP_D_L1*

DP_C_L2

DP_D_L1

DP_C_L3*

DP_D_L2*

DP_C_L3

DP_D_L2

DP_D_L3*

DP_D_L3

DP_B_L0*

DP_B_L0

DP_B_L1*

DP_A_L0*

DP_B_L1

DP_A_L0

DP_B_L2*

DP_A_L1*

DP_B_L2

DP_A_L1

DP_B_L3*

DP_A_L2*

DP_B_L3

DP_A_L2

DP_A_L3*

DP_A_L3

DP_C_AUX*

DP_C_AUX

DP_D_AUX*

DP_D_AUX

DP_B_AUX*

DP_B_AUX

DP_A_AUX




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

- MXM

- =PPV_S0_MXM_PWRSRC


5V

3V3 1.0 A

2.5 A

UP TO 10 A

CURRENT POWER

3.3 W

12.5 W

(NONE)

- =PP5V_S0_MXM

PWR (7-20V)

VOLTAGE

MXM SPEC POWER REQUIREMENTS(NOT NECESSARILY THE SAME FOR EVERY MODULE)

PLATFORM DEPENDENT

- =PP3V3_S0_MXM


APPLE P/N: 516S0699


Page Notes

2

1 C8400MXM

20%

6.3X5.5-SM1ELEC35V

22UF

2

1 C840122UF20%6.3V

MXM

CERM-X5R805-3

2

1 C8410

50V

402X7R

10%

MXM

0.001UF

2

1 C84120.001UF50V

402

10%

X7R

MXM

2

1 C84130.001UF50V10%

X7R402

MXM

2

1 C84140.001UF50V

402

10%

X7R

MXM

2

1R8400MXM

MF-LF

5%1/16W

402

100K

2

1 C841622UF20%6.3V

MXM

CERM-X5R805-3

2

1 C84150.001UF50V

402X7R

10%

MXM

E2

E1

9

7

5

3

1

280

278

J8400B35P101-0121

MXM

F-RT-SM

84

86

90

92

96

98

102

104

108

110

114

116

120

122

136

138

48

50

54

56

60

62

66

68

72

74

78

80

142

144

148

150

19

85

87

91

93

97

99

103

105

109

111

115

117

121

123

135

137

49

51

55

57

61

63

67

69

73

75

79

81

141

143

147

149

156

153

155

224

226

218

220

212

214

206

208

236

230

232

217

219

211

213

205

207

199

201

234

223

225

264

266

258

260

252

254

246

248

274

270

272

271

273

265

267

259

261

253

255

276

277

279

154

J8400B35P101-0121

MXM

F-RT-SM

CRITICAL

MXM PCIe, DP & PowerSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

MXM_PCIE_STD_SWING_L

MXM_RESET_L

MXM_PCIE_D2R_P<1>

MXM_PCIE_D2R_N<6>

MXM_PCIE_D2R_N<10>

MXM_PCIE_D2R_N<11>

MXM_DP_A_ML_P<0>

MXM_DP_A_ML_N<1>

MXM_DP_A_ML_P<1>

MXM_DP_A_ML_N<2>

MXM_DP_A_ML_P<2>

MXM_PCIE_D2R_N<2>

MXM_PCIE_D2R_N<9>

MXM_PCIE_D2R_P<7>

MXM_PCIE_D2R_P<5>

MXM_PCIE_D2R_N<5>

MXM_PCIE_D2R_P<6>

MXM_PCIE_D2R_P<12>

MXM_PCIE_D2R_N<12>

MXM_PCIE_D2R_N<13>

MXM_PCIE_D2R_P<15>

MXM_PCIE_D2R_P<10>

MXM_PCIE_D2R_P<9>

MXM_PCIE_D2R_N<8>

MXM_PCIE_D2R_P<4>

MXM_PCIE_D2R_N<7>

MXM_PCIE_D2R_P<11>

MXM_PCIE_D2R_P<13>

MXM_PCIE_D2R_N<14>

MXM_PCIE_D2R_P<14>

MXM_PCIE_D2R_N<15>

MXM_PCIE_D2R_P<8>

MXM_PCIE_D2R_P<3>

MXM_PCIE_D2R_N<3>

MXM_PCIE_D2R_N<4>

MXM_PCIE_D2R_P<2>

MXM_PCIE_D2R_N<1>

MXM_PCIE_D2R_P<0>

MXM_PCIE_D2R_N<0>

MXM_PCIE_R2D_N<2>

MXM_PCIE_R2D_P<2>

MXM_PCIE_R2D_P<3>

MXM_PCIE_R2D_N<3>

MXM_PCIE_R2D_N<4>

MXM_PCIE_R2D_N<5>

MXM_PCIE_R2D_P<5>

MXM_PCIE_R2D_N<6>

MXM_PCIE_R2D_P<8>

MXM_PCIE_R2D_N<1>

MXM_PCIE_R2D_P<10>

MXM_PCIE_R2D_N<10>

MXM_PCIE_R2D_N<9>

MXM_PCIE_R2D_N<8>

MXM_PCIE_R2D_P<6>

MXM_PCIE_R2D_P<0>

MXM_PCIE_R2D_N<11>

MXM_PCIE_R2D_P<12>

MXM_PCIE_R2D_P<13>

MXM_PCIE_R2D_P<14>

MXM_PCIE_R2D_N<14>

MXM_PCIE_R2D_P<15>

MXM_PCIE_R2D_N<15>

MXM_PCIE_R2D_P<7>

MXM_PCIE_R2D_P<11>

MXM_PCIE_R2D_N<13>

MXM_PCIE_R2D_N<12>

MXM_PCIE_R2D_P<9>

MXM_PCIE_R2D_P<1>

MXM_PCIE_R2D_P<4>

MXM_PCIE_R2D_N<7>

MXM_PCIE_R2D_N<0>

MXM_DP_C_AUX_P

MXM_DP_B_ML_N<0>

MXM_CLKREQ_L

MXM_DP_B_AUX_P

MXM_DP_B_HPD

MXM_DP_B_ML_P<0>

CLK_100M_MXM_N

CLK_100M_MXM_P

MXM_DP_C_HPD

MXM_DP_D_HPD

MXM_DP_A_HPD

MXM_DP_C_ML_N<0>

MXM_DP_C_ML_P<0>

MXM_DP_C_ML_N<1>

MXM_DP_D_ML_N<0>

MXM_DP_C_ML_P<1>

MXM_DP_D_ML_P<0>

MXM_DP_C_ML_N<2>

MXM_DP_D_ML_N<1>

MXM_DP_C_ML_P<2>

MXM_DP_D_ML_P<1>

MXM_DP_C_ML_N<3>

MXM_DP_D_ML_N<2>

MXM_DP_C_ML_P<3>

MXM_DP_D_ML_P<2>

MXM_DP_D_ML_N<3>

MXM_DP_D_ML_P<3>

MXM_DP_B_ML_N<1>

MXM_DP_A_ML_N<0>

MXM_DP_B_ML_P<1>

MXM_DP_B_ML_N<2>

MXM_DP_B_ML_P<2>

MXM_DP_B_ML_N<3>

MXM_DP_B_ML_P<3>

MXM_DP_A_ML_N<3>

MXM_DP_A_ML_P<3>

MXM_DP_C_AUX_N

MXM_DP_D_AUX_N

MXM_DP_D_AUX_P

MXM_DP_B_AUX_N

=PP3V3_S0_MXM

MXM_DP_A_AUX_N

MXM_DP_A_AUX_P

=PPV_S0_MXM_PWRSRC

=PP3V3_S0_MXM

=PP5V_S0_MXM

84 OF 110

A.0.0

051-8600

73 OF 92

74

9

75 84

75 84

75 84

75 84

78 87

78 87

78 87

78 87

78 87

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

75 84

79 87

76 87

9

76 87

76

76 87

9

9

79

76

78

79 87

79 87

79 87

76 87

79 87

76 87

79 87

76 87

79 87

76 87

79 87

76 87

79 87

76 87

76 87

76 87

76 87

78 87

76 87

76 87

76 87

76 87

76 87

78 87

78 87

79 87

76 87

76 87

76 87

6 63 73 74

78 87

78 87

50

6 63 73 74

6

www.vinafix.vn

WC*

SDA

SCL

E2/NC2

E1/NC1

E0/NC0

VSS

VCC

GPIO0

VGA_DISABLE*

TH_OVERT*

TH_PWM

LVDS_DDC_CLK

LVDS_UTX1

LVDS_UTX2*

RSVD1

PNL_PWR_EN

LVDS_UTX1*

RSVD2

LVDS_UTX2

LVDS_UTX3*

LVDS_LCLK

PRSNT_R*

LVDS_LTX3

DVI_HPD

PWR_EN

SMB_CLK

LVDS_LTX0

LVDS_LTX0*

LVDS_LTX1

LVDS_LTX2

LVDS_LTX2*

LVDS_LTX3*

LVDS_UTX0

LVDS_UTX0*

LVDS_UTX3

PNL_BL_EN

PRSNT_L*

PWRGOOD

VGA_BLUE

VGA_GREEN

VGA_HSYNC

VGA_RED

VGA_VSYNC

VGA_DDC_DAT

GPIO1

GPIO2

HDMI_CEC

OEM0

OEM1

OEM2

OEM3

OEM4

OEM5

OEM7

VGA_DDC_CLK

RSVD3

RSVD4

RSVD5

RSVD7

RSVD8

RSVD9

RSVD10

RSVD11

RSVD12

RSVD13

RSVD14

RSVD15

RSVD16

RSVD17

RSVD18

RSVD19

RSVD21

SMB_DAT

TH_ALERT*

LVDS_UCLK*

LVDS_UCLK

RSVD20

LVDS_LCLK*

LVDS_LTX1*

RSVD6

RSVD0

RSVD22

RSVD23

PWR_LEVEL

LVDS_DDC_DAT

PNL_BL_PWM

OEM6

WAKE*

SYSTEM MANAGEMENT

(1 OF 4)

LVDS

ANALOG DISPLAY

POWER/THERMAL

MANAGEMENT

GNDGND

(3 OF 4)




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

GND = SECONDARY DISPLAY CARDFLOAT = NORMAL VGA MODE

PULLUPS & PULLDOWNS AT MXM CONNECTOR- =SMB_MXM_THRM_DATA

- =SMB_MXM_THRM_CLK

I2C ADDRESS: AC

SYSTEM INTEGRATOR MUST ALIAS THIS EITHER TO A VOLTAGE RAIL,

OR ANOTHER OPEN-DRAIN PGOOD SIGNAL DEPENDING ON DESIRED BEHAVIOR

MXM SYSTEM INFORMATION ROMPLACE CLOSE TO J7800

WE DON’T USE CARD DETECTPULLED TO GROUND ON MXM


STUFF FOR WRITE PROTECT

- =PM_MXM_PGOOD_PULLUP


Page Notes- =PP3V3_S0_MXM


GND = HIGH SWINGFLOAT = LOW SWING

2

1R8570NOSTUFF

0

402

5%1/16WMF-LF

2

1 C8570

402CERM

20%10V

0.1UF

MXM

21

R8500100K

1/16W5%402

MF-LF

7

4

8

5

6

3

2

1

U8570M24C02-WMN6TPHF

SO8

CRITICAL

MXM

21

R8501100K

5%MF-LF 1/16W402

2 1

R8503

402

MF-LF 5%

10K

1/16W

4

162

168

164

170

21

158

160

172

24

20

22

32

34

231

229

227

167

165

163

161

16

14

249

247

12

245

243

242

241

240

239

238

237

235

233

159

10

6

18

8

2

281

23

27

25

45

44

43

42

41

40

39

38

175

177

181

183

187

189

193

195

169

171

182

184

188

190

194

196

200

202

176

178

33

35

29

30

28

2631

J8400B35P101-0121

MXM

F-RT-SM

53

52

283

282

E4

275

269

268

263

47

262

257

256

251

250

E3

244

228

222

221

46

216

215

210

209

204

203

198

197

192

191

37

186

185

180

179

174

173

166

157

152

151

36

146

145

140

139

134

133

125

124

119

118

17

113

112

107

106

101

100

95

94

89

88

15

83

82

77

76

71

70

65

64

59

58

13

11

J8400F-RT-SM

MXM

B35P101-0121

2 1

R8504MXM

0

402

5%MF-LF 1/16W

2 1

R8510NOSTUFF

0

5%

402

MF-LF 1/16W

MXM I/OSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

MXM_PNL_BL_PWM

MXM_PNL_PWR_EN

=PM_MXM_PGOOD_PULLUP

TP_MXM_HDMI_CEC

TP_MXM_GPIO2

TP_MXM_GPIO1

TP_MXM_GPIO0

MXM_LVDS_DDC_CLK

MXM_LVDS_DDC_DAT

TP_MXM_DVI_HPD

MXM_LVDS_A_CLK_N

MXM_LVDS_A_CLK_P

TP_MXM_TH_PWM

TP_MXM_VGA_DDC_CLK

TP_MXM_VGA_DDC_DAT

TP_MXM_VGA_RED

TP_MXM_VGA_VSYNC

TP_MXM_VGA_BLUE

MXM_LVDS_A_DATA_N<2>

PM_MXM_PGOOD

MXM_LVDS_B_DATA_P<2>

MXM_LVDS_B_DATA_N<0>







MXM_LVDS_B_CLK_N

MXM_LVDS_B_CLK_P

MXM_LVDS_A_DATA_P<3>





TP_MXM_WAKE_L

MXM_DETECT_R

MXM_DETECT_L

MXM_OVERT_L

MXM_ALERT_L

=SMB_MXM_THRM_SDA

=SMB_MXM_THRM_SCL

MXM_PWR_LEVEL

PM_MXM_PGOOD

PM_MXM_EN

MXM_DETECT_L

MXM_LVDS_DDC_DAT

MXM_ROM_WP

MXM_LVDS_DDC_CLK

MXM_VGA_DISABLE_L



=PP3V3_S0_MXM

MXM_DETECT_R

=PP3V3_S0_MXM

MXM_PNL_BL_EN

TP_MXM_VGA_HSYNC

TP_MXM_VGA_GREEN

MXM_PCIE_STD_SWING_L

MXM_VGA_DISABLE_L

85 OF 110

A.0.0

051-8600

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81

81

63

74

74

76 87

76 87

76 87

63 74 91

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

76 87

74

74

46

46

48

48

46

63 74 91

63

74

74

74

74

76 87

76 87

6 63 73 74

74

6 63 73 74

81

73

74

www.vinafix.vn

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

MXM RX CAPSMXM TX CAPS

9 84

21C8636 10% X5R0.1UF 40216VMXM

73 84

73 84

21C8600 40216V0.1UF X5R10%MXM

21C8602 402X5R10% 16V0.1UFMXM

21C8601 0.1UF 16V X5R10% 402MXM

21C8604 10%0.1UF X5R 40216VMXM

21C8603 0.1UF 402X5R10% 16VMXM

9 84

9 84

9 84

73 84

9 84

9 84

21C8605 10% 4020.1UF X5R16VMXM73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

21C8606 10% 16V 4020.1UF X5RMXM

21C8607 X5R10% 16V0.1UF 402MXM

21C8608MXM 16V X5R 4020.1UF 10%

21C8609 10% 16V X5R 4020.1UFMXM

21C8610 0.1UF 16V10% X5R 402MXM

21C8611 0.1UF 10% 16V X5R 402MXM

21C8612 10% X5R0.1UF 40216VMXM

21C8613 10% 16V X5R 4020.1UFMXM

21C8614 16V10% X5R 4020.1UFMXM

21C8615 16V10% X5R 4020.1UFMXM

73 84

21C8616 0.1UF 16V10% X5R 402MXM

21C8618 16V10% X5R 4020.1UFMXM

21C8617 16V10% X5R 4020.1UFMXM

21C8620 16V10% X5R 4020.1UFMXM

21C8619 16V10% X5R 4020.1UFMXM

21C8622 0.1UF 402X5R10% 16VMXM

21C8621 16V10% X5R 4020.1UFMXM

9 84

9 84

9 84

21C8637 10%0.1UF X5R 40216VMXM

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

21C8623 0.1UF 402X5R10% 16VMXM

21C8624 16V10% X5R 4020.1UFMXM

21C8625 16V10% X5R 4020.1UFMXM

21C8626 0.1UF 402X5R10% 16VMXM

21C8628 402X5R10% 16V0.1UFMXM

9 84

21C8627 0.1UF 402X5R10% 16VMXM

21C8630 0.1UF 402X5R10% 16VMXM

21C8629 0.1UF 402X5R10% 16VMXM

21C8631 0.1UF 402X5R10% 16VMXM

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

9 84

21C8638 0.1UF X5R10% 40216VMXM

21C8639 0.1UF 402X5R10% 16VMXM

21C8641 0.1UF 16V 402X5R10%MXM

21C8640 0.1UF 40210% X5R16VMXM

21C8642 0.1UF 402X5R10% 16VMXM

21C8643 402X5R10% 16V0.1UFMXM

9 84

21C8644 0.1UF 402X5R10% 16VMXM

21C8645 402X5R10% 16V0.1UFMXM

21C8646 0.1UF 402X5R10% 16VMXM

21C8647 0.1UF 10% 16V 402X5RMXM

21C8648 0.1UF 16V10% X5R 402MXM

21C8649 40216V10% X5R0.1UFMXM

21C8652 16V10% X5R 4020.1UFMXM

21C8653 16V10% X5R 4020.1UFMXM

21C8651 0.1UF 16V10% X5R 402MXM

21C8650 0.1UF 16V10% X5R 402MXM

21C8632 0.1UF 40210% 16V X5RMXM

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

21C8633 0.1UF 40210% 16V X5RMXM

73 84

73 84

73 84

73 84

73 84

73 84

73 84

21C8654 16V10% X5R0.1UF 402MXM

21C8655 16V10% X5R0.1UF 402MXM

21C8657 16V X5R 4020.1UF 10%MXM

21C8635 16V10% 4020.1UF X5RMXM

21C8656 10% X5R 4020.1UF 16VMXM

21C8658MXM 16V10% X5R 4020.1UF

21C8662 16V X5R10% 4020.1UFMXM

21C8663 16V10% X5R 4020.1UFMXM

21C8660 16V X5R 40210%0.1UFMXM

21C8659 16V10% X5R 4020.1UFMXM

21C8661 16V10% X5R 4020.1UFMXM

73 84

73 84

73 84

21C8634 16V 40210%0.1UF X5RMXM

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

73 84

MXM PCIE CAPSSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

PEG_R2D_C_N<1>

PEG_R2D_C_N<2>

PEG_R2D_C_P<3>

MXM_PCIE_R2D_P<9>

MXM_PCIE_R2D_P<8>

MXM_PCIE_D2R_P<3>

MXM_PCIE_D2R_N<3>

MXM_PCIE_D2R_P<2>

MXM_PCIE_D2R_N<2>

PEG_D2R_P<14>

MXM_PCIE_D2R_N<5>

PEG_R2D_C_P<4>

MXM_PCIE_R2D_N<14>

PEG_R2D_C_P<11>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

MXM_PCIE_R2D_P<11>

MXM_PCIE_R2D_N<11>

MXM_PCIE_D2R_N<15>

PEG_D2R_N<0>

PEG_D2R_N<3>

PEG_D2R_N<12>

PEG_D2R_N<10>

PEG_R2D_C_N<5>

MXM_PCIE_D2R_P<4>

MXM_PCIE_D2R_N<1>

MXM_PCIE_D2R_P<0>

MXM_PCIE_D2R_N<0>

MXM_PCIE_D2R_P<1>

MXM_PCIE_D2R_P<13>

MXM_PCIE_D2R_N<13>

MXM_PCIE_D2R_P<12>

MXM_PCIE_D2R_N<12>

MXM_PCIE_R2D_N<15>PEG_R2D_C_N<0>

MXM_PCIE_R2D_P<14>

MXM_PCIE_R2D_P<12>

MXM_PCIE_R2D_N<10>

PEG_R2D_C_P<13>

PEG_R2D_C_P<14>

PEG_R2D_C_N<14>

PEG_R2D_C_P<15>

MXM_PCIE_R2D_P<15>

MXM_PCIE_R2D_P<13>

MXM_PCIE_R2D_N<12>

MXM_PCIE_D2R_N<14>

MXM_PCIE_D2R_P<14>

MXM_PCIE_R2D_P<10>

PEG_R2D_C_P<10>

MXM_PCIE_R2D_P<5>

PEG_D2R_P<4>

PEG_R2D_C_N<12>

PEG_R2D_C_P<12>

PEG_R2D_C_N<10>

PEG_R2D_C_P<5>

PEG_R2D_C_P<6>

PEG_R2D_C_N<6>

PEG_R2D_C_P<7>

PEG_R2D_C_P<8>

PEG_R2D_C_N<8>

PEG_R2D_C_N<11>

PEG_R2D_C_N<9>

PEG_R2D_C_P<9>

PEG_R2D_C_N<7>

MXM_PCIE_R2D_N<5>

MXM_PCIE_R2D_P<4>

MXM_PCIE_R2D_N<4>

MXM_PCIE_R2D_N<3>

MXM_PCIE_R2D_P<3>

MXM_PCIE_R2D_P<2>

MXM_PCIE_R2D_N<2>

MXM_PCIE_R2D_N<1>

MXM_PCIE_R2D_P<1>

MXM_PCIE_R2D_N<0>

MXM_PCIE_R2D_N<9>

MXM_PCIE_R2D_N<8>

MXM_PCIE_R2D_P<7>

MXM_PCIE_R2D_N<7>

MXM_PCIE_R2D_P<6>

MXM_PCIE_R2D_N<6>

MXM_PCIE_R2D_P<0>

MXM_PCIE_D2R_P<8>

MXM_PCIE_D2R_P<7>

MXM_PCIE_D2R_P<5>

MXM_PCIE_D2R_N<8>

MXM_PCIE_D2R_N<9>

MXM_PCIE_D2R_P<9>

MXM_PCIE_D2R_N<10>

MXM_PCIE_D2R_P<10>

MXM_PCIE_D2R_N<11>

MXM_PCIE_D2R_P<11>

PEG_D2R_P<7>

PEG_D2R_P<12>

PEG_D2R_N<6>

PEG_D2R_N<7>

PEG_D2R_P<10>

PEG_D2R_N<14>

PEG_D2R_N<4>

PEG_D2R_N<9>

PEG_D2R_P<9>

PEG_D2R_N<11>

PEG_D2R_P<13>

PEG_D2R_N<13>

PEG_D2R_P<15>

PEG_D2R_N<15>

PEG_D2R_P<5>

PEG_D2R_N<5>

PEG_D2R_P<11>

PEG_D2R_P<6>

PEG_D2R_P<2>

PEG_D2R_N<2>

MXM_PCIE_R2D_N<13>

PEG_D2R_P<3>

MXM_PCIE_D2R_N<4>

MXM_PCIE_D2R_P<15>

PEG_D2R_P<1>

PEG_D2R_N<1>

PEG_D2R_P<0>

MXM_PCIE_D2R_N<7>

MXM_PCIE_D2R_N<6>

MXM_PCIE_D2R_P<6>

PEG_D2R_P<8>

PEG_D2R_N<8>

PEG_R2D_C_P<0>

PEG_R2D_C_N<4>

PEG_R2D_C_N<3>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1>

86 OF 110

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APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARYPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORAGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT OF

SIZE

D

Unused MXM DP Interfaces

- =PP3V3_S0_DP

Page NotesPower aliases required by this page:



(NONE)

(NONE)

Unused MXM Interfaces


Display: Aliases

051-8600 3.0.0

9276


MXM_LVDS_B_DATA_P<3>NO_TEST=TRUE

NC_MXM_LVDS_B_DATA_P<3>MAKE_BASE=TRUE

MXM_LVDS_B_DATA_P<2>MAKE_BASE=TRUE NO_TEST=TRUENC_MXM_LVDS_B_DATA_P<2>

MXM_LVDS_B_DATA_N<3>NO_TEST=TRUE

NC_MXM_LVDS_B_DATA_N<3>MAKE_BASE=TRUE









MXM_LVDS_B_DATA_N<0> NC_MXM_LVDS_B_DATA_N<0>NO_TEST=TRUEMAKE_BASE=TRUE

MXM_LVDS_B_CLK_PNO_TEST=TRUEMAKE_BASE=TRUE

NC_MXM_LVDS_B_CLK_P

MXM_LVDS_A_DATA_P<3>NO_TEST=TRUE

NC_MXM_LVDS_A_DATA_P<3>MAKE_BASE=TRUE

MXM_LVDS_B_CLK_NMAKE_BASE=TRUE NO_TEST=TRUENC_MXM_LVDS_B_CLK_N

MXM_LVDS_A_DATA_P<2>NO_TEST=TRUE

NC_MXM_LVDS_A_DATA_P<2>MAKE_BASE=TRUE

MXM_LVDS_A_DATA_N<3>NO_TEST=TRUE

NC_MXM_LVDS_A_DATA_N<3>MAKE_BASE=TRUE

MXM_LVDS_A_DATA_N<2>NO_TEST=TRUEMAKE_BASE=TRUE

NC_MXM_LVDS_A_DATA_N<2>

MXM_LVDS_A_DATA_N<1>MAKE_BASE=TRUE NO_TEST=TRUENC_MXM_LVDS_A_DATA_N<1>

MXM_LVDS_A_DATA_P<1>NO_TEST=TRUEMAKE_BASE=TRUE

NC_MXM_LVDS_A_DATA_P<1>

MXM_LVDS_A_DATA_N<0> NC_MXM_LVDS_A_DATA_N<0>MAKE_BASE=TRUE NO_TEST=TRUE

MXM_LVDS_A_DATA_P<0> NC_MXM_LVDS_A_DATA_P<0>MAKE_BASE=TRUE NO_TEST=TRUE

MXM_LVDS_A_CLK_PNO_TEST=TRUE

NC_MXM_LVDS_A_CLK_PMAKE_BASE=TRUE

MXM_LVDS_A_CLK_NNO_TEST=TRUE

NC_MXM_LVDS_A_CLK_NMAKE_BASE=TRUE NC_MXM_DP_B_ML_P<0..3>

MAKE_BASE=TRUE NO_TEST=TRUEMXM_DP_B_ML_P<0..3>

MAKE_BASE=TRUENC_MXM_DP_B_ML_N<0..3>

NO_TEST=TRUEMXM_DP_B_ML_N<0..3>

MAKE_BASE=TRUENC_MXM_DP_B_AUX_P

NO_TEST=TRUE

MAKE_BASE=TRUENC_MXM_DP_B_AUX_N

NO_TEST=TRUEMXM_DP_B_AUX_N

MAKE_BASE=TRUENC_MXM_DP_B_HPD

NO_TEST=TRUEMXM_DP_B_HPD

MAKE_BASE=TRUENC_MXM_DP_D_ML_P<0..3>

NO_TEST=TRUE

MAKE_BASE=TRUENC_MXM_DP_D_ML_N<0..3>

NO_TEST=TRUE

MAKE_BASE=TRUENC_MXM_DP_D_AUX_P

NO_TEST=TRUEMXM_DP_D_AUX_P

MAKE_BASE=TRUENC_MXM_DP_D_HPD

NO_TEST=TRUEMXM_DP_D_HPD

MAKE_BASE=TRUENC_MXM_DP_D_AUX_N

NO_TEST=TRUEMXM_DP_D_AUX_N

MXM_DP_D_ML_N<0..3>

MXM_DP_D_ML_P<0..3>

MXM_DP_B_AUX_P

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87

74 87 73 87

73 87

73 87

73

73 87

73

73 87

73 87

73 87

73 87

www.vinafix.vn

GND

GND

IN

IN

IN

IN

IN

IN

IN

IN

OUT

Y

B

A

14

OUT

G S

D




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

buffers are multiple parts, other parts are on csa 95

(NONE)


- =PP3V3_S0_VIDEO

- =PP12V_S0_LCD

IG, MXM, MLB_PNL_PWR, LCD_PNL_PWR

INTERNAL DP INTERFACE

518S0685

I2C MASTER ON TCON


Page Notes


PANEL POWER CONTROL

guarantee backlight is

Options for GPU or MLB HW controlled backlight enable are included

only on when Panel has valid video

BACKLIGHT CONTROL SUPPORT

used by diag LED

PLACE NEAR J9002

21

R9081

5%1/16WMF-LF

47

402

2

1R9002

5%

402MF-LF1/16W

100K

21

L9050

SM

FERR-250-OHM

CRITICAL

4

3

6

5

2

1

Q9000CRITICAL

SMFDC638P_G

9

8

7

6

5

4

34

33

32

31

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J9002

CRITICAL

20389-Y30E-01F-RT-SM

2

1C9010

402

0.001uF

50VCERM

20%

21

R9050

402

0

5%1/16WMF-LF

NOSTUFF

21

R9051NOSTUFF

1/16W5%

0

402MF-LF

21C904016V X5R10%

0.1uF402

21C9042 0.1uF402X5R16V10%

21C904110% X5R 402

0.1uF16V

21C904416V 402X5R

0.1uF10%

21C9043 0.1uFX5R 40216V10%

21C904516V X5R 402

0.1uF10%

21C904610% X5R16V

0.1uF402

21C904710% 16V 402X5R

0.1uF

79 87

2

1C9001

CERM

0.001uF

402

20%50V

79 87

79 87

79 87

79 87

79 87

79 87

79 87

2

1C9020

X5R-CERM0805

10%10UF

16V

31

D9000SOT23

BAT54XG

21

R900919.1K

402

1%1/16WMF-LF

21

R9011

1/16WMF-LF402

5%

1K6

2

1 C9005

805

20%6.3V

22UF

CERM

4

5

2

3

U952074AUP2G14GMSOT886

21

R9012

402

1K

1/16W5%

MF-LF

NOSTUFF

4

5

3

1

2

U9050

SOT665

NOSTUFFTC7SZ08AFEAPE

2

1 C9011

402

10VCERM

20%0.1UF

NOSTUFF

144

7

3

U950074LVC14

TSSOP-HF

6

21

R9071NOSTUFF

603

1/10W

0

5%

MF-LF

21

R9072

MF-LF

5%1/10W

603

0

21

L9000

SM

FERR-250-OHM

21

C9000

50VX7R

10%

0.1UF

603-1

21

R9001

402MF-LF

1%1/16W

29.4K

2

1R9000

MF-LF

5%1/16W

100K

402

2

1

3

Q90012N7002SOT23-HF1

2

1R9070100K

1/16W5%

MF-LF402

Display: Int DP ConnectorSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

=PP3V3_S0_DP

VIDEO_ON_L_DLY

=PP3V3_S0_DP

LCD_PANEL_PWR_L

LCD_PANEL_PWR_L_RC

LCD_BKL_ON_DLY

=PP3V3_S0_DP

LCD_PANEL_PWR

VIDEO_ON

=PP12V_S0_LCD

VOLTAGE=12VMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

PP12V_LCD

LCD_PANEL_PWR_G

LCD_BKL_MLB_EN

LCD_BKL_ON_MUX

VIDEO_ON

VIDEO_ON_L

DP_INT_LINK_P<0>

DP_INT_LINK_N<0>

DP_INT_LINK_P<1>

DP_INT_LINK_N<1>

LCD_PANEL_PWR_L_DIV

VIDEO_ON

DP_HPD_INT

SPDIF_DP_AUDIO_OUT

DP_INT_LINK_CONN_N<1> NO_TEST

LCD_PWM_FILTBACKLIGHT_PWM LCD_PWM

DP_INT_LINK_N<3>

DP_INT_LINK_N<2>

DP_INT_LINK_P<2>

I2C_TCON_SDA

DP_INT_AUXCH_P

DP_INT_AUXCH_N

=PP3V3_S0_VIDEO

DP_INT_LINK_CONN_P<2> NO_TEST


I2C_TCON_SCL


VIDEO_ON


PP12V_LCD_CONNVOLTAGE=12V


LCD_BKL_ON

=SMB_DP_TCON_SDA

=SMB_DP_TCON_SCL




DP_INT_LINK_P<3>


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051-8600

77 OF 92

6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

81

77 81

6

89

81

77 81

77 81

79

81

87

81 6

79 87

79 87

6

87

87

87

77 81

89

48

48

87

87

87

87

www.vinafix.vn

BI

BI

IN

XSD*

HPD_1

DIN1_0-

DIN1_1+

DIN1_2-

DAUX1+

DIN1_3+

DDC_DAT2

DAUX2-

DDC_CLK2

HPD_2

GPU_SEL

TST0

DIN1_2+

DIN1_1-

DOUT_0-

DOUT_1+

DDC_CLK1

DDC_DAT1

DOUT_2+

DOUT_2-

DOUT_3+

DOUT_3-DIN2_1+

DDC_AUX_SEL

DIN2_1-

AUX+

AUX-

HPDIN

DIN2_2+

DIN2_2-

DIN2_3+

DIN2_3-

DAUX2+

DIN2_0-

DIN2_0+

DIN1_0+

DAUX1-

DOUT_1-

DOUT_0+

DIN1_3-

VDD

GND

NCNC

IN

BI

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

VCC

NCCFGX

PC0/I2C_ADDR0

PC1/I2C_ADDR1

GND

REXT

AUX+

AUX-

CEXT

OUT4N

OUT4P

OUT3N

OUT3P

OUT2N

OUT2P

OUT1N

OUT1P

OE*

CA_DET

CFGY

SDA_CTL

SCL_CTL

MODE

IN1P

IN1N

IN2P

IN2N

IN3P

IN3N

IN4P

IN4N

THRM_PAD

I2C_CTL_EN*

HPD HPD_SINKIN

OUT

BI

IN




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

to internal display via EQ

From iMac GPU

LO=PORT1HI=PORT2 HI=DDC

NC

INT_PD

INT_PD

NC

To External connector

INT_PD

INT_PD

LO=AUX_CH

Analog mux at External Connector

DisplayPort Mux 1

NC

NC

Common mode bias for Tx EQ AUX interception

EQ & Re-Driver for DP source

From external source

80 81 87

80 81 87

2

1 C93220.1UF

402CERM10V20%

45 81

2

1 C9323

CERM

0.1UF

10V20%

402

B7

J4

A2

G2

J1

H3

J2

A1

H7

H4

G8

C8

B3

F2

F1

E2

E1

D2

D1

B2

B1

F8

F9

E8

E9

D8

D9

B8

B9

A8

A9

B6

A6

B5

A5

B4

A4

J5

J8

H5

H8

C2

H6

J6

H9

J9

H2

H1

U9120CBTL06141EE

CRITICAL

BGA

79

21C913816V X5R

0.1uF10% 402

21C9139 0.1uFX5R16V 40210%

2

1R9130

1/16W5%

10K

402MF-LF

NOSTUFF

21

R93091K

MF-LF1/16W

402

1%

80 81

78 80

79 87

79 87

79 87

79 87

79 87

79 87

79 87

79 87

79 87

79 87

73 87

73 87

81

21C9130402X5R10% 16V

0.1uF

21C9132X5R 40216V0.1uF

10%

21C9131X5R0.1uF

40216V10%

21C9133 0.1uFX5R 40216V10%

21C9135X5R10% 16V0.1uF

402

21C9134 0.1uFX5R16V 40210%

21C9137 0.1uF40216V10% X5R

21C913610% X5R 40216V

0.1uF

80 87

80 87

80 87

80 87

80 87

80 87

80 87

80 87

73 87

73 87

73 87

73 87

73 87

73 87

73 87

73 87

2

1 C91050.1UF20%10VCERM402

2

1 C9104

20%10VCERM402

0.1UF

2

1 C9103

20%10V

0.1UF

CERM402

2

1 C91020.1UF20%10VCERM402

2

1 C9101

20%10V

0.1UF

CERM402

2

1 C9100

20%10VCERM402

0.1UF

46

40

33

21

15

11

49

34

35

6

4

3

14

13

17

16

20

19

23

22

25

29

28

136

47

48

44

45

41

42

38

39

26

307

43

37

31

24

18

125

32

2

1027

8

9

U9100QFN

PS8121ED

21C9122X5R 40210%0.1uF

16V

21C9121X5R0.1uF

40210% 16V

21C9120X5R16V 4020.1uF

10%

21C9127 0.1uFX5R10% 16V 402

21C9126 0.1uF16V 402X5R10%

21C912540216V10% X5R

0.1uF

21C912410% 40216V X5R

0.1uF

21C912310% X5R 40216V

0.1uF

2 1R9100 10K 402

MF-LF

NOSTUFF

5%1/16W2 1R9101

NOSTUFF40210K

5%1/16W MF-LF

2 1R9102 402

5% MF-LF

NOSTUFF 10K

1/16W

2 1R9103 402

1/16W 1%

499

MF-LF

78 80

73

21

C91064.7UF

6.3V

X5R-CERM402

20%

48

48

21C9151 0.1uF10% X5R 40216V

21C915016V X5R

0.1uF10% 402

2

1R9150100K

MF-LF402

5%1/16W

2

1R9151

MF-LF402

5%1/16W

100K


Display: BiDiVi Mux1

MXM_DP_A_ML_EQ_N<1> NO_TESTMXM_DP_A_ML_N<1> NO_TEST

MXM_DP_A_ML_P<0> NO_TEST

=PP3V3_S0_DP

NO_TESTMXM_DP_A_ML_EQ_N<3>

DPMUX_VIDEO_IN_SEL

NO_TESTMXM_DP_A_ML_C_P<1>

MXM_DP_A_ML_C_P<3> NO_TEST

NO_TESTMXM_DP_A_ML_C_P<2>

NO_TESTMXM_DP_A_ML_P<3>

NO_TESTDP_EXT_LINK_C_N<3>

=I2C_DP_DRV_SDA

=I2C_DP_DRV_SCL

NO_TESTMXM_DP_A_AUX_P

=PP3V3_S0_DP

NO_TESTMXM_DP_A_AUX_C_P

NO_TESTMXM_DP_A_AUX_C_N

DP_TX_EQ_AUXCH_PNO_TEST

DP_TX_EQ_AUXCH_NNO_TEST

=PP3V3_S0_DP

NO_TESTMXM_DP_A_ML_EQ_N<0>

NO_TESTMXM_DP_A_AUX_C_P

NO_TESTDP_MUX_N<0>

DP_EXT_LINK_C_P<3>NO_TEST

NO_TESTDP_EXT_LINK_C_P<0>

DP_EXT_LINK_P<1>NO_TEST

DP_EXT_LINK_N<1>NO_TEST

MXM_DP_A_ML_EQ_P<3> NO_TEST

NO_TESTMXM_DP_A_ML_EQ_N<2>NO_TESTMXM_DP_A_ML_EQ_P<2>

DP_TX_EQ_AUXCH_P

DP_TX_EQ_AUXCH_N

NO_TESTMXM_DP_A_ML_EQ_P<1>

MXM_DP_A_ML_EQ_P<0> NO_TEST

NO_TESTMXM_DP_A_AUX_C_N

PS8121_PC0

NO_TESTMXM_DP_A_ML_C_N<0>

MXM_DP_A_HPD_EQ

PS8121_CEXT

PS8121_PC1

PS8121_I2C_EN_L

PS8121_REXT


DP_EXT_LINK_C_N<0>NO_TEST

NO_TESTDP_MUX_N<1>

NO_TESTDP_MUX_P<3>

NO_TESTDP_MUX_AUXCH_P




DP_CA_DET

DPMUX1_ENABLE

NO_TESTMXM_DP_A_ML_P<2>

DP_HPD_EXT

NO_TEST DP_EXT_AUXCH_P

MXM_DP_A_ML_P<1> NO_TEST

NO_TESTDP_MUX_P<1>

=PP3V3_S0_DP

NO_TESTDP_EXT_LINK_N<3>

NO_TEST DP_EXT_AUXCH_N

NO_TESTDP_MUX_AUXCH_N


NO_TESTDP_EXT_LINK_P<2>

NO_TESTMXM_DP_A_ML_N<2> NO_TESTMXM_DP_A_ML_C_N<2>


MXM_DP_A_ML_C_P<0> NO_TEST


DP_EXT_LINK_N<2>NO_TEST


NO_TESTDP_EXT_LINK_N<0>

DP_HPD_EXT_R

DP_MUX_P<0> NO_TEST

MXM_DP_A_ML_N<0> NO_TEST

=PP3V3_S0_DP

MXM_DP_A_ML_N<3> NO_TEST

DP_MUX_N<3> NO_TEST

DP_MUX_HPD

NO_TESTDP_MUX_P<2>NO_TESTDP_MUX_N<2>

NO_TESTMXM_DP_A_AUX_N

=PP3V3_S0_DP

MXM_DP_A_HPD

DP_CA_DET

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6 77 78 79 81

87

87

87

87

87

6 77 78 79 81

78 87

78 87

78 87

78 87

6 77 78 79 81

87

78 87

87

87

87

87

87

78 87

78 87

87

87

78 87

87

87

87

87

87

87

6 77 78 79 81

87

87

87

87

6 77 78 79 81

6 77 78 79 81

www.vinafix.vn

IN

BI

BI

BI

BI

OUT

OUT

NCNC

OUT

NC

IN

IN

IN

OUT

IN

NC

OUT

NC

NCNC

NC

NCNC

NCNC

OUT

NC

NCNC

NC

IN2_D2N

IN2_D3P

IN2_D3N

IN2_PEQ/SCL_CTL

MODE0

CEXT

VDD

IN1_CADET

IN1_HPDX

IN2_CADET

IN2_D1N

IN2_HPDX

IN2_D2P

IN2_AUXP_SCL

IN2_AUXN_SDA

IN1_AUXP_SCL

IN1_AUXN_SDA

DP_AC_AUXP

DP_AC_AUXN

DP_AUXP_SCL

DP_AUXN_SDA

TMDS_SCL

TMDS_SDA

TMDS_PC0

TMDS_CLKN

TMDS_CLKP

TMDS_HPD

TMDS_CH0P

TMDS_PC1

TMDS_CH1N

TMDS_CH1P

TMDS_CH2N

TMDS_CH2P

DP_D3N

DP_D3P

DP_HPD

DP_D2N

DP_D2P

DP_D1N

DP_D1P

PD

DP_D0N

DP_D0P

MODE1

SW/I2C_ADDR

MODE2

REXT

PIO

THRM_PAD

IN1_D0P

IN1_D1P

IN1_D2P

IN1_D3P

IN1_D3N

IN1_D0N

IN1_D1N

IN2_D0P

IN2_D0N

IN2_D1P

DP_CADET

GND

TMDS_CH0N

IN1_PEQ/SDA_CTL

IN1_D2N

NC

OUT

IN

IN

IN

IN

IN

IN

IN

BI

OUT

BI

BI

BI

IN

IN

IN

IN

IN

OUT

IN

IN

BI

BI

OUT

BI

BI




36

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C

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D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

INT_PD

INT_PD

INT_PD

AC caps for EQ AUX interception

From external input

INT_PD

from DisplayPort Mux #2

Pulls for AUX_CH

INT_PD

From external inputvia MUX 1

via MUX 1

From iMac GPU

From Internal display

INT_PD

Equalizer & MUX 2Note: INT_PD = Internal Pulldown

on this pin of >=100 kOhms

DisplayPort

To Internal display

From iMac GPU

TO IMAC GPU

INT_PD TO EXTERNAL SOURCE VIA MUX1

To Internal display

see below

MODE[2..0] = 111 SELECTS I2C CONTROL MODE

73 87

21

C9212

6.3VX5R-CERM

402

20%

4.7UF

79 87

79 87

77 79 87

77 79 87

73

78

77 87

2

1 C9204

402

20%

CERM10V

0.1UF

2

1 C9203

20%

402

10VCERM

0.1UF

2

1 C9202

CERM10V

0.1UF

402

20%

2

1 C9201

10V

0.1UF

402CERM

20%

2

1 C9200

20%10V

402CERM

0.1UF

48

78 87

78 87

77 87

78 87

21C924010% 402X5R16V

0.1uF

21C924110% 16V X5R 402

0.1uF

21C924240210% 16V X5R

0.1uF

21C9243 0.1uFX5R10% 40216V

21C9244X5R 40210% 16V0.1uF

21C924516V10% X5R 402

0.1uF

21C924616V X5R10%

0.1uF402

21C924716V 402

0.1uF10% X5R

77 87

21R92221/16W

4.99K1% 402MF-LF

77 87

21R9280MF-LF

01/16W5% 402

NOSTUFF

62

47

38

22

4

35

34

44

37

41

40

39

49

48

46

45

43

42

73

66

70

71

59

69

65

64

67

19

23

24

20

21

17

18

14

15

16

25

26

68

10

11

12

8

9

5

6

2

3

7

28

29

72

63

50

36

27

13

53

52

51

55

54

58

57

61

60

56

32

33

30

31

1

U9200QFN

CRITICAL

PS8325

21R9281402MF-LF

1M5% 1/16W

21C9248 0.1uFX5R16V10% 402

77 87

21C9249X5R16V10% 4020.1uF

48

77

78 87

78 87

78 87

78 87

78 87

73 87

77 87

78 87

73 87

2

1R9220

1/16WMF-LF

402

5%1K

78 87

2

1R92155%

MF-LF1/16W

402

1K

73 87

73 87

73 87

73 87

73 87

77 87

73 87

73 87

2

1R9221

MF-LF

5%1K

1/16W

402

2

1R92121%

100K1/16WMF-LF

402

2

1R9213100K

1%

402

1/16WMF-LF

21C9290 0.1uFX5R16V 40210%

21C9291X5R 40210% 16V0.1uF

79 87

77 79 87

77 87

77 79 87

79 87 SYNC_MASTER=K75F_MLB

BIDIVI DP MUX2SYNC_DATE=04/14/2010

DP_EQLZ_MODE1

DP_EQLZ_MODE0

=I2C_DP_EQLZ_SCL

DP_MUX_N<3>

DP_MUX_P<3>

DP_MUX_N<2>

NO_TESTMXM_DP_C_ML_C_P<0>

NO_TESTMXM_DP_C_ML_C_N<0>


MXM_DP_C_ML_C_P<1> NO_TEST



DP_MUX_P<1>

DP_MUX_P<2>

DP_EQLZ_MODE2

NO_TEST DP_EQLZ_AUXCH_N

NO_TEST DP_INT_AUXCH_P

NO_TEST DP_INT_AUXCH_N

NO_TEST DP_INT_LINK_N<2>

DP_EQLZ_EXTC

NO_TESTDP_MUX_AUXCH_P

NO_TESTDP_MUX_AUXCH_N

NO_TEST DP_EQLZ_AUXCH_P

=PP3V3_S0_DP

MXM_DP_C_HPD

DP_MUX_N<1>

DP_MUX_HPD

MXM_DP_C_AUX_C_PNO_TESTMXM_DP_C_AUX_C_NNO_TEST

NO_TEST DP_INT_LINK_N<3>

DP_INT_LINK_P<3>NO_TEST

DP_HPD_INT


DP_INT_LINK_N<1>NO_TEST


DP_INT_LINK_N<0>NO_TEST


DP_EQLZ_ADDR

DP_EQLZ_EXTR


MXM_DP_C_ML_C_N<3> NO_TEST

DP_MUX_P<0>

DP_MUX_N<0>

DP_EQLZ_CADET

=I2C_DP_EQLZ_SDA

MXM_DP_C_ML_P<1>NO_TEST

MXM_DP_C_ML_P<0>NO_TEST

NO_TESTMXM_DP_C_ML_N<0>


NO_TESTMXM_DP_C_ML_P<2>


NO_TESTMXM_DP_C_ML_P<3>


MXM_DP_C_AUX_C_N

=PP3V3_S0_DP

MXM_DP_C_AUX_C_P

=PP3V3_S0_DP

MXM_DP_C_AUX_N NO_TEST

MXM_DP_C_AUX_P NO_TEST

DP_EQLZ_AUXCH_N NO_TEST

NO_TESTDP_EQLZ_AUXCH_P

NO_TESTDP_INT_AUXCH_P

DP_INT_AUXCH_N NO_TEST

=PP3V3_S0_DP

92 OF 110

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87

87

87

87

87

87

6 77 78 79 81

79 87

79 87

87

87

79 87

6 77 78 79 81

79 87

6 77 78 79 81

6 77 78 79 81

www.vinafix.vn

IN

OC*

OUT

EN

GND

IN

IN

IN

IN

ML_LANE2P

ML_LANE2N

RETURN

GND

ML_LANE1N

ML_LANE0N

GND

ML_LANE1P

ML_LANE0P

GND

AUX_CHP

AUX_CHN

DP_PWR

GND

ML_LANE3N

ML_LANE3PGND

HPD

CONFIG1

CONFIG2

SHIELD PINS

IN

IO

NC NC

IO

GND

IO

NC NC

IO

GND

2E

1E

1Y 1Z

2Z

GND

VCC

2Y

IN

IN

OUT

IO

NC NC

IO

GND

IO

NC NC

IO

GND

IN

IN

IN

IN

SYM_VER-2

SYM_VER-2

SYM_VER-2

SYM_VER-2




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PAGE


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D

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8 7 5 4 2 1

APPLE PART NO 514-0686

1

3

5

2

4

U9400

CRITICAL

SOT23TPS2051B

2

1 C9480

603

10UF20%

X5R6.3V 2

1 C9481

10V

402

20%

CERM

0.1UF

78 87

2

1 C948510UF

603

6.3VX5R

20%

CRITICAL

46

78 87

78 87

19

10

12

15

17

9

11

3

5

22

21

2

1413

87

1

20

6

4

16

18

J9400F-ANG-TH1MDP-K22

CRITICAL

78 81

45

3

D9410

SLP2510P8

RCLAMP0524P

CRITICALNOSTUFF

12

3

D9410CRITICAL

RCLAMP0524PSLP2510P8

NOSTUFF

8

4

65

3

21

7

U9450

SOT996-2

NX3L2G66GD

CRITICAL

2

1R9421100K

1/16WMF-LF402

1%

78 87

2

1 C94500.1UF10V

402

20%

CERM

81

21R9400

0

21R9401

0

21R9402

0

21R9403

0

21R9404

0

21R9405

0

21R9406

0

21R9407

0

78

2

1R9420100K

MF-LF402

1/16W1%

52

6

43

1

D9400

SC70-6-1RCLAMP0504F

CRITICAL

45

3

D9411CRITICAL

RCLAMP0524PSLP2510P8

NOSTUFF

2

1R94251M

MF-LF

5%

402

1/16W

12

3

D9411RCLAMP0524P

SLP2510P8

CRITICALNOSTUFF

78 87

78 87

2

1 C94000.01UF20%50VCERM603

21

L9400

0603

220-OHM-1.4A

78 87

78 87

2

1R9422

402

5%

MF-LF

1M

1/16W

4

3 2

1

FL9400TCM1210-4SM12-OHM-100MA

NOSTUFF

4

3 2

1


NOSTUFF

4

3 2

1


NOSTUFF

4

3 2

1


NOSTUFF


Display: Ext DP Connector

PP3V3_S0_DPPWRMIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.38 MMPP3V3_S0_DPFUSE

MIN_NECK_WIDTH=0.20 MMVOLTAGE=3.3V

TP_DP_OC

=PP3V3_S0_DPCONN

DP_EXT_LINK_P<0>

NO_TESTDP_ML_CONN_P<3>

DP_EXT_AUXCH_P

DP_EXT_LINK_N<3>

DP_HPD_EXTDP_CA_DET

DP_ML_CONN_P<2>NO_TEST

DP_EXT_LINK_N<0>

DP_EXT_LINK_P<2>

DP_EXT_LINK_N<2>

DP_EXT_LINK_N<1>

DP_EXT_LINK_P<1>

NO_TEST DP_ML_CONN_N<0>

DP_EXT_AUXCH_N

HDMI_CEC

MIN_NECK_WIDTH=0.10 MMMIN_LINE_WIDTH=0.15 MM

VOLTAGE=0V

GND_DPAUX

PP3V3_S0_DPAUX

VOLTAGE=3.3V


DP_SRC_AUX_TERM_EN

PM_SLPS3_BUF1_L

=PP3V3_S0_DPCONN

DP_ML_CONN_N<1>NO_TEST

NO_TEST DP_ML_CONN_P<1>

NO_TEST DP_ML_CONN_P<0>

NO_TEST DP_ML_CONN_N<2>

NO_TESTDP_ML_CONN_N<3>

DP_EXT_LINK_P<3>

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76

109

76

109

89 89

6 80

87

78 81 87 87

87

78 81 87

89

6 80

87

87

87

87

87

www.vinafix.vn

IN

IN

OUT

IN

Y

B

A

OUT

IN

IN

IN

OUTIN

Y

A

B 08

OUT

OUT

OUT

14

Y

A

B 08IN

OUT

E

Z Y

VCC

GNDNC

Y

B

A

OUT

14IN

IN

OUT

OUT

OUT

OUT

OUT

1I1

1I0

2I1

2I0

3I0

4I0

GND

4Y

3Y

2Y

1Y

4I1

3I1

E*

S

VCC

PADTHM

IN

IN

IN

IN

IN

IN

OUT

S GND

OUTPUT

MUXSELECTOR

I1

I0Y

VCC

IN

IN

IN

14

14

IN

IN

14

IN

IN

Y

B

A




36

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REVISION

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SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

AUDIO MUX

PANEL/BACKLIGHT CONTROL MUX

P21*

PF6 X

0

enables 100k dp aux source termination

P26

Outputs

P27

P23*

P22*

PF7

PF3

PF4

SMC

0

X

0

X

0

0

0

X

0

S5/S3

Default Values

0

S0

PG0

Inputs

P25* so that one bi-directional system can find the other

enables weak sink-like aux termination

External AUX Channel and HPD Buffers & filters

DisplayPort

BiDiVi MUX Enable

SMC Signals for BiDiVi

Ouptuts are OK as low by default

Series R should prevent any issues on the inputs

*Some inputs listed below come up as outputs driven low under the SMC flasher

AUX Bias Enable

PLACE NEAR U6201

45 78 81

81

21

R95110

1/16W5%

MF-LF402

78

45 78 81

5

8

4

2

3

U950174LVC2G32SOT902

45 78 81

81

45 81

45 81

45 81

21

R9523NOSTUFF

1/16W

402

5%

MF-LF

0

6

5

2

1


45 81

4

5

2

3

U9510SOT88674AUP2G14GM

2

1R95201%

4.75M

MF402

1/16W

2

1R9521

1/16W

402

1%

MF

4.75M

5

8

4

2

3

U9502SOT902

74LVC2G08

2

1 C956020%10V

0.1UF

CERM402

80

2

1 C95610.1UF10V

402

20%

CERM

6

5

2

1


2

1 C9562

402CERM

20%10V

0.1UF

81

21

R9542

1/16W5%

0

MF-LF402

45 81

146

7

5

U950074LVC14

TSSOP-HF

1

8

4

6

7

U9502SOT902

74LVC2G08

45 78 81

81

21

R9543499K

1%

MF-LF1/16W

402

2 1

6

3

4

U9540

CRITICAL

NX3L1G66SOT886

4

5

3

1

2

U9550

SOT665TC7SZ08AFEAPE

2

1C9550

10V20%

0.1UF

CERM402

45 81

142

7

1

U950074LVC14

TSSOP-HF

45 81

45 78 81

31

D9503

BAT54XG

SOT23

45 81

45 81

77

77

77

16

17

1

8

15

12

13

14

910

11

76

5

4

3

2

U9522DHVQFN

74LVC157A

45 81

74 81

45 81

74

45 81

74

55 4

5

6

1

3

2

U952474LVC1G157SOT886

77

59 85

45 81

21

R95021K

1/16WMF-LF

5%

402

1412

7

13

U9500

TSSOP-HF

74LVC14

31

D9500

BAT54XG

SOT23

2

1 C9500

CERM

0.1UF10V

402

20%

2

1C9501

6.3V

1UF

CERM

10%

402

21

R95033.3K

402

5%

MF-LF1/16W

3 1

D9501SOT23

BAT54XG

21

R9505

402

5%

MF-LF1/16W

1K 1410

7

11

U950074LVC14

TSSOP-HF

2

1C9503

402CERM

10%1UF6.3V

21

R95063.3K

1/16WMF-LF402

5%

21

R95103.3K

402

5%1/16WMF-LF

77

74 81 21

R9540

MF-LF402

5%1/16W

3.3K

148

7

9

U9500

TSSOP-HF

74LVC14

55 21

R9541NOSTUFF

5%

MF-LF402

1/16W

02

1R9507

402

1/16W

1M5%

MF-LF

21

R95084.7K

1/16W5%

402MF-LF

3 1

D9502SOT23

BAT54XG

2

1C950410%

402

6.3VCERM

1UF

21

R9509

MF-LF

5%

402

1/16W

3.3K

45 81

1

8

4

6

7

U9501

SOT90274LVC2G32

Display: BiDiVi SupportSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

AUD_MUX_CNTRL MUX_CNTRL

AUD_SPDIF_INSPDIF_DP_AUDIO_OUT

DPMUX_VIDEO_IN_SEL

=PP3V3_S0_DP

MXM_PNL_BL_EN

AUD_SPDIF_IN_CODEC

=PP3V3_S0_DP

=PP3V3_S0_DP

MXM_PNL_BL_PWMBIDIVI_BKL_ON

BIDIVI_PNL_PWR_EN

BIDIVI_BKL_PWM=PP3V3_S0_DPBACKLIGHT_PWM

LCD_BKL_ON_MUXLCD_PANEL_PWR

HPD_FILT

DPMUX1_OROUT_L DPMUX1_ENABLE

=PP3V3_S0_DP

DP_HPD_EXT_L

AUXCH_P_STATE

DP_EXT_AUXCH_N

BIDIVI_AUX_TERM_EN

DP_AUXN_DLY_L

DP_SINK_AUX_TERM_EN

DPMUX_VIDEO_IN_SEL

HPD_FILT

DP_HPD_PULS_EAT_L

=PP3V3_S0_DP

DP_HPD_EXT

DP_AUXN_L

BIDIVI_BKL_PWM


VIDEO_ON

AUXCH_N_STATE

AUXCH_P_STATE

SMC_PNL_BL_PWM

SMC_DP_HPD

MXM_PNL_BL_PWM

HPD_FILT

DPMUX_VIDEO_IN_SEL

=PP3V3_S0_DP

DP_SRC_AUX_TERM_EN

=PP3V3_S0_DP

=PP3V3_S0_DP

DPMUX_VIDEO_IN_SEL

BIDIVI_AUX_TERM_EN

BIDIVI_PNL_PWR_EN

SMC_VIDEO_ON

BIDIVI_BKL_ON

=PP3V3_S0_DP

SMC_DP_HPD

=PP3V3_S0_DP

AUXCH_N_STATEAUXCH_N_R

DP_AUXP_DLY_L AUXCH_P_R

DP_SINK_AUX_TERM_EN

DPMUX_VIDEO_IN_SEL

BIDIVI_BKL_MUX_SEL

BIDIVI_AUX_TERM_EN

PP3V3_S0_DPAUXP_SINKVOLTAGE=3.3VMIN_LINE_WIDTH=0.15 MMMIN_NECK_WIDTH=0.10 MM

DP_EXT_AUXCH_P

=PP3V3_S0_DP

AUX_TERM_OR_OUT

DPMUX_VIDEO_IN_SEL_L

PP3V3_S0_DP_DVOLTAGE=3.3VMIN_LINE_WIDTH=0.15 MMMIN_NECK_WIDTH=0.10 MM

=PP3V3_S0_DP

BIDIVI_AUX_TERM_EN_L =PP3V3_S0_DP

DP_AUXP_L

BIDIVI_BKL_MUX_SEL

MXM_PNL_PWR_EN


95 OF 110

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6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

45 81

78 80 87

6 77 78 79 81

78 80

45 46

6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

45

6 77 78 79 81

45 81

6 77 78 79 81

45 81

81

81

78 80 87

6 77 78 79 81

6 77 78 79 81

6 77 78 79 81

81

www.vinafix.vn

TABLE_SPACING_RULE_ITEM


MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM


AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD


TABLE_PHYSICAL_RULE_ITEM









APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARYPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORAGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT OF

SIZE

D











LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD














TABLE_BOARD_INFO

VERSIONALLEGRO

(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS

























PHYSICAL_RULE_SETAREA_TYPENET_PHYSICAL_TYPETABLE_PHYSICAL_ASSIGNMENT_HEAD


TABLE_PHYSICAL_ASSIGNMENT_ITEM





























CONSTRAINTS FOR BGA AREA

SPACING RULE SET

K60/K61 BOARD-SPECIFIC SPACING & PHYSICAL CONSTRAINTS

PHYSICAL CONSTRAINTS

* 1000SWITCHNODE 0.8 MM

* 10000.2 MMPWR_P2MM

*GND =STANDARD ?

* 0.2 MMGND_P2MM 1000

BGA_P2MM 0.2 MM ?*

BGA_P1MM* * BGA_P1MM

BGA_P1MMCLK_PCI * BGA_P1MM

TOP,BOTTOM =STANDARD0.085 MM 0.2 MM 0.1 MMY85_OHM_DIFF 0.125 MM

=STANDARD1:1_DIFFPAIR * 0.1 MM=STANDARD=STANDARD 0.085 MMY

0.15 MMTOP,BOTTOM110_OHM_DIFF Y 0.320 MM=STANDARD0.085 MM0.075 MM

=STANDARD=STANDARD* N90_OHM_DIFF =STANDARD=STANDARD =STANDARD

=STANDARD=STANDARD =STANDARDN =STANDARD =STANDARD*85_OHM_DIFF

=STANDARD45_OHM_SE Y =STANDARD* 0.12 MM 0.085 MM =STANDARD

VR_CTL_PHY * POWER_CTL

VR_CTL_PHY BGA_P1MM DEFAULT

POWER POWER_WIDTH*

POWER BGA_P1MM POWER_CTL

=STANDARD* N =STANDARD=STANDARD110_OHM_DIFF =STANDARD=STANDARD

35_OHM_SE 0.21 MMTOP,BOTTOM Y =STANDARD0.085 MM

=STANDARD =STANDARD35_OHM_SE 0.19 MM* =STANDARD0.085 MMY

39_OHM_SE 0.175 MM =STANDARDTOP,BOTTOM Y 0.085 MM

=STANDARD39_OHM_SE 0.16 MM 0.085 MM =STANDARD* Y =STANDARD

* ?0.380 MM5X_DIELECTRIC

DEFAULT * 100 MMY 0 MM=50_OHM_SE=50_OHM_SE 0 MM

GND ** STANDARD

POWER ** STANDARD

0.099 MMY 12 MM0.085 MMISL3,ISL690_OHM_DIFF 0.200 MM 0.1 MM

0.115 MM 0.1 MM0.2 MM=STANDARDISL3,ISL685_OHM_DIFF 0.085 MMY

?0.300 MM*4X_DIELECTRIC

=DEFAULTSTANDARD =DEFAULT* Y =DEFAULT=DEFAULT 12.7 MM

* Y 3.0 MM =STANDARD =STANDARD0.300 MMPOWER_CTL 0.200 MM

0.600 MM =STANDARD=STANDARD3.0 MM0.200 MMPOWER_WIDTH Y*

NO_TYPE,BGA_P1MMTOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,BOTTOM MM 15.5.1

=STANDARD45_OHM_SE 0.135 MM 0.085 MMTOP,BOTTOM Y

TOP,BOTTOM50_OHM_SE 0.085 MM 15 MMY 0.1 MM

?=DEFAULTSTANDARD *

DEFAULT * ?0.1 MM

0.150 MM ?*2X_DIELECTRIC

1.5:1_SPACING ?* 0.15 MM

2:1_SPACING ?* 0.2 MM

2.5:1_SPACING * 0.25 MM ?

0.4 MM ?*4:1_SPACING

*5:1_SPACING 0.5 MM ?

3X_DIELECTRIC TOP,BOTTOM ?0.240 MM

3X_DIELECTRIC * ?0.220 MM

?0.160 MM2X_DIELECTRIC TOP,BOTTOM

TOP,BOTTOM4X_DIELECTRIC ?0.320 MM

TOP,BOTTOM 0.400 MM ?5X_DIELECTRIC

CLK_PCIE * BGA_P1MMBGA_P1MM

50_OHM_SE =STANDARD* 0.085 MM =STANDARDY 0.1 MM =STANDARD

0.085 MMTOP,BOTTOM55_OHM_SE 0.085 MMY =STANDARD

*55_OHM_SE 0.076 MM =STANDARD=STANDARDY =STANDARD0.075 MM

9282


3.0.0051-8600

K60/K61 RULE DEFINITIONS

=STANDARD=STANDARD=STANDARD*70_OHM_DIFF =STANDARDN =STANDARD

0.085 MM 0.1 MM0.25 MMISL3,ISL6 Y100_OHM_DIFF 0.081 MM =STANDARD

Y 0.25 MM 0.1 MM100_OHM_DIFF TOP,BOTTOM 0.085 MM =STANDARD0.091 MM

100_OHM_DIFF =STANDARD=STANDARDN* =STANDARD=STANDARD =STANDARD

0.1 MM0.200 MM0.110 MM 0.085 MMY90_OHM_DIFF =STANDARDTOP,BOTTOM

0.130 MM0.085 MMTOP,BOTTOM70_OHM_DIFF 0.1 MMY 0.165 MM =STANDARD

0.135 MM0.085 MM =STANDARDISL3,ISL670_OHM_DIFF 0.1 MMY 0.155 MM

BGA_P1MM =DEFAULT* ?

BGA_P1MM BGA_P2MM*MEM_CLK

CLK_LPC BGA_P1MM BGA_P1MM*

3:1_SPACING * ?0.3 MM

6:1_SPACING * ?0.6 MM

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Memory Net Properties

VOLTAGE

MEMORY POWER PROPERTIESNET_TYPE

PHYSICAL SPACING

Memory Bus Constraints

SPACING

NET_TYPE

Memory Net Properties

Memory Bus Spacing Group Assignments

Need to support MEM_*-style wildcards!

ELECTRICAL_CONSTRAINT_SET SPACINGPHYSICAL

PHYSICALELECTRICAL_CONSTRAINT_SET

NET_TYPE

ADD RULES TO NC_DQS<8>

TO CLEAR CHECK_PLUS ERRORS

I154

I155

I159

I160

I161

I162

I163

I164

I165

I166

I167

I168

I169


Memory Constraints

MEM_CMD2MEM*MEM_DQSMEM_CMD

MEM_CMD2CMDMEM_CMD *MEM_CMD

MEM_CMD2MEM*MEM_CMD MEM_CTRL

MEM_CLK ** MEM_2OTHER

MEM_DQ_ODD2DQ_ODDMEM_DQ_ODD *MEM_DQ_ODD

MEM_DQS MEM_DQ_ODD2MEMMEM_DQ_ODD *

MEM_DQ_EVENMEM_CTRL * MEM_CTRL2MEM

MEM_DQ_EVEN2DQ_ODDMEM_DQ_ODD *MEM_DQ_EVEN

*MEM_CLK MEM_CLK2MEMMEM_DQ_ODD

* ?0.2 MMMEM_RCOMP

0.2 MM ?*MEM_POWER

0.175 MM =STANDARDMEM_RCOMP_PHY =STANDARD=STANDARDY* 0.175 MM

MEM_CTRL MEM_CLK * MEM_CTRL2MEM

MEM_CTRL *MEM_CTRL MEM_CTRL2CTRL

* MEM_CTRL2MEMMEM_CTRL MEM_CMD

*MEM_POWER_PHY MEM_POWER_WIDTH

MEM_CTRL2MEM*MEM_CTRL MEM_DQ_ODD

=STANDARD0.500 MM 0.175 MM =STANDARD=STANDARD*MEM_POWER_WIDTH Y

MEM_DQS2MEMMEM_DQ_EVENMEM_DQS *

MEM_DQ_EVEN2MEMMEM_DQ_EVEN MEM_DQS *

MEM_DQ_EVEN2DQ_EVENMEM_DQ_EVENMEM_DQ_EVEN *

MEM_DQ_EVEN2MEMMEM_DQ_EVEN MEM_CLK *

MEM_CLK2MEMMEM_CLK *MEM_DQ_EVEN

MEM_DQ_EVEN MEM_DQ_EVEN2MEMMEM_CTRL *

MEM_DQS2MEMMEM_DQS *MEM_DQ_ODD

MEM_CLK MEM_CLK2MEM*MEM_CMD

MEM_CLK2MEM*MEM_CLK MEM_CTRL

MEM_CLK2MEM*MEM_CLK MEM_DQS

MEM_DQ_ODD2MEMMEM_DQ_ODD *MEM_CLK

MEM_DQ_ODD2MEMMEM_DQ_ODD *MEM_CTRL

MEM_DQ_ODD2MEMMEM_DQ_ODD *MEM_CMD

MEM_DQSMEM_CTRL * MEM_CTRL2MEM

?=3:1_SPACINGMEM_DQ_EVEN2DQ_EVEN *

MEM_2OTHER =3:1_SPACING ?*

* ?=3:1_SPACINGMEM_DQS2MEM

=5:1_SPACINGMEM_DQ_EVEN2DQ_ODD * ?

MEM_CTRL2MEM * ?=2.5:1_SPACING

MEM_CLK *MEM_CLK MEM_CLK2MEM

=3:1_SPACING* ?MEM_DQ_EVEN2MEM

=3:1_SPACING ?MEM_DQ_ODD2MEM *

MEM_2OTHER*MEM_DQS *

* MEM_2OTHERMEM_DQ_EVEN *

MEM_2OTHERMEM_CMD **

MEM_DQ_ODD2DQ_ODD ?* =3:1_SPACING

* ?MEM_CMD2MEM =3:1_SPACING

=1.5:1_SPACINGMEM_CMD2CMD ?*

MEM_CTRL2CTRL * ?=2:1_SPACING

=4:1_SPACING ?MEM_CLK2MEM *

MEM_DQS * MEM_DQS2MEMMEM_DQS

MEM_DQ_EVEN2DQ_ODDMEM_DQ_EVEN *MEM_DQ_ODD

MEM_2OTHERMEM_DQ_ODD * *

MEM_2OTHERMEM_CTRL * *

=39_OHM_SE =STANDARD=STANDARD* =39_OHM_SE=39_OHM_SE=39_OHM_SEMEM_39S

=45_OHM_SE* =45_OHM_SE =STANDARDMEM_45S =45_OHM_SE=45_OHM_SE =STANDARD

=35_OHM_SE=35_OHM_SE* =STANDARD=35_OHM_SE =35_OHM_SEMEM_35S =STANDARD

=70_OHM_DIFF* =70_OHM_DIFF =70_OHM_DIFFMEM_70D =70_OHM_DIFF =70_OHM_DIFF=70_OHM_DIFF

MEM_DQS2MEM*MEM_DQS MEM_CMD

MEM_DQS2MEMMEM_DQS *MEM_CTRL

MEM_DQS2MEMMEM_DQS *MEM_CLK

MEM_DQ_EVEN2MEMMEM_DQ_EVEN MEM_CMD *

MEM_CMD2MEMMEM_CMD *MEM_CLK

*MEM_CMD MEM_DQ_ODD MEM_CMD2MEM

MEM_CMD2MEMMEM_CMD *MEM_DQ_EVEN

MEM_B_DQ<39..32>MEM_DQ_EVENMEM_45S

MEM_B_DM<4>MEM_45S MEM_DQ_EVEN

MEM_B_DQ<47..40>MEM_45S MEM_DQ_ODD

MEM_B_DM<5>MEM_DQ_ODDMEM_45S

CPU_SM_RCOMP0MEM_RCOMP_PHY MEM_RCOMP

MEM_B_DQS_P<7>MEM_70D MEM_DQS

MEM_DQSMEM_70D MEM_B_DQS_N<6>

MEM_DQSMEM_70D MEM_B_DQS_N<5>MEM_70D MEM_DQS MEM_B_DQS_P<5>

MEM_B_CAS_LMEM_35S MEM_CMD

MEM_DQSMEM_70D MEM_B_DQS_P<6>


MEM_DQ_EVEN MEM_B_DM<0>MEM_45S

MEM_B_DM<1>MEM_45S MEM_DQ_ODD

MEM_DQ_EVEN MEM_B_DQ<7..0>MEM_45S

MEM_B_RAS_LMEM_35S MEM_CMD

MEM_35S MEM_CMD MEM_B_BA<2..0>

MEM_45S MEM_B_DQ<23..16>MEM_DQ_EVEN

MEM_B_DM<3>MEM_45S MEM_DQ_ODD

MEM_39S MEM_CTRL MEM_A_ODT<3..0>

MEM_35S MEM_CMD MEM_A_BA<2..0>


MEM_B_DQ<55..48>MEM_45S MEM_DQ_EVEN

MEM_DQ_EVEN MEM_B_DM<6>MEM_45S

MEM_A_A<15..0>MEM_35S MEM_CMD




MEM_35S MEM_CMD MEM_A_RAS_L

MEM_B_DQS_N<3>MEM_70D MEM_DQS


MEM_RCOMP_PHY MEM_RCOMP CPU_SM_RCOMP1

CPU_SM_RCOMP2MEM_RCOMPMEM_RCOMP_PHY

TP_MEM_B_DQS_P<8>MEM_DQSMEM_70D

TP_MEM_A_DQS_N<8>MEM_70D MEM_DQS

TP_MEM_A_DQS_P<8>MEM_DQSMEM_70D

TP_MEM_B_DQS_N<8>MEM_DQSMEM_70D


MEM_B_DQS_N<2>MEM_DQSMEM_70D

MEM_70D MEM_DQS MEM_B_DQS_N<4>

MEM_DQ_ODD MEM_B_DM<7>MEM_45S

MEM_CTRL MEM_A_CKE<3..0>MEM_39S

MEM_B_DM<2>MEM_45S MEM_DQ_EVEN



MEM_70D MEM_DQS MEM_A_DQS_N<6>

MEM_CLK MEM_A_CLK_N<3..0>MEM_70D

MEM_70D MEM_B_DQS_N<7>MEM_DQS

MEM_39S MEM_A_CS_L<3..0>MEM_CTRL

MEM_CLK MEM_A_CLK_P<3..0>MEM_70D

VREFMARGIN_DIMMA_DQMEM_POWER_PHY MEM_POWER

CPU_DIMM_VREF_B_SWMEM_POWER_PHY MEM_POWER

MEM_DQS MEM_A_DQS_N<1>MEM_70DCPU_DIMM_VREF_AMEM_POWER_PHY MEM_POWER

VREFMARGIN_DIMMB_DQMEM_POWER_PHY MEM_POWER

CPU_DIMM_VREF_A_SWMEM_POWER_PHY MEM_POWER


MEM_A_DQS_P<6>MEM_70D MEM_DQS

MEM_70D MEM_DQS MEM_A_DQS_P<5>


MEM_DQS MEM_A_DQS_N<3>MEM_70D

MEM_POWER_PHY MEM_POWER CPU_DIMM_VREF_B

MEM_B_WE_LMEM_35S MEM_CMD

MEM_DQ_ODDMEM_45S MEM_A_DM<5>

MEM_45S MEM_DQ_EVEN MEM_A_DM<6>

MEM_A_DQ<47..40>MEM_DQ_ODDMEM_45S

MEM_45S MEM_A_DM<4>MEM_DQ_EVEN




MEM_70D MEM_A_DQS_N<2>MEM_DQS

MEM_A_DQS_P<3>MEM_DQSMEM_70D

MEM_DQS MEM_A_DQS_N<7>MEM_70D

MEM_B_CLK_P<3..0>MEM_CLKMEM_70D

MEM_B_CLK_N<3..0>MEM_CLKMEM_70D

MEM_B_CKE<3..0>MEM_CTRLMEM_39S

MEM_39S MEM_B_CS_L<3..0>MEM_CTRL

MEM_39S MEM_B_ODT<3..0>MEM_CTRL

MEM_35S MEM_B_A<15..0>MEM_CMD


MEM_A_DQS_N<4>MEM_70D MEM_DQS

MEM_DQSMEM_70D MEM_A_DQS_P<2>

MEM_DQ_ODDMEM_45S MEM_A_DM<7>MEM_DQ_ODDMEM_45S MEM_A_DQ<63..56>

MEM_DQ_EVENMEM_45S MEM_A_DQ<55..48>

MEM_DQ_ODDMEM_45S MEM_A_DM<3>

MEM_DQ_EVENMEM_45S MEM_A_DQ<39..32>

MEM_A_DQ<23..16>MEM_DQ_EVENMEM_45S

MEM_A_DQ<15..8>MEM_45S MEM_DQ_ODD

MEM_A_DM<1>MEM_45S MEM_DQ_ODD

MEM_A_DM<2>MEM_DQ_EVENMEM_45S

MEM_A_DQ<31..24>MEM_45S MEM_DQ_ODD

MEM_CMDMEM_35S MEM_A_WE_L

MEM_A_CAS_LMEM_35S MEM_CMD


MEM_A_DM<0>MEM_DQ_EVENMEM_45S

MEM_DQ_EVEN MEM_A_DQ<7..0>MEM_45S

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PCIE I/O

FDI

DMI

PCIE REF CLOCKS

PCI-Express

ANY OTHER LYNNFIELD CONSTRAINTS NOT COVERED ON PAGES 101 AND 107 SHOULD GO ON THIS PAGE TOO

FDI_MISC

ELECTRICAL_CONSTRAINT_SET

SATA Interface Constraints

CPU

CPU_MISC

CPU ITP

SPACINGPHYSICAL

NET_TYPE


SATA

PHYSICAL SPACING

CLOCKS

CLOCKS

PCIE GRAPHICS

SATA SSD

NET_TYPE

PCIE TOP,BOTTOM ?=4X_DIELECTRIC

?CLK_PCIE * 0.5 MM

=50_OHM_SE=50_OHM_SE =50_OHM_SE=50_OHM_SE* =STANDARD =STANDARDCPU_50S

?*CPU_RCOMP 0.2 MM

?*SATA =5X_DIELECTRIC

0.2 MMCPU_ITP * ?

?=STANDARD*CPU_AGTL

PCIE_85D =85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFF* =85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFF

PCIE/DMI/FDI/SATA CONSTRAINTSSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF =100_OHM_DIFFCLK_PCIE_100D

=4X_DIELECTRICPCIE * ?

SATA_85D * =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF

TOP,BOTTOMSATA ?=5X_DIELECTRIC

FDI_FSYNC<1..0>CPU_AGTLCPU_50S

CPU_50S CPU_ITP XDP_BPM_L<7..0>

CPU_50S CPU_RCOMP CPU_PEG_COMP

CPU_50S CPU_PEG_RBIASCPU_RCOMP

CPU_COMP3CPU_50S CPU_RCOMP

SATA_85D SATA SATA_SSD_R2D_C_P

SATA_85D SATA SATA_SSD_D2R_N

SATA_85D SATA_SSD_D2R_C_NSATA

SATA_85D SATA_SSD_D2R_PSATA

PCIE_85D PCIE_MINI_R2D_PPCIE

PCIE_85D PCIE_FW_D2R_PPCIE

PCIE_85D PCIE PCIE_FW_D2R_N

PCIE_85D PCIE_FW_D2R_C_PPCIE

PCIE_85D PCIE PCIE_FW_R2D_P

PCIE_85D PCIE PCIE_FW_R2D_C_P

PCIE_85D PCIE PEG_D2R_N<15..0>

PCIE_85D PCIE PEG_R2D_C_P<15..0>

PCIE_85D PCIE MXM_PCIE_R2D_N<15..0>

PCIE_85D PCIE MXM_PCIE_D2R_P<15..0>

PCIE_85D MXM_PCIE_D2R_N<15..0>PCIE

PCIE_CLK100M_ENET_NENET_100D ENET_MII

SATA_85D SATA_ODD_D2R_PSATA

PCIE_CLK100M_PCH_PCLK_PCIECLK_PCIE_100D

SATA_85D SATA SATA_HDD_R2D_C_P

SATA_85D SATA_HDD_R2D_NSATA

SATA_85D SATA_ODD_R2D_C_PSATA

SATA_85D SATA_ODD_D2R_C_NSATA

PCIE_85D PCIE PEG_R2D_C_N<15..0>

CLK_PCIE_100D CLK_PCIE DMI_MIDBUS_CLK100M_N

CPU_50S CPU_ITP CPU_CFG<17..0>

CPU_50S CPU_ITP XDP_OBSDATA_A<3..0>

PCIE_85D PCIE MXM_PCIE_R2D_P<15..0>

PCIE_85D PCIE PEG_D2R_P<15..0>

SATA_85D SATA SATA_HDD_R2D_C_NSATA_85D SATA SATA_SSD_R2D_PSATA_85D SATA SATA_SSD_R2D_C_N

SATA_85D SATA SATA_SSD_R2D_N

CPU_50S CPU_AGTL FDI_LSYNC<1..0>

CLK_PCIE_100D CLK_PCIE DMI_MIDBUS_CLK100M_P

FDI_INTCPU_AGTLCPU_50S




SATA_85D SATA SATA_SSD_D2R_C_P

CLK_PCIE_100D CLK_PCIE FSB_CLK133M_CPU_P

PCIE_CLK100M_PCH_NCLK_PCIECLK_PCIE_100D

PCIE_CLK100M_CPU_NCLK_PCIECLK_PCIE_100D

PCIE_CLK100M_CPU_PCLK_PCIECLK_PCIE_100D

FSB_CLK133M_ITP_NCLK_PCIECLK_PCIE_100D

FSB_CLK133M_ITP_PCLK_PCIECLK_PCIE_100D

GFX_CLK120M_DPLLSS_NCLK_PCIECLK_PCIE_100D

GFX_CLK120M_DPLLSS_PCLK_PCIECLK_PCIE_100D

CLK_PCIECLK_PCIE_100D FSB_CLK133M_CPU_N

SATA_85D SATA SATA_ODD_D2R_C_PSATA_85D SATA SATA_ODD_D2R_N

CLK_PCIECLK_PCIE_100D PCH_CLK96M_DOT_PCLK_PCIECLK_PCIE_100D FSB_CLK133M_PCH_N

CLK_PCIECLK_PCIE_100D PCH_CLK96M_DOT_N

CLK_PCIECLK_PCIE_100D PCH_CLK100M_SATA_NCLK_PCIECLK_PCIE_100D PCH_CLK100M_SATA_P

CLK_PCIECLK_PCIE_100D FSB_CLK133M_PCH_P

SATA_85D SATA SATA_ODD_R2D_NSATA_85D SATA SATA_ODD_R2D_PSATA_85D SATA SATA_ODD_R2D_C_N

SATA_HDD_D2R_C_NSATASATA_85D

SATA_85D SATA SATA_HDD_D2R_C_PSATA_85D SATA SATA_HDD_D2R_NSATA_85D SATA_HDD_D2R_PSATA

SATA_85D SATA_HDD_R2D_PSATA

CLK_PCIE GPU_CLK100M_PCIE_NCLK_PCIE_100D

ENET_MIIENET_100D PCIE_CLK100M_ENET_P

CLK_PCIE_100D PCIE_CLK100M_FW_PCLK_PCIE

CLK_PCIE_100D PCIE_CLK100M_FW_NCLK_PCIE

CLK_PCIECLK_PCIE_100D GPU_CLK100M_PCIE_P

CLK_PCIECLK_PCIE_100D PCIE_CLK100M_MINI_CON_P

CLK_PCIE_100D PCIE_CLK100M_MINI_PCLK_PCIE

CLK_PCIE_100D PCIE_CLK100M_MINI_NCLK_PCIE

CLK_PCIECLK_PCIE_100D PCIE_CLK100M_MINI_CON_N

PCIE DMI_S2N_P<3..0>PCIE_85D

PCIE DMI_S2N_N<3..0>PCIE_85D

DMI_N2S_P<3..0>PCIEPCIE_85D

PCIE DMI_N2S_N<3..0>PCIE_85D

PCIE FDI_DATA_N<7..0>PCIE_85D

FDI_DATA_P<15..0>PCIEPCIE_85D

PCIE_85D PCIE_FW_D2R_C_NPCIE

PCIE_85D PCIE_FW_R2D_C_NPCIE

PCIE_85D PCIE_FW_R2D_NPCIE

PCIE_85D PCIE_MINI_R2D_C_PPCIE

PCIE_85D PCIE_MINI_R2D_NPCIE

PCIEPCIE_85D PCIE_MINI_R2D_L_NPCIEPCIE_85D PCIE_MINI_R2D_L_P

PCIE_MINI_D2R_NPCIEPCIE_85D

PCIE_85D PCIE PCIE_MINI_D2R_PPCIE_85D PCIE_MINI_R2D_C_NPCIE

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ELECTRICAL_CONSTRAINT_SETELECTRICAL_CONSTRAINT_SET

SPI Interface Constraints

USB 2.0 Interface Constraints

HD Audio Interface Constraints

SMBus Interface Constraints

SPACING

NET_TYPENET_TYPEPHYSICAL

XTAL Constraints

SPACINGPHYSICAL

PCI Bus Constraints

LPC Bus Constraints

PCH CONSTRAINTS

* ?0.2 MMCLK_PCH

PCH_55S * =55_OHM_SE =55_OHM_SE =STANDARD=55_OHM_SE=55_OHM_SE =STANDARD

=55_OHM_SECLK_PCH_55S =STANDARD=55_OHM_SE =STANDARD* =55_OHM_SE =55_OHM_SE

=STANDARDPCI * ?

0.2 MMCLK_PCI * ?

XTAL =4X_DIELECTRIC ?*

SPI ?* 0.2 MM

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFFCLK_XTAL =100_OHM_DIFF

* 0.15 MM ?LPC

* ?USB =2x_DIELECTRIC

=55_OHM_SE =STANDARD=55_OHM_SE =55_OHM_SESMB_55S * =STANDARD=55_OHM_SE

=2x_DIELECTRICSMB * ?

=STANDARDCLK_PCI_55S =STANDARD* =55_OHM_SE =55_OHM_SE =55_OHM_SE =55_OHM_SE

=4x_DIELECTRICTOP,BOTTOMUSB ?

0.2 MM*CLK_LPC ?

=90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFFUSB_90D * =90_OHM_DIFF

=STANDARD*LPC_55S =55_OHM_SE=55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD

=STANDARD=55_OHM_SECLK_LPC_55S * =55_OHM_SE =55_OHM_SE =STANDARD=55_OHM_SE

* =STANDARD=STANDARDHDA_55S =55_OHM_SE =55_OHM_SE=55_OHM_SE =55_OHM_SE

=55_OHM_SE* =STANDARD =STANDARDSPI_55S =55_OHM_SE =55_OHM_SE=55_OHM_SE

=2x_DIELECTRICHDA * ?

=STANDARD=55_OHM_SEPCI_55S =STANDARD=55_OHM_SE=55_OHM_SE =55_OHM_SE*

0.2 MM ?*COMP_PCH


IBEX PEAK CONSTRAINTSSYNC_DATE=04/14/2010

HDA AUD_SPKR_OUTLO2L_NOUTHDA_55S

HDA AUD_SPKR_OUTLO2R_NOUTHDA_55S

PCH_XCLK_RCOMPCOMP_PCHPCH_55S

PCH_55S COMP_PCHPCH_DMI_COMP

CLK_XTALUSB_HUB1_XTAL1

XTAL

CLK_XTAL XTALUSB_HUB1_XTAL2

HDA HDA_RST_R_LHDA_55S

HDA HDA_SDOUTHDA_55S

HDA_SDOUT_RHDA_55S HDA

HDA_55S HDA_SYNCHDA

SPI_55S SPI SPI_MOSI

SPI_55S SPI_MISOSPI

SPI_55S SPI SPI_MLB_CS_L

SPISPI_55S SPI_ALT_CS_L

USB_90D USBUSB_MINI_P

USBUSB_90DUSB_WM_L_N

USBUSB_90DUSB_MINI_N

USB_BRCRYPT_PUSB_90D USB

USB_BRCRYPT_NUSBUSB_90D

XTALCLK_XTAL PCH_CLK32K_RTCX2

CLK_XTAL XTAL CK505_XTAL_IN

CLK_XTAL XTAL CK505_XTAL_OUT

CLK_PCHCLK_PCH_55S PCH_CLK14P3M_REFCLK

USB_90D USBUSB_BRCRYPT_L_P

USBUSB_90DUSB_BRCRYPT_L_N

USB_90D USBUSB_HUB1_UP_P

USB_90D USBUSB_HUB1_UP_N

USBUSB_90DUSB_HUB2_UP_P

USB_90D USBUSB_HUB2_UP_N

USB_90DUSB_SDCARD_P

USB

USBUSB_IR_L_N

USB_90D

USBUSB_90DUSB_IR_L_P

USB_CAMERA_L_PUSBUSB_90D

USBUSB_90DUSB_D_MUXED_N

USBUSB_90DUSB_EXTB_N

LPC_CLK33M_LPCPLUS_RCLK_LPCCLK_LPC_55S

USB_90DUSB_EXTA_P

USB

USB_90DUSB_IR_P

USB



PCH_CLK25M_XTALINXTALCLK_XTAL

XTALCLK_XTALPCH_CLK25M_XTALOUT

PCH_55S COMP_PCHPCH_USB_RBIAS

AUD_SPKR_OUTLO1R_POUTHDAHDA_55S

HDA AUD_SPKR_OUTLO1R_NOUTHDA_55S

AUD_SPKR_OUTLO2L_POUTHDAHDA_55S

USB_PORT3_PUSBUSB_90D

HDA AUD_SPKR_OUTLO2R_POUTHDA_55S

HDA_BIT_CLK_RHDA_55S HDA

AUD_SPDIF_OUTHDA

AUD_SPDIF_INHDA

HDA AUD_SPKR_OUTLO1L_NOUTHDA_55S

HDA AUD_SPKR_OUTLO1L_POUTHDA_55S

CLK_PCI_55S CLK_PCIPCH_CLK33M_PCIOUT

LPC_AD<3..0>LPC_55S LPC

LPCLPC_55SLPC_FRAME_L

LPC_CLK33M_SMC_RCLK_LPC_55S CLK_LPC

USB_PORT0_NUSBUSB_90D

USBUSB_EXTD_N

USB_90D

USB_90DUSB_CAMERA_L_N

USB

USB_90DUSB_SDCARD_L_N

USB

USBUSB_90DUSB_BT_N

USBUSB_90DUSB_BT_L_P

USB_90DUSB_BT_L_N

USB

XTALCLK_XTAL PCH_CLK32K_RTCX1

PMPM_CLK32K_SUSCLK

CLK_LPC_55S

SPISPI_55S SPI_CLK

SPISPI_55S SPI_MOSI_R

SPIROM_USE_MLBSPISPI_55S

USBUSB_90DUSB_PORT2_P

LPC_CLK33M_LPCPLUSCLK_LPCCLK_LPC_55S

USB_90DUSB_SDCARD_L_P

USB

USBUSB_90DUSB_EXTB_P

USB_CAMERA_NUSB_90D USB

USB_90D USBUSB_WM_N

USBUSB_90DUSB_EXTD_P


USB_90DUSB_WM_L_P

USB

USBUSB_90DUSB_WM_P

USBUSB_90DUSB_BT_P

USB_PORT3_NUSBUSB_90D

USB_CAMERA_PUSBUSB_90D

USB_90D USBUSB_SDCARD_N

USB_90DUSB_IR_N

USB

SPI_CS0_R_LSPI_55S SPI

LPC_CLK33M_SMCCLK_LPCCLK_LPC_55S

PCH_CLK33M_PCIINCLK_PCICLK_PCI_55S

HDA_BIT_CLKHDAHDA_55S

SPI_ALT_MISOSPISPI_55S

SPI_ALT_MOSISPI_55S SPI

HDA_55S HDA HDA_SYNC_R

HDAHDA_55S AUD_SDI_R


SPI_CLK_RSPISPI_55S

SPI SPI_MISO_RSPI_55S

SPI_CS0_LSPI_55S SPI

SPI_ALT_CLKSPISPI_55S

AUD_SPDIF_CHIPHDA

PCI_55S PCIPCI_REQ0_L

USBUSB_90DUSB_EXTC_N

USB_EXTA_NUSBUSB_90D

PMPM_CLK32K_SUSCLK_R

CLK_LPC_55S

USBUSB_90DUSB_PORT1_N

USBUSB_90DUSB_EXTC_P

PCI_REQ1_LPCI_55S PCI

HDA_SDIN0HDA_55S HDA

HDA HDA_RST_LHDA_55S

USBUSB_PORT2_N

USB_90D

USBUSB_90DUSB_D_MUXED_P

COMP_PCHPCH_55SPCH_SATAICOMP

COMP_PCHPCH_55SUSB_HUB1_RBIAS

COMP_PCHPCH_55SUSB_HUB2_RBIAS

103 OF 110

A.0.0

051-8600

85 OF 92

58 59 92

58 59 92

18

19

34

34

18

18 55

18

18 55

54

18 47 54

47 54

47

44

20 44

20 44

18 27

26

26

18 26

44

44

20 34

20 34

20 35

20 35

35 44

44 92

44 92

44 92

43

35 43

20 27

34 43

34 44

35

35

18 27

18 27

20

57 59 92

57 59 92

58 59 92

43 58 59 92

18

55 59

59 81

57 59 92

57 59 92

20 27

18 45 47

18 45 47

20 27

43

35 43

44 92

44 92

35 44

44 92

44 92

18 27

9 45 91

54

18 47 54

21 47

43

27 47

44 92

35 43

34 44

20 44

35 43

43

44

20 44

35 44

43

34 44

35 44

34 44

18 47

27 45

18 27

18 55

47

47

18

55

43

18 47 54

54

47

47

55

20

34 43

34 43

9 19 91

43

34 43

20

18 55

18 55

43

43

18

34

35

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PAGE TITLE

C

A

D

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PAGE


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C

345678

D

B

8 7 5 4 2 1



AUDIO MIC PHYSICAL PROPERTIES

FireWire Interface Constraints

FireWire Interface Constraints

SPACING

SOURCE:BROADCOM 5764M-DS04-RDS. PAGE 38

CAESAR II (ETHERNET) CONSTRAINTS


CAESAR II (ETHERNET) CONSTRAINTS

SOURCE: BROADCOM 5764-DS04-RDS. PAGE 38

SPACINGPHYSICAL

NET_TYPE

NET_TYPE

PHYSICAL

PORT 1 & 2 NOT USED

UNUSED FW NETS PHYSICAL PROPERTIES


FireWire Net Properties

FIT;


ENET/FIREWIRE CONSTRAINTS

* =3:1_SPACING ?FW_TP

ENET_DIFF 0.6 MM ?*

=3:1_SPACING* ?BUF0_CLK

ENET_100D =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF* =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF

* 0.3 MM ?ENET_MII

=STANDARD* ?ENET_SE

=STANDARD* ?AUDIO

=50_OHM_SE=50_OHM_SE =50_OHM_SEENET_50S =50_OHM_SE =STANDARD=STANDARD*

FW_110D =110_OHM_DIFF* =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFF=110_OHM_DIFF

* =STANDARD =STANDARD=50_OHM_SE=50_OHM_SE =50_OHM_SEAUDIO_PHY =50_OHM_SE

FW_TP FW_P0_TPA_L_PFW_110D

FW_110D FW_TP FW_P0_TPA_L_N

FW_P2_TPA_PFW_TPFW_110D

FW_TP FW_P0_TPB_L_NFW_110D

FW_110D FW_TP FW_PORT0_TPA_P

FW_P1_TPA_PFW_110D FW_TP

FW_P1_TPA_NFW_110D FW_TP

FW_PORT0_TPB_NFW_TPFW_110D

FW_TP FW_PORT0_TPB_PFW_110D

ENET_50S ENET_CLK25M_XTALBUF0_CLK

ENET_DIFFENET_100D ENET_MDI_T_N<3..0>

ENET_CLK25M_XTALIENET_50S BUF0_CLK

ENET_MDI_P<3..0>ENET_100D ENET_DIFF

ENET_DIFFENET_100D ENET_MDI_T_P<3..0>

ENET_MDI_N<3..0>ENET_100D ENET_DIFF

ENET_RDACENET_SEENET_50S

ENET_MII PCIE_ENET_R2D_NENET_100D

ENET_MII PCIE_ENET_R2D_PENET_100D

ENET_MII PCIE_ENET_D2R_NENET_100D

ENET_MIIENET_100D PCIE_ENET_R2D_C_P

ENET_MIIENET_100D PCIE_ENET_R2D_C_N

ENET_MII PCIE_ENET_D2R_C_PENET_100D

ENET_MII PCIE_ENET_D2R_C_NENET_100D

ENET_MII PCIE_ENET_D2R_PENET_100D

ENET_CLK25M_XTALOENET_50S BUF0_CLK

FW_PORT0_TPA_NFW_110D FW_TP

FW_P0_TPB_L_PFW_110D FW_TP

AUD_MIC1_IN_NAUDIOAUDIO_PHY

FW_P2_TPA_NFW_TPFW_110D

AUD_MIC1_IN_PAUDIOAUDIO_PHY

104 OF 110

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051-8600

86 OF 92

40

40

39 40

40

40 41

39 40

39 40

40 41

40 41

36

38

36

36 38

38

36 38

36

36

36

18 36

18 36

18 36

36

36

18 36

36

40 41

40

59 60

39 40

59 60

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PAGE TITLE

C

A

D

2 1


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PAGE


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C

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D

B

8 7 5 4 2 1






UNUSED VIDEO NET PHYSICAL CONSTRAINTS

PHYSICAL

DisplayPort/TMDS intra-pair matching should be 5 ps. Inter-pair matching should be within 150 ps.

DIsplayPort AUX CH intra-pair matching should be 5 ps. No relationship to other signals.

ASSINGED IN CONT. MGR.

SPACING

NET_TYPE

Max length of LVDS/DisplayPort/TMDS traces: 12 inches.


PAIRS SHOULD BE WITHIN 100 MILS OF CLOCK LENGTH.

=3:1_SPACING ?*DISPLAYPORT

=85_OHM_DIFF* 0.08MM=85_OHM_DIFF =85_OHM_DIFFDP_85D =85_OHM_DIFF=85_OHM_DIFF


GRAPHICS CONSTRAINTS

DISPLAYPORT MXM_DP_B_AUX_PDP_85D

DISPLAYPORT MXM_DP_D_AUX_PDP_85D

DISPLAYPORT MXM_LVDS_A_CLK_PDP_85D

DISPLAYPORT MXM_LVDS_B_CLK_NDP_85D

MXM_DP_B_ML_N<3..0>DISPLAYPORTDP_85D

DISPLAYPORT MXM_LVDS_B_DATA_P<3..0>DP_85D

DISPLAYPORT MXM_DP_B_AUX_NDP_85D

MXM_DP_B_ML_P<3..0>DISPLAYPORTDP_85D

DISPLAYPORT MXM_DP_D_AUX_NDP_85D

DISPLAYPORT MXM_LVDS_A_CLK_NDP_85D

DISPLAYPORT MXM_DP_D_ML_N<3..0>DP_85D

MXM_LVDS_A_DATA_P<3..0>DP_85D DISPLAYPORT

DISPLAYPORT MXM_LVDS_A_DATA_N<3..0>DP_85D

DISPLAYPORT DP_INT_AUXCH_PDP_85D

DISPLAYPORT MXM_LVDS_B_DATA_N<3..0>DP_85D

DISPLAYPORT MXM_DP_D_ML_P<3..0>DP_85D

DISPLAYPORT DP_INT_LINK_CONN_N<3..0>DP_85D

DP_ML_CONN_P<3..0>DISPLAYPORTDP_85D

DP_ML_CONN_N<3..0>DISPLAYPORTDP_85D

DP_85D DISPLAYPORT DP_EXT_AUXCH_N

DISPLAYPORT DP_INT_LINK_CONN_P<3..0>DP_85D

DISPLAYPORT MXM_DP_A_ML_P<3..0>DP_85D

MXM_DP_A_ML_N<3..0>DP_85D DISPLAYPORT

DP_MUX_P<3..0>DP_85D DISPLAYPORT

MXM_DP_A_ML_C_P<3..0>DP_85D DISPLAYPORT

DP_85D DISPLAYPORT DP_EXT_LINK_P<3..0>

DISPLAYPORT DP_EXT_LINK_N<3..0>DP_85D

DISPLAYPORTDP_85D DP_EXT_LINK_C_P<3..0>

DP_85D DISPLAYPORT DP_INT_AUXCH_N

DP_85D MXM_DP_A_AUX_C_NDISPLAYPORT

DP_85D MXM_DP_A_AUX_PDISPLAYPORT

DP_85D MXM_DP_A_AUX_C_PDISPLAYPORT

DP_85D DISPLAYPORT DP_EXT_LINK_C_N<3..0>

DP_85D DISPLAYPORT DP_EXT_AUXCH_P

DISPLAYPORTDP_85D DP_INT_LINK_N<3..0>DISPLAYPORT DP_INT_LINK_P<3..0>DP_85D

DP_85D DISPLAYPORT MXM_DP_C_ML_C_P<3..0>

DP_85D DISPLAYPORT MXM_DP_C_ML_C_N<3..0>

DISPLAYPORT MXM_LVDS_B_CLK_PDP_85D

MXM_DP_A_ML_C_N<3..0>DP_85D DISPLAYPORT

DP_85D DISPLAYPORT DP_EQLZ_AUXCH_N

DISPLAYPORTDP_85D MXM_DP_C_AUX_C_N

MXM_DP_C_ML_N<3..0>DP_85D DISPLAYPORT

MXM_DP_A_AUX_NDP_85D DISPLAYPORT

DP_85D DP_MUX_AUXCH_NDISPLAYPORT

DP_85D DP_MUX_AUXCH_PDISPLAYPORT

DP_85D DISPLAYPORT DP_MUX_N<3..0>

DISPLAYPORTDP_85D MXM_DP_C_AUX_C_PDP_85D MXM_DP_C_AUX_NDISPLAYPORT

DP_85D MXM_DP_C_AUX_PDISPLAYPORT

DISPLAYPORT MXM_DP_C_ML_P<3..0>DP_85D

DP_85D DISPLAYPORT DP_TX_EQ_AUXCH_N

DISPLAYPORTDP_85D MXM_DP_A_ML_EQ_N<3..0>DISPLAYPORTDP_85D MXM_DP_A_ML_EQ_P<3..0>

DP_85D DISPLAYPORT DP_TX_EQ_AUXCH_P

DP_85D DISPLAYPORT DP_EQLZ_AUXCH_P

105 OF 110

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73 76

73 76

74 76

74 76

73 76

74 76

73 76

73 76

73 76

74 76

73 76

74 76

74 76

77 79

74 76

73 76

77

80

80

78 80 81

77

73 78

73 78

78 79

78

78 80

78 80

78

77 79

78

73 78

78

78

78 80 81

77 79

77 79

79

79

74 76

78

79

79

73 79

73 78

78 79

78 79

78 79

79

73 79

73 79

73 79

78

78

78

78

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SMC SMBus Net Properties

SPACING

NET_TYPE

PHYSICALELECTRICAL_CONSTRAINT_SET

NET_TYPE

SMC VOLTAGE/CURRENT NET PROPERTIES

SPACINGPHYSICALELECTRICAL_CONSTRAINT_SET

SMBus Interface Constraints

PHYSICAL

NET_TYPE

ELECTRICAL_CONSTRAINT_SET SPACING

SMC THERMAL NET PROPERTIES

I100

I101

I102

I103

I104

I105

I106

I109

I110

I111

I112

I113

I114

I115

I122

I123

I124

I128

I129

I130

I131

I132

I133

I134

I135

I136

I137

I138

I139

I140

I148

I149

I150

I151

I152

I153

I160

I161

I162

I163

I164

I165

I166

I167

I168

I169

I171

I172

I173

I174

I178

I179

I180

I181

I182

I183

I184

I194

I195

I196

I197

I198

I199

I200

I201

I87

I88

I89

I90

I93

I94

I97

I98

I99


SMC Constraints

POWER PWR_P2MMTHERMAL *

THERMAL *GND GND_P2MM

THERMAL * 4:1_SPACING*

?=2x_DIELECTRIC*SMB

=STANDARD=55_OHM_SE =55_OHM_SESMB_55S * =STANDARD=55_OHM_SE =55_OHM_SE

SNS_DIFF 1:1_DIFFPAIR*

THERM_DIFF * 1:1_DIFFPAIR

THERMAL MXM_ISENSE_NTHERM_DIFF

SENSE_CPU_VTT2_PTHERMALTHERM_DIFF

THERM_DIFF SENSE_CPU_VTT2_NTHERMAL

THERMAL SMC_CPU_1V5_VSENSE

THERMAL SMC_CPU_VTT_ISENSE_R

SMC_CPU_VSENSETHERMAL

VR_ISNS_CPU_PTHERMALTHERM_DIFF

THERMAL SMC_CPU_1V5_ISENSE_R

SMC_CPU_VTT_ISENSETHERMAL

THERMAL SMC_CPU_VTT_VSENSE

THERMAL SMC_CPU_1V8_ISENSE

SMC_1V5_S3_ISENSE_RTHERMAL

SMC_GPU_ISENSETHERMAL

SMC_MXM_ISENSE_RTHERMAL

SNS_CPU_THERMD_PTHERMALTHERM_DIFF

SNS_CPU_THERMD_NTHERM_DIFF THERMAL

THERM_DIFF SNS_ODD_NTHERMAL

SNS_CPU_H_PTHERMALTHERM_DIFF

THERM_DIFF SNS_ODD_PTHERMAL

THERM_DIFF THERMAL SNS_LCD_N

THERMALTHERM_DIFF SNS_T_DP4_DN5

THERM_DIFF THERMAL SNS_T_DP1_DN6THERM_DIFF THERMAL SNS_T_DN1_DP6THERM_DIFF THERMAL SNS_T_DN2_DP3

SMC_XTALXTALCLK_XTAL

SMC_EXTALXTALCLK_XTAL

SML_PCH_1_DATASMB_55S SMB

SMBSMB_55S SML_PCH_0_CLK

SMBUS_PCH_CLKSMBSMB_55S

SMBSMB_55S SMBUS_SMC_MGMT_SDASMB_55S SMB SMBUS_SMC_MGMT_SCL

SMBUS_SMC_MGMT_SDASMB_55S SMB

SMBUS_SMC_MGMT_SCLSMB_55S SMB

SMBUS_SMC_BSA_SDASMBSMB_55S

SMB SMBUS_SMC_BSA_SCLSMB_55S

SMBUS_SMC_B_S0_SDASMBSMB_55S

THERMAL SNS_MXM_NTHERM_DIFF

SMBUS_PCH_DATASMB_55S SMB

SMB_55S SMBUS_SMC_A_S3_SDASMB

THERMAL SMC_CPU_INPUT_ISENSE

THERMAL SMC_GPU_VSENSE

SMC_CPU_1V8_VSENSETHERMAL

VR_CTL VR_CPU_IOUTVID_PHY

SMC_CPU_INPUT_VSENSETHERMAL

SENSE_CPU_VTT_NTHERM_DIFF THERMAL

THERMALTHERM_DIFF SENSE_CPU_1V5_S0_N

SENSE_CPU_1V5_S0_PTHERMALTHERM_DIFF

THERM_DIFF THERMAL MXM_ISENSE_P

SMBUS_PCH_S0_DATASMB_55S SMB

SMBUS_SMC_0_S0_SDASMBSMB_55S

SMBSMB_55S SMBUS_SMC_0_S0_SCL

SMB_55S SMB SMBUS_SMC_B_S0_SCL

SMBUS_SMC_A_S3_SCLSMBSMB_55S

SMC_DIMM_1V5_ISENSETHERMAL

SMC_DIMM_1V5_VSENSETHERMAL

THERMAL SMC_CPU_ISENSETHERMAL SNS_PS_CPU_ISNS

THERMAL SMC_CPU_1V5_ISENSE

THERMAL SENSE_CPU_VTT_PTHERM_DIFF

SENSE_CPU_1V5_PTHERMALTHERM_DIFF

THERMALTHERM_DIFF SENSE_CPU_1V5_N

THERM_DIFF THERMAL SENSE_CPU_1V5_S3_NTHERM_DIFF THERMAL SENSE_CPU_1V5_S3_P

SENSE_CPU_VTT1_PTHERMALTHERM_DIFF

SENSE_CPU_VTT1_NTHERMALTHERM_DIFF

SMC_CPU_1V8_ISENSE_RTHERMAL

THERMAL GND_SMC_AVSS

THERM_DIFF VR_ISNS_CPU_NTHERMAL

SMB SMBUS_PCH_S0_CLKSMB_55S

SMBSMB_55S SML_PCH_0_DATA

SMB_55S SML_PCH_1_CLKSMB

THERMALTHERM_DIFF SNS_T_DP2_DN3

THERMALTHERM_DIFF SNS_T_DN4_DP5

THERM_DIFF THERMAL SNS_LCD_P

THERM_DIFF THERMAL SNS_SKIN_P

SNS_CPU_H_NTHERM_DIFF THERMAL

THERM_DIFF THERMAL SNS_SKIN_N

SNS_AMB_PTHERMALTHERM_DIFF

THERMALTHERM_DIFF SNS_AMB_N

THERM_DIFF THERMAL SNS_MXM_P

THERMAL HDD_OOB_TEMP_FILT

HDD_OOB_TEMPTHERMAL

HDD_OOB_TEMP_RTHERMAL

SMC_HDD_OOB_TEMPTHERMAL

THERMALTHERM_DIFF SNS_T_DN1_DP6

SNS_T_DP1_DN6THERMALTHERM_DIFF

106 OF 110

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051-8600

88 OF 92

50

46 49

49

45 49

49

49

46 49

46 49

46 49

45 50

50

10 51

10 51

51 92

51

51 92

51 92

51

51 88

51 88

51

45 46

45 46

18 48

18 48

18 48

48 88

48 88

48 88

48 88

48

48

48

51

18 48

48

46

45 50

46 49

13 64

46

49

49

49

50

48

48

48

48

48

46 50

46 50

45 49

49

46 49

49

49

49

49

49

45 46 49 50

49

48

18 48

18 48

51

51

51 92

51 92

51

51 92

51 92

51 92

51

51 92

51

51

51

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PHYSICAL

POWER NET PROPERTIES

PHYSICAL

VOLTAGE

NET_TYPE

NET_TYPE

SPACING

SPACING

NET_TYPE

PHYSICAL

SENSING NET PROPERTIES

SPACING

NET_TYPE

VR CTRL NET PROPERTIESNET_TYPE

SPACING

PHYSICAL

NET_TYPESPACINGSPACINGPHYSICAL

VID LENGTH SKEW < 1-INCHPULL-UP STUB < 1-INCH

VID LENGTH RANGE< 1 TO 15-INCH

VOLTAGE

VR VID NET PROPERTIES

PHYSICAL

VR CTRL NET PROPERTIESPOWER NET PROPERTIES

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39_OHM_SEVID_PHY *

?*VR_CTL 0.2MM

BGA_P2MMSWITCHNODESWITCHNODE BGA_P1MM

6:1_SPACINGGND *SWITCHNODE

SWITCHNODE SWITCHNODE**

POWER BGA_P1MMSWITCHNODE BGA_P2MM

BGA_P1MM BGA_P2MMSWITCHNODE GND

* BGA_P1MMSWITCHNODE BGA_P2MM

6:1_SPACINGSWITCHNODE *POWER

POWER CONSTRAINTSSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

1.05VPOWERPOWER PP1V05_SM_PCH_LAN

PP3V42_G3HPOWER POWER 3.42V

POWER 12VPOWER P12V_S0_FW

PP12V_S512VPOWERPOWER

POWER PP12V_S0_FAN0_LPOWER 12V

12VPOWER POWER P12V_S0_FW_D

POWERPOWER 12V FW_PORT0_VP_F

POWER 3.3VPOWER PP3V3_ENETVR_CPU_PHASE4POWER 1.5VSWITCHNODE

VR_CPU_PHASE1SWITCHNODE 1.5VPOWER

POWER PP3V3_S0M3.3VPOWER

3.3VPOWER POWER PPVOUT_SO_PCH_VCCRTC_NCTFPOWERPOWER FW_PORT0_VP12V

POWER POWER 12V P12V_S0_FW_R

POWER POWER 3.3V PPVOUT_S5_PCH_DCPSUSPOWER POWER 3.3V PPVOUT_S5_PCH_DCPSUSBYP

PPVOUT_G3_PCH_DCPRTC3.3VPOWER POWER

POWER POWER 3.3V PPVOUT_S0_PCH_DCPSST

PPVTT_S3_DDR_BUFPOWER POWER 3.3V

POWER POWER PP3V3_G3H_AVREF_SMC3.3V

PP_ENET_CTRL123.3VPOWER POWER

POWER PP3V3_G3_RTC3.3VPOWER

3.3V PP3V3_FW_VDDAPOWERPOWERPP3V3_FW_PLLVDD3.3VPOWERPOWER

3.3VPOWER PP3V3_FW_ESDPOWER

POWER 3.3V PP3V3_FW_AVDDPOWERPP3V3_AUDIO_SPDIF_JACKPOWER POWER 3.3V

POWER 3.3VPOWER PPVBATT_G3_RTCPOWER POWER 3.3V PPVBATT_G3_RTC_R

PP3V3_S0_CK505_F3.3VPOWERPOWER

VR_CPU_VSENSNS_DIFF

SNS_DIFF VR_CPU_VSNS_XW_P

3.3VPOWERPOWER PP3V3_S3_BT_FLT

POWERPOWER 3.3V PP3V3_S5

3.3VPOWER POWER PP3V3_S0_DPAUX

VR_CTL_PHY VR_CTL VR_CPU_COMP_RCVR_CTL_PHY VR_CTL VR_CPU_DAC

VR_CTL_PHY DDR_REG_CSVR_CTL

VR_CTL P1V8_REG_PORVR_CTL_PHY

VR_CTLVR_CTL_PHY P3V3S5_REG_BOOT_R

VR_CTL P3V3S5_REG_ISENVR_CTL_PHY

VR_CTL_PHY VR_CTL P3V3S5_REG_OCSET

5VPOWERPOWER VREFMARGIN_DIMMB_P5V

5VPOWERPOWER PP5V_S5

PP1V96_FW_PLLVDD1.96VPOWER POWER

5VPOWER PP5V_S3_CAMERA_FLTPOWER

CPU_VCC_PKG_SENSE_PSNS_DIFF

VR_CTL_PHY P3V3S5_REG_BOOTVR_CTL

VR_CTLVR_CTL_PHY DDR_REG_BOOTDDR_REG_UGATEVR_CTL_PHY SWITCHNODE

VR_CTLVR_CTL_PHY DDR_REG_VDDQSNS

VR_CTL_PHY VR_CTL VR_CPU_BOOT3_RC

P3V3S5_REG_UGATESWITCHNODEVR_CTL_PHY

VR_CTL_PHY VR_CTL P3V3S5_REG_SNUB

VTT_REG_FSVR_CTL_PHY VR_CTLVTT_REG_FBVR_CTLVR_CTL_PHYVTT_REG_COMPVR_CTL_PHY VR_CTLVTT_REG_BOOT2VR_CTL_PHY VR_CTL

PCHCORE_REG_BOOTVR_CTL_PHY VR_CTL

VR_CTL_PHY VR_CPU_DRV3_GDSELVR_CTL

VR_CTL PCHCORE_REG_TONVR_CTL_PHY

VTT_REG_ISUMVR_CTLVR_CTL_PHY

VTT_REG_LGATE1VR_CTL_PHY SWITCHNODE

VR_CTL_PHY VTT_REG_LGATE2SWITCHNODE

VR_CTLVR_CTL_PHY VTT_REG_REF

VR_CPU_ISNS1_XW_NTHERMALSNS_DIFF

VR_CTL VR_CPU_TCOMPVR_CTL_PHY

VR_CTL_PHY VR_CTL VR_CPU_SS

VR_CTL_PHY P5VS3_REG_LGATESWITCHNODE

DDR_REG_LGATEVR_CTL_PHY SWITCHNODE

VR_CTL_PHY VR_CTL DDR_REG_BOOT_R

VR_CTL_PHY P5VS3_REG_UGATESWITCHNODE

PCHCORE_REG_BOOT_RVR_CTLVR_CTL_PHY

VR_CTL PCHCORE_REG_TRIPVR_CTL_PHY

PCHCORE_REG_UGATEVR_CTL_PHY SWITCHNODE

VR_CPU_FSVR_CTLVR_CTL_PHYVR_CPU_FB_RVR_CTL_PHY VR_CTL

VR_CTL_PHY VR_CTL VR_CPU_FB

VTT_REG_PH2_SNUBVR_CTLVR_CTL_PHY

VR_CTL_PHY VTT_REG_UGATE2VR_CTL

SNS_DIFF THERMAL VR_CPU_ISNS3_P

THERMALSNS_DIFF VR_CPU_ISNS2_R_N

SWITCHNODEPOWER VTT_REG_PHASE21.1VPOWER 3.3VPOWER PP3V3_S0_PCH_VCCA_DAC_F

VID_PHY VR_CTL CPU_VID<0>VR_CTLVID_PHY CPU_VID<1>VR_CTLVID_PHY CPU_VID<2>

VR_CTLVR_CTL_PHY P5VS3_REG_OCSET

CPU_VID<7>VR_CTLVID_PHY

VR_CTLVID_PHY CPU_VID<4>VR_CTL CPU_VID<5>VID_PHY

VR_CTL CPU_PSI_LVID_PHY

VR_CPU_ISNS4_XW_PSNS_DIFF THERMAL

VR_CPU_ISNS4_XW_NTHERMALSNS_DIFF

SNS_DIFF VR_CPU_VSNS_R_P

POWER 5V PP5V_USB2_PORT0_FPOWER

SWITCHNODEPOWER 3.4V P3V42G3H_SW

POWER 5V PP5V_USB2_PORT1POWER

POWER 5V PP5V_USB2_PORT2POWER

5V PP5V_USB2_PORT3POWER POWER

SNS_DIFF THERMAL VR_CPU_ISNS1_N

VR_CTL VTT_REG_IREFVR_CTL_PHYVTT_REG_ICOMPVR_CTLVR_CTL_PHY

VR_CTL VTT_REG_BOOT1VR_CTL_PHY

VR_CTL VTT_REG_UGATE1VR_CTL_PHY

VR_CTL_PHY VTT_OFSTVR_CTL

VR_CTL_PHY VR_CTL VTT_REG_OCSET

VR_CTL_PHY VR_CTL VR_CPU_BOOT2_RC

VR_CTL_PHY VR_CTL VR_CPU_PH2_SNUBVR_CTL_PHY VR_CTL VR_CPU_PH3_SNUBVR_CTL_PHY VR_CTL VR_CPU_PH4_SNUBVR_CTL_PHY VR_CTL VR_CPU_PWM1

VR_CTL_PHY VR_CTL VR_CPU_PWM2_RVR_CTL_PHY VR_CTL VR_CPU_PWM3VR_CTL_PHY VR_CTL VR_CPU_PWM3_RVR_CTL_PHY VR_CTL VR_CPU_PWM4

VR_CTL_PHY VR_CTL VR_CPU_REF

VR_CTL CPU_VID<6>VID_PHY

VR_CTL DDR_REG_VTTSNSVR_CTL_PHY

SNS_DIFF THERMAL VR_CPU_ISNS2_R_P

SNS_DIFF VR_CPU_ISNS1_R_PTHERMAL




POWER DDR_REG_PGNDPOWER

POWER DDR_REG_CSGNDPOWER

VID_PHY VR_CTL CPU_VID<3>


VR_CTL VTT_REG_PH1_SNUBVR_CTL_PHY

VTT_REG_RGNDVR_CTLVR_CTL_PHY

VR_CPU_ISNS3_XW_NSNS_DIFF THERMAL

3.3VSWITCHNODEPOWER P3V3S5_REG_PHASEVR_CTL_PHY VR_CTL VR_CPU_PWM4_R


VR_CTL_PHY VR_CTL VR_CPU_DRV1_GDSEL

3.3V PP3V3_S0POWER POWER


SNS_DIFF VR_CPU_ISNS4_NTHERMAL

P5VS3_REG_FBVR_CTLVR_CTL_PHY

VR_CTLVR_CTL_PHY P3V3S5_REG_FB

POWERPOWER 1.5V PP0V75_S3_MEM_VREFCA_A

SWITCHNODE 1.5VPOWER DDR_REG_PHASE

5VPOWER POWER PP5V_S5_PCH_V5REFSUSPOWER 5VPOWER PP5V_CPUVTT_VR


SNS_DIFF CPU_VTTSENSE_R_P

CPU_VTTSENSE_PSNS_DIFF

CPU_VTTSENSE_R_NSNS_DIFF

VR_CPU_RGNDSNS_DIFF

DDR_REG_FBVR_CTLVR_CTL_PHY

5VPOWERPOWER VREFMARGIN_DIMMA_P5VPOWER POWER PP5V_S3_IR_FLT5V

5VPOWER PP5V_S0_CPU_VCORE_VCCPOWER

SNS_DIFF THERMAL VR_CPU_ISNS1_R_N

POWER 3.3VPOWER PP3V3_S0_DPFUSEPOWER 3.3VPOWER PP3V3_S0_DPPWR

VR_CPU_VSNS_R_NSNS_DIFF

THERMALSNS_DIFF VR_CPU_ISNS4_R_N

VR_CPU_ISNS2_XW_PSNS_DIFF THERMAL

SNS_DIFF THERMAL VR_CPU_ISNS3_XW_P

SWITCHNODE VR_CPU_DRV3_LGATEVR_CTL_PHY

VR_CTL_PHY VR_CTL VR_CPU_DRV4_BOOTVR_CTL_PHY VR_CTL VR_CPU_DRV4_GDSEL

PCHCORE_REG_VFBVR_CTL_PHY VR_CTLPCHCORE_REG_LGATEVR_CTL_PHY SWITCHNODE

VR_CTL VR_CPU_IOUT_PDVR_CTL_PHY

VR_CTL_PHY VR_CTL VR_CPU_IMON

CPU_VTTSENSE_NSNS_DIFF

SNS_DIFF CPU_VCC_PKG_SENSE_N



POWERPOWER 5V PP5V_S0_SATA_FET

5V PP5V_S0_PCH_V5REFPOWER POWER

5V PP5V_USB2_PORT0POWERPOWER

POWER POWER 3.3V PP3V3_S3_WM_FLT

3.3VPOWERPOWER PP3V3_S3_SDCARD_FLT

POWER 1.5VSWITCHNODE VR_CPU_PHASE2

1.05VPOWER SWITCHNODE P1V05_S5_REG_PHASE

POWER 1.5V PP0V75_S3_MEM_VREFDQ_BPOWER

12VPOWER POWER PP12V_LCD_CONN12VPOWER POWER PP12V_S0

POWER 12V PP12V_S0_CPU_FLTRDPOWER

POWER 1.05VSWITCHNODE PCHCORE_REG_PHASE

POWER 1.1V VTT_REG_PHASE1SWITCHNODE

POWER SWITCHNODE P5VS3_REG_PHASE5V

POWERPOWER 1.5V PP0V75_S3_MEM_VREFCA_B

1.8VPOWER SWITCHNODE P1V8_REG_PHASE

POWERPOWER 12V PP12V_AUD_SPKRAMP_PLANEPOWER POWER 12V PP12V_LCD

POWER 12VPOWER PP12V_S0_CPUVTT_FLTD

POWER 1.5VPOWER PP0V75_S3_MEM_VREFDQ_A

POWERPOWER 1.1V PPVCORE_S0_CPU

POWER 1.1VPOWER PPVCORE_S0_CPU_REG21.1VPOWERPOWER PPVCORE_S0_CPU_REG3

PPVCORE_S0_CPU_REG4POWER 1.1VPOWER

POWER POWER PP1V05_S0_CK505_F1.05V

PP1V05_SM_SOURCE1.05VPOWERPOWER

PP1V05_S0_PCH_VCCADPLLBPOWER 1.05VPOWERPP1V05_S0_PCH_VCCADPLLA_FPOWER POWER 1.05V

POWER POWER PP1V05_S01.05V

P1V05S5_REG_VFBVR_CTLVR_CTL_PHY

VTT_REG_VSENVR_CTLVR_CTL_PHY

VR_CTL_PHY VR_CTL VTT_SEL

P3V42G3H_BOOSTVR_CTLVR_CTL_PHY

VR_CTLVR_CTL_PHY P3V42G3H_FB

VR_CPU_VSNS_XW_NSNS_DIFF

VR_CPU_ISNS2_XW_NSNS_DIFF THERMAL

VR_CPU_ISNS1_XW_PTHERMALSNS_DIFF

PP4V5_AUDIO_ANALOGPOWER 4.5VPOWER

PP5V_S0POWERPOWER 5V

PP3V42_G3H_RPOWERPOWER 3.42V

POWERPOWER PP3V3_G3H_SMC_AVCC3.4V

POWER PP12V_S0_FAN1_L12VPOWER

PP12V_S0_FAN2_LPOWER 12VPOWER

12V PP12V_G3HPOWERPOWER

12VPOWERPOWER P12V_S0_FW_CL

POWER POWER 1.1V PPVCORE_S0_CPU_REG1

12VPOWER PP12V_S3_WM_FLTPOWER

12VPOWERPOWER PPVP_FW_PHY_CPS

POWER POWER PP1V05_S0_PCH_VCCADPLLA1.05V

POWERPOWER 0.75V PP0V75_S0

POWER PP1V05_S0_PCH_VCCAPLL_FDIPOWER 1.05VPP1V05_S0_PCH_VCCAPLL_EXPPOWER 1.05VPOWERPP1V05_S0_PCH_VCCADPLLB_FPOWER 1.05VPOWER

1.05VPOWERPOWER PP1V05_S5

PP1V95_FW_FWPHYPOWER POWER 1.96V

4V5_REG_INPOWER POWER 4.5V

P3V3S5_REG_LGATEVR_CTL_PHY SWITCHNODE

PP5V_S3_DDR_REG_V5FILTPOWERPOWER 5VPP5V_S3POWER POWER 5V

PPV_S0_MXM_PWRSRCPOWER POWER 3.3V

P5VS3_REG_BOOTVR_CTLVR_CTL_PHY

PP12V_G3H_R12VPOWER POWER

PP12V_S3POWER 12VPOWER

PP1V8_S0_CPUPOWERPOWER 1.8VPP1V8_S0POWER POWER 1.5V

POWERPOWER 1.5V PP1V5_FW_VDDA1.5VPOWERPOWER PP1V8R1V5_S0_PCH_VCCVRM

PP1V5_CPU_MEMPOWER 1.5VPOWER

1.5VPOWERPOWER PP1V5_S3

POWER POWER 1.5V PP1V5_S0_CK505_R1.5VPOWERPOWER PP1V5_S0_CK505_F1.5VPOWER POWER PP1V5_S0

POWER 1.2VPOWER PP1V2_S5_ENET

POWERPOWER 0.75V PPVTT_S0_DDR

1.1VPOWER POWER PPVTT_S0_CPU

POWERPOWER 1.1V PPVTT_S0

POWERPOWER 1.05V PP1V05_SM

POWER PP1V05_S0_CIO_VDD1P0_DP_PLL1.05VPOWER

POWERPOWER 1.05V PP1V05_S0_CIO_VDD1P0_DPPOWER PP1V05_S0_PCH_VCCA_CLK_FPOWER 1.05VPOWER POWER PP1V05_S0_PCH_VCCA_CLK1.05V

PP1V05_S0_PCH_VCCAPLL_SATAPOWER POWER 1.05V

POWER SWITCHNODE 1.5V VR_CPU_PHASE3

VR_CPU_ISNS2_PTHERMALSNS_DIFF

VR_CTL_PHY VR_CTL VR_CPU_PWM2

VR_CTL_PHY VR_CTL VR_CPU_PH1_SNUB

VR_CTL P5VS3_REG_ISENVR_CTL_PHY

VR_CTL_PHY VR_CTL VR_CPU_FAN

VR_CTL_PHY VR_CTL VR_CPU_DRV1_BOOT

SWITCHNODEVR_CTL_PHY VR_CPU_DRV1_UGATE

VR_CTL_PHY VR_CTL VR_CPU_DRV2_BOOT

VR_CTLVR_CTL_PHY VR_CPU_DRV2_GDSEL

VR_CTL_PHY VR_CPU_DRV4_UGATESWITCHNODE

VR_CPU_DRV4_LGATESWITCHNODEVR_CTL_PHY

VR_CTL_PHY VR_CPU_DRV3_UGATESWITCHNODE

VR_CTL_PHY VR_CPU_DRV3_BOOTVR_CTL

VR_CTL_PHY SWITCHNODE VR_CPU_DRV2_UGATE

SWITCHNODEVR_CTL_PHY VR_CPU_DRV2_LGATE

VR_CTL_PHY SWITCHNODE VR_CPU_DRV1_LGATE

VR_CTL VR_CPU_COMP_RVR_CTL_PHY

VR_CTL_PHY VR_CTL VR_CPU_COMP

VR_CPU_BOOT1_RCVR_CTLVR_CTL_PHYVR_CPU_TMVR_CTL_PHY VR_CTL

VR_CPU_ISNS3_R_NTHERMALSNS_DIFF

POWER PP3V3_S3POWER 3.3V

POWER 3.3VPOWER PP3V3_S0_TSENS_R

POWER 3.3V PP3V3_S0_PCH_VCCA_DACPOWER

POWER 3.3VPOWER PP3V3_MINI

POWERPOWER 3.3V PP3V3_S0_HS_F

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39

41

39

59

27

27

26

64

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44

6

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64

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70

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69

28

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39

44

13 49 64

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64 66

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64 66

69

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13 64

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SPACINGNET_TYPE

SPACING

PCIE GRAPHICS

PM NET PROPERTIES(PM, RESET, EN, PGOOD)

REMOVE WHEN CHECKPLUS IS FIXED

NET PHYSICAL FOR NC NETS

SPACING

NET_TYPE

PHYSICAL

PHYSICALPHYSICAL

NET_TYPE


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PM_VTTPM_VTT 2:1_SPACING*

*PM 2:1_SPACING*

DEFAULTGNDPM *

DEFAULTGNDPM_VTT *

PM_VTT 3:1_SPACING* *


PM RESETS ENABLES PGOOD CONST

SDCARD_PLT_RST_LPM

PM PM_SYS_PWRGD

PM_SYNCPM_VTT

PM PM_SUS_PWR_ACK

PM_SLP_S5_LPM

PM_SLP_S4_LPM

PM PM_SLP_S4_3_L

PM PM_SLP_S4_2_L

PM_SLP_M_RPM

PM_RSMRST_LPM

PM PM_ME_S0_EN_R

PM_VTT PM_MEM_PWRGD

PM PCHCORE_REG_EN

PM PGOOD_PCH_S0

PGOOD_SYSPWROKPM

PM PGOOD_SYSPWROK_R

RTC_RESET_LPM

NO_TEST=TRUE NC_USB_EXCARD_P USB_90D USB

NO_TEST=TRUE NC_USB_EXTE_N USB_90D USB

GFX_VR_ENPM

LAN_RESET_LPM

MINI_RESET_LPM

SMC_LRESET_LPM

PM RTC_RESET_L

PM PGOOD_1V05ME_G2

PM PGOOD_P12V_S3PM PGOOD_P1V05_ME_S5

PM PGOOD_P3V3_S0

PGOOD_PCH_AND_P1V8PM

PM P12V_S3_EN

PM P3V3S0_ENPM P3V3S3_ENPM P5VS0_EN

P5VS3_ENPM

PCHCORE_REG_PGOODPM

PEG_RESET_LPM

PM SDCARD_RESET

PM_VTT PM_THRMTRIP_L

GFX_VR_PGOODPM

PM FW_RESET_L

FWXIO_SNOOP_ENPM

PM_VTT XDP_CPUPWRGD

SMC_DELAYED_PWRGDPM

MEM_RESET_LPM

PM P1V05_ME_SM_EN

PM PGOOD_P1V5_S0

PM PGOOD_1V05ME_G1

PM PGOOD_1V8_S0_G1

PGOOD_1V8_S0_G2PM

PM PGOOD_CPU_GFX_DDR

PM PGOOD_P3V3_S3PM PGOOD_P5V_S0

PM P1V5_S0_EN

PM PGOOD_P1V8_S0

PCIE NC_PCIE_CLK100M_EXCARD_N PCIE_85D

NC_PCIE_EXCARD_D2R_P PCIEPCIE_85D

CPUVTT_REG_PGOODPM_VTT

PM ALL_SYS_PWRGD_SMC

PGOOD_P3V3_MEPM

PM P3V3ME_EN

SMC_RESET_LPM

PCIEPCIE_85D NC_PCIE_EXCARD_R2D_C_P

NO_TEST=TRUEUSB_90D USB

NC_USB_TPAD_P

PM_VTT CPU_PWRGD

PM RSMRST_PWRGD

PM_SYSRST_LPM

PM_VTT XDP_DBRESET_L

PM PM_BATLOW_L

PM_CLK32K_SUSCLKPM

PM PM_CLK32K_SUSCLK_R

PM PM_ACDC_PS_ON

PM CPU_RESET_L

PM_RSMRST_PCH_LPM

PM_SLP_S3_LPM

PM PM_SLP_S4_1_L

PM PM_SLP_S3_L_AND_S0_RDY

PM_SLP_M_LPM

FWPHY_RESET_LPM

DEBUG_RESET_LPM

DDRVTT_ENPM

CPU_MEM_RESET_LPM

PCIEPCIE_85D NC_PCIE_EXCARD_D2R_N

NC_PCIE_CLK100M_EXCARD_P PCIE_85D PCIE

PCIEPCIE_85D NC_PCIE_EXCARD_R2D_C_N

NO_TEST=TRUE NC_USB_EXCARD_N USB_90D USB

NO_TEST=TRUEUSB

NC_USB_EXTE_P USB_90D

NO_TEST=TRUEUSB_90D USB

NC_USB_TPAD_N

XDP_PWRGDPM_VTT

PM T28_RESET_L

CPUVTT_REG_ENPM

PM CK505_27MHZ_EN

PM ALL_SYS_PWRGD_R

PM 4V5_REG_ENPLT_RESET_LS1V1_LPM_VTT

PM PM_EXT_TS_L<0>

FSB_CPURSTOUT_LPM_VTT

PM_ME_PWRGDPM

PM_ME_S0_EN_GPM

PM_ME_S0_EN_G1PM

PM PM_MXM_PGOODPM PM_PCH_PWRGDPM PM_PGOOD_DDRREG_S3PM PM_PGOOD_PVCORE_CPUPM PM_PWRBTN_L

PM PM_EXT_TS_L<1>

PLT_RESET_LPM

PM PM_CLKRUN_L

PM USB_HUB_RESET_L

PM_LAN_PWRGDPM

109 OF 110

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36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

1 PP3V3_S3 Testpoint near J4750

2 Ground Testpoints near J4750

J6602 AUDIO RIGHT SPEAKER

1 Ground Testpoint near J6601

J6601 AUDIO MICROPHONE

2 TP’S

1 PP5V_S3_REG Testpoint near J4700

FUNCTIONAL TESTPOINTS FOR MAC-1 & ICT

J4750 USB CARD READER


J4700 USB CAMERA

J4720 USB BLUETOOTH


J5600 ODD FAN

2 TP’S

16 TP’S


J4510 SATA HDD (HIGH SPEED)

J4520 SATA ODD (HIGH SPEED)

J4780 IR BOARD

1 PP5V_S3_REG Testpoint near J4780

J5601 HD FAN

J5700 CPU FAN

1 PP3V3_S3 Testpoint near J4720


J6603 AUDIO LEFT SPEAKER

J5520 ANALOG LCD TEMP SENSOR


1 PP5V_S0 Testpoint near J4520

J5521 AMBIENT TEMP SENSOR

J5551 ODD TEMP SENSOR

J5560 SKIN TEMP SENSOR

J5550 HDD TEMP SENSOR

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K22/K23 ICT/FCTSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

FAN_1_GND FUNC_TEST=TRUE

SNS_SKIN_P FUNC_TEST=TRUE

FUNC_TEST=TRUESNS_SKIN_N

FUNC_TEST=TRUESNS_ODD_NFUNC_TEST=TRUESNS_ODD_P

SNS_AMB_P FUNC_TEST=TRUE

SMC_ODD_DETECT FUNC_TEST=TRUE

HDD_OOB_TEMP_FILT FUNC_TEST=TRUE

FUNC_TEST=TRUESNS_LCD_P

USB_SDCARD_L_N FUNC_TEST=TRUE

SDCARD_RESET FUNC_TEST=TRUEMIN_ALLOWED_TPS=1

FUNC_TEST=TRUEPP5V_S0

USB_BT_L_P FUNC_TEST=TRUE

FUNC_TEST=TRUESATA_ODD_D2R_C_N

SATA_ODD_R2D_P FUNC_TEST=TRUE

USB_BT_L_N FUNC_TEST=TRUE

SNS_LCD_N FUNC_TEST=TRUE

FUNC_TEST=TRUESNS_AMB_N

FAN_2_PWR_L FUNC_TEST=TRUE

FUNC_TEST=TRUEPP12V_S0_FAN2_L

FUNC_TEST=TRUEFAN_2_GND

FUNC_TEST=TRUEFAN_TACH1_L

FAN_1_PWR_L FUNC_TEST=TRUE

FUNC_TEST=TRUEPP12V_S0_FAN1_L

FUNC_TEST=TRUEUSB_IR_L_P

FUNC_TEST=TRUEUSB_IR_L_N

SATA_ODD_R2D_N FUNC_TEST=TRUE

SATA_ODD_D2R_C_P FUNC_TEST=TRUE

FUNC_TEST=TRUESATA_HDD_R2D_P

SATA_HDD_R2D_N FUNC_TEST=TRUE

FUNC_TEST=TRUESATA_HDD_D2R_C_N

SATA_HDD_D2R_C_P FUNC_TEST=TRUE

GND_AUDIO_MIC1_CONN FUNC_TEST=TRUE

FUNC_TEST=TRUEAUD_SPKR_OUTLO2L_POUT

AUD_SPKR_OUTLO1R_POUTFUNC_TEST=TRUE

AUD_SPKR_OUTLO2R_POUTFUNC_TEST=TRUEAUD_SPKR_OUTLO2R_NOUTFUNC_TEST=TRUE

FUNC_TEST=TRUEAUD_SPKR_OUTLO2L_NOUT

AUD_SPKR_OUTLO1R_NOUTFUNC_TEST=TRUE

FUNC_TEST=TRUEAUD_SPKR_OUTLO1L_POUT

FUNC_TEST=TRUEAUD_SPKR_OUTLO1L_NOUT

FUNC_TEST=TRUEFAN_TACH0_L

FAN_TACH2_L FUNC_TEST=TRUE

FUNC_TEST=TRUEFAN_0_GNDFUNC_TEST=TRUEPP12V_S0_FAN0_L

FUNC_TEST=TRUEUSB_CAMERA_L_P

FUNC_TEST=TRUEFAN_0_PWR_L

USB_CAMERA_L_N FUNC_TEST=TRUE

USB_SDCARD_L_P FUNC_TEST=TRUE

MIN_ALLOWED_TPS=2FUNC_TEST=TRUEPP3V3_S3

FUNC_TEST=TRUE

MIN_ALLOWED_TPS=1PP5V_S3_CAMERA

FUNC_TEST=TRUEMIN_ALLOWED_TPS=1

PP5V_S3_REG

AUD_MIC_IN1_P_CONN FUNC_TEST=TRUE

AUD_MIC_IN1_N_CONN FUNC_TEST=TRUEFUNC_TEST=TRUE

MIN_ALLOWED_TPS=16GND

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