Photonic integration in the access market – has the moment finally arrived?

John H. MarshUniversity of Glasgow, School of EngineeringPIC Conference, Eindhoven

26 September 2017

Outline:

Why integrate?

Top-level market view

The access / PON market

Barriers to integration

Solutions

Conclusions

Why integrate?

Photonic Integration:From this…..

3

…..to this

4

CH1

CH2

CH3

CH4

DFB LD(1155 μm)

Raised cosine S-bend(1050 μm)

MMI(532 μm)

SOA(600 μm)

EAM(150 μm)

Multiple wavelength lasers

Beam combiners

Amplifiers

Switches

Photonic Integrated Circuits

Precise control of light:

Wavelength, linewidth, power, phase, pulse length

High bandwidth / speed

Wavelength Division Multiplexing on single chip

Reliability

Small size / mass, mechanical stability, reduced power consumption

Economy through batch fabrication and volume manufacture

Comparison with silicon electronics

Key markets for PICs

Top-level market view

Macro-Level Comparison of the Photonic vs Semiconductor Market

Key statistics

Semiconductors Photonics

Revenue $335.2Bn (Act)

(2015)

$228M (Act)

(2014)

Growth (CAGR) ~4.0% 25.4%

• Semiconductor market now very mature with limited growth potential

• Has experienced very exciting development over ~50 years.

• Now characterized by huge investments in fabrication plants and complex supply

chain and highly developed value chain

• Photonics market still emerging; significant opportunity for cost reduction through

innovation and scaling

• Photonic integration not had comparable time or investment to reach maturity

7

Comparison with silicon electronics industry

• 1980 – 2000: Silicon was very profitable

→ Funding available for innovation and

integration

• 2005 – present: Steady growth period;

→ incremental innovation

• Photonics is here:

→ Great opportunities for

innovation

• Needs strong industry

(OEM) leadership

8

PIC market revenue by application

Data source: TMR Analysis October, 2015

0

200

400

600

800

1000

1200

1400

1600

2013 2014 2015 2016 2017 2018 2019 2020 2021 2022

Photonic IC Market Revenue, 2012-2022 (US$ M)

Communications Sensing Healthcare Opt Sig Proc

9

Dominated by

communications

– almost 60%

market share

PIC market revenue by technology

Data source: TMR Analysis October, 2015

0

200

400

600

800

1000

1200

1400

1600

2013 2014 2015 2016 2017 2018 2019 2020 2021 2022

Photonic IC Market Revenue, 2012-2022 (US$ Mn)

Hybrid Monolithic Module

10

Dominated by

hybrid integration

– monolithic

growing quickly

Severe cost challenge

25 Gb/s transceiver (modem) for $25?

The access / PON market

Photonic IC Market

Optical Communications (58%)

Long haul

Access (PONs, Ethernet)

Data centre

Sensing (22%)

Structural engineering, chemical sensors, transport and aerospace, energy and

utilities

Biophotonics / Healthcare (14%)

Medical instrumentation, Photonic Lab-On-A-Chip, Analytics and Diagnostics

Optical Biosensors

Optical Signal Processing (6%)

– Global Market $228M in 2014; Source: TMR Analysis October, 2015

12

Passive Optical Networks

In a PON all users receive all data (‘broadcast technology’)

If the data rate is 25 Gb/s, then every ONT needs to operate at 25 Gb/s

regardless of the user’s data requirements

Huge opportunities to deliver this at low cost

Source: Wikipedia

High Level Challenge

14

Business Need:Improved competitive position…

This is where

the costs are

This is where

the features are

Stage 1: Focus on

Cost and performance

of InP-PIC

Stage 2: Technology

Leadership in passive

PLC and packaging

Conclusion: Global Roadmap for Telcom (PON + Core) and Datacom Networks must

have low cost optics at 10G /40G /100G /500G ….

‘Gold box’ solutions will not

be viable outside long-haul

market

Optical Transceiver Shipments

Source: LightCounting

16

Saturating at ~150 million units / annum

Modest volume in integration terms

Only ~20M units forecast to be ‘integrated’ by 2021

Optical Transceiver Revenues

17

All the value growth lies in integration – vital to meet speed requirements

Diversity of materials

Diversity of technologies

Design tools (PDKs) only just emerging

Design is at device level (unlike silicon ASIC)

Lack of strong roadmap / industry leadership

Barriers to integration

Photonic Technologies –challenging variety

Split by materials

Indium Phosphide (InP) / Gallium Arsenide (GaAs)

Silicon / Silicon-on-Insulator

Silicon based materials – silicon nitride and silica-on-silicon

Ferroelectrics – Lithium Niobate

Split by technology

Hybrid integration

Monolithic integration

Module integration

Split by function

Source (transmitter), modulator and detector (receiver) have quite different requirements

What electronics can be integrated with photonics?

Even silicon photonics likely to have separate electronics and photonics chips 19

Wide variety of

materials and

functions – unlike

digital electronics

where the Si

transistor is the key

single component

Revenue by Technology

20

SiPh predicted to have relatively small market share even out to 2021

InP

SiPh

PIC design tools

Fundamental difference between VLSI and PIC design tools:

VLSI design uses building blocks made up of many individual

components (transistors) selected from design libraries

The design of transistors is not a concern to the VLSI designer

PIC design is at a different level

Everything has to be designed for a particular application, from the

epitaxial structure up

Component libraries barely exist, and where they do, they impose

severe compromises

Example: Jeppix has standard defined libraries which are good for

testing ideas but not always viable solutions for production

21

Digital Device Design and Development (Si)

Product Specification

Verilog Design/Coding

Functional Gate Simulation

/ Verification

Logic Synthesis

Test Insertion

Static Timing Analysis

Floor Planning

/ Place & Route

Clock Tree Insertion /

Final Layout

Timing Extraction

Final Design check

(DRC/LVS)

GDS2 to Fab

Verilog

Test

Bench

Verilog

RTL

Verilog

Netlist

SCF

Test

SCF

Design Stage Tools

Verilog Design Text Editor

Emacs

Verification Mentor-TetraMax

Synopsis - Leda

Synthesis Synopsis – Design

Compiler

Test Insertion Synopsis – TetraScan

Mentor - Fastscan

Static Timing Synopsis - Primetime

Place & Route Cadence – SEnsemble/ /SOC

Encounter

Synopsis - Apolllo

Clock Tree Insertion Ctgen / SOC Encounter

Timing Extraction Synopsis – StarEXT

Cadence – Pearl / Fire & ICE

DRC /ANT Checking Cadence – Assura / Dracula

Mentor - Calibre

LVS Cadence – Assura / Dracula

Mentor - Calibre

22

Fabless digital ASIC design houses well

supported by large centralized foundry model

Device Design & Development (Photonics)

InP development process relies on extensive NRE for every application as there is

a complex interplay between performance and the underlying material structure

Product

Specification

System

Design

Design Entry Design

Verification /

Simulation

Physical

Design /

Layout

Physical

Verification

/LVS /DRC

Release to

Fab

Various,

usually text

based

VPI

Photonics

Rsoft; Filarete; Lumerical; Optowave; Synopsys

PhoeniX Software ; WieWeb

Jeppix Process Design Kit

Photon Design, PDAFlow API

Variety of commercial and in-house solutions – no one

well established package

Company

dependent;

Foundry

model

emerging

• InP fabrication and design process generally vertically integrated and strong reliance

on designer-fab feedback loop

• Starting to separate with emergence of fabless companies and open-access

foundries

• Accurate PDKs (Process Design Kits) for fabless designers starting to emerge, but

so far limited in application 23

PIC design tools

Advanced electronics manufacturing techniques have introduced significant

challenges at the design level:

Proper signal handling, multiphysics, parasitics (scattering and wayward reflections), and

design verification

Complexities in PICs require a proper design layout (flow), with efficient information

interchange between different stages in the design process

Lack of tool sets offering an integrated design flow is one of the major

challenges faced by the market today

There are few point solutions capable of partially addressing these challenges

Lack of solutions capable of solving these challenges completely and effectively has

inhibited the market growth

Packaging of photonic components presents technical challenges

All these design issues and packaging challenges have collectively inhibited

the adoption of PICs on large scale.

Source: TMR Analysis October, 201524

FSAN Standards Roadmap

25

The roadmap is

not well defined

Creates

uncertainty but

also opportunity

FSAN technology maturity roadmap

InP

SiPh

Others

Solutions

Solutions for the access market

InP established as technology of choice for long-haul

Performance, flexibility, lasers and amplifiers

Si photonics emerging for data centre (e.g. Intel)

Low cost, excellent mechanical tolerances, but need for III-V light emitter/amplifier

Higher index contrast, small radius bends, well controlled couplers and polarization

Access network

Multiple standards – FSAN, Ethernet etc

Ultimate reach, need for widespread tunability / coherent comms etc not clear

Multiple fabrication technologies possible (and already in R&D)

A small number of standards and technologies will emerge

Data Centre Core network

Si-photonics InP

Access network

Technology solution to

emerge

28

Si photonics or InP for access network?

Case for silicon photonics is far from clear

Passive SiPh devices perform well

BUT active emitters require integrated InP layer

AND modulator performance is poor relative to InP

Key players include Intel and Acacia

Intel has recently launched photonics optical transceivers for data centers*

100 Gigabits per second

‘Shipping in volume now’

There is not a single SiPh-based product that does not have an alternative

made using InP and GaAs optics

*http://www.intel.com/content/www/us/en/architecture-and-technology/silicon-photonics/silicon-photonics-overview.html29

Integrating electronics and photonics on same Si-chip

Co-integration of electronics with photonics appears attractive

The approach is being pursued by IBM*

Major difficulty is the cost structure

Photonic devices are large – 130 nm CMOS technology

25G electronics requires 45 nm or 22 nm technology

Cost of ‘real estate’ on a 45 nm (worse for 22 nm) wafer is high, but the

photonic devices do not shrink in size – only the electronics

Economic sweet spot for Si-photonics is 90 - 130 nm – incompatible with

the speed of the electronics

‘Wafer stacking’ of separate Si-electronics and (Si or InP)-photonics wafers

more viable

Source: Lightcounting, Integrated Optical Devices, 2015

*Chen Sun et al, Nature, 528, p543, Dec 201530

Entry cost versus volume –JePPIX analysis

Source: Figure 6 from ‘An introduction to InP-based generic integration technology’

Meint Smit et al 2014 Semicond. Sci. Technol. 29 083001 doi:10.1088/0268-1242/29/8/083001

Tooling and set up costs are significant

31

Cost versus volume for InP and SiP approaches – JePPIX

analysis

Source: JePPIX Roadmap 2015

Conclusions:

• 6″ (150 mm) InP not yet close to production

• Volumes need to >>10M to bring cost / device below €1 for 1 mm2

• Packaging costs on top of this

Costs may be over-estimated

BUT volume and integration to reduce cost of packaging are the routes to drive down costs

Projection for InP

8″ silicon line with

InP photonic layer

32

• Heat-assisted magnetic recording

(HAMR) uses electromagnetic

energy to heat the disk locally to

ease the process of writing data

• Allowing the rate of recording

capacity on hard disk drives to

continue to increase at the same

rate as over the past decade

• Requires integration of photonic

components (lasers, waveguides

and plasmonic antennas) into the

recording head

• Challenge to make HAMR

deployable as a low-cost

manufacturable technology

“The low-cost heterogeneous

integration technology will be

applicable in multiple markets”

Can we adapt HAMR technology

(heterogeneous integration) to

the access of other markets?

HAMR volumes are billions/year

Conclusions:

Communications:

Access network needs novel approaches to support n × 25 Gb/s

Transceiver volumes relatively modest

– ~100-150M/annum and with only a fraction operating at 25 Gb/s initially

Lack of clarity in roadmap further limits volumes but creates opportunity

Long term opportunity but consolidation of platforms inevitable

Access market may be able to build on mass technology such as HAMR

Other markets:

Medical photonics, Displays, Sensing, Imaging…..

Important but volume challenge even greater