ji, bing and song, xueguan and sciberras, edward and cao

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Abstract— Insulated gate bipolar transistor (IGBT) power

modules find widespread use in numerous power conversion

applications where their reliability is of significant concern.

Standard IGBT modules are fabricated for general-purpose

applications while little has been designed for bespoke

applications. However, conventional design of IGBTs can be

improved by the multi-objective optimization technique. This

paper proposes a novel design method to consider die-attachment

solder failures induced by short power cycling and baseplate

solder fatigue induced by the thermal cycling which are among

major failure mechanisms of IGBTs. Thermal resistance is

calculated analytically and the plastic work design is obtained

with a high-fidelity FE model, which has been validated

experimentally. The objective of minimizing the plastic work and

constrain functions is formulated by the surrogate model. The

non-dominated sorting genetic algorithm-II (NSGA-II) is used to

search for the Pareto optimal solutions and the best design. The

result of this combination generates an effective approach to

optimize the physical structure of power electronic modules,

taking account of historical environmental and operational

conditions in the field.

Index Terms—Aging, fatigue, finite element methods,

insulated gate bipolar transistors, multi-objective,

optimization methods, power cycling, reliability, thermal

cycling

I. INTRODUCTION

OWER semiconductor devices are an enabling

technology to convert energy between different forms. In

the last two decades, they are playing an increasingly important

role in safety-critical aerospace and automotive applications

where stringent reliability constraints are placed on power

electronic systems. As a result, there is a pressing need to

improve power electronic systems by optimized design,

advanced manufacturing and packaging, as well as system

integration.

Insulated gate bipolar transistor (IGBT) power modules find

widespread use in various applications including renewable

energy, transport and space, industry, utility and home

appliances. They have been manufactured in large quantities

and have dominated a large portion of the medium- and

high-power conversion market for decades. Field experience

shows that power electronic converters were responsible for

37% of the unscheduled maintenance for photovoltaic (PV)

generation systems [1], 13% for wind turbines [2] and 38% for

industrial variable speed ac drives [3]. Their failures determine

the system downtime and increase the operational cost [4][5].

Power semiconductor devices were rated as the most fragile

component of a power electronic system from a recent

industrial survey, followed by capacitors and gate drives [6].

The device and package-related failures account for 35% of the

faults in the power electronics system [7]. The constantly

growing need for power semiconductor devices coupled with

important roles they have played in the system has led to

corresponding reliability and robustness concerns, especially

for safety-critical systems that may incur life security risks or

enormous additional overall system operating cost (including

maintenance, downtime, capital investment, etc).

In General, an IGBT module is comprised of one or more

semiconductor chips and its package, which are equally

important in providing high performance service. It is

constructed with different materials (e.g. silicon, aluminum,

copper, ceramics and plastics), package designs (e.g. layout,

geometry and size) and properties (e.g. electrical, thermal and

mechanical). These components/layers are mostly bonded

together by soldering and bond wires (See Fig. 1). The

assembly is then covered with an insulating gel and enclosed in

a polymer housing from which only the metal connectors of the

device terminals emerge. The base plate of the assembly is

mounted onto a heat sink or other cooling devices with thermal

interface material (TIM) greased between them for improved

thermal contact.

Current, voltage, power dissipation and lifetime are the

traditional design specifications, of IGBT power modules. In

practice, they undergo harsh operational conditions (i.e. high

temperature, frequent temperature cycles and intensive

vibrations) that generate repetitive stresses leading to fatigue

and wear-out failures, particularly at the interconnections

between different layers. Numerous accelerated aging tests

have been conducted by different researchers to evaluate

wear-out failures [8]-[10]. The dominant wear-out

mechanisms, for example bond wire lift-off, die-attach solder

fatigue and baseplate solder fatigue, are mainly driven by

thermo-mechanical stress that is induced by cyclic temperature

swings and exposure to extreme temperatures.

Multi-Objective Design of IGBT Power Modules

Considering Power Cycling and Thermal Cycling

Bing Ji, Member, IEEE, Xueguan Song, Member, IEEE, Edward Sciberras, Wenping Cao, Senior

Member, IEEE, Yihua Hu, Member, IEEE, Volker Pickert, Member, IEEE

P




2

Fig. 1. Typical multi-layered IGBT power module

The power dissipation path through the multilayered

structure is constructed from different materials, characterized

with individual coefficient of thermal expansion (CTE).

Thermo-mechanical stress is generated in service at various

layers and their interfaces under cyclic loadings. Power cycling

(PC) and thermal cycling (TC) tests, as shown in Fig. 2, are the

typical methods to evaluate the robustness and reliability

[8]-[11]. The PC is exerted by the heat dissipation of power

semiconductor devices when they are actively controlled. As

the power loss requires finite time to conduct due to the thermal

capacitance, each layer will be subject to different temperature

swings dependent on the length of the dissipated power. PC can

be further discriminated as short and long power cycling. Short

power cycles are caused by the heat dissipation in relatively

short intervals (e.g. a few seconds) that allow semiconductors

and their direct vicinity undergoing frequent temperature

changes with sizable amplitudes. However, the temperature

variation in the distant baseplate solder layer is sufficiently

alleviated by the large thermal capacities of substrate and

baseplate. Short power cycling is mainly carried out to evaluate

the lifetime of the bond wires and the die-attach solder layer

[11]. Long power cycles normally indicate power pulses with

long enough intervals (e.g. exceeding 10 seconds) to cause

effective temperature swings and stresses in the baseplate

solder layer. TC normally indicates the device temperature

changes passively accompanying the ambient temperature

variations. The focus of short PCT is normally the bond wire

connections and the die attach solder while the baseplate solder

fatigue is considered to be a dominant wear-out mechanism

during long PC and TCT [11]. The device junction temperature

was also factored in, showing accelerated wear-out with the

raised temperature [8]. Moreover, the maximum junction

temperature specified by the manufacturer (e.g. 150°C or

175°C for silicon devices) must not be exceeded under any

conditions, since it may result in sudden failures such as hot

spots and latch-up.

In order to achieve a robust design, numerous solutions to

reduce the cyclic thermo-mechanical stress and junction

temperature have been developed from all aspects, from design

to in-field operation and from the system all the way down to

the power semiconductor modules [12-17]. On the one hand,

the thermal cycles are relieved with advanced structure design

and optimized thermal management. The copper baseplate is

replaced by AlSiC in some power modules to reduce the CTE

mismatch between substrate and baseplate [18]. Active cooling

methods were presented using coolant temperature as a

feedback for flow control to reduce the temperature variation

[19]. Generally, the temperature of the heat sink (either air or

liquid cooled) can only be slowly regulated compared to the

dynamic power loss variations from power modules due to its

large thermal time constant. A thermal management technique

is proposed to regulate the power losses with advanced gate

control and PWM control algorithm [20]. On the other hand,

methods to solve the junction temperature limitation have also

been developed which fall into three categories –

semiconductor, packaging and assembly, and thermal

management algorithm. Semiconductor technological

advancement has been observed over the past two decades

thanks to the novel materials [21]-[23], improved fabrication

technology[24] and optimized structures [25] that are able to

sustain higher junction temperature. Advanced packaging and

cooling designs have also been developed[26]-[28] to improve

the thermal performance of the power assembly. The thermal

conductivity of die attachment has been increased by about

three times with enhanced electrical conductivity and

mechanical properties [26] by replacing the solder alloy with

sintered nanosilver paste. The techniques of integrating the

cooling system into the power module by removing the base

plate [26], or a more ambitious attempt to implement direct chip

cooling [25][27], have been proposed to minimize the thermal

resistance as well as the number of interconnections, thus

reducing the number of potential sources of failure. The

maximum temperature is also reduced with specific modulation

strategies to minimize power losses [29].

Fig. 2. Thermal cycling and Power cycling for IGBT module

Although advances in power module techniques have

contributed to improved reliability and prolonged lifetime,

there is little research on the optimization of IGBT modules

[30][31]. Power modules are generally designed and

manufactured to meet their typical operational and lifetime

requirements. By following the engineering requirement (i.e.

electrical, thermal, mechanical, cost, dimensions, etc.), it is

typical to resolve the problem with a single-objective

optimization target, i.e., maximizing the lifetime of IGBT

modules under only one specific failure mode. In practice, an

IGBT module is usually subjected to a combined fatigue

loading such as power cycling, thermal cycling and vibration,

and the requirements of the optimal design can be inconsistent

or even conflicting with each other. This means that any further




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lifetime improvement caused by addressing one fatigue mode

can worsen the lifetime caused by other modes or increase the

manufacturing complexity. For this reason, multi-objective

optimization (MOO) strategy is desirable in the design of IGBT

modules. In this paper, the objective is to explain why a MOO

strategy is needed for IGBT power module design and to

demonstrate the implementation of a MOO considering power

cycling and thermal cycling in practice.

II. MULTI-OBJECTIVE OPTIMIZATION OF IGBT MODULES

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A common single-objective optimization problem of a power

module is to maximize its lifetime:

UL

f

XXXts

NMax

:..

:. (1)

where X is the matrix of design variables, and are the

upper and lower bounds of X, respectively. is the lifetime of

the power module, which may be caused by one of the general

failure modes, written in separate form as follows:

UL

v

f

p

f

t

f

d

f

XXXts

NNNNMax

:..

:. (2)

where is the lifetime of module due to material

degradation [32], is the lifetime of module due to the

thermal cycling fatigue [33],

is the lifetime due to the

power cycling fatigue [8] and represents the lifetime due to

the vibration fatigue [34]. The improvement of individual

lifetime expectancy seems to be advantageous for the overall

product lifetime. However, it does not necessarily increase the

effective lifetime since different failure mechanisms are

responsible for the four lifetime targets and they each play

different roles in the aging process of power modules and

require elaborated studies.

In terms of the thermal cycling fatigue mechanism,

attempting to improve requires thicker solder layers, thinner

base plate and thinner ceramics layers to reduce the thermal

stress induced by the mismatch of the CTE. And in terms of

structural vibration theory, attempting to improve requires

all of the layers to be as thick as possible to reduce the static

stress during vibration. On the contrary, attempting to improve

the and

demands most layers to be as thin as possible,

since the junction temperature of the module as well as the

resultant degradation will be alleviated with reduced total

thermal resistance from the die to the base plate, as the failure

and degradation is proportional to the junction temperature.

Therefore, the lifetime optimization of power module needs

considering the failure modes separately, as different failure

modes need different treatment methods. In addition, as the

price of modern lead-free solder goes up, minimizing the

manufacturing cost (especially the material cost) becomes

necessary as well. Therefore, the single-objective optimization

needs to be transformed to a multi-objective optimization as

shown below:

iif

UL

vf

pf

tf

df

NN

XXXts

NNNNMax

min

:..

],,,[:.

(3)

where, means the required minimum lifetime of the

module due to the i-th type of failure (material degradation,

thermal cycling, powering cycling and vibration). Eq (3) can be

solved as a single-objective optimization problem by retaining

one objective while changing the other three objectives to

constraints or by incorporating all the objectives into a

single-objective by the use of arbitrary weighting factors. Such

two types of approaches are easy to calculate and can provide

quantitative insights into the sole objective, and restrict other

constrains to some extent. However, most power module

applications are rather sensitive to environmental and

operational conditions, and it is thus difficult to select the most

appropriate objective, define reasonable constraint levels or

choose the most appropriate weighting factors. Consequently,

conventional single-objective optimization is subject to a set of

constraints which makes it impractical for the design

optimization of power modules. As an alternative, introduction

and application of a multi-objective optimization strategy

becomes necessary to manage more information.

III. LIFETIME PREDICTION MODELS

In this work, only two types of fatigue are taken into account:

thermal cycling fatigue and power cycling fatigue.

A. Lifetime Prediction Model Subjected to Power Cycling

For the lifetime analysis due to the power cycling fatigue,

there is a widely used analytical lifetime model, known as the

power-law model [8]. The power-law model defines the

relationship between the lifetime and the junction temperature

of the power module, assuming that a small power cycle has the

same effect on the lifetime irrespective of whether it occurred

before or after a large temperature cycle, and is given as:

mTR

Q

C

j

p

f eTCN

2

1 (4)

where is a curve fitting constant of 640, exponent constant

is approximately equal to -5, is the junction

temperature, is the mean temperature, Q is the activation

energy of , i.e. the smallest energy required to

start the reaction, assumed to be independent of the

temperature. R is the gas constant [8]. With

this model, the lifetime due to the power cycling can be easily

estimated. For a power module used in specific condition,

and can be described as

jm TTT 2

1min (5)

minmin PRTT thamb (6)

minmaxminmax PPRTTT thj (7)




4

Therefore, (4) can be transformed to

thamb

C

th

p

f

RPPTR

QRPPCN

minmax

minmax1

2

1exp2

(8)

For a specific power module under complex conditions,

and are difficult to evaluate and thus the lifetime is

impossible to predict. However, if the and are

assumed to be known, for example, for a typical power

electronic module with and undergoing a

recorded temperature difference , the power loss

difference is equal to

. Therefore the lifetime

will be easily obtained, as is then only related to the total

thermal resistance , which can be calculated as

2

1

6

1

m

j

sp

j

n

i ii

ith R

Ak

tR (9)

where , , and are the thickness, thermal conductivity,

and the effective area of the layer, respectively.

is the

j-th spreading thermal resistance, which can be approximately

calculated as follows [35]:

jj

sp

jrk

R max (10)

where max is the dimensionless constriction resistance, is

the thermal conductivity of the j-th layer, is the source radius

of the j-th layer. See Fig. 3.

Fig. 3 Conductive and spreading thermal resistance in IGBT module

B. Lifetime Prediction Model Subjected to Thermal Cycling

As the real IGBT module test subjected to thermal cycling is

very time consuming and costly, finite element analysis (FEA)

is widely accepted in analyzing the failure mechanisms and

predicting lifetime of the module especially during the design

stage. The FE method provides a valuable insight into evolution

characteristics of internal states in the solder joint and low cycle

fatigue deformation and failure prediction of the solder [36].

Modeling an IGBT module subjected to thermal cycling

involves five aspects: the life prediction model, the constitutive

model, the material property, the finite element model and the

thermal loading. These main steps form the basis of lifetime

prediction of IGBT module subjected to thermal cycling.

1) Lifetime prediction model

Baseplate solder fatigue is the dominant failure mechanism

under thermal cycling of the IGBT module. There exist many

lifetime prediction models for determining the lifetime of

solder layer in power modules and other types of electronic

packages, in accordance to their own merits [37]. One of the

widely accepted failure criteria was introduced by Darveaux for

low cycle thermal fatigue life prediction [38]. This model

describes the relationship between the volume-averaged

inelastic work density increment W , and the number of

cycles to crack initiation N0 and the crack propagation rate

da/dN.

2

10

KWKN (11)

4

3

KWK

dN

da (12)

where K1, K2, K3, K4 are the empirical constants as shown in

Table I and a is the characteristic crack length. So the

characteristic lifetime can be obtained as

dNda

aNN t

f/

0 (13)

The parameter W is defined as:

n

i

n

n

i

ni

V

VW

W

1

1 (14)

where iW designates the inelastic work density in the ith

element in FEA, whose volume is denoted by Vn.

TABLE I. EMPIRICAL CONSTANTS USED FOR LIFETIME PREDICTION [38]

constant

Value 71000

cycles/ -1.62

2.76

in./cycles/ 1.05

2) Constitutive model

To accurately calculate ∆W in (14), a high-fidelity finite

element model with a precise description of the solder behavior

is extremely critical. Therefore, the time- and

temperature-dependent deformation behavior of the solder is

one of the most important properties in the FEA. Among the

various time-dependent and temperature-dependent

constitutive models for solder in power modules, the

viscoplastic constitutive model introduced by Anand is

frequently adopted. The Anand model was originally

developed for metal forming applications and quickly became

popular to applications that involve strain and temperature

effect including solder layer and high temperature creep. The

model does not require an explicit yield condition and loading

/unloading criteria because it assumes that plastic flow occurs

at all non-zero stress values [39].

The Anand model consists of two coupled differential

equations that relate the inelastic strain rate to the rate of

deformation resistance. The strain rate equation is

RTQm

P es

A /

1

sinh

(15)

where is the inelastic strain rate, A is a constant, is the

stress multiplier, is the stress, s is the deformation resistance,




5

R is the gas constant, is the strain rate sensitivity, is the

activation energy and is absolute temperature. And the rate of

deformation resistance equation is

PB

BBhs

0 (16)

where

*1

s

sB (17)

n

RTQ

PeA

ss

/* 1

(18)

where s* is the saturation value of s, is the coefficient for

deformation resistance saturation value and n is the strain rate

sensitivity. From the development of the above equations there

are 9 material parameters that need to be defined in the Anand

model. Table II shows these parameters for SAC305 alloy used

in this work.

TABLE II. PARAMETERS OF SAC305 IN THE ANAND MODEL [40]

Parameter (unit) Description Values for

SAC305

so (MPa) Initial value of deformation

resistance 1.0665×106

Q/R (1/K) Activation energy/Boltzmann’s

constant 10.4133×103

A (1/s) Pre-exponential factor 8.265×107

(dimensionless) Stress multiplier 2.55

m (dimensionless) Strain rate sensitivity of stress 0.141446

(MPa) Hardening/softening constant 5023.9×106

(MPa) Coefficient for saturation value of

deformation resistance 20.2976×106

n (dimensionless) Strain rate sensitivity of the

saturation value 3.2472×10-2

a (dimensionless) Strain rate sensitivity of the

hardening/softening 1.120371

3) Material properties

The IGBT module consists of a total of seven layers of

materials. The solder layers are modelled with linear elastic

coupled with viscoplastic material properties. The rest

including the silicon die, the two copper layers, along with the

ceramic layer and the base plate are assumed to be linear elastic

in the FEAs. Table III shows the material properties of the

seven layers from top to bottom.

TABLE III. MATERIAL PROPERTIES OF LAYERS FROM TOP TO BOTTOM

Layer/Materi

al (kg/m3)

E (MPa）

（10-6/

K）

(MPa)

Silicon die 2,328 113,000 0.28 3 90 107

Solder (SAC305)

7,400 47 0.4 20 40 -

DCB copper 8,900 115,000 0.34 17 380 140

Ceramic (Al2O3)

3,900 370,000 0.22 6.3 20 55

DCB copper 8,900 115,000 0.34 17 380 140

Solder

(SAC305) 7,400 47 0.4

20 40 -

Copper of

baseplate 8,900 115,000 0.34

17 380 140

4) Thermal cycling load

The choice of thermal loads to evaluate the reliability of the

IGBT module is important as the relative performance of the

solders could change with the thermal load parameters such as

maximum temperature and temperature range. This FEA was

carried out using a typical thermal cycle as shown in Fig. 4,

which includes beginning temperature, reference temperature,

maximum temperature of 125 , minimum temperature of

-40 , as well as the duration for ramp-up, ramp down, and

dwell at the maximum and minimum temperatures. The

beginning temperature as well as the reference temperature is

assumed to be 25 , since any residual stress in solder will relax

due to the creep characteristic of the solder [41] and there is a

good agreement between the FEAs and experiments by starting

the simulation at reference temperature of 25 [42]. Each

Dwell takes 15 minutes, which is same as the ramp up/down

with ramp rate of 10 , so one thermal cycle lasts 60

minutes. Four thermal cycles in the simulation are usually

sufficient to ensure the stability of the hysteresis loop and test

semiconductors in automotive applications [43].

Fig. 4 Thermal cycles for fatigue analysis

5) Finite element model

The FE model in this work was conducted in Ansys 14.5,

where the Ansys Parametric Design Language (APDL) was

used to develop a generic model with a robust mesh, despite the

variation of various design. To reduce the computational time

and resources used, a two-dimensional (2-D) symmetrical FE

model with one IGBT die was used as shown in Fig. 5 [44],

which has been verified to be as accurate as a 3-D FE model for

fatigue analysis of solder joints subject to thermal cycling [45].

The layers from 0 to 6 in Fig, 5 represent the silicon die, solder,

DCB copper, Ceramic, DCB copper, solder and baseplate

layers, respectively. VISCO106 element type with 4 nodes was

used to model the solder layers because of its highly nonlinear

behavior, and Plane 182 element type was used to model other

linear elastic layers. Fig. 5(b) and (c) show the enlarged view of

the FE model. It can be seen that fine mesh pattern is

maintained in the model especially in the solder layer as the

value of W is dependent on the thickness s of the elements

[46]. In particular, the maximum element thickness of the




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solder layers is 17.5 which are adequately accurate for the

calculation of W [38]. In total, 15405 nodes and 15040

elements have been generated for the model. Some assumptions

are also made in the model, namely all seven layers are

assumed homogenous, the process variations along with the

manufacturing defect are not taken into account, and the

inter-metallic growth in the solder layers is ignored.

Fig. 5 2-D symmetrical FE model of multi-layered IGBT module

6) Experimental validation of FE models

The FE model was validated with thermal cycling test results

prior to the MOO process. To accelerate the aging process of

IGBT modules, a harsh thermal cycling profile was applied

with the maximum and minimum temperature set to be

and , respectively. The ramp up/down time was set to be

2 min with the dwell time set to be 10 min. The thermal cycling

test was interrupted at 800 and 1300 cycles for inspection. Fig.

6 shows the degradation of the solder layer between the DCB

substrate and the base plate with a C-mode scanning acoustic

microscope (SAM) from the bottom view as shown in Fig. 7.

These figures clearly show that the failure initiates around the

solder edges and propagates inwards to the centre.

Fig. 8 compares the lifetime vs. remaining area ratio between

the experiments and the corresponding FEAs. The FEA results

are in a good agreement with experiments, which demonstrates

that the developed FE model as well as the lifetime prediction

model are adequately accurate for the lifetime prediction of the

IGBT module and proper for the subsequent design

optimization.

The solder layers deform plastically when subjected to

temperature cycling loads. The CTE mismatch of the different

bonded materials induces thermo-mechanical stresses in the

module which is critical at the interfaces of the assembled

layers. Fig. 9 presents the stress and plastic strain contour of the

IGBT module at the end of the 4th

thermal cycle. The

deformation in Fig. 9 is scaled up by 20 times to better illustrate

the bending of each layer. As shown in Fig. 9(a), the maximum

elastic stress of 54.07MPa occurs at the central interface of the

ceramic layer and the copper layer, which is attributed to the

mismatch in length of different layers. Silicon die and base

plate also suffer evident stress of 49.06 MPa and 41.82 MPa,

respectively.

(a) (b)

Fig. 6 Remaining effective solder areas in % observed by the SAM (a)after 800

cycles and (b) after 1300 cycles

Fig. 7 C-mode SAM detection of IGBT modules

Fig. 8 Comparison of life cycles between FEAs and experiments

As shown in Fig. 9(b)-(d), the maximum plastic strain is

located at the baseplate solder layer near the edge. The plastic

strain in the first solder layer is modest compared with that of

the baseplate solder layer, which is in agreement with the

experimental result. It should be noted that the plastic work is

only the output of viscoplastic elements, thus in the figures only

solder layers are seen with plastic work and the rest

corresponds to zero plastic work masked in blue. Fig. 10 plots

the change of the strain energy density at the outmost node of

the two solder layers over the four thermal cycles. The curve

shows that strain energy density increases during the dwell

period though the change is relatively small compared with that

during the ramp up/down period. This is because the creep

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7

phenomenon exists during the dwell period and its effect is

included in the plastic strain in Anand model.

Fig. 10. Strain energy density histories of the two solder layers during thermal

cycling

IV. PROBLEM DEFINITION

The objective of this work is to improve the lifetime of the

module subject to both power cycling and thermal cycling by

varying the thickness of the six layers. Therefore the objective

functions can be expressed as

t

t

p

f

t

f

NMaximize

NMaximizeobjective : (19)

As mentioned above, for a specific power module used in

specific conditions, is a function of total thermal resistance

. The smaller is, the larger

is. For the lifetime

subject to thermal cycling , it is beneficial to decrease as

much as possible to increase . Therefore, to reduce the

equation transform, the objective function can be altered to

th

solder

RMinimize

WMinimizeobjective

2: (20)

Since there are other elastic layers in the module, the reliability

of these layers under the repeated thermal loads is mandatory as

well. Therefore, five constraints are defined as shown below.

21

:..soldersolder

i

allow

i

WWts

(21)

where and are the maximum von-Mises stress and the

allowed stress of the elastic layer, respectively.

and are the inelastic work density in the die-attach

and baseplate solder layers, respectively, and η is a constant

ensuring less inelastic work density (i.e. longer life) of the

former compared to the latter. As the width of the die-attach

solder layer and baseplate layer are 9mm and 26mm, resulting

in a ratio of , η is set to be 0.25 in this work to

ensure a high reliability. It should be noted that total 4 layers

from the silicon die to the base plate excluding these two solder

layers have the elastic stress constraints as shown in Table I.

The six design variables are the thickness of the six layers

excluding the silicon die which is considered fixed. The layer

thicknesses have constraints in terms of upper and lower limits

which the variables can take. Specifically, the lower bound in

Table IV is defined in terms of a commercially available power

module in which the thickness of solder layers is the thinnest

thickness the company can manufacture, and the upper bound is

specified by the authors to make a reasonable search domain for

the optimization.

TABLE IV. DESIGN SPACE FOR THE 6 DESIGN VARIABLES FROM TOP TO BOTTOM

(UNIT: MM)

Upper bound 0.15 0.4 0.46 0.4 0.2 4

Lower bound 0.08 0.2 0.36 0.2 0.08 2

Fig. 9. Distribution of von-Mises stress and plastic strain after the 4th cycle




8

V. SURROGATE BASED MULTI-OBJECTIVE OPTIMIZATION

During the optimization process, and are iteratively

calculated in terms of the possible combination of the six

design variables. The calculation of is easy and fast

because the analytical solution in (11) and (12) is

straightforward. However, the calculation of each and

is more difficult and costly, penalizing optimization searches as

it requires a costly and lengthy non-linear FEA. Hence, an

efficient optimization method is essential for the optimization

using finite element model. In this work, the surrogate based

multi-objective optimization (SBMOO) is adopted, whose goal

is to reduce computational iterations while obtaining desirable

results. The SBMOO consists of an interpolation function

developed based on a design of experiments (DoE) and

multi-objective optimization (MOO) algorithm for a

Pareto-optimal search. The entire workflow is illustrated in Fig.

11 and consists of the following steps.

1. Define objectives, constraints, design variables and

design space for the optimization;

2. Produce the DoE using Latin Hypercube sampling

method;

3. Calculate and at each design points with the FE

model;

4. Build surrogate model for the objective and constrains

(Kriging model);

5. Minimize errors of the surrogate models;

6. Output the surrogate models for the thermal cycling

along with the analytical model for the power cycling;

7. Perform multi-objective optimization using MOO

algorithm (NSGA-II);

8. Select optimal candidates and plot results.

A. Kriging Surrogate Model [47][48]

This work uses a widely used surrogate models, namely a

Kriging (KRG) model to evaluate the approximation models of

the objective and constraint functions for the thermal cycling.

Kriging model was originally developed for mining and

geostatistical application involving spatially and temporally

correlated data.

Fig. 11 Structure of SBMOO algorithm for IGBT module optimization

In general, the Kriging model combines a global model plus

a localized departure, and can be formulated as:

f(x)=+z(x) (22)

where f(x) is the unknown function of interest, denotes a

known approximation function (usually polynomial), and z(x)

stands for a stochastic component in terms of zero mean and

variance s2 with the Gaussian distribution. Letting xf be an

approximation function to the true function f(x), by minimizing

the mean squared error between f(x) and xf , xf can be

calculated as

)ˆ()(ˆ)(ˆ 1qfRxrx

T f (23)

where is the inverse of correlation matrix R, r is the

correlation vector, f is the observed data at sample points,

and q is the unity vector with ns components. The random

variables are correlated to each other using the basis function of

m

i

k

i

j

ii

kj xxExpR1

2

),( xx

, ( 1, ,s

j n , 1, ,s

k n ) (24)

where is the parameter corresponding to the i-th variable.

The Kriging model is built with an assumption that there is no

error in f; the likelihood can therefore be expressed in terms of

the sampling data as

2

1T

2/12/2 2

)()(exp

)2(

1

ssL

n

qfRqf

R

(25)

To simplify the maximization of likelihood, (25) can be

replaced by (26) by taking a natural logarithmic transformation

as

T 1

2

2

1 ( ) ( )ln ln 2 ln ln

2 2 2 2

n nL s

s

f q R f qR

(26)

By conducting the derivatives of the ln-likelihood function in

(26) with respect to and s, respectively, and setting them to

zero, the maximum likelihood estimators (MLEs) of and s2

are determined in (27) and (28), respectively,

fqRqRq111T )(ˆ (27)

sns

)ˆ()ˆ(ˆ

1T2 qfRqf

(28)

These MLEs can now be substituted back into (26) by

removing the constant terms to give what is known as the

concentrated ln-likelihood function, and the unknown

parameters of θi (θi> 0) can be calculated by maximizing the

formula as follows

Rln2

1)ˆln(

2

2 sn

maximize s

(29)

In this study, the method of modified feasible direction is

utilized to determine the optimum values of parameter . And

the estimated mean squared error (MSE) of the predictor is

derived as (30).

qRq

rRqRr

1T

21T1T22 )-(1r1ˆˆ se

(30)

B. Non-dominated Sorting Genetic Algorithm II (NSGA-II)

Genetic algorithms are a form of search heuristic which takes




9

inspiration from natural evolutionary processes to identify

optimal solutions to the problem being addressed. A solution

exists in two domains, namely the solution space as well as

objective space. In the former domain, a solution is described

by its characteristics in terms of the variables, i.e. the various

layer thicknesses. This takes this form of a string of code where

each element defines the thickness of one layer. In keeping with

the biological analogy, this string is termed a chromosome.

Each solution is also associated with its value in objective

space, i.e. the resultant and for each chromosome. The

set of chromosomes is termed a population, and by considering

the correlation between a chromosome’s location in population

space and its location in objective space (fitness), a search can

be steered towards locating better solutions.

The optimization process is an iterative one, whereby new

chromosomes are created, evaluated in objective space, and in

turn used to help identify better solutions to create a new

generation. This is done by randomly selecting solutions,

ranking according to fitness and mixing elements between

chromosomes in order to generate offspring solutions. This

process is repeated for a preset number of generations (or until a

predetermined accuracy is reached) [49]. The definition of a

‘better’ solution is slightly different in the case of multiple

objectives, and is handled by the concept of Pareto-dominance.

A solution is said to Pareto-dominate another, if and only if it

is strictly better in all objectives. If a solution is only worse off

in one objective, but better in another, then the two solutions

form a Pareto-front, giving a set of equally optimum,

compromise solutions. The final solution is then chosen from

this Pareto-set [50].

A popular genetic algorithm which handles multiple

objectives using the concept of Pareto dominance is the

Non-dominated Sorting Genetic Algorithm II (NSGA-II) which

is able to handle constraints as well as requiring a minimum

amount of external parameters [51]. This makes it suited for

robustly handling a range of different problems. The pseudo

code for the NSGA-II is given below:

1. Create initial random population of size N;

2. Evaluate and for each solution;

3. Use binary tournament selection, recombination and

mutation operators to create offspring population of N;

4. Sort combined parent and offspring population (of size

2N) into Pareto ranks using fast non-dominated sorting;

5. Create new generation population by selecting the first N

population members;

6. Repeat from step 3.

Constraints are handled in the selection operation, where

chromosomes are selected for reproduction based on their

Pareto-fitness. If both are in the same rank, a solution which

does not violate the constraints is selected, and if both solutions

are infeasible then the one with the least degree of constrain

violation is selected. Finally if both are feasible and do not

dominate each other, then the solution in the least crowded

region of objective space is selected in order to focus the search

towards sparser regions [51].

The above process is repeated for a set number of iterations

and finally gives a set of Pareto-optimal solutions. The

diversity operator ensures that the solutions are spread out in

order to explore all areas of the search space to ensure better

location of a global (as opposed to local) optimum.

VI. TEST RESULTS

To ensure that the surrogate models reach the accuracies

required, a total of 124 sampling points, (i.e., 124 FEA runs)

were generated, where 60 are the initial LHS (Latin hypercube

sampling) points and the other 64 are the sequential infill points

near the regions or interest. NSGA-II was then used with the

parameters as defined in Table V to identify the Pareto

solutions.

Fig. 12 indicates the sampling points and the Pareto-optimal

solutions for the two objective functions after 100 generations

of the search algorithm. It is observed that many sampling

designs are infeasible designs in terms of the constrained

condition, though they seem to be better than the Pareto

optimal. For the Pareto optimal, can be decreased from

2MPa to 0.4MPa, while the total thermal resistance can be

reduced from 0.11 to 0.09. and are strongly competing

with each other and cannot reach an optimum simultaneously.

In other words, any further improvement of the lifetime during

power cycling must worsen that during the thermal cycling and

vice versa. Therefore, it can be suggested from this result that it

is better for the designer or engineer of IGBT module to

comprehend the practical operational conditions (i.e. cooling

ambient conditions and mission profiles).

TABLE V. DETAILS OF THE NSGA-II PARAMETERS USED IN THIS STUDY

NSGA-II Parameter name value

Population size 100

Number of Generations 100

Probability of Crossover 0.5

Mutation Probability 0.5

Optimums 1-3 in Fig. 12 are all feasible solutions and it is

difficult to choose the best one without knowing the

power/thermal cycling information of an specific application.

Since the results in Fig. 12 are all equally-optimal solutions, it

is difficult to choose the best one. Therefore, a process of

decision-making for selection of the final optimal solution from

the available solutions is needed. One of the classical

decision-making processes is performed with the aid of a

hypothetical point, named as Equilibrium Point (EP), i.e., the

optimum 2 as shown in Fig. 12, for which both objectives have

their optimal values independent of the other objective. The

other widely used process is to select a better value for each

objective than its initial value from the base design. In terms of

these two methods, three optimum solutions are selected among

all the possible solutions as shown in Fig. 12 and Table VI.

Optimum 1 has the minimum and the longest lifetime

during thermal cycling, solution 3 has the minimum and

the longest lifetime during power cycling. Solution 2 seems to

be a good compromise with respect to the two objectives, i.e.,

higher reliability during both thermal and power cycling. With




10

regard to the lifetime, the assumption is that they are put in the

same environments and operation conditions with power loss of

300W in the power cycling (see section 3.1),temperature

variation of in the thermal cycling (see section 3.2.4),

and with the failure criteria defined as failure length reaching

10% total length. In terms of the equations derived above,

optimum 1 will have 3.5 times lifetime during thermal cycling

than the based design, however its lifetime during power

cycling will decrease to half of the base design’s. These are

summarized in Table VI, which compares the three optimized

solutions with the base design (typical solution), clearly

showing the conflicting nature of the optimization objectives.

It is easily understood that the thickness reduction of any

layer will decrease the thermal resistance and thus the lifetime

during power cycling. For the thermal cycling, it can be

concluded that the second solder layer should be designed a

little thicker than the first solder layer to prevent the thermal

cycling failure, as it is the most significant layer to prevent the

solder fatigue. The same phenomenon can also be observed in

the two copper layers of DCB substrate. Conventional designs

make them equal, however, it is shown in this work that

different thicknesses will not only help decrease the thermal

resistance but also decrease the stress and strain in the layers.

Concern of ceramic layer should be addressed more closely,

because decreasing this layer will significantly decrease the

thermal resistance and help decrease the energy accumulated in

the second solder layer, however, the elastic stress will be likely

to reach the allowed value as well.

Fig. 12 Pareto solutions of multiple-objective optimization

TABLE VI. OPTIMAL SOLUTIONS AND BASE DESIGN COMPARISONS.

Base

design Optimum 1 Optimum 2 Optimum 3

0.090 0.0095 0.0093 0.0080

0.300 0.0315 0.0335 0.040

0.400 0.0453 0.0390 0.036

0.300 0.0373 0.0339 0.0266

(mm) 0.090 0.0152 0.0101 0.0080

(mm) 3.000 0.2200 0.2205 0.3161

1530539 470258 665488 1793800

-69.28% -56.52% +17.20%

0.087 0.0975 0.09 0.0807

+12.07% 3.45% -7.24%

1.29×103 4.48×103 4.43×103 1.09×103

+247.29% +243.41% -15.50%

5.47×108 2.67×108 4.43×108 8.73×108

-51.19% -19.01% +59.60%

VII. CONCLUSIONS

This paper has presented a multi-objective optimization for

multi-layered IGBT power modules considering both thermal

cycling and power cycling with the thickness of the constituent

layers as the optimization targets. Two objectives of

maximizing the lifetime under power cycling and thermal

cycling are simultaneously considered by minimizing the total

thermal resistance and the plastic work accumulated in the

solder layer through equation transformation.

Thermal resistance is calculated analytically and the plastic

work is obtained with a high-fidelity FE model, which has been

experimentally validated. The objective of minimizing the

plastic work and constrain functions is formulated by the

surrogate model, which reduces computational time and cost.

The NSGA-II is used to search for the Pareto optima in the last

step. The results indicate that: (1) The optimization objectives

determined by power cycling and thermal cycling are

conflicting. This is due to the different failure mechanisms

induced by power cycling and thermal cycling, so a

multi-objective optimization considering both effects

simultaneously is necessary. (2) During multi-objective

optimization, Pareto optimal solutions could be identified and

selected effectively in accordance to various environmental and

operational conditions.

In summary, this work presents a novel and efficient way

different from existing ones to optimize the structure of power

electronic modules, especially for the power modules under

special environmental and operational conditions.

ACKNOWLEDGEMENT

The authors would like to thank Dr. Weidong Zhuang and

Mr. Erxian Yao in NanJing SilverMicro Electronics, Ltd, China

and Dr. Xiangdong Xue at Newcastle University for their

constructive suggestions.

REFERENCES

[1] L. M. Moore and H. N. Post, “Five years of operating experience at a large

utility-scale photovoltaic generating plant,” Prog. Photovolt.: Res.

Applicat.,vol. 16, no. 3, pp. 249–259, 2008. [2] Reliawind. (2011). Report on wind turbine reliability profiles—field data

reliability analysis.

[Online].Available:http://www.reliawind.eu/files/fileinline/110502_Reliawind_Deliverable_D.1.3ReliabilityProfilesResults.pdf.

[3] F. W. Fuchs, "Some diagnosis methods for voltage source inverters in variable speed drives with induction machines - a survey," in Industrial

Electronics Society, 2003. IECON '03. The 29th Annual Conference of the

IEEE, 2003, pp. 1378-1385 Vol.2. [4] A. Ristow, M. Begovic, A. Pregelj, and A. Rohatgi, “Development of a

methodology for improving photovoltaic inverter reliability,” IEEE

Trans. Ind. Electron., vol. 55, no. 7, pp. 2581–2592, Jul. 2008.




11

[5] E. Koutroulis, F. Blaabjerg, "Design Optimization of Transformerless

Grid-Connected PV Inverters Including Reliability," IEEE Trans. Power Electronics, vol.28, no.1, pp. 325-335, Jan. 2013

[6] Y. Shaoyong, A. Bryant, P. Mawby, X. Dawei, R. Li, and P. Tavner, “An

industry-based survey of reliability in power electronic converters,” IEEE Trans. Industry Applications, vol. 47 , pp. 1441-1451, 2011.

[7] J. Hudgins, "Power Electronic Devices in the Future," IEEE Journal of

Emerging and Selected Topics in Power Electronics, vol.1, no.1, pp.11-17, Mar. 2013

[8] M. Held, P. Jacob, G. Nicoletti, P. Scacco, M. Poech, “Fast Power

Cycling Test for IGBT Modules in Traction Application,” in Proc. Power Electronics and Drive Systems, 1997, pp. 425-430.

[9] R. Bayerer, T. Herrmann, T. Licht, J. Lutz, M. Feller “Model for Power

Cycling Lifetime of IGBT Modules –various factors influencing lifetime,” in Proc. CIPS 2008, pp. 37-42.

[10] U. Scheuermann, “Reliability challenges of automotive power

electronics,” Microelectronics Reliability, vol. 49, no. 9-11, pp. 1319-1325, 2009.

[11] T. Herrmann, M. Feller, J. Lutz, R. Bayerer, T. Licht, “Power cycling

induced failure mechanisms in solder layers,” the European Conference

on Power Electronics and Applications, Sept. 2007.

[12] Harb, S.; Balog, R.S.; , “Reliability of Candidate Photovoltaic

Module-Integrated-Inverter (PV-MII) Topologies—A Usage Model Approach,” Power Electronics, IEEE Transactions on, vol.28, no.6, pp.

3019-3027, June 2013

[13] S. Yang, D. Xiang, A. Bryant, P. Mawby, R, Li, P. Tavner, "Condition Monitoring for Device Reliability in Power Electronic Converters: A

Review," IEEE Trans. Power Electronics, vol.25, no.11, pp.2734-2752, Nov. 2010

[14] Y. Song; B. Wang, "Survey on Reliability of Power Electronic

Systems," IEEE Trans. Power Electronics, vol.28, no.1, pp.591-604, Jan. 2013

[15] H. Wang, M. Liserre, and F. Blaabjerg, “Toward reliable power

electronics: challenges, design tools, and opportunities,” IEEE Trans. Ind. Electron Mag., vol. 7, no. 2, pp.17-26, 2013.

[16] B. Ji, V. Pickert, W. Cao, B. Zahawi, “In situ diagnostics and prognostics

of wire bonding faults in IGBT modules for electric vehicle drives,” IEEE Trans. Power Electronics, vol. 28, no. 12, pp. 5568-5577, 2013.

[17] H. Wang, M. Liserre, and F. Blaabjerg, P. Rimmen, J. Jacobsen, T.

Kvisgaard, J. Landkildehus, "Transitioning to Physics-of-Failure as a Reliability Driver in Power Electronics," IEEE Journal of Emerging and

Selected Topics in Power Electronics, vol.2, no.1, pp.97-114, Mar. 2014

[18] G. Coquery and R. Lallemand, "Failure criteria for long term Accelerated Power Cycling Test linked to electrical turn off SOA on IGBT module. A

4000 hours test on 1200A–3300V module with AlSiC base plate,"

Microelectronics Reliability, vol. 40, pp. 1665-1670. Aug–Oct. 2000 [19] X. Wang; A. Castellazzi, P. Zanchetta, "Temperature control for reduced

thermal cycling of power devices," 15th European Conference on Power

Electronics and Applications (EPE), 2013, pp.1-10, Sept. 2013 [20] Y. Wu; M. Shafi, A. Knight, R. McMahon, "Comparison of the Effects of

Continuous and Discontinuous PWM Schemes on Power Losses of

Voltage-Sourced Inverters for Induction Motor Drives," IEEE Trans. Power Electronics, vol.26, no.1, pp.182-191, Jan. 2011

[21] Jordan, J.; Esteve, V.; Sanchis-Kilders, E.; Dede, E.J.; Maset, E.; Ejea,

J.B.; Ferreres, A.; “A Comparative Performance Study of a 1200 V Si and SiC MOSFET Intrinsic Diode on an Induction Heating Inverter,” Power

Electronics, IEEE Transactions on, vol.29, no.5, pp. 2550-2562, May

2014 [22] Z. Xu; M. Li; F. Wang; Z. Liang, "Investigation of Si IGBT Operation at

200°C for Traction Applications," IEEE Trans. Power Electronics,

vol.28, no.5, pp.2604-2615, May 2013 [23] H. Zhang; L. Tolbert,; B. Ozpineci, "Impact of SiC Devices on Hybrid

Electric and Plug-In Hybrid Electric Vehicles," IEEE Trans. Industry

Applications, vol.47, no.2, pp.912-921, March-April 2011 [24] Luther-King, N.; Sweet, M.; Madathil Sankara Narayanan , E.; ,

"Clustered Insulated Gate Bipolar Transistor in the Super Junction

Concept: The SJ-TCIGBT," Power Electronics, IEEE Transactions on, vol.27, no.6, pp.3072-3080, June 2012

[25] Vladimirova, K.; Crebier, J.-C.; Avenas, Y.; Schaeffer, C.; , "Drift Region

Integrated Microchannels for Direct Cooling of Power Electronic Devices: Advantages and Limitations," Power Electronics, IEEE

Transactions on, vol.28, no.5, pp.2576-2586, May 2013

[26] G. Chen; D. Han; Y. Mei; X. Cao; T. Wang; X. Chen; G. Lu, "Transient Thermal Performance of IGBT Power Modules Attached by

Low-Temperature Sintered Nanosilver," IEEE Trans. Device and

Materials Reliability, vol.12, no.1, pp.124-132, Mar. 2012 [27] R. Skuriat, C. Johnson, "Direct substrate cooling of power

electronics," 13th European Conference on Power Electronics and

Applications, EPE '09., pp.1-10, 8-10 Sept. 2009 [28] P. Ning, Z. Liang, F. Wang, "Power Module and Cooling System Thermal

Performance Evaluation for HEV Application," IEEE Journal of

Emerging and Selected Topics in Power Electronics, In press, 2014 [29] A. Trzynadlowski, S. Legowski, "Minimum-loss vector PWM strategy

for three-phase inverters," IEEE Trans. Power Electronics, vol.9, no.1,

pp.26-34, Jan. 1994 [30] X. Xue, C. Bailey, H. Lu, and S. Stoyanov, “Integration of analytical

techniques in stochastic optimization of microsystem reliability, ”,

Microelectronics Reliability, Vol. 51, no. 5, pp.936-945, 2011 [31] A. Zéanh, O. Dalverny, M. Karama, E. Woirgard, S. Azzopardi, A.

Bouzourene, J. Casutt, and M. Mermet-Guyennet, “Proposition of IGBT

modules assembling technologies for aeronautical applications”, in International Conference on Integration of Power Electronics Systems

(CIPS), Sep 2008

[32] C. Mauro, "Selected failure mechanisms of modern power modules,"

Microelectronics reliability, vol. 42, no. 4, pp.653-667, 2002

[33] T.Y. Hung, C.J. Huang, C.C. Lee, C.C. Wang, K.C. Lu, and K.N. Chiang,

“Investigation of solder crack behavior and fatigue life of the power module on different thermal cycling period,” Microelectronic

Engineering, vol. 107, pp. 125-129, 2013

[34] K. Sasaki and N. Ohno, "Fatigue life evaluation of aluminum bonding wire in silicone gel under random vibration testing," Microelectronics

Reliability, vol. 53, no. 9, pp.1766-1770, 2013 [35] R. Simons, “Simple Formulas for Estimating Thermal Spreading

Resistance,” Electronics Cooling, May 2004

[36] K.C. Otiaba, R.S. Bhatti, N.N. Ekere, S. Mallik, and M. Ekpu, "Finite element analysis of the effect of silver content for Sn–Ag–Cu alloy

compositions on thermal cycling reliability of solder die

attach." Engineering Failure Analysis, vol. 28, pp. 192-207, 2013 [37] W.W. Lee, L.T. Nguyen, and G.S. Selvaduray, "Solder joint fatigue

models: review and applicability to chip scale

packages," Microelectronics reliability, vol. 40, no. 2, pp. 231-244, 2000

[38] R. Darveaux, "Effect of simulation methodology on solder joint crack

growth correlation," Journal of Electronic Packaging, vol.124, no. 3,

pp.147-154, 2002 [39] G. Muralidharan, K. Kurumaddali, A.K. Kercher, and S.G. Leslie,

“Reliability of Sn-3.5 Ag solder joints in high temperature packaging

applications,” In the Proceedings of 60th Electronic Components and Technology Conference (ECTC), pp. 1823-1829, June 2010

[40] D. Herkommer, J. Punch, M. Reid, “Life prediction of SAC305

interconnects under temperature cycling conditions using an arbitrary loading fatigue model,” In the Proceeding of ASME 2009 InterPACK

Conference collocated with the ASME 2009 Summer Heat Transfer

Conference and the ASME 2009 3rd International Conference on Energy Sustainability, pp. 737-742, July 2009

[41] H. Mavoori, J. Chin, S. Vaynman, B. Moran, L. Keer, and M. Fine,

"Creep, stress relaxation, and plastic deformation in Sn-Ag and Sn-Zn eutectic solders," Journal of Electronic Materials, vol. 26, no. 7, pp.

783-790, 1997

[42] A. Guedon-Gracia, E. Woirgard, and C. Zardini, "Reliability of lead-free BGA assembly: correlation between accelerated ageing tests and FE

simulations," IEEE Transactions on Device and Materials

Reliability, vol. 8, no. 3, pp. 449-454, 2008 [43] R. Müller-Fiedler, V. Knoblauch, “Reliability aspects of microsensors

and micromechatronic actuators for automotive applications,”

Microelectron Reliab, vol. 43, no. 7, pp. 1085–1097, 2003 [44] X.D. Xue, C. Bailey, H. Lu, S. Stoyanov, “Integration of analytical

techniques in stochastic optimization of microsystem reliability,”

Microelectronics Reliability, vol. 51, pp. 936-945, 2011 [45] F.X. Che and J.H. Pang, "Fatigue Reliability Analysis of Sn–Ag–Cu

Solder Joints Subject to Thermal Cycling," IEEE Transactions on Device

and Materials Reliability, vol. 13, no. 1, pp. 36-49, 2013 [46] G. Gustafsson, I. Guven, V. Kradinov, and E. Madenci, "Finite element

modeling of BGA packages for life prediction," In Proceedings of 50th

Electronic Components & Technology Conference, pp. 1059-1063, 2000. [47] X.G. Song, J.H. Jung, H.J. Son, J.H. Park, K.H. Lee, Y.C. Park,

“Metamodel-based optimization of a control arm considering strength and

durability performance,” Computers & Mathematics with Applications, vol. 60, no. 4, pp. 976-980, 2010

http://proceedings.asmedigitalcollection.asme.org/solr/searchresults.aspx?author=Dominik+Herkommer&q=Dominik+Herkommer

http://proceedings.asmedigitalcollection.asme.org/solr/searchresults.aspx?author=Jeff+Punch&q=Jeff+Punch

http://proceedings.asmedigitalcollection.asme.org/solr/searchresults.aspx?author=Michael+Reid&q=Michael+Reid




12

[48] G.Y. Sun, X.G. Song, S.K. Baek, Q. Li, “Robust optimization of

foam-filled thin-walled structure based on sequential Kriging metamodel,”, Structural and Multidisciplinary Optimization, vol. 49, no.

6, pp. 897-913, 2013

[49] D. E. Goldberg, Genetic Algorithms in Search, Optimization, and Machine Learning: Addison-Wesley, 1989.

[50] A. Konak, D. W. Coit, and A. E. Smith, "Multi-objective optimization

using genetic algorithms: A tutorial," Reliability Engineering & System Safety, vol. 91, pp. 992-1007, 2006

[51] K. Deb, A. Pratap, S. Agarwal, and T. Meyarivan, "A fast and elitist

multiobjective genetic algorithm: NSGA-II," IEEE Transactions on Evolutionary Computation, vol. 6, pp. 182-197, Apr 2002

Bing Ji (M’13) received the M.Sc. and Ph.D. degrees in electrical and electronic engineering from Newcastle

University, U.K., in 2007 and 2012 respectively. He

was a power electronics engineer with a UK low-emission vehicle company from 2012, where he

worked on powertrain for electric vehicles and battery

management systems. Since 2013, he has been a

Postdoctoral Researcher at Newcastle University,

where he is involved in accurate power loss

measurement and health management for power electronics. His research interests include reliability of power semiconductor

devices, batteries and converters, function integration of gate drivers,

electro-thermal modeling, thermal management and high power-density converter integration for electric vehicle applications. He is also a member of

the IET. Xueguan Song received the B.S. degree in mechanical engineering from Dalian University of Technology,

China, in 2004 and the M.S. and Ph.D. degree in

Mechanical Engineering from Dong-A University, South Korea, in 2007 and 2010, respectively. He is

currently a professor in the School of Mechanical

Engineering at Dalian University of Technology, China. Dr. Song has published over 30 peer-reviewed papers, 1

book and 1 book chapter in various research fields

including engineering optimization, computational fluid dynamics (CFD) analysis, thermal management and power electronics. He

is the recipient of best paper award at LDIA’13 Conference, best poster awards

at CSO 2011 and PCO’2010 Conferences and honorable mention award in the PhD student paper symposium and competition at the 2010 ASME PVP

Conference. His research interest includes multidisciplinary design

optimization, electronic packaging design, reliability and modeling, computational fluid dynamics and thermal management.

Edward Sciberras received the BEng (Hons) in Electrical Engineering from University of Malta, and

the MSc in Marine Electrical Power Technology from

Newcastle University. Since July 2011, He is with the School of Electrical and Electronic Engineering,

Newcastle University, as a research associate working towards the PhD on the topic of shipboard power

systems.

Wenping Cao (M’05-SM’11) received the B.Eng. in

electrical engineering from Beijing Jiaotong

University, Beijing, China, in 1991; and the Ph.D. degree in electrical machines and drives from the

University of Nottingham, Nottingham, U.K., in 2004.

He is currently a Senior Lecturer with Queen’s University Belfast, Belfast, U.K. He is the recipient of

the Best Paper Award at the LDIA’13 Conference. Dr.

Cao serves as an Associate Editor for IEEE Transactions on Industry Applications, IEEE Industry

Applications Magazine, IET Power Electronics, and

nine other International Journals. His research interests are in thermal performance of electric machines, drives and power electronics.

Dr. Cao is also a Member of the Institution of Engineering and Technology

(IET) and a Fellow of Higher Education Academy (HEA).

Yihua Hu (M’13) received the B.S. degree in electrical motor drives in 2003,

and the Ph.D. degree in power electronics and drives in

2011, both from China University of Mining and Technology, Jiangsu, China. Between 2011 and 2013,

he was with the College of Electrical Engineering,

Zhejiang University as a Postdoctoral Fellow. Between November 2012 and February 2013, he was an

academic Visiting Scholar with the School of

Electrical and Electronic Engineering, Newcastle University, Newcastle upon Tyne, U.K. He is currently

a Research Associate with the Department of

Electronic & Electrical Engineering, University of Strathclyde, Glasgow, U.K. He has published more than 20 technical papers in

leading journals and conference proceedings. His research interests include PV

generation systems, DC-DC/DC-AC converters, and electrical motor drives.

Volker Pickert (M’04) received the Dipl.-Ing. degree in electrical and

electronic engineering from the

Rheinisch-Westfaelische Technische Hochschule, Aachen, Germany in 1994, and the Ph.D. degree

from Newcastle University, Newcastle upon Tyne,

U.K. in 1997. From 1998 to 1999 he was application engineer with Semikron International, Nuremberg,

Germany; and from 1999 to 2003 he was group

leader at Volkswagen, Wolfsburg, Germany, and responsible for the development of electric drives for

electric vehicles. In 2003, he was appointed as Senior

Lecturer within the Power Electronics, Drives and Machines Research Group at Newcastle University and in 2011 he became

Professor of Power Electronics. Prof Pickert has published over 80 papers in the

area of power electronics and he is the recipient of the IMarEst Denny Medal for the best paper in the Journal of Marine Engineering and Technology in

2011. He was chairman of the biannual international IET conference on Power

Electronics, Machines and Drives in 2010. He is an executive steering member of the IET PGCU network and a member of the EPE. His current research

includes power electronics for automotive applications, thermal management,

fault tolerant converters and advanced nonlinear control.

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