ITCS 3181 Logic and Computer Systems 2015 B. Wilkinson slides3.ppt Modification date: March 16, 2015 1

Addressing Modes

The methods used in machine instructions to identify the location of an operand.

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General details

Almost always, one operand is held in a register.

Addressing mode refers to the other operand.

Various addressing modes provided for different purposes.

Effective address – the actual address of the operand after all address computations of the addressing mode have been performed.

In assembly language, different notations are used to specify addressing mode.

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Size of data transfer

Memory organized as set of bytes (8 bits).

A 32-bit processor would have 32-bit registers. May be several sizes of transfer allowed:

For 8 bit transfers -- from memory to least significant 8 bits of register or vice versa.

32 bits from four consecutive memory locations to full 32 bits of register or vice versa.

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Size of data transfer

Size of transfer needs to be specified.

In assembly language, different operation mnemonics or different notations used to specify size of transfer.

Example

ADD means add 32 bit numbersADDB means add 8 bit numbers

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Fundamental Addressing Modes

• Direct Addressing (also called Absolute Addressing)

• Immediate Addressing

• Register (Direct) Addressing

• Register Indirect Addressing

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Direct (or Absolute) Addressing

The operand is in memory and the memory address of the operand is held in instruction:

Memory addressOperation

Operand

Memory location

Instruction

This was the method used to describe instruction formats previously.

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Direct (Absolute) Addressing Example

LD R2,[100] ;R2=contents of memory with address 100

LD 2 100

100

Memory

Processor

R2

Registers

Instruction

Means a comment

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Another Direct (Absolute) Addressing Example

ST [100],R2 ;memory whose address is 100 = R2

ST 2 100

100

Memory

Processor

R2

Registers

Instruction

Mnemonic for LD and ST instruction may be MOV (move) depending upon manufacturer’s notation, see later

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Indicating size of data transfer

Using a mnemonic - example

LD means load 32 bit number to registerST store 32 bit number to memory

LB means load 8 bit number to registerSB store 8 bit number to memory

Size may be indicated in other ways.

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Immediate Addressing

The operand is held in the instruction:

OperandOperation

Instruction

i.e. immediately available at end of instruction

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Immediate Addressing Example

MOV R2,123 ;R2 = 123

MOV 2 123

Pro ce ss or

R 2

Registers

Instruction

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Immediate addressing used in compiled code

Useful for constants.

For example:

High level code Assembly language statements

int x = 123; MOV R1,123

a = b + 34; ADD R3, R4, 34

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Register Direct Addressing

The operand is held in a register which is specified in instruction.

Register no.Operation

Operand

Register

Instruction

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Register (direct) Addressing Example

MOV R3, R2 ;R3 = R2

Proc e ss or

R 2

R e gis ters

Instruction

MOV 3 2

R 3

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Register direct addressing used in compiled code

Useful for integer variables.

For example:

High level code Assembly language statements

x = y; MOV R1,R2

a = b + c; ADD R3, R4, R5

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Register Indirect Addressing

Operand held in memory. Address of operand location held in a register that is specified in instruction.

Register no.Operation

Operand

Memory location

Memory address

Register

Instruction

Useful for pointers and accessing different memory locations such as list of consecutive locations. Contents of register can be incremented after each access to point to the next location.

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Register Indirect Addressing Example

LD R3,[R2] ;R3=contents of memory, address in R2

120

Memory

Pro ce ss or

R 2

R e gis ters

InstructionLD 3 2

R 312 0

[ ] read as contents of memory

In this example, R2 holds the number 120

For clarity here and later, omitted that memory transfer has 32 bits (4 consecutive bytes) if 32 bit registers.

Points to

Points to

Transfer

Points to

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Example of Register indirect addressing used in compiled code

In C, for pointers.

High level code Assembly languagestatements

int *b; // ptr, a pointer, say using register R1int a; // a, integer say in memory location 120

b = &a; // b = address of a MOV R1,120

*b = 123; // location pointed by b = 123 ST [R1],123

b a

120120

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Register Indirect Addressing plus Offset

Similar to register indirect addressing except an offset held in the instruction is added to register contents to form the effective address:

Register no.Operation

Operand

Memory location

Address

Register

Offset

+

Instruction

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Register Indirect Addressing Plus OffsetExample

LD R3,100[R2] ;R3=contents of memory, address;in R2 + 100

220

Memory

Pro ce ss or

R 2

R e gis ters

InstructionLD 3 2

R 312 0

100

+In this example R2 holds the number 120

Points to

Transfer

Points to

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Register Indirect Addressing Variation

Index Register Addressing

Register indirect addressing where register seen as an “index” into a list (one dimensional array).

Register holds number of locations from starting point (first item in list). Starting point given in instruction.

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Index Register Addressing Example

x = a[i];

LB R1,100[R2]

C code

Assembly language

0123

i a[i]

100Instruction

R2

Memory

a[0]

Load byte

Here, compiler uses R1 for x, R2 for i and starting address for array a is location 100.

a[] assumed character array. If a[] is an integer array, would use LD and need to multiply index by 4.

char a[N];int x, i;

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Implied Addressing

Some operations have an implicit location for the operand and its address need not be specified.

We will come across such operations later.

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Specifying addressing mode in machine instruction

Can be specified:

• Within operation field (or is implied in operation) or • In a separate mode field

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Addressing Mode Specified in Separate Field

OperationInstruction

Addressing mode

Actual encoding can be more complex that this.

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Size of Transfer Specified in Separate Field

OperationInstruction

Size of transfer

Again, this detail is not shown in the following.Actual encoding can be much more complex that this (e.g. Intel processors highly complex).

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Questions