Abstract— We present power amplifier ICs with a small-signal measured 3dB-bandwidth spanning from 24 GHz to 114 GHz, implemented in a 130 nm InP HBT process. The PAs were designed using sub-quarter wavelength transmission-line baluns for output matching and series power combining. The small signal gain is 15 dB and the DC power consumption is 800 mW in low power operation. The measured output power at 3-dB gain-compression varies between 16.5 dBm and 22dBm between 50 GHz and 100 GHz. The peak PAE is larger than 8 % over the same range. The saturated output power and PAE at 90 GHz are 21.95 dBm and 14.7 % respectively.

Index Terms—Broadband Power Amplifiers, InP HBT, Sub-quarter-wavelength baluns, Saturated Output Power, Power-added efficiency

I. INTRODUCTIONBroadband, high-power, high efficiency mm-wave power

amplifiers are required for applications in broadband instrumentation and electronic warfare. The work presented in this paper was designed as a driver amplifier for a broadly-tunable dual-conversion receiver (1-25 GHz) with a fixed 100 GHz IF. One of the key challenges for achieving the target bandwidth was to design a power-efficient local oscillator driver amplifier with high power output (>20 dBm) over a bandwidth larger than 25 GHz. Previously, [1] demonstrated high-efficiency W-band amplifiers using sub-quarter-wavelength baluns for series-connected power combining implemented in a 0.25 μm InP HBT technology. This work uses the same method, and is implemented in a 130 nm InP HBT technology, which exhibits a higher maximum power gain frequency (fmax) hence higher bandwidth than its predecessor, but lower breakdown voltage hence lower output power.

Here we report broadband power amplifiers demonstrating a 90 GHz (24 GHz – 114 GHz) measured 3-dB small signal bandwidth, with peak PAE greater than 8% and output power at 3-dB gain compression greater than 16.5 dBm from 50 GHz to 100 GHz. We will review the 130 nm InP HBT IC process in section II. Section III will outline the PA design, and section IV will detail the measurement procedures and experimental results.

II. INDIUM PHOSPHIDE HBT PROCESSTeledyne Scientific Company’s 130 nm InP HBT process

with a ~3.5 V breakdown voltage was used to design these power amplifiers. The peak bandwidth of a single HBT in this process is fmax = 1150 GHz and ft = 521 GHz [4]. The HBT power cells were composed of 8-emitter fingers, each with Le

= 5 μm. The footprint for the power cell is 70 μm × 15 μm and arranged in a common-emitter configuration. The transistors were spaced conservatively because there was no thermal model used in simulation. The quiescent HBT bias used in the amplifiers was Ic = 5.5 mA/μm2 and Vce = 2 V.

A 3-metal layer gold interconnect is used. The inter-metal interconnect separation dielectric material is BCB (r = 2.7). The separation between the first and second level interconnect is 1.0 μm and the separation between the second and third level interconnect is 5.0 μm. MIM capacitors (SiNx, 0.3 fF/μm2) are formed between the first and second level interconnect metal, and 50-Ω/sq thin-film resistors are available.

Fig. 1. Wide-band 2-stage InP HBT power amplifier with sub-quarter wavelength baluns

III. BROADBAND POWER AMPLIFIER IC DESIGNThe amplifier IC design was simulated using Advanced

Design System (ADS) and an HBT model provided by Teledyne Scientific Company for the 130 nm HBT technology. Thin-film, low-loss microstrip wiring is used in the designs. All transmission line structures, baluns, MIM capacitors, device feed structures and probe pads were simulated using ADS Momentum 2.5-D electromagnetic

Ultra-wideband mm-Wave InP Power Amplifiers in 130 nm InP HBT Technology

Robert Maurer1, Seong-Kyun Kim1, Miguel Urteaga2, and Mark. J.W. Rodwell1

1ECE Department, University of California at Santa Barbara, Santa Barbara, CA, 93106, USA2Teledyne Scientific and Imaging, 1049 Camino Dos Rios, Thousand Oaks, CA, 91360, USA

simulator. The thin-film microstrip is formed using the top metal layer (MET3) for signal and using the first metal layer (MET1) for a ground-plane (separation of 7.0 μm).

The amplifier uses a basic common-emitter configuration for each HBT cell. It uses sub-quarter wavelength balun pairs for compact, wide-band power combining, for shunt inductive load-line matching at 85 GHz, and for DC biasing, (Figure 2). The output stage uses 4:1 series combining, while the driver uses 2:1 series combining, designed to produce 1/4 the power of the output stage. The baluns present to the transistor cells a 25 Ω load, with inductive shunt tuning of the transistor capacitance. A more detailed description of this topology can be found in [1]-[2].

Fig. 2. Schematic a) of the 2-stage sub-quarter wavelength balun amplifier, b) input matching network, c) and current mirror biasing, through the input baluns, the bases of the 8-finger power cells .

The large bandwidth, under small-signal operation, here demonstrated is a consequence both of the high transistor bandwidth and of the specific power-combiner used. In typical corporate-combined power amplifiers, the combining networks limit the bandwidth to well below the limits inherent with the transistor. In contrast, with the series-combined designs reported here, each transistor is loaded with 25 , in parallel with a shunt tuning inductance selected to resonate the transistor output capacitance at the design frequency. The transistor load impedance is selected so that 25 =(V max−V min)/ I max , where V max and V min are set close to the transistor breakdown and minimum (Kirk-effect) voltages, and I max to the maximum safe transistor currents. The transistor output capacitance is, approximately, Ccb , hence the output network can be modeled as in Figure 3. This RLC network has a 3dB-bandwidth Δf output=Imax /2π (V max−V min)Ccb .

It should be noted that the output tuning bandwidth estimated above is set entirely by the transistor technology. In

the Teledyne 130nm technology, Ccb=0.82 fF/ μm⋅LE and I max=2 mA/ μm⋅LE where LE is the emitter length. Setting V max = 3.5 V and V min = 0.5 V, we find Δf output =130 GHz. Noting that the sharp 30 GHz low-frequency cutoff arises from a resonance between the balun inductance and the collector power-supply bypass capacitance, the measured amplifier bandwidth is close to that estimated for the output tuning network.

The amplifier bandwidth is also limited by that of the input tuning network (Fig. 2). Although the maximum feasible input tuning bandwidth is Δf input≈1/2 πRbbCbe , > 200 GHz in this technology, the input matching network employed uses only three LC sections, and its bandwidth therefore falls well below this limit.

Fig. 3. Equivalent circuit model for determining the maximum small-signal output bandwidth of a linear common emitter power amplifier

IV. EXPERIMENTAL RESULTS

The IC was tested for small signal gain at Teledyne Scientific Company. An Agilent 8510XF Vector Network Analyzer (VNA) was used to perform S-parameter measurements. Probe tip LRRM calibration was performed with WinCal XE on a cascade calibration substrate. The reference plane was set at the probe pads of the IC.

The small signal gain of the 2-stage amplifier is shown in Fig. 3. For these measurements, Ic = 360 mA and Vc = 2.1 V. As shown in Fig. 3, the small signal gain at 60 GHz is 15 dB. The 3-dB bandwidth extends from 26 GHz to 114 GHz with a local maximum of 18 dB at 30 GHz. Figure 3b shows that the measured S11 and S22 data has been shifted upwards in frequency relative to the corresponding simulated data. We believe that this difference is caused by an error in modeling the IC interconnects, and not an issue with the device model because other IC’s designed in the same technology have demonstrated large-scale integration with very little difference between simulated and measured performance [3].

W-band output power measurements were taken using an Agilent N5242A PNA-X network analyzer with WR-10 Oleson Microwave Laboratory frequency extending heads, followed by a Spacek Labs W-band power amplifier and WR-10 waveguide probes to sweep power at 80 GHz, 90 GHz, and 100GHz. The resulting output power was measured through an attenuator with an HP power sensor and an Agilent E4418B Power Meter. The detected power was calibrated for the insertion loss of the probes, the source chain, and the attenuator. The actual output power vs. nominal output power

of the network analyzer and extending heads was also measured and calibrated into the recorded data for each measured frequency.

V-band measurements were taken using an N5247A PNA-X network analyzer to generate an input signal, followed by a passive diode frequency tripler and a Spacek Labs V-band amplifier and a variable attenuator to modulate input drive power. The input drive power was tracked using a 20 dB directional coupler and an HP V-band power sensor and an Agilent E4418B Power Meter. Cascade DC-67 GHz probes were used, and a V-band power sensor and an HP 437B power meter. The attenuation and coupling factor of the directional coupler and input/output cables were measured and calibrated into the measurement data.

Fig. 4. a) Measured (black) and simulated (red) S21 b) Measured (solid) and simulated (dashed) S11 (black) and S22 (red). Measured and simulated S12 is lower than -30 dB at all frequencies.

For Pin vs. Pout measurements, the amplifier was biased with V = 2.24 V and Ic = 404 mA. Measurements were made in

W-band at 80 GHz, 90 GHz, and 100 GHz. V-band measurements were performed at 50 GHz, 55 GHz, 60 GHz, and 65 GHz. Figure shows simulated and measured peak PAE and Gain vs. output power at 55 GHz, 90 GHz, and 100 GHz. Figure 6 shows Peak PAE and output power at the 3-dB compression point vs. frequency.

Fig. 5. Measured (solid) and simulated (dashed) output power (red) and PAE (blue) vs. input power at a) 55 GHz, b) 90 GHz, c) 100 GHz

V. CONCLUSION

High power, high efficiency power amplifier ICs in a 130 nm InP HBT technology are presented with a 90 GHz 3-dB small-signal bandwidth. Large signal measurements show a PAE larger than 8 % and an output power larger than 16.5 dBm at 3-dB gain compression from 50 GHz to 100 GHz. To our knowledge, the small signal 3-dB-bandwidth of this PA is larger than that of any other published work with equivalent PAE or output power.

Fig. 6. Measured (solid) and simulated (dashed) output power at 3-dB gain compression (red) and peak PAE (blue) vs. frequency

VI. ACKNOWLEDGMENT

This work was supported by DARPA CMO Contracts No. HR0011-09-C-0060 and No. FA8650-14-1-7413. The views, opinions and/or findings contained in this article are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Defense Advanced Research Projects Agency, or the Department of Defense. The author would like to thank Teledyne Scientific Company for their collaboration and for the IC’s fabrication.

REFERENCES[1] H. Park, S. Daneshgar, J. Rode, Z. Griffith, M. Urteaga, B. Kim,

and M. Rodwell, “30% PAE W-band InP Power Amplifiers using Sub-quarter-wavelength Baluns for Series-connected Power-combining,” 2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), pp. 1-4, 2013.

[2] H. Park, S. Daneshgar, Z. Griffith, M. Urteaga, B. Kim, and M. Rodwell, “Millimeter-Wave Series Power Combining Using Sub-Quarter-Wavelength Baluns,” IEEE Journal of Solid-State Circuits, vol. 49, no. 10, pp. 2089-2102, Oct., 2014.

[3] S. Kim, R. Maurer, M. Urteaga, M. J. W. Rodwell, “A High-Dynamic-Range W-band Frequency-Conversion IC for Microwave Dual-Conversion Receivers,” 2016 IEEE Compound Semiconductor Integrated Circuit Symp. Dig. (CSICS), 2016.

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[6] K. Wu, K. Lai, R. Hu, C. Jou, D. Niu, and Y. Shiao, “77-110 GHz 65-nm CMOS Power Amplifier Design,” IEEE Transactions on Terahertz Science and Technology, vol. 4, no. 3, pp. 391-399, April, 2014.

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TABLE ISUMMARY OF BROADBAND/HIGH PERFORMANCE MM-WAVE POWER AMPLIFIERS

Ref. Technology Freq. (GHz)

BW3dB

(GHz)Max.

S21(dB)Pout (dBm) Peak PAE

(%)VDD or VCC

(V)Topology

[1] 0.25 μm InP HBT

86 23 9.4 20.37 30.4 2.5 2-way Series-connected Power-combining Balun

[5] 0.14 μm GaN HEMT

90 35 21 24.5 13.2 12 4-stage Balanced Amplifier

[6] 65 nm CMOS 94 33 18 12 4.5 1.2 4-way Combining 6-stage CS

[7] 0.15 μm GaN T-Gate HEMT

91 ~7 16 31.2 20 15 3-stage

This Work

130 nm InP HBT 90 90 15 21.95 14.7 2 2-stage 2-way Series Connected Power combining Balun