introduction to mts-86c microprocessor training system
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MODULE
Introduction to MTS-86C Microprocessor Training System
MODULE OUTLINE:• Objectives• Introduction to Microprocessor Systems
• Microprocessor Architecture (Sample)
• 8086 General Operation
• Introduction to MTS-86C
• Executing Demo ProgramsPrepare
Engr. Cristine J
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MODULE
ObjectivesPRE-LAB DISCUSSION
• To give an overview of the microprocessor systems, its components an
architecture
• To introduce the general operation of the 8086 processor
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Three Main Components of aBasic Computer Organization
A. CPU or Microprocessor – performsmany operations and controls thecomputer.
B. Memory Subsystem – used to storeprograms being executed by the CPU,along with the program’s data.
C. Input/Output Subsystem – allowsthe CPU to interact with input and outputdevices, such as the keyboard andmonitor.
INTRODUCTION
GENERIC COMPUTER ORGANIZAT
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What is a System Bus? A System Bus is a set of wires or a
physical group of signal lines that has arelated function within a microprocessorsystem.
It is used to send information from onecomponent into another.
INTRODUCTION
How is the system bus classified?
A. Address Bus – a unidirectional bus used to locate amemory location or an I/O device connected to the
system.
B. Control Bus – a bus (collection of individual control
signals) used by the microprocessor to send its
generated control signals to any element of the
computer system
C. Data Bus – a bidirectional bus that carries data backand forth to a specified location with basis to the
address location provided by the address bus.
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GENERIC COMPUTER ORGANIZAT
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What is a Microprocessor? A Microprocessor is considered to be the
Central Processing Unit (CPU) or the
brain of all computers and electronic
devices. It acts as a complete computation
engine that is fabricated on a single chip.
INTRODUCTION
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BASIC MICROPROCESSORSTRUCTURE
A. Bus Unit – has the job ofestablishing communication withthe external unit
B. Arithmetic Logic Unit (ALU) – performs data processingoperations specified during theexecution phase of theinstruction being interpreted
C. Control Unit – generates theset of timings and control signalsnecessary to activate differentparts of the circuit
D. Register Set – set of dataholding places
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
GENERAL PURPOSE
REGISTER
INSTRUCTION
REGISTER
PROGRAM
COUNTER
ACCUMULATOR
STATUS
REGISTER
MEMORY
ADDRESS
REGISTER
MEMORY
DATA
REGISTER
ALU
CONTROL
UNIT
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A. Bus Unit
Data Bus• A bidirectional bus that
carries data back and forth toa specified location with basisto the address location
provided by the address bus.
NOTE:
The width of a data bus refers to thenumber of bits (electrical wires) that
make up a bus.e.g. 1-, 4-, 8-, 16-, 32-, and 64-bit
BASIC STRUCTURE OF MICROPROCESS
MICROPROCESSOR ARCHITECTURE
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A. Bus UnitAddress Bus
• It is a group of wires or lines thatare used to transfer the addressesof Memory or I/O devices. It isbidirectional.
NOTE:
A 16-bit address bus can transfermaximum address which means it canaddress 65,536 different memorylocations.
The number of bits of address bus
determines the maximum size of memory which the processor can access.
BASIC STRUCTURE OF MICROPROCESS
MICROPROCESSOR ARCHITECTURE
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Structure of DataStorage
• For multiple byte dataitems to be stored in thememory, there is a needto know how the order is done.
• Otherwise, problem mayoccur when transferringdata between machines.
• The order of storage ofdata can be classified
into two: the LittleEndian and Big Endian
MICROPROCESSOR ARCHITECTURELITTLE ENDIAN vs. BIG ENDIAN
What is the difference betweenthese two storage structures?
• LITTLE ENDIAN – the least
significant 8 bits (byte) are to be
stored in a lower address.
• BIG ENDIAN – the most
significant 8 bits (byte) are to be
stored in a lower address.
addr4 By
addr3 By
addr2 By
addr1 By
addr4 By
addr3 By
addr2 By
addr1 By
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B. Arithmetic Logic Unit (ALU)• It contains the microprocessor’s data
processing major logic.• Performs arithmetic and logic
operations.
• Composed of adders/subtracters,comparators, and differentcombinational circuits.
NOTE:
Example of arithmetic operations are:
1. addition/subtraction
2. increment/decrement
3. shift left/right, circular shift left/right
Example of logic operations are: AND, OR,XOR, and NOT.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
ALU
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C. Control Unit• Made up of instruction decoder,
timing circuits, and control logic
1. Instruction Decoder – the circuitresponsible for synthesizing anddecoding the instructions fed orreceived by the microprocessor.
2. Timing Circuits –
used tosynchronize the operation of thedifferent parts of themicroprocessor.
3. Control Logic – send the control
signals flowing in the control busto enable the different parts of themicroprocessor unit.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
CONTROL
UNIT
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D. Register Set• In the given structure, the
register set is composed ofthe following:
1. General PurposeRegisters A and B
2. Accumulator3. Status Register
4. Instruction Register
5. Program Counter
6. Memory Data Register
7. Memory Address Register
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
GENERAL PURPOSE
REGISTER
INSTRUCTION
REGISTER
PROGRAM
COUNTER
ACCUMULATOR
STATUS
REGISTER
MEMORY
ADDRESS
REGISTER
MEMORY
DATA
REGISTER
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D. Register Set
2. Accumulator• The register that works very
closely with the ALU.
• All results of the processes
performed by the ALU is
stored in this register.
• This is the major register that
holds data for manipulation.
• It is considered as the most
versatile register because itscontent always changes.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
ACCUMULATOR
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D. Register Set
1. General PurposeRegisters (A and B)
• They are generally used as
data storage and are
directly connected to thedata bus.
NOTE:
The more the number of GPR,
the more powerful themicroprocessor is.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
GENERAL PURPOSE
REGISTER
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D. Register Set3. Status Register
•It is sometimes referred to as FlagRegister , Condition CodeRegister , or the IndicatorRegister .
• It is used to hold the status of themicroprocessor after performing anoperation.
Commonly Used Flags: CARRY – end carry of the parallel adder.
ZERO – if the result of the ALU are allzero
SIGN – if the MSB in a signed operationhas a value of 1
OVERFLOW – if the result of ALU
operation exceeds the defined range ofnumbers
PARITY – used for error detection
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
STATUS
REGISTER
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D. Register Set
4. Instruction Register• It is used to hold the
instruction code or
operation code (opcode).
NOTE:
The outputs of this register
are the inputs to the
instruction decoder.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
INSTRUCTION
REGISTER
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D. Register Set
5. Program Counter• It contains the address of
the next instruction to be
performed by the MPU.
• It automatically incrementsas soon as it is finished
with the memory location.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
PROGRAM
COUNTER
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D. Register Set6. Memory Data Register
• This is where the data to bestored to or retrieved from thememory are placed.
• This register also loads thefetched instruction from the
memory going to instructionregister.
7. Memory Address Register
• This is where the addresses
of data and instructions canbe located.
MICROPROCESSOR ARCHITECTURE
MICROPROCESSOR BLOCK DIAGRA
MEMORY
ADDRESS
REGISTER
MEMORY
DATA
REGISTER
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MTS 86C
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HARDWARE OVERVIEW
MTS-86C is an Intel 8086 basedmicroprocessor training system
designed for teaching purposes.
It is composed of 5 parts:
• MPU (8086)
• Memory
• Chip Sets
• I/Os
• External Interface
MTS-86C
MemoryMPU
8086
Chip S
I/OExternal Interfac
MTS-86C FUNCTION BLOCKS
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HARDWARE OVERVIEW
MPUThe MPU of the MTS-86C is an
Intel based 8086 microprocessor
which has the following elements:
16-bit internal data bus
20-bit address bus
Control bus
Execution Unit
Bus Interface Unit
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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HARDWARE OVERVIEW MEMORY
ROM (Read Only Memory)The memory has two 27,256 UVEPROM (32Kb x 8), serving as thestorage of demo programs andsystem monitoring program.
RAM (Random Access Memory)
The memory also has two 62,256SRAM (32Kb x 8), serving as thestorage of user programs/data andinterrupt vector table.
USER MEMORY
The user memory allows the user to
store programs in their own ROM orRAM. (Optional)
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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HARDWARE OVERVIEW
CHIP SETS 8255 – General purpose
programmable parallelinput/output interface (3 sets)
8251 – Serial data
communications interface (2sets)
8259 – Programmable InterruptControl Unit
8253 –
Programmable timer/counter
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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HARDWARE OVERVIEW
CHIP SETS 8279 – Programmablekeypad/display interface
74LS373 – Octal D-Typelatches
DAC0808 – 8-bit multiplyingdigital to analog converter
ADC0809 – 8 channels 8-bitanalog to digital converter
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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HARDWARE OVERVIEW
I/Os Switch – 8-bit logic TACT
switch
LED – 8-BIT logic LED
FND – 1 Flexible NumericDisplay
Keypad – 4x6 keys
Display – 16x2 line LCD
Speaker – 2 W Speaker
ADC Input – microphone,variable resistor, thermistor,and phototransistor
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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HARDWARE OVERVIEW External Interface
PPI-1 –
1st Prototyping area for8225 parallel port
PPI-2 – 2nd Prototyping area for8225 parallel port
PIT/PIC/AD/DA – Externalinterface for 8259, AD/DA
Converter, and 8253,respectively
System Bus – connects to 8086CPU
RS232-1 – First serial portinterface for 8251
RS232-2 – Second serial portinterface for 8251
MTS-86C
MTS-86C FUNCTION BLOCKS
MemoryMPU
8086
Chip S
I/OExternal Interfac
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MEMORY MAP •
Monitor Program –
allows user tocontrol and examine the
microprocessor from the keyboard
• Demo Program – stores demo
programs
• User Memory –
allows user tostore/load programs in their own
ROM or RAM (Optional)
• Program and Data – user codes
and data are stored in this section
• Interrupt Vector Table – reservedlocation for interrupt vector table
MTS-86C
MTS-86C MEMORY MAP
Monitor Program 64KB EPRO
System Mem
27256 x 2Demo Program
User Memory ROM, RA
(Optiona
Non-Use OPEN
Program and Data 64KB SRAProgram Mem
62256 x 2
Interrupt Vector Table00000H
00400H
10000H
E0000H
F0000H
F8000H
FFFFFH
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ADDRESSING MODE
Recall the elements of the8086 processor:
The MPU of the MTS-86C is an Intel
based 8086 microprocessor which
has the following elements:
16-bit internal data bus
20-bit address bus
Control bus
Execution Unit
Bus Interface Unit
MTS-86C
PHYSICAL vs. LOGICAL ADDRESS
What is the difference between these twaddress?
• LOGICAL ADDRESS – address gener
by the CPU and can be also referred to
virtual address.
• PHYSICAL ADDRESS – address seen
the memory unit.
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ADDRESSING MODE The physical address of the 8086 system is 20bits in width. Hence, the generation of thephysical address requires the combination ofa 16-bit offset value and a 16-bit base valuelocated in one of the four segment registers:
•Code Segment (CS)
– holds the programinstruction codes
• Data Segment (DS) – stores data for theprogram
• Stack Segment (SS) – stores interruptsubroutine return address
• Extra Segment (ES) –
an extra datasegment often used for shared data
MTS-86C
CODE SEGMENT (CS)
DATA SEGMENT (DS)
STACK SEGMENT (SS)EXTRA SEGMENT (ES)
SEGMENT REGISTERS
Width = 16 bits
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How to generate a physicaladdress?
To generate a physical address, the valuein the segment register is shifted left by 4bits with its
LSB filled with 0s
MTS-86C
SEGMENT ADDRESS
OFFSET ADDRESS
F 0 4 0
0 0 0 0
F 0 4 0 0
Width = 16 bits
Width = 16 bits
Width = 20 bits
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EXECUTING DEMO PROGRAMS
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EXECUTING DEMO PROGRAMS
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TABLE 4-1. DEMO PROGRAMS
EXPERIMENT
Fill out the remarks ofTable 4-1 DemoPrograms by exploringMTS-86C.
OBJECTIVES• To introduce the
hardware devices ofMTS-86C
• To introduce the memorymap of MTS-86C
• And to learn how to
execute the demoprograms in MTS-86C