ingasb p-channel self-aligned finfets with 10 nm fin-width … slides.pdf · ingasb p-channel...

InGaSb p-Channel Self-Aligned FinFETswith 10 nm Fin-Width

Using Sb-Compatible Digital Etch

W. Lu1, I. P. Roh2, D.-M. Geum2, S.-H. Kim2, J. D. Song2, L. Kong1, and J. A. del Alamo1

1Microsystems Technology Laboratories, MIT2Korea Institute of Science and Technology

December 5, 2017

Sponsors:DTRAKISTLam ResearchSRC

Outline

Motivation Key technology: III-Sb-compatible digital etch InGaSb p-channel FinFET fabrication Electrical characteristics Conclusions

2

3

Properties of III-Sb:• High µn

• High µp

• Strong strain effect• Eg engineering• Applications in

photonics, etc.

InSb

GaSb

[Miki, 1975][Kawashima and Kataoka, JJAP 1979][del Alamo, Nature, 2011]

Electron mobility Hole mobility in QW-FETs

A Case for III-Sb

4

III-Sb Transistor Research

InGaAs(IEEE)

5


Gu, IEDM 2011

Vardi, EDL 2016

Zhou, VLSI 2016

Waldron, VLSI 2016

Vardi, IEDM 2015

Zota, IEDM 2016

Zhao, IEDM 2013

InGaAs(IEEE)

6


III-Sb transistors(All publications)

InGaAs(IEEE)

7


InSb QW p-FETRadosavljevic, IEDM ’08

InGaSb p-MOSFETNainani, IEDM ’10

InGaSb p-SOINishi, VLSI ’15

InGaSb p-FinFETLu, IEDM ’15

InAs/GaSb TFETMemišević, EDL ’16

InAs/AlSb/GaSb HEMTB. Bennett, JVST ’00

InAs/GaSb CMOSGoh, IEDM ’15

III-Sb transistors(All publications)

InGaAs(IEEE)

8

Digital etch: key of sub-10 nm InGaAs transistors

Challenges: III-Sb Digital EtchD = 8 nmWF = 5 nm D = 5 nm

[Vardi, IEDM 2017][Lu, EDL, 2017]

9

• Wf limited by EBL and RIE

Challenges: III-Sb Digital EtchXSEM of InGaSb FinFET

[Lu, IEDM, 2015]

10

XSEM of InGaSb FinFET Wf = 30 nm, Lg = 100 nm

• Wf limited by EBL and RIE• Suffers from large off current

Challenges: III-Sb Digital Etch

-0.8 -0.4 0.00

100

200

300

I D (µ

A/µ

m)

VDS (V)

VGS = 0.5 V to -3.5 V

[Lu, IEDM, 2015]

11

GaSb MOSCAPs

• Previous research: HCl cleans GaSb surface

HCl Digital Etch on III-Sb

As-Is HCl

[Nainani, JAP 2011]

12

HCl Digital Etch on III-Sb

-3 -2 -1 0 11x101

1x102

1x103

after HCl

I D (µ

A/µ

m)

VGS (V)

Vds= -1.05 V[Lu, IEDM, 2015]

FinFETs: only mild improvement of off current

[Nainani, JAP 2011] GaSb MOSCAPs

• Previous research: HCl cleans GaSb surface

As-Is HCl

13

1% HCl 30sAfter RIE• HCl etches the InGaSb sidewall

Issue with HCl Digital Etch

14

1% HCl 30sAfter RIE• HCl etches the InGaSb sidewall

Issue with HCl Digital Etch

DI water 2 min

Water-based HCl problematic for III-Sb DE

15

• Self-limiting process• No damage on the sidewall

20 nm

10% HCl:IPA 2 minAfter RIE

Alcohol-based Digital Etch

20 nm

[Lu, EDL, 2017]

16

D = 20 nmD = 20 nm


0 2 4 60

20

40

60

VNW

Rad

ius

(nm

)

Digital Etch Cycles

First digital etch on III-Sb: HCl:IPA + O2 plasma

10 nm

17Etch rate ↓ after multiple DE cycles

D = 20 nmD = 20 nm


0 2 4 60

20

40

60

0.6 nm/cycle

VNW

Rad

ius

(nm

)

Digital Etch Cycles

2 nm/cycle

First digital etch on III-Sb: HCl:IPA + O2 plasma

18

• r (III-Sb) ↓ after 3 cycles• r (III-As) >> r (III-Sb)

InGaSbInAs

HSQ

25 nm

No DE 10 cyclesr = 0.2 nm/cycle

16 nm19 nm

3 cyclesr = 1 nm/cycle


AlGaSb

Oxidation of GaSb:• In air:

‒Ga2O3, Sb2O3

19

Sb-compatible Digital Etch

[Liu, JVST B. 2002]

Oxidation of GaSb:• In air:

‒Ga2O3, Sb2O3

• In strong oxidation agents:‒Ga2O3, Sb2O3, Sb2O5 (insoluble in aqueous acid/alkali)

20

DE = oxidation + dissolution, both critical for III-Sb!

III-Sb-compatible Digital Etch

[Liu, JVST B. 2002]

Survey of digital etch combinations:

21

Best results: RT O2 atmosphere + HCl:IPA


O2 oxidation + HCl:IPA, IPA rinsing

22r (III-As) = r (III-Sb)

25 nm

No DE

9 nm


17 nm



InGaSb

InAs

HSQ

AlGaSb

23

• Channel μp = 1175 cm2/V∙s• Buffer/channel resistivity ~ 109

InGaSb FinFETsHeterostructure (MBE at KIST)

Composite cap

-1.1% strainHc = 23 nm

Graded buffer

TEM

20 nm

23 nmInGaSb

6 nmInAlSb

p+ cap

AlGaSb

24

• Ni Ohmic contact• SiO2 spacer• Gate recess (dry + wet)• Fin RIE• Digital etch• Al2O3/Al Gate stack• Via + metal

InGaSb FinFET Process

HSQ

InGaSb

Al2O3/Al

25

Rc = 22 Ω∙μm 4x reduction of Rc from 2015 FinFETs

Ohmic ContactsNi contacts, 350 °C RTA, 3 min

0 100 200 300 400101

102

103

104

Ni

W

Rc (Ω⋅µ

m)

RTA Temp (°C)

Mo

Ni [MIT '15]

[Guo, EDL, 2015]0 5 10 15 20

0

1

2

3

4

Na = 1⋅1019 cm-3

Rc = 93 Ω⋅µm

RTo

tal⋅W

(Ω⋅µ

m)

Ld (µm)

Na = 3⋅1019 cm-3

Rc = 22 Ω⋅µm

×104

26

High-quality simultaneous InAs and GaSb etching

Fin EtchBCl3/Ar/SiCl4 3:11:0.4, 250°C

This workBCl3/N2 13.5:5.5, 250°C

[Lu, IEDM 2015]

50 nm InAsGaSb

Finished devices

27

• 3.5 nm Al2O3 gate dielectric• Final FGA anneal at 150 °C for 3 min


28

• Narrowest Wf = 10 nm• Fin AR = 2.3


50 nm 84°

HSQ

InGaSbAl2O3

AlGaSb

10 nm

10 nm

3.5 nm 23 nm

29

• S ~ 260 mV/dec• gm,max = 160 μS/μm• Single fin device: current fluctuations

Electrical Characteristics

-1.0 -0.8 -0.6 -0.4 -0.2 0.00

50

100

150

200

I D (µ

A/µm

)

VDS (V)

VGS = -1 V to 1 V in 0.4 V step

-0.5 0.0 0.510-1

100

101

102 VDS = -0.5 V VDS = -50 mV

I D (µ

A/µm

)

VGS (V)

Smin = 260 mV/dec

-1.0 -0.5 0.0 0.5 1.00

50

100

150

200

VDS = -50 mV

VDS = -0.5 V

g m (µ

S/µm

)

VGS (V)

Wf = 10 nm, Lg = 20 nm, Nf = 1

30


-1.0 -0.8 -0.6 -0.4 -0.2 0.00

1

2

3

4

I D (µ

A/µm

)

VDS (V)


-0.5 0.0 0.510-3

10-2

10-1

100 VDS = -0.5 V VDS = -50 mV

I D (µ

A/µm

)

VGS (V)

Smin = 290 mV/dec

Wf = 10 nm, Lg = 1 μm, Nf = 100

31


-1.0 -0.8 -0.6 -0.4 -0.2 0.00

1

2

3

4

I D (µ

A/µm

)

VDS (V)


Wf = 10 nm, Lg = 1 μm, Nf = 100

Significant improvement over 1st gen FinFETs

-1.0 -0.8 -0.6 -0.4 -0.2 0.00

4

8

12

I D (µ

A/µm

)

VDS (V)

Wf = 30 nm, Lg = 1 μm[Lu, IEDM, 2015]

32

Lg ↓ gm↑Wf ↓ gm ↓

gm Scaling

100 10000

100

200

300 Wf = 26 nm Wf = 18 nm Wf = 14 nm Wf = 10 nm

g m (µ

S/µm

)

Lg (nm)

Wf ↓

33

ON Resistance

0 20 40 60 80 100 1200

2

4

6

8

10

RSD

Ron

(kΩ⋅µ

m)

Lg (nm)

Wf = 26 → 10 nm

Rf

34

ON Resistance

10 1001

10

100

Rf (

kΩ/

)Wf (nm)

-1

0 20 40 60 80 100 1200

2

4

6

8

10

RSD

Ron

(kΩ⋅µ

m)

Lg (nm)

Wf = 26 → 10 nm

Rf

35

Rf and RSD ~ 1/Wf

ON Resistance

10 1001

10

100

Rf (

kΩ/

)Wf (nm)

-1

10 1000.1

1

10

-1RSD

(kΩ⋅µ

m)

Wf (nm)0 20 40 60 80 100 120

0

2

4

6

8

10

RSD

Ron

(kΩ⋅µ

m)

Lg (nm)

Wf = 26 → 10 nm

Rf

36

Wf ↓ better VT roll-up

VT Scaling

10 100 10000.0

0.4

0.8

1.2

Wf = 26 nm Wf = 18 nm Wf = 14 nm Wf = 10 nm

V T (V)

Lg (nm)

Wf ↓

37

1 DE cycle significantly improves off current

Off-state CurrentWf = 20 nm, Lg = 1 µm

-1.0 -0.5 0.0 0.5 1.010-2

10-1

100

101

102

1 DE cycleI D

(µA/µm

)

VGS (V)

0 DE cycle

38

Off-state Current

-1.0 -0.5 0.0 0.5 1.010-2

10-1

100

101

102

4 DE cycle

1 DE cycleI D

(µA/µm

)

VGS (V)

0 DE cycle

Wf = 20 nm, Lg = 1 µm

Device degrades after multiple DE cycles

39

• Buffer is damaged after multiple DE cycles

Off-state Current

-1.0 -0.5 0.0 0.5 1.010-2

10-1

100

101

102

4 DE cycle

1 DE cycle

I D (µ

A/µm

)

VGS (V)

0 DE cycle

3 cycles of DE

InGaSb

AlGaSb

Wf = 20 nm, Lg = 1 µm

40

• Buffer is damaged after multiple DE cycles• AlGaSb is very reactive

Exposure in airafter fin etch

Off-state Current

-1.0 -0.5 0.0 0.5 1.010-2

10-1

100

101

102

4 DE cycle

1 DE cycle

I D (µ

A/µm

)

VGS (V)

0 DE cycle

3 cycles of DE

InGaSb

AlGaSb

Wf = 20 nm, Lg = 1 µm

41

-0.6 -0.4 -0.2 0.0 0.2 0.4 0.610-3

10-2

10-1

100

101

I D (µ

A/µm

)

VGS (V)

Off-state Current

Lg = 1 µmWf = 100 14 nmHSQ

InGaSbAlGaSb

42

-0.6 -0.4 -0.2 0.0 0.2 0.4 0.610-3

10-2

10-1

100

101

I D (µ

A/µm

)

VGS (V)

No InGaSb channel

Off-state Current

Lg = 1 µmWf = 100 14 nm

Buffer leakage contributes substantially to off current

AlGaSb

HSQInGaSbAlGaSb

43

Record gm = 268 μS/μm at Wf = 46 nm

BenchmarkNormalized by conducting width

0 50 100 150 2000

100

200

300

g m (µ

S/µm

)

Wf (nm)

This work

MIT CSW ’17

MIT IEDM ’15

FinFETs

Planar

44

BenchmarkNormalized by conducting width Normalized by Wf

PlanarFinFETs

This work

0 50 100 150 2000

200

400

600

800

ddd

ddd

g m/W

f (µS

/µm

)

Wf (nm)

If normalized by footprint, gm = 704 μS/μm at Wf = 10 nm

0 50 100 150 2000

100

200

300

g m (µ

S/µm

)

Wf (nm)

This work

MIT CSW ’17

MIT IEDM ’15

FinFETs

Planar

• Studied sidewall cleaning of InGaSb FinFETs‒ III-Sb-compatible digital etch‒ Etching rate = 2 nm/cycle‒ Mitigation of surface leakage

• Demonstrated most scaled InGaSb p-channel FinFETs‒ Minimum Wf = 10 nm‒ Record device performance‒ Improved subthreshold performance

• Face challenge: to improve turn-off characteristics

45

Conclusions

ingasb p-channel self-aligned finfets with 10 nm fin-width … slides.pdf · ingasb p-channel...

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