[ieee 33rd annual symposium on frequency control - (1979.05.30-1979.06.1)] 33rd annual symposium on...

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THE EFFECT OF THE SAMPLING ACTION OF PHASE COMPARATORS ON FREQUENCY SYNTHESIZER PERFORMANCE M.J. Underhill and R.I.H. Scott Philips Research Laboratories Redhill, Surrey, U.K. Summary A simple phase-locked loop frequency synthesizer can be treated as a pair of phase- locked oscillators. The sampling action of the PLL phase comparator can limit the synthesizer switching speed both theoretically and in practice. The sampling action also limits the output spectrum improvement which can be achieved by phase locking. Some results are given and compared with continuous and sampled data analyses of a model of the frequency synthesizer system. Introduction A frequency synthesizer is a system which attempts to transfer the stability and spectral purity of a fixed frequency reference oscillator to a digitally set variable frequency output. Frequency synthesizers are also often required to switch as rapidly as possible from one frequency to another. The simple phase locked loop (PLL) type of digital frequency synthesizer is effectively two oscillators phase locked together. All phase comparators are in fact sampling devices and in this paper we show how this limits the switching speed and the degree to which the output oscillator spectrum can be improved by phase locking. Until now the loop bandwidth has usually had to be much lower than the sampling frequency in order to reduce the effect of phase canparator noise, In this case the sampling action has little effect on the shape of the output spectrum or on the switching speed and these can be predicted by treating the frequency synthesizer as a linear continuous feedback control system. However wit the new Philips low noise phase comparator p. the loop cut-off frequency and switching speed can be increased until the effect of the sampling action is very apparent. This paper aimsto explain and characterise some of the effects that are observed. To do this both continuous and sampled data system analysis is used. The System Model Figure 1. gives the block diagram of a typical PLL frequency synthesiser. The output signal from the voltage controlled oscillator (VCO) at frequency F, after division by a programmable ratio N is phase compared with the stable fixed reference at frequency Fr. Any frequency or phase error detected by the phase comparator corrects the VC0 frequency until a stable locked condition is achieved with F . = NF,. For analysis all signals and transfer functions are definedin terms of the output phase C(s) and so any control voltage in the feedback loop is considered to be equivalent to a phase value. The phase comparator is taken to be of the sample-hold type as shown. A digital phase comparator of the type which gives its output signal in the form of pulses can be considered as a sampler without the zero order hotd section. However as will be seen later, only with the sample-held type of phase comparator can the theoretical performance of the system be approached in practice. Thus the sample-hold case is used in the following analysis. Three noise sources areshown. Ul(s) represents the spectrum of noise from the reference together with any noise from the programmable divider. In practice U1(s) is made very small and can be neglected in the analysis. Up(s) represents the noise generated in the phase comparator. It has two components. The first is a flat white noise spectrum which is assumed to be generated by the active devices and output resistance of the phase comparator. There can also be a l/f noise spectrum components from the active devices, but in general thisis usually found to occur below the frequencies of interest and so is ignored here. The second component is a discrete signal at the sampling frequency. This ideally should not exist, but in practice it occurs because of crosstalk in the sampling switch or because of leakage in the hold circuit. The third noise source IJ3(s) is the VC0 phase noise which is assumed to dominate other VC0 noise sources in the region of interest. It causes the VC0 spectrum to have a 1/f2 character- istic so that as shown in Fig. 1 U,(s) wilf represent a flat spectrum with the VC0 acting as an integrator (with a polenot quite at S = 0). 449

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THE EFFECT OF THE SAMPLING ACTION OF PHASE COMPARATORS ON FREQUENCY SYNTHESIZER PERFORMANCE

M.J. Underhill and R.I .H. Scott

Philips Research Laboratories Redhill, Surrey, U.K.

Summary

A simple phase-locked loop frequency synthesizer can be treated as a pair of phase- locked oscillators. The sampling action of the PLL phase comparator can limit the synthesizer switching speed both theoretically and in practice. The sampling action also limits the output spectrum improvement which can be achieved by phase locking. Some results are given and compared with continuous and sampled data analyses of a model of the frequency synthesizer system.

Introduction

A frequency synthesizer is a system which attempts to transfer the stability and spectral purity of a fixed frequency reference oscillator to a digitally set variable frequency output. Frequency synthesizers are also often required to switch as rapidly as possible from one frequency to another.

The simple phase locked loop (PLL) type of digital frequency synthesizer is effectively two oscillators phase locked together. All phase comparators are in fact sampling devices and in this paper we show how this limits the switching speed and the degree to which the output oscillator spectrum can be improved by phase locking.

Until now the loop bandwidth has usually had to be much lower than the sampling frequency in order to reduce the effect of phase canparator noise, In this case the sampling action has little effect on the shape of the output spectrum or on the switching speed and these can be predicted by treating the frequency synthesizer as a linear continuous feedback control system. However wit the new Philips low noise phase comparator p. the loop cut-off frequency and switching speed can be increased until the effect of the sampling action is very apparent. This paper aims to explain and characterise some of the effects that are observed. To do this both continuous and sampled data system analysis is used.

The System Model

Figure 1. gives the block diagram of a typical PLL frequency synthesiser. The output signal from the voltage controlled oscillator (VCO) at frequency F, after division by a programmable ratio N is phase compared with the stable fixed reference at frequency Fr. Any frequency or phase error detected by the phase comparator corrects the VC0 frequency until a stable locked condition is achieved with F. = NF,.

For analysis all signals and transfer functions are defined in terms of the output phase C(s) and so any control voltage in the feedback loop is considered to be equivalent to a phase value.

The phase comparator is taken to be of the sample-hold type as shown. A digital phase comparator of the type which gives its output signal in the form of pulses can be considered as a sampler without the zero order hotd section. However as will be seen later, only with the sample-held type of phase comparator can the theoretical performance of the system be approached in practice. Thus the sample-hold case is used in the following analysis.

Three noise sources are shown. Ul(s) represents the spectrum of noise from the reference

together with any noise from the programmable divider. In practice U1(s) is made very small and can be neglected in the analysis. Up(s) represents the noise generated in the phase comparator. It has two components. The first is a flat white noise spectrum which is assumed to be generated by the active devices and output resistance of the phase comparator. There can also be a l/f noise spectrum components from the active devices, but in general this is usually found to occur below the frequencies of interest and so is ignored here. The second component is a discrete signal at the sampling frequency. This ideally should not exist, but in practice it occurs because of crosstalk in the sampling switch or because of leakage in the hold circuit. The third noise source IJ3(s) is the VC0 phase noise which is assumed to dominate other VC0 noise sources in the region of interest. It causes the VC0 spectrum to have a 1/f2 character- istic so that as shown in Fig. 1 U,(s) wilf represent a flat spectrum with the VC0 acting as an integrator (with a pole not quite at S = 0) .

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The loop filter is shown split into two parts. The proportional plus integral section determines the type-of the feedback control system. For example if the integral gain is set to zero a type L control characteristic is obtained. This settles with a zero frequency error but finite phase error, this latter being indicated by the final value of the phase comparator output voltage not being the same value for any frequency setting. A finite integrator gain makes the system type 2 so that no phase error remains in the steady state. If the integrator gain is made much lower than optimum what is called a "quasi-type one" system is obtained. This can give a faster reduction in frequency error than a type 2 system with an optimum integrator gain but at the expense of a slowly decaying final phase error. 3

The second part of the loop filter is a low pass section which is used to reduce the effect of both phase comparator noise components. The cut-off frequency and number of poles may either be determined by the wish to reduce the effect of one, or the other, or both noise components depending on their relative values and the synthesizer noise and transient response specific- ation.

The usual strategy for choosing the loop filter is to aim for an overall system with the fastest transient response without any serious degradation of the VC0 spectrum at any point by the phase comparator noise. When this results in a loop cut-off frequency which is much lower than the sampling frequency it is easier to analyse the synthesizer as a continuous control system rather tna by using a sampled data model.

Analysis as a Continuous System

A very common frequency synthesiser system choice is the type 2 system of order 3 which has a single extra low pass loop filter section. This is therefore taken as an example for continuous system analysis. It is by such an analysis that one can see if the sampling action of the phase comparator is likely to become a limiting factor particularly on the transient response. The criterion for this will be seen to be whether the optimum design given by continuous system analysis requires a loop cut-off frequency which approaches or exceeds about one sixth of the sampling frequency,

Transient Resuonse

The transient response of the synthesiser to frequency steps can be obtained in the following way. For the chosen example the loop transfer function is of the form

K G ( s ) = K(s+a)

S (s+b) 2 . . . . (1)

where the low pass section pole is at S = -b and a = Ki/K being the ratio of the integral gain Ki

to the proportional gain K.

A fractional frequency jump of 6Fo required in the output frequency F, can be considered to be effected by a sudden phase ramp change of 27r6F0 appearing at the input to the programmable divider and having a Laplace transform of 2r6F0/s2. The phase ramp in effect is caused by a sudden change in the programmable divider ratio. The closed loop transfer function from this input point to the error signal point is (l+KG(s))-l so that for the frequency change &Fo the putput phase error is given by the Laplace transform

Figure 2 is a root locus plot for this with the gain K as a parameter. The open loop poles are of course those of equation 1. If we choose a = b/9 and K = b2/3 we obtain a triple closed loop pole at S = -c = -3a. This is defined as an optimum because it represents the tiie responsewith the fastest decay rate and minimum of overshoot.

We now have for the optimum

E ( s ) = 2a6Fo(s+3c) . . . . (3)

(s+c) 3

and for the time response of the phase error by taking the inverse Laplace transform of E ( s ) :

e(t) = 21~GF,e-~~(t-2ct ) 2 . . . . ( 4 )

The time to settle for a given frequency step is thus solely determined by the parameter c. For convenience c is defined as the loop cut-off frequency. In this case it is the frequency where the loop gain has dropped to unity, this represent- ingthe knee of the final 12 dB/octave closed loop response r o l l off. c is now chosen to be as large as possible whilst still allowing the output spectrum requirements to be fulfilled.

The Output Spectrum

The three noise sources, reference noise, phase comparator noise and VC0 noise can be respectively represented by their power spectral densities U,(w), U2 (W) and U3 ( W ) . The baseband output spectrum C(W) is then the sum of the noise source contributions each modified by their repsective power spectrum transfer functions from input points to the common output.

The baseband spectrum is transferred to r.f. by the frequency or phase modulation process which occurs in the VCO. But frequency modulation is a highly non-linear process where a l l components of the input signal intermodulate with each other. However, in our case one signal is much stronger than the rest and it has a very narrow spectrum. This corresponds to d.c or W = 0 in the baseband

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and to the carrier or output frequency signal at r.f. In this case all baseband components appear reflected about the carrier frequency in the r.f. spectrum as if frequency modulation were a linear modulation process. But if there is a second discrete component in the baseband, such as arises from sampling frequency cross-talk for example, two discrete sidebands will be created on either side of the carrier and these will have spectra which are exact copies of the main carrier spectrum with its noise sidebands. Effectively each discrete component has the same phase modulation as is present on the main carrier. This effect is apparent in the frequency synthesiza spectrum shown in Figure 3a. It illustrates how the non-linear FM modulation process can cause difficulties in'interpreting baseband noise process from observations of the r.f. spectrum.

In order to relate theory with practice it is useful to be able to predict spectra in the form in which they appear on a practical spectrum analyser. The main difference in the displayed spectra shape arises from the shape and bandwidth of the spectrum analyser filter function. The effect is negligible on smoothly varying noise spectra but it means that narrow spectral lines appear with the shape of the filter characteristic and width a peak amplitude almost equal to the total power of the line.

Most of our spectrum measurements are made on an Adret spectrum analyser with a fixed bandwidth of 10 Hz. In the following calculations of predicted spectra we model this as having a filter with a fifth order pole with a damping such that the noise filter bandwidth is 10 Hz. Thus any spectral components of power A which are substantially narrower than 10 Hz are assumed to have a power density spectrum which gives a spectrum analyser OUtDUt Of \

. . . . (5)

To calculate the theoretical spectrum, first we assume the spectral distributions but not amplitudes of the noise sources. Next we calculate the closed loop transfer function G(s) from a noise source to output and convert it to a power spectrum transfer function by one of the following expressions:

G(w) = ( G ( j w ) l 2 = G ( j o ) G ( - j w ) = G ( s ) G ( - s ) 1 s= j w

. . . . ( 6 )

The product of the noise source spectral distribut- ion and its G(w) then gives its contribution to the output spectrum. The amplitude of the contribution is usually back calculated by an appropriate spot measurement on the observed spectrum that is being modelled. Finally any discrete signals present are given the same noise spectral distribution as the main carrier.

For example applying this method to the type 2

order 3 system under consideration we obtain for the spectrum analyser output in terms of Cyclic (not angular) frequency f

l

. . . . (7)

where F1 is the carrier component with a distribution given by the analyser filter i.e.

Fl V L + 3 3 . 9 )

If the reference oscillator is very noisy then its spectrum shape should be used instead of Flas above.

F2 is the VC0 output natural phase noise spectrum which is assumed to have a 6 dB per octave roll-off. Fp is designed to take account of the analyser 10 Hz bandwidth in that F 61 for all f. It is defined in terms of a paramezer x which is determined by the VC0 noise Nd relative spectral density at frequency d from the carrier. Thus

f2+10x

with x = Nd x d 2 . . . . (10)

F is the transfer function of the VC0 noise to the output; it represents the improvement that the negative feedback loop provides. It is therefore a function of the closed loop system in question, in this case an optimum type 2 order 3 system. It can therefore be shown to be

3

F = 3 f4(f2+9C2) (f2+C2)3

. . . . (11)

where c is in Hz and not rad sec as previously. -1

P is the assumed flat phase noise level. It can be estimated in practice by measuring the synthesizer noise spectrum close to the carrier.

F is the power spectrum transfer function for the phase noise and for the system in question is 4

, n *

F4 = C4(9fL+CL)

( f2+c2) . . . (12)

A is the amplitude of the spurious component at bzseband frequency r.

Fll, F , F and F are respectively F1 F2! F and 2.2 sh??ted in14frequency by -+r where r 1 s ?he spurious frequency, This is effected by letting f become

f -)r If1-r . . . . (13)

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Results of Continuous System Analysis

The-spectrum analyser output predicted by equation 7 has been programmed on a Hewlett Packard 9825A desk calculator so that on the associated X-Y plotter it produces spectrum plots of the same size as those obtained from an Adret spectrum analyser. In this way the predicted and measured results can be directly compared.

For example, Figure 3b shows a predicted spectrum which displays similar features to those shown in the measured spectrum of Figure 3a. The repetition of the main carrier spectrum can be correctly observed on the spurs. But as will be seen, the predicted spectrum shown here ignores the suppression of the carrier sideband noise at the sampling frequency effected by the sampling action of the phase comparator. The VC0 spectrum that would be observed in the absence of phase locking is also plotted in Figure 3b for comparison purposes and on all subsequent predicted plots.

Figures 4a and 4b show another comparison between practice and theory. In this case the synthesizer had been correctly adjusted for an optimum transient response. This can easily be achieved by observing the phase comparator output with a square wave either applied to the VC0 input directly or used to switch one of the digits of the programmable divider. The proportional and integral loop gains are then trimmed until the fastest exponential decay of the transient output of the phase comparator is observed. The close agreement between theory and practice in this case also confirms the validity of the assumption of a flat spectrum phase comparator noise. The VCOused in this case was in fact a VCXO. This was used in order to be able to observe the phase comparator noise uncorrupted by any VC0 noise.

Figure 5 shows how for a given phase comparator noise the predicted output spectrum changes rapidly as the loop cut-off frequency c is changed. If the phase noise is low a high value of c can be used without the VC0 spectrum being degraded excessively at any point. If then the phase comparator sampling frequency is low we find in practice that this continuous system model is no longer valid and a sampled data model is required to predict the system characteristics.

Analysis as a Sampled Data System

In the following we show how the sampling action limits the transient response and effects the output spectrum of a frequency synthesiser. In this case we assume a system model as in Figure 1 with a type 2 order 2 system in which the low pass loop filter section is not present.

Sampled Data Transient Response

Using sampled data z-transform analysis the open LOOP transfer function including the sampler and zero order hold is

. . . . (14)

where K' = KT(aT+l), a'=(aT-l) /(aT+1), a=Ki/K as before and T is (Fr)-l the sampling period

The z-plane root locus in Figure 6a shows that the closed loop poles can be moved into the optimum response position at the centre of the unit circle if we have a'=$ and K'=2. It also shows that if the loop gain K' in an attempt to increase the loop cut-off frequency is increased beyond 2% the system becomes unstable.

A frequency jump of &Fo is represented by a ramp transform

. . . . (15)

and the closed loop error transform is (l+K'G(z))-' so that the optimum phase error response with a' = 1 2 , corresponding to a = 1/3T, and K' = 2, corresponding to K = 3/2T,is

E ( z ) = 2.rrSFoT/z . . . . (16)

This has a sampled time response corresponding to a single error signal impulse at time t = T after the step. At time t = 2T there is no residual error.

Thus the optimum type 2 order 2 system has a dead-beat response with no phase error remaining two sampling periods (2T) after the frequency jump. This is clearly a very fast response.

By a similar argument one can show that an ideal type 1 order 1 system comes to rest after only one sampling period. See Figure 6b for root locus.

Sampled System Spectra

For a sinusoidal component of VC0 noise V(jd at frequency W, we can calculate the resulting contribution to the phase output signal C(S) as

Cv(jw) = V(jd . . . . (17)

x 1+K G (jw)

For a sinusoidal component of phase noise P( jw) the contribution is

. . . . (18)

KG*(jw) is the sampled sinusoidal Signal loop transfer function. For the type 2 order 2 system we can put = est = eJwT in this case so that we have :

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Limitations of Digital Phase Comparators

1+KG*(ju) l+K'G(z) z2 . . . . (19) = 4 .JUT s<n2(w~/2) . . . . ( 2 0 )

To convert this to a power spectrum transfer function we put

2 B(w) = I B ( j w ) 1 = 16 Sin (wT/2) 4 . . . . (21)

Implicit in putting z = ejwT in the above is that one is treating only the primary signal component of the impulse sampler assumed in the z-transform analysis. Further examination of the system shows that in practice the secondary spectrum components are swamped by the primary component spectrum.

Using equations 17, 18 and 21 we can deduce the following new expressions for F3 and F to be used in equation 7 to derive the predictd sampled system spectrum. F for the VC0 noise becomes 3

A digital phase comparator differs from the sample-hold phase comparator in that it provides its output signal in the form of pulses. For example, in the Philips frequency synthesiser chip' there is a digital phase comparator which acts as a back-up for the low noise phase comparator when large frequency steps are made. Such a phase comparator has a tristate output such that for no phase error the output can be considered to be at half the supply voltage i.e. at V/2. Then a positive phase error for instance gives positive pulses going from V/2 to V with a length proportional to the error whilst a negative error similarly gives pulses going to V/2 to 0 volts. The total phase range in this case is from -2n to +2r radians implying a gain after averaging the output of V/4T.

For a sampled data analysis the digital phase comparator can be modelled as a perfect impulse sampler which provides impulses at the sampling instants equal in amplitude to the area of the error pulses. It then has an equivalent gain associated with the sampler of K2 = VTf4n.

F3 = 16 Sin (n fT) 4 . . . (22) For the open loop transfer function we have from Figure 9

where T = F,-' is the sampling frequency. K G(z) = p ( s ; ; ) e - s l = K"(z+a) . . . . (24) For the phase noise transfer function we have (2-1)

2

F4 = (9f2T2+1) Sin4(nfT) . . . . (23) where K" = K and a" = aT -1

(i~fT)~ The extra e-sT represents the fact that the phase comparator responds to any new phase error one period T late. Figure 7 shows the predicted optimum 2 order

2 spectrum for the case of no phase comparator noise. It is clear that some degradation of the VC0 spectrum occurs at half the sampling frequency although the close-in noise and the noise at the sampling frequency is suppressed.

As before the optimum system is obtained when K" = 2 and a'' = 4 . In terms of the component gain values for the synthesizer system shown in Figure 9 we have

Figure 8a shows the on the predicted plot how the comparator noise of the system is alsosuppressed at the reference frequency. Figure 8b shows a predicted spectrum with reference spurs. Figure 8c shows a measured spectrum of a synthesiser with effectively no extra loop filter. The spurs at a spacing of Fr/3 are due to pickupand should be ignored.

a type 2 order 2 system. Always there are extra poles introduced by such practical limitations as the necessity to r.f. decouple the VC0 input or the fact that the sample hold switch always has a finite on resistance.

In practice it is never possible to achieve

On the basis that the optimum proportional gain value for the sampled data system would have resulted in a continuous system unity gain frequency of c = 3 / 4 n = 4 times the sampling or reference frequency, this value can be chosen as indicating the limit of the validity of the continuous analysis. For the pulse type digital phase comparator the limit is 1/2r 2 l / 6 . For simplicity the limit of c = 1/6 x F is chosen as covering both cases.

NR1

where the VC0 output frequency in Hz is F = NIT, and K; = K1/27r is the VC0 sensitivity in 8z per volt.

From equation 25 we have for the proportional gain part of the operational amplifier transfer function

. . . . (26)

In a typical practical synthesiser at F = 100 MHz the VC0 sensitivity K would not egceed about 10 MHz/volt, and V = 10 volts, say. This then requires that

R 4 x 100 = - 2 = R1 10 X 10

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corresponding to an a.c. gain of four in the operational amplifier stage.

But if the phase comparator is giving out VI2 = 5 volt pulses the operational amplifier output must saturate and only give 5 volt pulses rather than the 20 volt pulses called for. This is true for any practical system unless the VC0 sensitivity is excessively high. The a.c. gain of the operational amplifier stage can never exceed an effective value of unity and so in this case the effective loop gain will be a factor 4 too low. Hence the optimum fastest system can never be achieved and one must accept a system with a much longer transient response and switching time.

This effect prevents any frequency synthesizer containing a digital phase comparator from being operated with an optimum dead-beat response.

Conclusions

Linear analysis of the PLL as a continuous system has shorn how a PLL digital frequency synthesizer can be designed for the best compromise between the switching speed and output noise spectrum.

References

1.

2.

3 .

Sampled data analysis of the system shows that there is an absolute limit on the transient response and switching speed which cannot be exceeded. Comparison with the continuous system analysis shows that this limit can come into play even if the synthesizer is only designed for low noise and not fastest response time. The limit of applicability of the continuous method is when the required loop cut-off frequency approaches one sixth of the sampling frequency. Figure 1

The sampling action of the phase comparator can improve the output noise spectrum around the reference frequency sidebands but at the expense of increased noise elsewhere. However, in practice cross-talk in the sampling switch can produce reference frequency spurs having the same noise spectra as the main carrier component. These can mask the noise improvement obtained around the reference frequency sidebands.

Comparisons of practical spectrum measurements with the theoretical predictions derived here from continuous and sampled-data systems analysis have shown good agreement between theory and practice.

Acknowledgements

Underhill, M.J., Jordan, P.A., Clarke, M.A.G. and Scott, R . I . H . , "A General Purpose LSI Frequency Synthesizer System", Proceedings, 32nd Annual Symposium on Frequency Control, US Army Electronics Command, Fort Monmouth, N.J. pp365-372 (1978).

Saucedo, R. and Schiring, E.E., "Introduction to Continuous and Digital Control Systems", Macmillan Company, 1968, New York.

Underhill, M.J. and Jordan, P.A.J., "The Split Loop Method for a Wide Range Frequency Synthesiser with Good Dynamic Performance". To be published.

The authors acknowledge with grateful thanks the help of Peter A. Lewis in producing the calculator programme for plotting the theoretical predictions.

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