A Low-Complexity Symbol-Level Differential

Detection Scheme for IEEE 802.15.4 O-QPSK

Signals

Cong Wang∗ Yongpan Liu∗ Rong Luo∗ Huazhong Yang ∗

∗ Electronic Engineering Dept.

Tsinghua University

Beijing, 100084, China

Abstract—This paper presents a low-complexity differential

detection scheme for the IEEE 802.15.4 O-QPSK signals. The

proposed scheme utilizes a novel additive decision metric to

perform symbol-level detection. Corresponding low-complexity

receiver architecture is also developed. Compared with tradi-

tional MBDD chip-level detector, the proposed scheme achieves

a performance improvement of 2.1 to 3.5 dB. In the meantime,

the complexity does not increase much.

I. INTRODUCTION

The IEEE 802.15.4 is a protocol designed for wireless

personal area networks (WPAN), which mainly focuses on

short-range, low-power and low-cost network applications. It

includes the specifications of the physical layer (PHY) and the

media access control layer (MAC) [1].

There are four PHYs that are specified in the IEEE 802.15.4

standard, of which three are in 868/915 MHz band and the

other one is in 2450 MHz ISM band. As the 2450 MHz band

is in the worldwide ISM band which can be used without

a licence, in this paper, we focus on the 2450 MHz half

sine pulse shaped O-QPSK signal, which is equivalent to a

precoded MSK signal [2].

As WPAN devices conforming with the IEEE 802.15.4 are

often battery-powered but expected to operate for months,

low-power receivers with both low complexity and good bit

error rate (BER) performance are highly appreciated. Low

complexity enables lesser processing power of the detector,

while good receiving BER performance allows lesser RF

power at the transmitting-side.

In low-complexity receivers, differential detection is often

used because carrier phase recovery is not needed. Although

traditional differential detector (with observing interval N =

1) is relatively simple, it suffers from performance degradation,

which has been well discussed in [3].

Simon and Divsalar improve the BER performance of

conventional differential detection with a so-called multiple-

bit differential detection (MBDD) technique. By extending

This work was supported in part by the NSFC under grant 60976032, National

Science and Technology Major Project under contract 2010ZX03006-003-

01, and High-Tech Research and Development (863) Program under contract

2009AA01Z130.

the observing interval, the BER performance of the MBDD

detector fills the gap between conventional differential detector

and the coherent detector [4]. Such technique has been used

to detect various kinds of signals including CPM [5, 6]

GMSK [7], and O-QPSK [8–10].

However, the previous works in [5–10] all assume the

phase offset to be constant within the observing window,

which makes them unsuitable for symbol-level detection of the

IEEE 802.15.4 OQPSK signal. Since the length of the spread

spectrum sequence is 32, to perform symbol-level detection of

the IEEE 802.15.4 OQPSK signal, we have to set the observing

interval N to 32. However, the phase offset is unlikely to be

constant during such a long interval of 32 chips, especially

when the carrier frequency offset is up to ±40 ppm as specified

in the standard [11], resulting in heavy performance loss.

Shortening the observing interval, we can perform chip-level

detection for the same signal in a block-by-block manner, due

to the non-additive property of the traditional MBDD decision

metric. Specifically, the MBDD detector outputs a block of N

chips at a time. And several blocks are combined, obtaining

a 32-chip sequence. The 32-chip sequence is then mapped

back to a symbol by comparing hamming distances. However,

such block-by-block chip-level detection scheme also faces

performance loss problem because it ignores the information

between adjacent blocks. Besides, it considers some chip

sequences that are not in the signal set, which indeed increases

the implementation complexity.

In this paper, we concentrate on designing a detector with

both low complexity and good BER performance. We first

develop a Novel Additive Metric (NAM) for the detection of

a chip based on its correlation with the previous N chips.

Then the decision metric of a hypothetical chip sequence is

derived by summing up the NAM of each chip. By calculating

and comparing the decision metric of each of the 16 chip

sequences in the IEEE 802.15.4 signal set, the most likely

symbol is selected. Corresponding simplified implementation

techniques for such symbol-level detector are also presented.

Experiments showed that the proposed symbol-level detec-

tion scheme achieves 2.4-3.5 dB performance gain compared

978-1-4673-5829-3/12/$26.00 ©2012 IEEE

Fig. 1. Reference Modulation Diagram

with conventional chip-level MBDD detector (N > 1), while

the implementation complexity does not increase much.

The rest of the paper is organized as follows. Section II

describes the mathematical representations of the transmitted

and received signal. In Section III, we review the traditional

chip-level detection scheme, and discuss the pros and cons of

it. The proposed symbol-level detection scheme is developed

and discussed in Section IV. BER performance and implemen-

tation complexity of different detection schemes are compared

in Section V. Conclusion is drawn in Section VI.

II. SIGNAL MODEL

Figure 1 illustrates the reference modulation flow for the

2450 MHz O-QPSK signal specified in [11]. First, every four

bits of the binary data are mapped into a symbol (0-15). Then

each of the symbol is mapped into a 32-chip sequence c

according to Table I. Next, in the O-QPSK modulator, the

chip sequences are modulated onto the carrier using Offset

Quadrature Phase Shift Keying with half sine pulse shaping.

Even-indexed chips are modulated onto the in-phase (I) carrier

and odd-indexed chips are modulated onto the quadrature-

phase (Q) carrier [11]. Mathematically, the complex baseband

TABLE I

SYMBOL TO CHIP MAPPING TABLE

Binary Data Symbol Chip Sequence c

[b0b1b2b3]) (Decimal) [c0c1 . . . c31]

0000 0 11011001110000110101001000101110

0001 1 11101101100111000011010100100010

0010 2 00101110110110011100001101010010

0011 3 00100010111011011001110000110101

0100 4 01010010001011101101100111000011

0101 5 00110101001000101110110110011100

0110 6 11000011010100100010111011011001

0111 7 10011100001101010010001011101101

1000 8 10001100100101100000011101111011

1001 9 10111000110010010110000001110111

1010 10 01111011100011001001011000000111

1011 11 01110111101110001100100101100000

1100 12 00000111011110111000110010010110

1101 13 01100000011101111011100011001001

1110 14 10010110000001110111101110001100

1111 15 11001001011000000111011110111000

signal can be represented as

si(t) = Ii(t) + jQi(t), i = 0, 1, . . . , 15 (1)

where

Ii(t) =15∑

n=0

C(i)2ng(t− 2nTc), i = 0, 1, . . . , 15 (2)

Fig. 2. Demodulation Diagram

Qi(t) =15∑

n=0

C(i)2n+1g(t− (2n+1)Tc), i = 0, 1, . . . , 15 (3)

and g(t) is the half sine pulse

g(t) =

{sin( π

2Tct) , 0 ≤ t ≤ 2Tc

0 ,else(4)

In (2) to (3), C(i)k = 2c

(i)k − 1, and c

(i)k is the kth chip of

Symbol i in Table I. Tc is the inverse of the chip rate, which

equals 0.5μs, since the chip rate is 2 Mcps in 2450 MHz band.

It had been proven that the O-QPSK signal with half sine

pulse shaping is equivalent to precoded MSK [3]. Along with

the representations in [10], the MSK signal can be written as

a special case of CPM signal

s(t) = Aejφ(t,p) (5)

where during the time interval kTc ≤ t ≤ (k + 1)Tc,

φ(t,p) = πpkq(t− kTc) +π

2

k−1∑i=−∞

pi (6)

and q(t) is the phase response with linear property.

q(t) =

{t

2Tc, 0 ≤ t ≤ Tc

0 ,else(7)

pi is the ith chip of the sequence of p, which determines

the moving direction of phase during the chip interval. The

relation between sequence p and c is shown as follows.

pi = −ai−1ai

a2i = (−1)iC2i, a2i+1 = (−1)i+1C2i+1

(8)

where Ci, ai, pi ∈ {1,−1} and i ∈ Z.

Therefore, we can demodulate the O-QPSK signal with an

MSK demodulator as shown in Figure 2, where the p to

symbol mapping table can be calculated in advance with (8)

and Table I.

We consider the modulated signal transmitted over an

AWGN channel, and the carrier frequency and phase are not

perfectly recovered at the receiving end. Thus the received

signal has the form

r(t) = s(t)ej(ωct+γ(t)) + n(t) (9)

where n(t) is complex additive white Gaussian noise with

single-sided power spectral density n0, ωc is the carrier

frequency offset and γ(t)) is the random phase offset.

III. TRADITIONAL MBDD DETECTOR

An MBDD detector improves the BER performance of a

conventional differential detector by extending the observing

interval from one chip to N chips. With the representation in

[10], the branch metric of the kth chip is defined as

z (k, p̃k) = e−jθ̃k

∫ (k+1)Tc

kTc

r(t)e−jπp̃kq(t−kTc)dt (10)

The decision metric for the N -chip sequence during time

period nTc ≤ t ≤ (n+N)Tc is

η(p̃n,N ) =

∣∣∣∣∣n+N−1∑k=n

z(k, p̃k)

∣∣∣∣∣ (11)

where p̃n,N is the hypothetical N -chip sequence indexed from

n to n + N − 1, i.e., p̃n,N = (p̃n, p̃n+1, . . . p̃n+N−1). θ̃k is

defined in a recursive way as follows:

θ̃k = θ̃k−1 +π

2p̃k−1 (12)

With the metric defined in (11), we can demodulate a block

of N chips according to the following decision rule.

p̂n,N = argmaxp̃n,N

{η(p̃n,N )

}(13)

By setting N = 32, we can get an ideal symbol-level MB-

DD detector for the IEEE 802.15.4 OQPSK signal. However,

the decision rule in (13) requires that ωc = 0 and γ(t) remains

unchanged during the N -chip time interval. Otherwise only a

small N can be used. Experiments in section V shows that

with ωc being 120 kHz, the BER performance of an MBDD

detector starts to fall when N grows to larger than 2.

Therefore, with N being far less than 32 and that the

metric in (11) is not additive, we can only use an MBDD

detector to perform chip-level detection for the IEEE 802.15.4

OQPSK signal in a block-by-block manner. For example, if

N = 4, then eight blocks of length-4 sequence are cascaded,

generating a 32-chip sequence p̂, which is mapped back to a

symbol by comparing hamming distances with each of the p

sequences in the p to symbol mapping table. But such chip-

level detection scheme ignores the relation between adjacent

blocks. We can further improve its performance with a symbol-

level detection scheme.

IV. PROPOSED DETECTION SCHEME

In this section, we present a novel detection scheme with

both good BER performance and low implementation com-

plexity. It is a symbol-level scheme with a Novel Additive

Metric (NAM) where soft information of a 32-chip sequence

is used to extract one symbol at a time, which enhances

the error probability performance. In the meantime, measures

are incorporated to restrict the growth in implementation

complexity. First, in a symbol-level detection scheme, we only

select the most likely symbol among the 16 symbols instead

of searching for the maximal likelihood chip sequence among

2N sequences. Second, with distributive law of multiplication,

number of multiplications required in decision metric calcula-

tion can be reduced.

IV.A. Detection Based on NAM

We start by introducing the correlation between the kth and

lth chip as

L(l, k, p̃n,N ) =

∫ (k+1)Tc

kTc

r(t)V ∗(t, l, k, p̃n,N )dt (14)

where

V (t, l, k, p̃n,N ) ={r(t+ (l − k)Tc)e

j(−θ̃l+θ̃k) , p̃l = p̃k

r(−t+ (l + k + 1)Tc)ej(−θ̃l+1+θ̃k) , otherwise

(15)

Again, p̃n,N is a hypothetical N -chip sequence indexed from

n to n+N − 1 and p̃k represents the k-indexed element of it.

θk has been defined in (12). V ∗(t, l, k, p̃n,N ) is the conjugate

of V (t, l, k, p̃n,N ). In addition, n ≤ l < k ≤ n + N − 1 is

imposed.

It can be seen in (15) that in the case of p̃l = p̃k, the received

signal r(t+ (l− k)Tc) is rotated by ej(−θ̃l+θ̃k), attempting to

align with r(t). The correlation in (14) can be viewed as a

pseudo match filter, where the rotated signal of the lth chip

serves as a correlation reference. In the case of p̃l �= p̃k, the

operation is pretty the same except that the rotation factor is

different and that the received signal during lT ≤ t ≤ (l+1)T

is reversed before rotation to generate a pseudo match filter

reference.

As the rotation factors ej(−θ̃l+θ̃k) and ej(−θ̃l+1+θ̃k) in (15)

are irrelevant to ωc and γ(t), the existence of frequency

and phase offset does have some negative impact on the

correlation performance because the alignment is not perfect.

However, we can shorten the correlation interval (smaller

interval between k and l) to reduce the impact, making the

detection more robust to large frequency offset and fast varing

phase offset.

Like a traditional MBDD detector, consider an observing

window of N . We define the metric for the k-indexed chip as

follows:

M(k, p̃k−N,N+1) = �

{k−1∑

l=k−N

L(l, k, p̃k−N,N+1)

}(16)

namely NAM. Substituting (14) into (16) and with the dis-

tributive law of multiplication, we can write the NAM as:

M(k, p̃k−N,N+1) =

�

{∫ (k+1)Tc

kTc

r(t)k−1∑

l=k−N

V ∗(t, l, k, p̃n,N )dt

}(17)

By summing the rotated signal of the previous chips, noises

in the observing interval are averaged, generating a better

reference for the detection of pk (when hypothesis on sequence

pk−N,N+1 is correct). Besides, writing in the form of (17)

instead of (16) reduces the number of correlations needed from

N to 1.

More importantly, NAM has the form of match filter output.

It’s intuitive to sum the NAM of 32 chips to perform symbol-

level detection for the IEEE 802.15.4 2450 MHz signal.

Therefore, decision metric for a symbol can be written as

w(p̃(i)n,32) = �

{n+31∑k=n

M(k, p̃k−N,N+1)

}(18)

In the right side of (18), the chips before p̃n, i.e.,

p̃n−N , p̃n−N+1, . . . , p̃n−1, are known chips, which are the last

few ones of the previous symbol. If we want to restrict the

correlations only within the symbol, an alternative decision

metric can be used:

w(p̃(i)n,32) = �

⎧⎨⎩

n+31∑k=n+1

∑n≤l<k

L(l, k, p̃(i)n,32)

⎫⎬⎭ (19)

To detect the modulated symbol, we just need to examine

w(p̃(i)n,32) for each of the chip sequences in the signal set, i.e.,

p̃(i)n,32 = p

(i), i = 0, 1, . . . 15, and select the one that maximize

the decision metric, which is

symbol = argmaxi

{w(p(i))

}(20)

IV.B. Implementation

The receiver architecture corresponding to the detection

scheme described above is shown in Figure 3. Due to that

reverse operation on received signal is required, we implement

the proposed scheme discretely, where received signals are

sampled with over sampling rate of β, i.e., r[n] = r(nTs) and

Ts = 1βTc. In the reference generation block V (n, ∗, ∗,p),

received signal of previous chips are delayed (p̃l = p̃k) or

reversed (p̃l �= p̃k), and then rotated to align with the current

chip. Integration in (17) is approximated by sum of discrete

samples:∫ (k+1)Tc

kTc

f(t)dt ≈

Ts

⎡⎣1

2f(kTc) +

((k+1))β−1∑n=kβ+1

f(nTs) +1

2f((k + 1)Tc)

⎤⎦(21)

which is the pseudo match filter output of the current chip.

Next pseudo match filter output of 32 chips are summed,

generating a decision metric for a chip sequence p(i) in the

signal set.

Figure 4 shows a more detailed structure of the reference

generation block. The reverse operation can be implemented

with a random access memory by writing the received samples

of a chip in one direction but read them out in an opposite

direction. Such operation may be guided by a controller.

Additionally, the controller should also set the correct rotation

factor as well as correct control command for the multiplexer

Fig. 3. Receiver Architecture of the Proposed Detection Scheme

Fig. 4. Reference Generation Block V (n, ∗, ∗, p̃)

(MUX) [12]. As the hypothetical sequence are known, which

is the 16 sequences in the signal set, these control words can

be calculated in advance and saved in a table. Furthermore,

the rotation factor ej(−θ̃l+θ̃k) or ej(−θ̃l+1+θ̃k) only takes one

of the four values: 1, j,−1,−j, the multiplication of the can

be simplified to manipulations to the real and image part of

the received samples, i.e., let r[n] = I[n] + jQ[n], we have

r[n] · 1 = I[n] + jQ[n]; r[n] · (−1) = −I[n]− jQ[n]

r[n] · j = −Q[n] + jI[n]; r[n] · (−j) = Q[n]− jI[n](22)

V. NUMERICAL RESULTS

V.A. Experiment Configuration

In this section, BER performance of the following four

detectors are compared. 1) Proposed detector. 2) Traditional

MBDD detector. 3) Coherent soft-decision O-QPSK detector.

4) Coherent hard-decision O-QPSK detector. For the proposed

detector, decision metric in (19) is applied. The traditional

MBDD detector in the simulation is a chip-level detector

in a block-by-block manner. All the BER statistics are of

the data bit after despreading. Over sampling rate β is set

to 4. For simplicity, we assume the carrier phase offset

γ(t) to be constant over the observing N chips while the

carrier frequency offset ωc exists, which can be viewed as

the time varying phase offset case in previous works [5–10].

Additionally, perfect sample timing is assumed.

Implementation complexity of the proposed detector and

a traditional MBDD detector is compared by computing the

4 6 8 10 12 14 16 1810

−4

10−3

10−2

10−1

100

Eb/N

0 in dB

Bit E

rror

Rate

Bit Error Rate Comparison of Different Detectors

CD Hard

CD Soft

Proposed N=1

Proposed N=2

Proposed N=3

Proposed N=4

Trad−MBDD N=1

Trad−MBDD N=2

Trad−MBDD N=4

Fig. 5. Performance comparison between proposed detector and traditional

detectors (ωc = 0)

6 8 10 12 14 16 1810

−4

10−3

10−2

10−1

100

Eb/N

0 in dB

Bit E

rror

Rate

Bit Error Rate Comparison of Different Detectors

Proposed N=1

Proposed N=2

Proposed N=3

Proposed N=4

Trad−MBDD N=1

Trad−MBDD N=2

Trad−MBDD N=4

Fig. 6. Performance comparison between proposed detector and traditional

detectors (ωc=120 kHz)

number of additions and multiplications required in calculation

of their decision metrics.

V.B. BER Performance

Figure 5 shows the simulation results of the BER perfor-

mance of different detectors when frequency offset ωc = 0.

At BER= 10−3, the proposed symbol-level detector achieves

a performance advantage of 2.4 (N = 4) to 3.5 dB (N = 1)

with respect to the conventional chip-level MBDD detector.

Figure 6 is the BER performance of different detectors

when frequency offset ωc = 120 kHz (50 ppm). The optimal

observing interval for a conventional MBDD has been reduced

to 2. As illustrated, the proposed symbol-level detector again

shows a 2.5 dB advantage against traditional MBDD detector

(both N = 2).

In Table II, how the optimal observing window size N

changes with frequency offset ωc is listed. As expected, when

ωc becomes larger, chips that are far ahead cannot be used

as accurate references and the observing interval N should

be shorten. The BER advantages of the proposed detector

(at optimal window size) over the traditional MBDD detector

are also listed in Table II, which are around 2.4 dB at BER

= 10−3.

TABLE II

OPTIMAL OBSERVING WINDOW VS. CARRIER FREQUENCY OFFSET

Frequency Offset0 10 20 30 40 50

(ppm)

Optimal N of32 11 7 4 4 2

Trad. MBDD

Optimal N of32 11 6 3 2 2

Proposed Detector

BER Advantage 2.4(N = 4)2.4 2.5 2.5 2.1 2.4

over MBDD (dB) 3.5(N = 1)

V.C. Implementation Complexity

In an MBDD detector, to calculate the decision metric

in (11), approximately βN complex additions and βN

complex multiplications are required for each hypothetical

sequence. To demodulate an N -chip sequence, we calculate

and compare the decision metrics of all the 2N hypothetical

sequences. And approximately 32/N blocks of such N -chip

sequences are cascaded to demodulate one IEEE 802.15.4

OQPSK symbol. Therefore, total number of additions and

multiplications required to demodulate one symbol can be

represented as:

MBDD additions ≈ 32β · 2N (23)

MBDD multiplications ≈ 32β · 2N (24)

In the proposed detector, for each spread sequence in the

signal set, we need to perform approximately 32Nβ complex

additions and 32β complex multiplications to calculate the

decision metric described in (18). To demodulate one symbol,

decision metrics of the 16 spread sequences are calculated

and compared. Therefore, total number of additions and

multiplications required to demodulate one symbol can be

represented as:

Proposer Detector additions ≈ 32Nβ × 16 (25)

Proposed Detector multiplications ≈ 32β × 16 (26)

Using Table II and Equations (23) to (26), we can compare

the implementation complexity of both detectors at optimal

observing window size under different values of ωc. Table

III summarizes the number of additions and multiplications

required in calculation of the decision metric of one IEEE

802.15.4 2450 MHz symbol. It can be seen that the number of

multiplications remains unchanged when N is growing larger.

This is expected as we only calculate the decision metric for

the 16 sequences in the signal set. In addition, compared to the

traditional MBDD detector, implementation complexity of the

proposed detector is lower when ωc is small, but a bit higher

with large ωc.

TABLE III

IMPLEMENTATION COMPLEXITY COMPARISON

Frequency Offset10 20 30 40 50

(ppm)

Complex Addition65536β 4096β 512β 512β 128β

Trad. MBDD

Complex Addition5632β 3072β 1536β 1024β 1024β

Proposed Detector

Complex Multiplication65536β 4096β 512β 512β 128β

Trad. MBDD

Complex Multiplication512β 512β 512β 512β 512β

Proposed Detector

VI. CONCLUSION

We develop a symbol-level detector for the IEEE 802.15.4

OQPSK signal based on a novel additive metric. It has been

shown that the proposed detector achieves a performance

gain of 2.1 to 3.5 dB compared with traditional MBDD

detector. Besides, simplified implementation techniques are

also introduced, which keeps the implementation complexity

low. Future works may include methods to compensate the

carrier frequency offset and detection schemes incorporating

low-cost synchronization modules.

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