[ieee 2012 ieee 18th international symposium for design and technology in electronic packaging...

2012 IEEE 18th

International Symposium for Design and Technology in Electronic Packaging (SIITME)

978-1-4673-4760-0/12/$31.00 ©2012 IEEE 341 25-28 Oct 2012, Alba Iulia, Romania

Over-current and Short-circuit Protection for IGBT’s used in Plasma Generator Inverter

Ionuţ Ciocan, Cristian Fărcaş, Dorin Petreuş, Niculaie Palaghiţă and Alin Grama

Applied Electronics Department, Faculty of Electronics, Telecommunications and Information Technology Technical University of Cluj-Napoca

Cluj-Napoca, Romania [email protected]

Abstract— The protection of the IGBT’s in the case of an over-

current or a short-circuit, respects the general methodology of a

power electronic device protection. Usually, every power device is

protected by its driver, which becomes a multifunctional circuit

capable of assuring the driving signal, monitoring the operation

state as well as providing its protection. In this paper we propose

and realize a protection driver based on monitoring the collector-

to-emitter IGBT’s voltage. The driver is simulated in OrCAD

PSpice and the practical implementation is used as a laboratory

setup in the educational field. In this way the students can

simulate and test the operation principle of an intelligent gate

driver. The application is original and suitable for plasma

generator inverters, because the system has to ensure minimum

voltage to maintain the plasma on the active electrode, under

extreme load conditions: "all" or "nothing".

Index Terms— IGBT protection driver, plasma generator, two-

step blocking

I. INTRODUCTION

Plasma is a different manifestation of matter, which can be considered the fourth state of matter. For gaseous materials, transformation into plasma involves some energy required to break molecules into positive ions and negative ions or electrons. In other words, plasma is an ionized gas. The energy level of these ions may be in a wide range, characterized by low temperatures up to very high temperatures. In this research, so-called non-thermal plasma was obtained, namely low-energy plasma at slightly higher temperature than room temperature. The block schematic of the system proposed is presented in Fig. 1.

Fig. 1. Block schematic of the plasma generator inverter with

IGBT’s protection.

For gaseous state of the matter, the resistance seen between electrodes is infinite. When plasma torch is generated, according to [1], the value of this resistance is estimated between 110kΩ and 200kΩ. Also, small capacity (pF fractions), but finite, it is assumed to be constant between the electrodes for both, gas and plasma states. Having these extreme variable load conditions in normal operation [2], the IGBT’s of the inverter must be protected from every danger state. The solution adopted was implemented and tested with discrete components for educational reasons.

II. IGBT’S PROTECTION METHOD PROPOSED

The idea behind a driver which provides over-current and short-circuit protection through the monitoring of the collector-emitter voltage is illustrated in Fig 2.

If at the input of an „AND” gate both, the signal from the point P, which monitors the evolution of the collector-emitter voltage, and the driving signal are applied, the danger state can be detected using the information in Table 1.

The diode D needs to be able to handle high reverse voltages and has the role of separating the VCE monitoring circuit from the collector circuit supply voltage when the transistor enters blocking state.

(VP)

D

+V1

-V2

vcom.

DRIVER

Tp

(+)

VCE

Fig. 2. Over-current and short-circuit protection system using the monitoring

of the collector-emitter voltage of the IGBT transistor.

TABLE I. TRUTH TABLE USED FOR DETECTING THE DANGER STATE

Vcom.

VP (VCE) Low Level (L) High Level (H)

Low Level

(L) Lack of supply voltage Conduction state

High Level

(H) Blocking state Short-circuit or over-current

2012 IEEE 18th



When entering conduction state both, the driving signal and VCE are H. This fact would erroneously lead to the detection of an over-current state. That is why the signal from point P is applied to the logic circuit with a delay tr, called response time, with respect to the rising edge of the driving signal applied to the gate (see Fig. 3). This delay is necessary for the transistor to enter saturation following an adequate command signal applied to the gate. During the response time, the monitoring circuit is inactive. The transistor is considered to be working in over-current regime if VP > VP.th, where VP.th is a threshold voltage imposed as a reference to the decision element.

The proposed monitoring circuit of the collector-emitter voltage for each IGBT is built around a comparator (U6A), which is used as the decision element, and a transistor (Q7), which assures the correct detection of the over-current/short-circuit state (see Fig. 4). When the IGBT is blocked, Q7 enters conduction and the threshold VP.th, which activates the protection, will not be exceeded. This way, U6A activates the protection circuit only when the IGBT is turned ON and the potential of the point P exceeds the threshold voltage VP.th.

As long as the IGBT is ON, meaning the voltage in the gate is +15V, VP has the value:

VP = VCE.SAT +VD.ON +R13I1 ≈ 1.5V + 0.9V ≈ 2.4V (1)

Tp

(+)

VCE

Vcom.

a)

TIMING

(tr)

Fig. 3. Logic circuit of the over-current and short-circuit detection.

After the transistor is turned OFF, the new VP value would be: VP = VCC = +15V. According to [3], the response time can be estimated with:

( )

s8.8I

CIRVVt

1

1D.ONCE.SAT.r

213 µ≈⋅++

= (2)

The value of the comparator reference voltage, VP.th, is chosen with approx. 0.6V above VP in normal operation:

VP.th = VCE.SAT +VD.ON +R13I1 + 0.6V = 3V (3)

The IGBT driver circuit with over-current/short-circuit protection is presented in Fig. 5.

In order to achieve a current amplification of the driving signal as well as ensuring fronts of the driving signal as steep as possible, after a galvanic separation, two stages in push-pull configuration are inserted. These are formed of transistors Q3-Q5 and Q4-Q6.

In the case of normal operation, the output of comparator U6A is L, and the transistor Q1 can turn ON if the command signal V3 becomes H, because when the phototransistor inside the optocoupler U4 turns ON, both pnp transistors, Q1 and Q3, are biased by a negative base current. Thus, transistor Q4 also turns ON, assuring the charging of the gate-emitter capacitance of the power transistor Z1 and, implicitly, turning it ON.

When driving signal V3 passes into L, the phototransistor turns OFF and the transistor Q5 turns ON. This will lead to the blocking of transistor Q6 and implicitly of the IGBT, through applying a negative voltage VSS = –8V in its gate.

When an over-current/short-circuit appears, VP will exceed VP.th, the output of the comparator U6A will enter H state, which will initiate the blocking process of the IGBT, which is done in one or two steps (soft shutdown), for a blocking time interval tb = 1s set by a mono-stable circuit.

Comanda

U6ALM393

3

2

84

1

+

-

V+

V-

OUT

R8

100k

0

Comanda

Semnal de scurtcircuit

D3

D1N4148

R21

0

I1

VCC

V4

3Vdc R17100

R13

1k

R19

10k

0

R12

1kC21n

Q7

BC547A

Sarcina

Z1

IXGH10N60A

P

I1270uAdc

0

0

R111k

VCC

VCC

load

driving signal

driving signal

short-circuit signal

VCC

Fig. 4. PSpice schematic of the VCE monitoring based detection circuit.

2012 IEEE 18th



R15330

U1B

CD4009A

54

81

0

R21

100k

Q4TIP41

0

R10

4.7

R20

22

0

D6

D02CZ5_1

R3470

Timp de blocare (1s)

R7

4.7

R22

10k

R933k

R25

10k

Z1

IXGH10N60A

0

U1A

CD4009A

32

81

Q8

2N2222

0

U4

A4N27

Q12N2907

C41n

0

Q5Q2N2222

R66.8k

0

Q6TIP42

Sarcina

D5

D1N4148

R3610Meg

Semnal de scurtcircuit

Q32N2907

0

R23

10k

VCC

VCC

R24

22k

R40

100

VCC

V3

VSS

driving signal

short-circuit signal monostable

(tb = 1s)

TD = 1n

TF = 1nPW = 0.5mPER = 1m

V1 = 5V

TR = 1n

V2 = 0

load

Fig. 5. OrCAD PSpice model of the IGBT driver circuit with over-current and short-circuit protection.

The first blocking step, applied in the gate of the IGBT, is achieved through the circuit formed by Q8 together with the diodes D5 and D6, which turn ON immediately after the danger state is detected. The role of this circuit is the reduction of the voltage Vcom. in the gate when the over-current appears, at approximately 6V, which constitutes a first decrease of the short-circuit current.

The second blocking step can also be applied in the gate of the IGBT through Q1 if it receives the short-circuit signal from the output of the comparator U6A delayed by td ≈ 10µs with respect to transistor Q8. When Q1 turns OFF, the command to enter conduction received from the signal generator will be ignored, hereby making sure that the IGBT is blocked for a time tb = 1s. After blocking interval (tb) the driver circuit will try to get the IGBT to enter conduction state once again. If the danger state persists, the protection function will repeat until the collector current decreases below the value imposed by the threshold voltage VP.th. If the value of the collector current returns to acceptable limits, the circuit resumes normal operation. This blocking technique (soft shutdown) has the purpose to limit the voltage overshoots which appear between the collector and emitter when blocking IGBT’s [4–8].

A drawback of this method is that the collector current decreases slower, which results in a longer blocking process and an increase in the dissipated power on the transistor.

III. SIMULATION AND EXPERIMENTAL RESULTS

In order to get from soft shutdown to classic blocking, the capacitor C4, which is responsible for the delay time td, is removed from the circuit. In this way the time interval in which the first step is applied through the transistor Q8 is reduced to a minimum, effectively achieving classical blocking through a negative gate-emitter voltage.

A. Single-step Blocking Results

In order to simulate how the driver responds when a danger state appears, the blocking time tb was reduced to 7.7ms. The results are presented in Fig. 6, in which V(V7:+) represents the over-current/short-circuit, V(R12:1) and V(U6A:–), represent the inputs of the comparator U6, V(U6A:out) represents the output of the comparator, U1C:G represents the driver signal of transistor Q1 which triggers the blocking, and V(R20:2), the IGBT gate driver signal.

Time

0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20ms

V(R20:2)

-10V

0V

5V

10V

15V

SEL>>

V(U1C:G)

0V

5V

10V

15V

V(U6A:OUT)

0V

5V

10V

15V

V(R12:1) V(U6A:-)

0V

5V

10V

15V

V(V7:+)

0V

0.5V

1.0V

Fig. 6. Waveforms describing the IGBT protection in single-step blocking.

2012 IEEE 18th



As it can be seen from Fig. 6, when a short-circuit appears, VP > Vp.th and the protection is assured for 7.7ms. After this blocking time (tb), the system enters in normal operation until the next danger state is detected.

The simulation and experimental evolutions of the gate to emitter voltage (V(Z1:G)), collector to emitter voltage (V(Z1:C)), and collector current (I(Z1:C)) of the IGBT’s when an over-current or a short-circuit occurs, are presented in Fig. 7 and Fig. 8. Thus, when a single-step blocking technique is used, in both, simulation and experimental results, the response time tr is about 8.8µs, as we estimated with (2). Also, the collector to emitter voltage peaks are almost the same, 18.8V, which corresponds to an overshoot of about 30%.

17.69ms 17.70ms 17.71ms 17.72ms 17.73ms 17.74ms

I(Z1:C)

0A

4A

8A

12A

(17.709m,11.56)

(17.70m,2.56)

V(Z1:C)

0V

6V

12V

18V

SEL>>

(17.70m,1.824)

(17.71m,18.80)

V(Z1:G)

-10V

0V

10V

20V

(17.70m,13.06)

(17.72m,-6.80)

Fig. 7. Single-step blocking – simulation results.

Fig. 8. Single-step blocking – experimental results.

B. Two-step Blocking Results

The waveforms describing the simulation and experimental results when using the two-step blocking method proposed are presented in Fig. 9 and, respectively, Fig. 10. As it can be seen, the response time tr is the same (8.8µs), and the delay time td introduced between the two steps is about 10µs. Also, the collector to emitter voltage peaks are almost the same in both cases, 16.6V and 16.8V, which corresponds to an overshoot of about 15%.

An additional benefit of this protection method is the fact that the load current threshold can be set at a minimum value necessary to generate plasma, and system reliability is assured.

17.69ms 17.70ms 17.71ms 17.72ms 17.73ms 17.74ms

I(Z1:C)

0A

4A

8A

12A

(17.709m,11.46)

(17.70m,2.56)

V(Z1:C)

0V

6V

12V

18V

(17.71m,16.59)

(17.70m,1.823)

V(Z1:G)

-10V

0V

10V

20V

SEL>>

(17.73m,-6.80)

(17.70m,13.03)

Fig. 9. Two-step blocking – simulation results.

Fig. 10. Two-step blocking – experimental results.

2012 IEEE 18th



IV. CONCLUSIONS

In this paper an intelligent driver with over-current and short-circuit protection was developed in order to optimize a plasma generator inverter and to assure the reliability of the whole system. The idea of protecting the inverter IGBT’s using the VCE monitoring technique is not new, but the proposed implementation (not realised with dedicated integrated circuits) and the simulation model are original and useful in the educational field. Thus, the students can understand better, simulate and test the functionality of a protection driver for IGBT’s. The operation principle is clearly explained, and the simulation and experimental results prove the theoretical fundamentals behind the laboratory setup. In addition to this, the students can modify any component values and monitor the waveforms in the circuit for better understanding the system.

The single-step and two-step blocking methods of IGBT’s are compared, simulated and tested, concluding that the soft shutdown limits with about 15% the voltage overshoots that appear when the IGBT’s turn OFF. This fact makes the two-step blocking technique suitable for the plasma generator inverter.

ACKNOWLEDGMENTS

This work was developed on the frame of the PN-II-PT-PCCA project no. 31170/02.07.2012, “Echipament miniaturizat cu microtorţă de plasmă cuplată capacitiv şi tehnologii analitice pentru determinarea multielementară simultană utilizate în controlul mediului şi alimentelor”, MICROCCP, UEFISCDI.

REFERENCES

[1] S. D. Anghel, “Generation of Low-Power Capacitively Coupled Plasma at Atmosferic Pressure”, IEEE Transactions on Plasma Science, vol. 30, no. 2, April 2002, pp. 660–664.

[2] D. Petreuş, A. Grama, S. Cadar, E. Plaian, A. Rusu, “Design of a Plasma Generator Based on E Power Amplifier and Impedance Matching”, The 12th International Conference on Optimization of Electrical and Electronic Equipment (OPTIM 2010), Braşov, Romania, May 2010, pp. 1317–1322.

[3] N. Palaghiţă, D. Petreuş, C. Fărcaş, “Electronică de putere partea a II-a, Circuite electronice de putere”, Mediamira Publishing House, 2004, pp. 138–144.

[4] M.N. Nguyen, C. Burkhart, J.J. Olsen, K. Macken, “Compact, intelligent, digitally controlled IGBT gate drivers for a PEBB-based ILC Marx modulator”, Proc. of the IPAC’10, Kyoto, Japan, 2010.

[5] Fuji Electric Co., Ltd, “Fuji IGBT Modules Application Manual”, REH9848, chap. 5 – Protection Circuit Design, May 2011, pp. 1–17.

[6] K. Macken, C. Burkhart, R. Larsen, M.N. Nguyen, and J. Olsen, “A hierarchical control architecture for a PEBB-based ILC Marx modulator”, Proc. of the International Pulsed Power Conference, Washington DC, June 29 – July 2, 2009, pp. 826-831.

[7] Robert Hemmer, “Intelligent IGBT Drivers with Exceptional Driving and Protection Features”, Proc, of the EPE Conference, Barcelona, September 2009, pp. 1–4.

[8] Sampat Shekhawat and Bob Brockway, “IGBT Behavior under Short-circuit and Fault Protection”, Fairchild Semiconductor, May 2008, pp. 34–36.

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