ica lab manual.pdf

III year I sem ECE ICA lab Master manual 2014-15

1 | P a g e GCET ECE Department

BASIC INTRODUCTION

THE BREADBOARD

The breadboard consists of two terminal strips and two bus strips (often broken in the

centre). Each bus strip has two rows of contacts. Each of the two rows of contacts are a node. That

is, each contact along a row on a bus strip is connected together (inside the breadboard). Bus

strips are used primarily for power supply connections, but are also used for any node requiring a

large number of connections. Each terminal strip has 60 rows and 5 columns of contacts on each

side of the centre gap. Each row of 5 contacts is a node. You will build your circuits on the

terminal strips by inserting the leads of circuit components into the contact receptacles and

making connections with

Incorrect connection of power to the ICs could result in them exploding or becoming very

hot with the possible serious injury occurring to the people working on the experiment! Ensure

that the power supply polarity and all components and connections are correct before switching

on power .

Fig 1. The breadboard. The lines indicate connected holes.



BUILDING THE CIRCUIT

The steps for wiring a circuit should be completed in the order described below:

1. Turn the power (Trainer Kit) off before you build anything!

2. Make sure the power is off before you build anything!

3. Connect the supply and ground (GND) leads of the power supply to the power and ground bus

strips on your breadboard.

4. Plug the chips you will be using into the breadboard. Point all the chips in the same direction

with pin 1 at the upper-left corner. (Pin 1 is often identified by a dot or a notch next to it on the

chip package)

5. Connect supply and GND pins of each chip to the power and ground bus

strips on the breadboard.

6. Select a connection on your schematic and place a piece of hook-up wire between

corresponding pins of the chips on your breadboard. It is better to make the short connections

before the longer ones. Mark each connection on your schematic as you go, so as not to try to

make the same connection again at a later stage.

7. Get one of your group members to check the connections, before you turn the power on.

8. If an error is made and is not spotted before you turn the power on. Turn the power off

immediately before you begin to rewire the circuit.

9. At the end of the laboratory session, collect you hook-up wires, chips and all equipment and

return them to the demonstrator.

10. Tidy the area that you were working in and leave it in the same condition as it was before you

started.

Common Causes of Problems:

1. Not connecting the ground and/or power pins for all chips.

2. Not turning on the power supply before checking the operation of the circuit.

3. Leaving out wires.

4. Plugging wires into the wrong holes.

5. Driving a single gate input with the outputs of two or more gates

6. Modifying the circuit with the power on.

In all experiments, you will be expected to obtain all instruments, leads, components at the

start of the experiment and return them to their proper place after you have finished the

experiment. Please inform the demonstrator or technician if you locate faulty equipment. If you

damage a chip, inform a demonstrator, don't put it back in the box of chips for somebody else to

use.



Functional block diagram



1.1 INTEGRATED CIRCUITS

An integrated circuit (IC) is a miniature, low cost electronic circuit consisting of active and

passive components fabricated together on a single crystal of silicon. The active components are

transistors and diodes and passive components are resistors and capacitors.

Why silicon is chose as basic material and not Germanium?

The chip is packaged in a plastic holder with pins spaced on a 0.1" (2.54mm) grid which will fit

the holes on strip board and breadboards. Very fine wires inside the package link the chip to the

pins.



1.2 Advantages of integrated circuits 1. Miniaturization and hence increased equipment density. 2. Cost reduction due to batch processing. 3. Increased system reliability due to the elimination of soldered joints. 4. Improved functional performance. 5. Matched devices. 6. Increased operating speeds. 7. Reduction in power consumption

We introduce the most important of all analog building blocks, the operational amplifier (op-amp for short).

1.3 Depending upon the number of active devices per chip, there are different levels of

integration:



Fig: 1.1 SSI chip

Fig: 1.2 MSI chip

Fig: 1.3 VLSI chip



1.4 IC Package Types The op-amp ICs are available in various packages. The IC packages are classified as,

1. Metal Can

2. Dual In Line

3. Flat Pack

Metal Can package:

Fig 1.4 Metal Can

Dual In Line (DIP):

Fig: 1.5 Dual in line package

Flat Pack: Fig: 1.6 Flat pack



Table 1.1 Typical package types with typical pin counts and mounting type:



Table:1.2 Different package types with their abbreviations:

1.5 Basic Information of Op Amp:

Circuit Symbol:

Fig:1.7 symbol of an Op Amp



The input and output are in anti phase:-

Fig: 1.8 input applied to inverting terminal

Fig:1.9 input applied to non inverting terminal



The amplifier's differential inputs consist of a input and a input, and ideally the op-amp

amplifies only the difference in voltage between the two, which is called the differential input

voltage.

The output voltage of the op-amp is given by the equation,

where

is the voltage at the non-inverting terminal,

is the voltage at the inverting terminal and

AOL is the open-loop gain of the amplifier (the term "open-loop" refers to the absence of a

feedback loop from the output to the input).

The magnitude of AOL is typically very large10,000 or more for integrated circuit op-amps

and therefore even a quite small difference between and drives the amplifier output nearly to

the supply voltage. This is called saturation of the amplifier.

The magnitude of AOL is not well controlled by the manufacturing process, and so it is impractical

to use an operational amplifier as a stand-alone differential amplifier. If predictable operation is

desired, negative feedback is used, by applying a portion of the output voltage to the inverting

input.

The closed loop feedback greatly reduces the gain of the amplifier. If negative feedback is used,

the circuit's overall gain and other parameters become determined more by the feedback network

than by the op-amp itself.

If the feedback network is made of components with relatively constant, stable values, the

unpredictability and inconstancy of the op-amp's parameters do not seriously affect the circuit's

performance.

If no negative feedback is used, the op-amp functions as a switch or comparator.

Positive feedback may be used to introduce hysteresis or oscillation.

Power supply:



are as shown below:

1.6 Ideal Characteristics of an op-amp:

Op amp is a differential amplifier.

An ideal op-amp is usually considered to have the following properties, and they are considered to

hold for all input voltages:

Infinite open-loop gain (when doing theoretical analysis, a limit may be taken as open loop

gain AOL goes to infinity).

Infinite voltage range available at the output (vout).

(in practice the voltages available from the output are limited by the supply voltages

and ). The power supply sources are called rails.

Infinite bandwidth (i.e., the frequency magnitude response is considered to be flat

everywhere with zero phase shift).

Infinite input impedance ( , and zero current flows from to ).

Zero input current (i.e., there is assumed to be no leakage or bias current into the device).

Zero input offset voltage (i.e., when the input terminals are shorted so that ,

the output is a virtual ground or vout = 0).



Infinite slew rate (i.e., the rate of change of the output voltage is unbounded) and

power bandwidth (full output voltage and current available at all frequencies).

Zero output impedance (i.e., Rout = 0, so that output voltage does not vary with output

current).

Zero noise.

Infinite Common-mode rejection ratio (CMRR).

Infinite Power supply rejection ratio for both power supply rails.

Fig: 1.10 a. An equivalent circuit of an operational amplifier

An equivalent circuit of an operational amplifier that models some resistive non-ideal parameters.

An exact equivalent of the ideal Op-Amp is called a "nullor" and it is composed of new elements --

the nullator and the norator. The input to the op-amp is the nullator (i.e. no voltage or current), while the

output is the norator (i.e. any voltage or current). These two components give the device its ideal

characteristics.

Fig: 1.10 b. Ideal op amp



Fig: 1.10 c. Open loop circuit

The V+ and V- power supply terminals are connected to two DC voltage sources.

The v+ pin is connected o the positive terminal of one source and v- pin is connected to the

negative terminal of the other source, where two sources are 15 V batteries each.

The power supply voltage may range from 5 to 22 V.

Terms used:

Power Supply:

In general op-amps are designed to be powered from a dual or bipolar voltage supply which is

typically in the range of +5V to +15Vdc with respect to ground, and another supply voltage of -

5V to -15Vdc with respect to ground. Although in certain cases an op-amp, like the LM3900 and

called a 'Norton Op-Amp', may be powered from a single supply voltage.

Electrical Ratings:

Electrical characteristics for op-amps are usually specified for a certain (given) supply voltage and

ambient temperature. Also, other factors may play an important role such as certain load and/or

source resistance. In general, all parameters have a typical minimum/maximum value in most

cases.

Definition of 741-pin functions: (Refer to the internal 741 schematic of Fig. 3)

Pin 1 (Offset Null): Offset nulling, see Fig. 11. Since the op-amp is the differential type, input



offset voltage must be controlled so as to minimize offset. Offset voltage is nulled by application

of a voltage of opposite polarity to the offset. An offset null-adjustment potentiometer may be

used to compensate for offset voltage. The null-offset potentiometer also compensates for

irregularities in the operational amplifier manufacturing process which may cause an offset.

Consequently, the null potentiometer is recommended for critical applications. See 'Offset Null

Adjustment' for method.

Pin 2 (Inverted Input): All input signals at this pin will be inverted at output pin 6. Pins 2 and 3

are very important (obviously) to get the correct input signals or the op amp can not do its work.

Pin 3 (Non-Inverted Input): All input signals at this pin will be processed normally without

inversion. The rest is the same as pin 2.

Pin 4 (-V): The V- pin (also referred to as Vss) is the negative supply voltage terminal. Supply-

voltage operating range for the 741 is -4.5 volts (minimum) to -18 volts (max), and it is specified

for operation between -5 and -15 Vdc. The device will operate essentially the same over this range

of voltages without change in timing period. Sensitivity of time interval to supply voltage change

is low, typically 0.1% per volt. (Note: Do not confuse the -V with ground).

Pin 5 (Offset Null): See pin 1, and Fig. 11.

Pin 6 (Output): Output signal's polarity will be the opposite of the input's when this signal is

applied to the op-amp's inverting input. For example, a sine-wave at the inverting input will

output a square-wave in the case of an inverting comparator circuit.

Pin 7 (posV): The V+ pin (also referred to as Vcc) is the positive supply voltage terminal of the

741 Op-Amp IC. Supply-voltage operating range for the 741 is +4.5 volts (minimum) to +18 volts

(maximum), and it is specified for operation between +5 and +15 Vdc. The device will operate

essentially the same over this range of voltages without change in timing period. Actually, the

most significant operational difference is the output drive capability, which increases for both

current and voltage range as the supply voltage is increased. Sensitivity of time interval to supply

voltage change is low, typically 0.1% per volt.

Pin 8 (N/C): The 'N/C' stands for 'Not Connected'. There is no other explanation. There is

nothing connected to this pin, it is just there to make it a standard 8-pin package.



8 Pin 16 pin



Fig: 1.11 Various IC packages of A 741 op amp along with connection diagram

These ideals can be summarized by the two "golden rules":

I. The output attempts to do whatever is necessary to make the voltage difference

between the inputs zero.

II. The inputs draw no current.

The first rule only applies in the usual case where the op-amp is used in a closed-loop design

(negative feedback, where there is a signal path of some sort feeding back from the output to the

inverting input). These rules are commonly used as a good first approximation for analyzing or

designing op-amp circuits.

In practice, none of these ideals can be perfectly realized, and various shortcomings and

compromises have to be accepted. Depending on the parameters of interest, a real op-amp may be

modeled to take account of some of the non-infinite or non-zero parameters using equivalent

resistors and capacitors in the op-amp model. The designer can then include the effects of these

undesirable, but real, effects into the overall performance of the final circuit. Some parameters

may turn out to have negligible effect on the final design while others represent actual limitations

of the final performance that must be evaluated.



1.7 Classification:

Fig: 1.10 Classifications of ICs.

\



1.8 Block diagram of op-amp: The block diagram of IC op-amp is as shown in figure below:

Fig: 1.11 Basic block diagram of an Op Amp

1) Input stage:

2) Intermediate stage:

-Dual input balanced

output diff. amp.

-Most of the vg.gain

-Dual input unbalanced output diff. amp. -to provide additional vg. gain. -chain of multi stage amplifiers

-low o/p impedence,large ac o/p vg. Swing and high ct.sourcing & sinking capability reqd. -push-pull complementary amp. Is used. -here o/p vg. Swing is increased. - vg. Swing symmetrical w.r.t gnd. -rises the ct. supplying capability of opamp.

-DC vg.levels of prev. stage which are applied to next stage increases above gnd.level. -high DC level may drive transistor into satn. -may cause distortion due to clipping. -may limit the max. ac o/p vg. Swing without distortion. -buffer is emitter follower whose i/p impedence is high.prevents loading of high gain stage.



3) Level shifting stage:



4) Output stage:

1.9 Manufacturers for Linear ICs:



Examples:

1.10 Features of IC-741

i. No frequency compensation required.

ii. Short circuit protection provided. iii. Offset voltage null capability.

iv. Excellent temperature stability. v. Large common mode and Differential voltage range (high input voltage range).

vi. No latch up.

1.11 Absolute Maximum Parameters:

Maximum means that the op-amp can safely tolerate the maximum ratings as given in the

data section of such op-amp without the possibility of destroying it. The uA741 is a high

performance operational amplifier with high open loop gain, internal compensation, high

common mode range and exceptional temperature stability. The uA741 is short-circuit

protected and allows for nulling of the offset voltage. The uA741 is manufactured by

Fairchild Semiconductor.



Supply Voltage (+/-Vs): The maximum voltage (positive and negative) that can be safely used to

feed the op-amp.

Dissipation (Pd): The maximum power the op-amp is able to dissipate, by specified ambient

temperature (500mW @ 80 C).

Differential Input Voltage (Vid): This is the maximum voltage that can be applied across the +

and - inputs.

Input Voltage (Vicm): The maximum input voltage that can be simultaneously applied between

both input and ground also referred to as the common-mode voltage. In general, the maximum

voltage is equal to the supply voltage.

Operating Temperature (Ta): This is the ambient temperature range for which the op-amp will

operate within the manufacturer's specifications. Note that the military grade version (uA741)has

a wider temperature range than the commercial, or hobbyist, grade version (uA741C).

Output Short-Circuit Duration: This is the amount of time that an op-amp's output can be

short-circuited to either supply voltage.



CYCLE I



EXPERIMENT- 1

ADDER, SUBTRACTOR AND COMPARATOR USING IC 741 OP-AMP.

AIM: To study the working of op- amp as adder, subtractor and comparator using IC 741.

APPARATUS:

Bread board-1 in no.

Regulated power supply (0V 30V)-1 in no.

CRO (0-20 MHz)-1 in no.

IC 741-1.

Resistors-1K-2 in no., 10K-2 in no3.3K-1 in no.

Multimeter/ voltmeter

Connecting wires.

THEORY:

ADDER:

Let V1 and V2 are two inputs applied to the inverting terminal of op-amp through R1, and

R2 resistors as shown in fig.1. A feedback resistor Rf is connected between o/p and inverting i/p.

Then the o/p will be the summation of i/p voltages.

Vo = - (Rf/R1) (V1+V2) where Ri = R1 = R2

SUBTRACTOR:

Let V1 and V2 are two inputs applied to the inverting and non-inverting terminals of the

two op -amps through R1and R2 resistors as shown in the subtractor circuit diagram. Feedback

resistor is connected between o/p and inverting i/p. Then the o/p will be the difference of two i/p

voltages.

Vo = + (Rf/R1) (V2-V1) where Ri = R1 = R2

Here Rf = R1 = R2.

COMPARATOR:

Comparator is a non-linear application of an op-amp in open loop configuration. A

Comparator circuit compares the input signal voltage with a reference voltage at the terminals of

an open loop op amp. An inverting comparator circuit shown in fig 3 with input voltage

applied to terminal and Vref to input terminal.



The output voltage will be Vsat (= Vcc) and its transfer characteristics as shown in fig.4. The

transfer characteristics for a practical comparator are shown:

When Vi < Vref ; Vo= -Vsat

When Vi>Vref ; Vo= +V sat

When Vi < - Vref

Vo = +Vsat

Vi > - Vref

Vo = - Vsat

CIRCUIT DIAGRAMS:

(i) ADDER: Rf =10k, R = 10k

Fig 1.1: OP-AMP ADDER

(ii). SUBTRACTOR: Rf & R3 =10k, R1 & R2= 10k.

Fig 1.2: OP-AMP SUBTRACTOR



(iii) COMPARATOR: Rf =10k, R=1k.

Fig 1.3: COMPARATOR

PROCEDURE:

ADDER: 1. Connect the circuit as shown in the adder circuit diagram fig.1.3

2. Apply the supply voltages of +12V to pin7 and -12V to pin4 of IC 741 respectively.

3. Apply DC voltage from regulated power supply to inputs V1 and V2 .

4. Increase input voltages from 1V to 5V in steps of 1V for V1,V2

5. Note down the Vo corresponding outputs (CRO in DC mode). Or DMM.

6. Compare theoretical and practical values.

SUBTRACTOR:

1. Connect the circuit as shown in the Subtractor circuit diagram fig:1.2.


3. Apply DC voltage from regulated power supply to inputs V1 and V2.

4. Keep the 6V at V1; slowly decrease V2 from 6V to 3V with five readings

5. Note down the Vo corresponding to different inputs (CRO in DC mode) or DMM.

6. Compare theoretical and practical values.



COMPARATOR:

1. Connect the circuit as shown in the figure 1.3.


3. Set the reference voltage as 1V DC.

4. Apply a sine wave of 4V p-p with 1 KHz frequency from the function generator.

5. Check the output on CRO. Calculate the amplitude of output wave as shown in fig 4.

6. Plot the waveforms on graph sheets.

7. Compare the output wave amplitude to the theoretical value.

OBSERVATIONS:

ADDER: Input voltages applied to inverting terminal

S.NO D.C Voltage at

input V1 (V)

D.C Voltage

at input V2

(V)

D.C Voltage measured

at Output

Vo (V)

theoretical

Voltage Vo

(V)

1 0 1 -1 -1 2 1 1 -1.99 -2

3 1.5 1 -2.5 -2.5

4 2 1 -3.08 -3 5 2.5 1 -3.5 -3.5

6 3 1 -4 -4

Table 1.1: Adder readings

SUBTRACTOR:

S.NO D.C Voltage at

input V1 (V)

D.C Voltage at

input V2 (V)

D.C Voltage at

output Vo (V) (practical)

theoretical

Voltage Vdc (V)

1 6 6 0 0 2 6 5 1 1.2

3 6 4 2 2.2

4 6 3 3 3.2

Table 1.2: Subtractor readings



COMPARATOR:

S.NO D.C Voltage at

Input Vref(v)

A.C Voltage at

input V2 (V)

Voltage at output Vo

(V) (CRO)

01

1 6V peak to peak

sinusoidal 20 Vpp

Table 1.3: Comparator readings

VII. EXPECTED WAVEFORMS:

COMPARATOR: Non- Inverting Comparator.

Fig:1.4 Comparator input and output waveforms for positive reference and negative reference

RESULT:

Hence, the operation of the adder, subtractor and comparator circuits using op-amp 741 is studied

and the output waveforms of the comparator are plotted.



VIVA QUESTIONS:

Q1. . What are the applications of op-amp?

Ans: application of op-amp are integrator , differentiator, I-V converter , P-V converter etc.

2. Write down output voltage formula for the adder in inverting mode.

Ans: Vo = - Rf/R1(V1+V2)

3. Write down output voltage formula for the adder in non inverting mode.

Ans: Vo = 1+ Rf/R1(V1+V2)

4. Write short notes on inverting and non inverting amplifier.

Ans: inverting amplifier has an output of 180 phase shift for given input, whereas non-inverting

amplifier will delivered the same output for the given input.

5. What are ideal characteristics of an ideal op-amp?

Ans: ideal characteristics of op-amp are

1. the high input impendence order of mega ohms

2.very low output impendence (10 ).

3. very high voltage gain (>10)

4. open loop voltage gain (= )

6. Write down the characteristics of adder and subtractor for sinusoidal input?

Ans: the output will remains same in nature but the magnitude will increase or decrease

depends upon the circuit.

7. What is main difference between BJT amplifier and OP-AMP amplifier in terms of gain?

Ans; the gain of the BJT will be less than the 1 where as the op-amp has 1 .



8.Mention some of the linear applications of op amps.

Ans:Adder, subtractor, voltage to- current converter, current to- voltage converters, instrumentation amplifier, analog computation ,power amplifier, etc are some of the

linear op-amp circuits.

9. Mention some of the non linear applications of op-amps:

Ans: Rectifier, peak detector, clipper, clamper, sample and hold circuit, log amplifier, anti

log amplifier, multiplier are some of the non linear op-amp circuits.

10. What are the areas of application of non-linear op- amp circuits:

Industrial instrumentation

Signal processing

11. What does 74LS refers to:

Ans: 74-refers to IC which can be used for commercial purpose.LS-Low Power Schottky.

12. What is Linear IC?

Ans: IC which accepts process and produce analog signal is called linear IC .Eg:IC741,

IC555.

13. Define CMRR

Ans: Common mode rejection ratio-it is defined as the ratio between the differential mode

gain to the common mode gain



EXPERIMENT 2

INTEGRATOR AND DIFFERENTIATOR USING IC 741 OP-AMP

AIM: -To study the working of op amp as differentiator and integrator using IC 741 and

observe the output waveforms for different input waveforms.

APPARATUS: -

Bread board -1.

Regulated power supply-1.

CRO - 1.

IC 741-1.

Resistors - 1K , 150 , 1.5 K , 100K , 10K.

Capacitor - 0.01F , 0.1F-2.

Connecting wires. THEORY

The Op-amp Integrating Amplifier

An OP-Amp circuit for integration is shown in Fig 2.1.

An operational amplifier can be used as part of a positive or negative feedback amplifier

or as an adder or subtractor type circuit using just pure resistances in both the input and the

feedback loop. But what if we were to change the purely resistive ( R ) feedback element of an

inverting amplifier to that of a frequency dependant impedance, ( Z ) type complex element, such

as a Capacitor, C.

By replacing this feedback resistance with a capacitor we now have an RC Network connected

across the operational amplifiers feedback path producing another type of operational amplifier

circuit commonly called an Op-amp Integrator circuit as shown below.

Op-amp Integrator Circuit



As its name implies, the Op-amp Integrator is an Operational Amplifier circuit that performs the

mathematical operation of Integration that is we can cause the output to respond to changes in

the input voltage over time as the op-amp integrator produces an output voltage which is

proportional to the integral of the input voltage.

The magnitude of the output signal is determined by the length of time a voltage is present at its

input as the current through the feedback loop charges or discharges the capacitor as the required

negative feedback occurs through the capacitor.

When a step voltage, Vin is firstly applied to the input of an integrating amplifier, the uncharged

capacitor C has very little resistance and acts a bit like a short circuit allowing maximum current

to flow via the input resistor, Rin as potential difference exists between the two plates. No current

flows into the amplifiers input and point X is a virtual earth resulting in zero output. As the

impedance of the capacitor at this point is very low, the gain ratio of Xc/Rin is also very small

giving an overall voltage gain of less than one, (voltage follower circuit).

As the feedback capacitor, C begins to charge up due to the influence of the input voltage, its

impedance Xc slowly increase in proportion to its rate of charge. The capacitor charges up at a

rate determined by the RC time constant, ( ) of the series RC network. Negative feedback forces

the op-amp to produce an output voltage that maintains a virtual earth at the op-amps inverting

input.

Since the capacitor is connected between the op-amps inverting input (which is at earth potential)

and the op-amps output (which is negative), the potential voltage, Vc developed across the

capacitor slowly increases causing the charging current to decrease as the impedance of the

capacitor increases. This results in the ratio of Xc/Rin increasing producing a linearly increasing

ramp output voltage that continues to increase until the capacitor is fully charged.

At this point the capacitor acts as an open circuit, blocking any more flow of DC current. The

ratio of feedback capacitor to input resistor ( Xc/Rin ) is now infinite resulting in infinite gain.

The result of this high gain (similar to the op-amps open-loop gain), is that the output of the

amplifier goes into saturation as shown below. (Saturation occurs when the output voltage of the

amplifier swings heavily to one voltage supply rail or the other with little or no control in

between).



The rate at which the output voltage increases (the rate of change) is determined by the value of

the resistor and the capacitor, RC time constant. By changing this RC time constant value,

either by changing the value of the Capacitor, C or the Resistor, R, the time in which it takes the

output voltage to reach saturation can also be changed for example.

If we apply a constantly changing input signal such as a square wave to the input of an Integrator

Amplifier then the capacitor will charge and discharge in response to changes in the input signal?

This results in the output signal being that of a saw tooth waveform whose frequency is dependent

upon the RC time constant of the resistor/capacitor combination. This type of circuit is also

known as a Ramp Generator and the transfer function is given below.

Op-amp Integrator Ramp Generator



From the first principals that the voltage on the plates of a capacitor is equal to the charge on the

capacitor divided by its capacitance giving Q/C. Then the voltage across the capacitor is output

Vout therefore: -Vout = Q/C. If the capacitor is charging and discharging, the rate of charge of

voltage across the capacitor is given as:

But dQ/dt is electric current and since the node voltage of the integrating op-amp at its inverting

input terminal is zero, X = 0, the input current I(in) flowing through the input resistor, Rin is

given as:

The current flowing through the feedback capacitor C is given as:

Assuming that the input impedance of the op-amp is infinite (ideal op-amp), no current flows into

the op-amp terminal. Therefore, the nodal equation at the inverting input terminal is given as:



From which we derive an ideal voltage output for the Op-amp Integrator as:

To simplify the maths a little, this can also be re-written as:

Where = 2 and the output voltage Vout is a constant 1/RC times the integral of the input

voltage Vin with respect to time. The minus sign ( - ) indicates a 180o phase shift because the

input signal is connected directly to the inverting input terminal of the op-amp.

The AC or Continuous Op-amp Integrator

If we changed the above square wave input signal to that of a sine wave of varying frequency the

Op-amp Integrator performs less like an integrator and begins to behave more like an active

Low Pass Filter, passing low frequency signals while attenuating the high frequencies.

At 0Hz or DC, the capacitor acts like an open circuit blocking any feedback voltage resulting in

very little negative feedback from the output back to the input of the amplifier. Then with just the

feedback capacitor, C, the amplifier effectively is connected as a normal open-loop amplifier

which has very high open-loop gain resulting in the output voltage saturating.

This circuit connects a high value resistance in parallel with a continuously charging and

discharging capacitor. The addition of this feedback resistor, R2 across the capacitor, C gives the

circuit the characteristics of an inverting amplifier with finite closed-loop gain of R2/R1. The

result is at very low frequencies the circuit acts as an standard integrator, while at higher



frequencies the capacitor shorts out the feedback resistor, R2 due to the effects of capacitive

reactance reducing the amplifiers gain.

The AC Op-amp Integrator with DC Gain Control

Unlike the DC integrator amplifier above whose output voltage at any instant will be the integral

of a waveform so that when the input is a square wave, the output waveform will be triangular.

For an AC integrator, a sinusoidal input waveform will produce another sine wave as its output

which will be 90o out-of-phase with the input producing a cosine wave.

Furthermore, when the input is triangular, the output waveform is also sinusoidal. This then forms

the basis of a Active Low Pass Filter as seen before in the filters section tutorials with a corner

frequency given as.

Op-amp Differentiator

As its name implies, the differentiator amplifier produces an output signal which is the

mathematical operation of differentiation that is it produces a voltage output which is proportional

to the input voltages rate-of-change and the current flowing through the input capacitor.



The basic Op-amp Differentiator circuit is the exact opposite to that of the Integrator Amplifier

circuit that we looked at in the previous tutorial. Here, the position of the capacitor and resistor

have been reversed and now the reactance, Xc is connected to the input terminal of the inverting

amplifier while the resistor, R forms the negative feedback element across the operational

amplifier as normal.

This Operational Amplifier circuit performs the mathematical operation of Differentiation, that is

it produces a voltage output which is directly proportional to the input voltages rate-of-change

with respect to time. In other words the faster or larger the change to the input voltage signal, the

greater the input current, the greater will be the output voltage change in response, becoming

more of a spike in shape.

As with the integrator circuit, we have a resistor and capacitor forming an RC Network across the

operational amplifier and the reactance ( Xc ) of the capacitor plays a major role in the

performance of a Op-amp Differentiator.

Op-amp Differentiator Circuit

The input signal to the differentiator is applied to the capacitor. The capacitor blocks any DC

content so there is no current flow to the amplifier summing point, X resulting in zero output

voltage. The capacitor only allows AC type input voltage changes to pass through and whose

frequency is dependant on the rate of change of the input signal.

At low frequencies the reactance of the capacitor is High resulting in a low gain ( R/Xc ) and

low output voltage from the op-amp. At higher frequencies the reactance of the capacitor is much

lower resulting in a higher gain and higher output voltage from the differentiator amplifier.

However, at high frequencies an op-amp differentiator circuit becomes unstable and will start to

oscillate. This is due mainly to the first-order effect, which determines the frequency response of

the op-amp circuit causing a second-order response which, at high frequencies gives an output



voltage far higher than what would be expected. To avoid this high frequency gain of the circuit

needs to be reduced by adding an additional small value capacitor across the feedback resistor R.

Ok, some maths to explain whats going on!. Since the node voltage of the operational amplifier

at its inverting input terminal is zero, the current, i flowing through the capacitor will be given as:

The charge on the capacitor equals Capacitance x Voltage across the capacitor

The rate of change of this charge is

but dQ/dt is the capacitor current i

From this we have an ideal voltage output for the op-amp differentiator is given as:

Therefore, the output voltage Vout is a constant -R.C times the derivative of the input voltage

Vin with respect to time. The minus sign indicates a 180o phase shift because the input signal is

connected to the inverting input terminal of the operational amplifier.

One final point to mention, the Op-amp Differentiator circuit in its basic form has two main

disadvantages compared to the previous Operational Amplifier Integrator circuit. One is that it

suffers from instability at high frequencies as mentioned above, and the other is that the capacitive



input makes it very susceptible to random noise signals and any noise or harmonics present in the

source circuit will be amplified more than the input signal itself. This is because the output is

proportional to the slope of the input voltage so some means of limiting the bandwidth in order to

achieve closed-loop stability is required

Op-amp Differentiator Waveforms

If we apply a constantly changing signal such as a Square-wave, Triangular or Sine-wave type

signal to the input of a differentiator amplifier circuit the resultant output signal will be changed

and whose final shape is dependent upon the RC time constant of the Resistor/Capacitor

combination.

input signal: sinusoidal output signal



Improved Op-amp Differentiator Amplifier

The basic single resistor and single capacitor op-amp differentiator circuit is not widely used to

reform the mathematical function of Differentiation because of the two inherent faults mentioned

above, Instability and Noise. So in order to reduce the overall closed-loop gain of the circuit

at high frequencies, an extra resistor, Rin is added to the input as shown below.

Improved Op-amp Differentiator Amplifier

Adding the input resistor Rin limits the differentiators increase in gain at a ratio of R/Rin. The

circuit now acts like a differentiator amplifier at low frequencies and an amplifier with resistive

feedback at high frequencies giving much better noise rejection. Additional attenuation of higher

frequencies is accomplished by connecting a capacitor C in parallel with the differentiator

feedback resistor, R. This then forms the basis of a Active High Pass Filter as we have seen

before in the filters section.

Applications:

1. The DC voltage produced by the differentiator circuit could be used to drive a comparator

which would signal as alarm or active a control if the rate of change exceeded a pre-set level.

2. Waveform Generators.



Circuit Diagram:

(1) Integrator:

Rf = 100K, R1 = 10K , Cf = 0.1 f

Vo = -1/R1Cf Vi dt.

Fig: 2.1 Integrator circuit

(2) Differentiator:

Rf = 1.5 K, R1 = 150 , C1 = 0.01f, Cf = 0.1 f

Vo = -RfC1 d/dt [Vi]

Fig: 2.2 Differentiator circuit



PROCEDURE:- INTEGRATOR

1. Connect the circuit as shown in the integrator circuit diagram fig:2.1.

2. Apply a bipolar symmetrical square wave of 5V amplitude peak to peak and 1ms

time period (1 KHz).

3. Connect the input and output of the circuit to channel 1 and channel 2 of the CRO

respectively and observe the waveforms.

4. Draw the waveforms along with the levels on a graph.

5. Compare the practical values with theoretical values.

DIFFERENTIATOR

1. Connect the circuit as shown in the differentiator circuit diagram fig: 2.2.

2. Apply a bipolar symmetrical square wave of 5V amplitude peak to peak and 1ms

time period.

3. Connect the input and output of the circuit to channel 1and channel 2 of the CRO

respectively and observe the waveforms.

4. Draw the waveforms along with the levels on a graph.

5. Compare the practical values with theoretical values.

TABULER FORM INTEGRATOR:

Sl.No. input

Waveform

Amplitude

(in volts p-p) &

Frequency

output Waveform

Amplitude

(in volts p-p)

1 Square wave

2, 1KHz Triangular wave 1.89, 1KHz

2 Sinusoidal

wave

2, 1KHz

Cosine wave 2, 1KHz

Table: 2.1 Integrator observations



DIFFERENTIATOR:

Sl.No. input

Waveform

Amplitude

(in volts p-p) &

Frequency

output Waveform

Amplitude

(in volts p-p)

1 Square wave

2, 1KHz Spikes wave 1.89, 1KHz

2 Sinusoidal

wave

2, 1KHz

Cosine wave 2, 1KHz

3 Triangular

wave

2, 1KHz Rectangular wave 1.89, 1KHz

Table: 2.2 Differentiator observations

INTEGRATOR WAVEFORMS:

1) When input signal is a square wave:

Fig: 2.3 Output waveforms of an Integrator when input signal is a square wave

ii) when input is a sine wave:

Fig: 2.4 Output waveforms of an Integrator when input signal is a sine wave



DIFFERENTIATOR WAVEFORMS:

input signal: sinusoidal output signal

Fig: 2.5 Input and output waveforms of an differentiator.

Result: Hence,the working of Integrator and Differentiator are studied and the output waveforms

of Integrator and Differentiator for diffetent input waveforms are observed and plotted.



Viva Questions:

1. Define integrator.

Ans: An integrator is a device to perform the mathematical operation known as integration, a

fundamental operation in calculus. The integration function is often part of engineering and

scientific calculations. Mechanical integrators are used in such applications as metering of water

flow or electric power. Electronic analog integrators were the basis of analog computers

2. Define differentiator. Ans: A Differentiator is a circuit that is designed such that the output of the circuit is

proportional to the time derivative of the input. There are two types of differentiator circuits,

active and passive.

3.What are the limitations of the basic differentiator circuit? At high frequency, a differentiator may become unstable and break in to oscillations.

The input impedance decreases with increase in frequency, thereby making the circuit

sensitive to high frequency noise.

4. In practical op-amps, what is the effect of high frequency on its performance?

Ans: The open-loop gain of op -amp decreases at higher frequencies due to the presence of

parasitic capacitance. The closed-loop gain increases at higher frequencies and leads to instability.

5. What happens when the common terminal of V+ and V- sources is not grounded?

Ans: If the common point of the two supplies is not grounded, twice the supply voltage

will get applied and it may damage the op-amp.

6. Write down the condition for good differentiation?

Ans: For good differentiation, the time period of the input signal must be

greater than or equal to Rf C1 ,T > R f C1 Where, Rf is the feedback resistance

7. What is an IC:

Ans: The term IC refers to complex Electronic circuits consisting of a large number of

components on a single substrate.

8 .What are the advantage of IC:

Ans: Cost reduction,Increased operating speed,Reduced power consumption and Improved

functional performance.

9. What are the different IC technologies:

Ans: Monolithic technology and Hybrid technology



EXPERIMENT: 3

ACTIVE LOW PASS AND HIGH PASS BUTTERWORTH SECOND ORDER FILTERS

AIM: - To design a second order low pass and high pass filters using op-amp 741 IC.

COMPONENTS REQUIRED: -

Bread board - 1

Regulated power supply - 1

CRO - 1

IC 741 - 1

Resistors:

1K - 2 in no.

5.86 K - 1 in no.

10K - 1 in no.

Capacitors: 0.1F - 2 in no.

THEORY:-

Op-Amp Low Pass Filter:

An Op-Amp Low pass filter is shown in Fig 3.1. The circuit allows the low frequency

signals freely through it and attenuates the signals above a cut off frequency called higher cut

off frequency (fH). The inverting terminal is grounded through a resistor R1. A resistor RF is

connected in feedback path. A Resistor R2 is connected between the input signal source and

the non-inverting terminal of the Op-Amp and a Capacitor C2 is connected between the non-

inverting terminal and the output. Capacitor C3 is connected between non inverting terminal

and ground. A load resistor RL is connected at the output.

Let Vi = input voltage

Vg = the voltage at the Non-inverting input

Vo = output voltage.

A = Gain of the Op-Amp = 1+RF /R1

Xc = Capacitive Reactance = 1/jC2



Xc

Vg = Vi R2 + Xc

1/ jC2

Vg =

R + 1/ jC2

But V0 = AVg

= 1/jC2

V0 = [1+Rf / Ri] * 1 / jC2

R2+1 /j C2

But = 2f

1 / jC2 V0 = A

R2+1/ jC2

A

V0 =

1+jf / 2 R2 C2

A

V0 =

1+j2 RC A

V0 =

1+jf / fH

where, fH is the higher cut off frequency of the Low Pass Filter = 1/2 R2C2. Transfer function of Low Pass Filter is given as H (s) = Vo / Vi

A A

H(s) = ; H(s) =

1+ jf/fH 1+ jf/fH



Magnitude is given by 1

Log A ; Vo = A jC2 R2 + 1

H(s) = 20 log 1 +(f / fH)2

Similarly for second order filter,

Magnitude is given by

H(s) = 20 log A 1 + (f/ fH)

4

Op-Amp High pass filter:

An Op-Amp High pass filter is shown in Fig 3.2. The circuit allows the high frequency

signals freely through it and attenuates the signals below a cut off frequency called Lower cut off

frequency (fL). The inverting terminal is grounded through a resistor R1. A resistor RF is

connected in feedback path. A Capacitor C2 is connected between the input signal source and the

non-inverting terminal of the Op-Amp and a Resistor R2 is connected between the non-inverting

terminal and the output. Resistor R3 is connected between the non inverting terminal and ground. Let Vi = input voltage

Vg = Voltage at the Non-inverting input

Vo = output voltage.

A = Gain of the Op-Amp R2

Vg = Vi

R2 + Xc

R2

Vo = A R2 + 1/ jC2

R2

Vo = A R2 + j2fR2 C2



A

Vo =

1- jfL / f

Where fL is the lower cut off frequency of the High Pass Filter = 1/2 R2C2.

Transfer function of High Pass Filter is given as H (s) = Vo / Vi

A A

H(s) = ; H(s) =

1- jf L/ f 1- jfL/f

Magnitude is given by

Log A ;

H(s) = 20 log 1 +(fL / f)2

For second order filter, magnitude is given by,

H(s) = 20 log A

1 + (fL/ f) 4

DESIGNING PART:

Gain = 2 and cut off frequency fH =1 .59 KHz

Gain = 1+Rf /R1, then 1+Rf / R1 = 1.586

Rf / R1 = 0.586

Rf = 0.586 R1

Let R1 =27K then Rf = 15.8 K

And higher cutoff frequency fH = 1 / 2R2 C2 R3 C3 = 1.59KHz.

Let C2 = C3= 0.1 F

For design simplifications set R2 =R3, then R2 =R3 =1K,C2 = C3 = 0.1 F



CIRCUIT DIAGRAM:

Low Pass Filter:

Fig: 3.1 Circuit diagram of a LPF

High Pass Filter:

Fig: 3.2 Circuit diagram of a HPF



PROCEDURE:-

LOW PASS FILTER:

1. Connect the circuit as shown in the Low Pass Filter circuit diagram Fig 3.1. 2. Apply 2V p-p sine wave input to the resistor R2.

3. Keep the input constant and take any 10 readings of output voltage with 10 different

frequencies.

4. Observe the theoretical and practical voltage gains.

5. Draw the graph between voltage gain and frequency.

6. The pass band gain of filter is RF /R1 = 1.569.

Observations of Low Pass Filter:

Input Amplitude = 2Vp-p sinusoidal signal

Table: 3.1 Observations of Low Pass Filter

S.No.

Input frequency

(Hz) Output Amplitude (Vp-p)

Gain

(A=Vo/Vi) 20log (A)

1. 200

2. 400

3. 600

4. 800

5. 1K

6. 1.2 K

7 1.4K

8 1.5K

9 1.6K

10 1.8K

11 2K

12 2.2K

13 2.4K

14 2.6K

15 2.8K

16 3K

17 3.2K



Calculations of Low Pass Filter:

R2 =R3 = 1K, C2=C3=0.1F fH =1 / 2 RC =1/ 2*1K*0.1 =1.56 KHz

HIGH PASS FILTER:

1. Connect the circuit as shown in the High pass filter circuit diagram 3.2. 2. Apply 2V p-p sine wave input to the capacitor C2. 3. Keep the input constant and take any 10 readings of output voltage with 10 different

frequencies.

4. Observe the theoretical and practical voltage gains. 5. Draw the graph between voltage gain and frequency. 6. The pass band gain of the filter RF /R1 =1.564.

Observations of High Pass Filter: Input Amplitude = 2Vp-p sinusoidal signal

Table: 3.2 Observations of High Pass Filter

S.No. Input frequency

(KHz)

Output Amplitude

(Vp-p) Gain (A=Vo/Vi) 20log (A)

1. 0.5 2

1

2. 1 2

3

3. 2 2

3.9

4. 5 2

3.9

5. 7 2

3.9

6. 9 2

3.9

7 10 2

3.1

8 20 2

2.5

9 50 2

1.8

10 90 2 1.4

11 100

12 120



Calculations of High Pass Filter:

R2 =R3 = 1K, C1=C2=0.1F fL =1 / 2 RC =1/ 2*1K*0.1*10

-3 =1.56 KHz

Output wave forms (LPF):

Gain in db

Frequency in Hz

Fig: 3.3 Frequency response of a second order LPF

Output wave forms (HPF):

Fig: 3.4 Frequency response of a second order HPF



RESULT:-

Hence, a second order high pass and low pass filters response for the given specification is

observed and the values are tabulated and the frequency response is plotted.



Viva Questions:

1. Define an electrical filter.

Ans: Filter is an electrical circuit which separates the two signals.

2. Classify filters.

Ans: Four types of filters

1. low pass filter

2. high pass filter

3. band pass filter

4. band stop filter

3. Discuss the disadvantage of passive filters.

Ans: Very poor frequency response.

4. Why we preferred active filters?

Ans: Accuracy more, high gain, better frequency and with different Q values.

5. Define pass band and stop band of a filter?

Ans: The pass band filter allows only the particular pass band frequency

only. Stop band filter stop only the particular band frequency only.

6. Give some notes on first order filter.

Ans: The first order filter has less frequency response and not proper corner frequency to

the ideal filter.

7. Discuss the differences between Butterworth and Chebyshev filters?

Ans: The Butterworth filter has flat frequency response in pass band where as

Chebyshev filter has ripples in the pass band.

8. Give high cutoff frequency formula for the low pass filter? Ans: Fh = 1/ 2 RC.

9. What is the difference between analog filter and digital filter?

Ans: The analog filter has less performance whereas digital filters have god

performances.

10. Give low cutoff frequency formula for the high pass filter? Ans: FL = 1/ 2 RC.



EXPERIMENT: 4

RC PHASE SHIFT AND WIEN BRIDGE OSCILLATORS USING IC 741 OP-AMP

AIM: -

1) To design and construct a Wien bridge oscillator and RC Phase shift oscillator using

operational amplifier IC 741.

2) To measure the frequency of oscillation and to compare it to that of theoretical value.

APPARATUS:

RPS (0-30 V) 1 in no.

CRO (20 MHz) 1 in no.

IC 741 1

Resistors :- 470 K - 1 in no., 10K 2 in no., 1 K - 3 in no., 1.5 K- 2 in no.,

20 K - 1 in no.

Capacitors - 0.01F 3 in no.

Connecting wires and probes

THEORY:

RC Phase shift oscillator:-

The circuit diagram for a Phase shift oscillator using an OP-AMP IC-741 is shown in

fig 4.1. The Barkhausen criteria specifying a required 360o phase shift from input to output and a

total gain of one must be adhered to in the design of a phase shift oscillator. In the inverting Op

Amp provides a phase shift of 1800. The RC network must provide an additional 180

0 for a total

phase shift of zero degrees. Each section provides approximately 600 of this requirement. The

filter portion consisting of the RC network introduces an attenuation that the op-amp must match

in gain in order to achieve an overall gain of one.

By using OP-AMP low frequency signals of frequency around 1 KHz can be achieved.

The frequency of oscillations is given by, R = Ladder network resistor.

C = Ladder network capacitor.



The minimum gain required of the op-amp so that it sustains oscillations is 29. Keeping the gain

as close to 29 as possible will prevent the peaks of the waveform from being driven into the non-

linear region. This will minimize clipping of the sinusoidal output.

The gain of the OP-AMP when loop gain AV =1 should be at least 29.

i.e., AV 29, for this choose Rf 29 R1 .

Wien bridge oscillator:-

The circuit diagram for a Wein Bridge oscillator using an OP-AMP IC-741 is shown in

fig 4.2. The feedback signal from circuit is connected to the non-inverting terminal of the OP-

AMP. A bridge is formed by four arms in which a series RC network in one arm and a parallel

RC network in adjoining arm and the remaining two arms consisting of R1 and RF of the OP-A

MP. The frequency of oscillations is given by,

fo = 1/ (2 RC)

The gain of the Op Amp when loop gain AV = 1 should be atleast 3 i.e., AV 3, (Rf 2 R1).



R1 = R2 = R and C1= C2 = C, we get it as f = 1/ 2RC



ADVANTAGES OF WEIN-BRIDGE OSCILLATOR

(1) Overall gain is high seems two stage amplifier is used.

(2) The Circuit is a very good sine wave output.

(3) Frequency stability is good and can be vary over a wide range.

4. DISADVANTAGE OF WEIN-BRIDGE OSCILLATOR

(1) Large number of component required to design 2 stage amplifiers.

(2) Very high frequency cannot be generated.



CIRCUIT DIAGRAMS:

(1) RC Phase shift oscillator:-

Fig 4. 1. RC phase shift oscillator

Design :

Rf = 470 K, R=1 K, C=0.01f, R1=10 K , Rcomp = 10 k

The frequency of sustained oscillations generated depends on the value of R & C and is given by,

Frequency is measured in Hz.

Therefore, Rf 29 R1



For oscillations to occur, the gain of the Op Amp must be equal to or greater than 29, which can

be adjusted using the resistances Rf & R1.

Theoritically,

= 1

2*(1*103) (0.1*10-6) 6

= 649 Hz

Practical Values:

A = 4.2*5V = 21 V

T = 1.6* 1m sec



F = 625 Hz




R1=R2=1.5K , C1=C2=0.01f, R3=20K , R4=10K

Fig 4.2. Wien bridge oscillator

The above circuit (Fig. 1.2 ) can be redrawn as shown below: (Lead lag circuit)

Fig 4. 3. Equivalent circuit of a Wien bridge oscillator



Design:

Theoretically:

f = 1/ 2RC

= 1 / ( 2*1.5*103*0.01*10-6)

=10.6 KHz.

Practically:

A = 1.6*10V = 16V

T = 2*50 sec

F = 1/ T = 10 KHz

PROCEDURE:

RC Phase shift oscillator:-

1. Construct the Phase shift oscillator as shown in the circuit diagram fig 4.1.

2. Also connect the Power supply of +12V & -12 V to Op Amp and CRO at the output.

3. Observe the output waveform on CRO taken at pin no.6 of the OP-AMP.

4. Calculate the frequency and amplitude of the waveform; draw the waveform on graph

sheet.




1. Construct the Wien Bridge oscillator as shown in the circuit diagram fig 4.2.

2. Also connect the Power supply of +12V & -12 V to Op Amp and CRO at the circuit.

3. Observe the output waveform on CRO taken at pin no.6 of the OP-AMP.

4. Calculate the frequency and amplitude of the waveform; draw the waveform on graph

sheet.

EXPECTED WAVEFORM: Fig: 4.4 Output waveform of the oscillator RESULT:-

Hence, the design of RC phase shift and Wien bridge oscillator is studied and the output

waveforms are observed and plotted.



Viva Questions:

1. Classify the oscillators.

Ans:Oscillator are two types 1) RC oscillator 2) LC oscillator

2. In what way is IC 741S better than IC 741?

Ans: IC741S is a military grade of amplifier and has higher slew rate and lower temperature

than IC 741.

3. In phase shift oscillator what phase shift does the op - amp provide?

Ans: 180 0

4. What phase shift is provided by the feedback network in phase shift oscillator?

Ans: 180 0

5. Write down the frequency oscillations formula for the phase shift

oscillator. Ans:

6. What is the relation between RF and R1 in op -amp phase shift oscillator?

Ans: RF provides positive feedback path and R1 provides the high input impedances hence

both the resistor are important to sustained oscillations.

7. Define oscillator?

Ans: An electronic circuit that converts energy from a direct-current source to a periodically

varying electric output.

8. In what mode op - amp is used in phase shift oscillator?

Ans: non-inverting mode.



9. What is the purpose of Phase Shift Network in a Wein Bridge Oscillator?

Ans : A Wien bridge oscillator produces sine waves. In order for the sine waves to maintain

steady amplitude, a positive feedback system is used with some sort of control to limit gain. In

order for the positive feedback system to work, the waves being "fed back" to the amplifier

have to be in phase with the waves being generated. Thus, you need a phase shift network to

ensure that the phases of the waves match, which in the case of a positive feedback system

means that the generated waves need to go through a 360o phase shift during the feedback

process.



EXPERIMENT 5

IC 555 TIMER IN MONOSTABLE OPERATION

AIM: To design and study the operation of a Monostable Multivibrator using 555 timer.

APPARATUS: -

Bread board

CRO (20 MHz) 1 in No .

IC 555 -1 in No.

Resistors - 100K - 1 in No., 1.8K -in No., 1 K - 2 in No.

Capacitors - 0.1F -1 in No., 0.01F 1 in No.

RPS THEORY:-

IC 555 Timer

IC-555 Timer is an integrated circuit used in a multitude of precise timing and

waveform generation applications. An IC-555 Timer is a versatile Monolithic timing circuit

that can produce accurate and highly stable time delays or oscillations. It can be used as an

Astable and Monostable multivibrators or one shot. It is available as an 8- pin mini DIP-package. The one shot receives an appropriate trigger signal and outputs a single pulse whose duration is set by the selection of an external resistor and capacitor.



Fig: 5. 2 pin diagram of 555 Timer



Fig: 5.3 Functional diagram of 555 Timer



Monostable multivibrator operation:-

Monostable Multivibrator has only one stable state. We can change the stable state by applying

a trigger pulse.

Fig 5.4: Monostable Multivibrator Functional Circuit diagram



Summary:

Widely used as a monostable or astable multivibrator.

Output voltage is approximately 2 V < VCC.

Output can typically sink or source 200 mA.

Max. output frequency is about 10 kHz. fo varies somewhat with VCC.

Threshold input (pin 6) and trigger input (pin 2) are normally tied together to external timing RC.

The 555 Timer is a highly stable & inexpensive device for generating accurate time delay

or oscillation.

It can provide time delays ranging from microseconds to hours.

It can be used with power supply voltage ranging from +5V to +18V.

It is compatible with both TTL & CMOS logic circuits.

It has very high temperature stability & it is designed to operate in the temperature

range -55o to +125

oC(SE 555), whereas NE555 is a commercial grade IC (0 - 70

oC).

Uses /Applications of Monostable Multivibrator:

1. The falling part of the output pulse from MMV is often used to trigger another pulse

generator circuit thus producing a pulse delayed by a time T with respect to the input

pulse.

2. MMV is used for regenerating old and worn out pulses. Various pulses used in

computers and telecommunication systems become somewhat distorted during use. An

MMV can be used to generate new, clean and sharp pulses from these distorted and

used ones.

3. 3. Frequency divider.

4. Pulse width Modulation (PWM).

5. Pulse Position Modulation (PPM)

6. Linear Ramp Generator



Circuit Diagram:

Fig:5. 5 Triggering Circuit

Fig 5.6 Monostable multivibrators



Designing part:-

Theoritical:

Here, T=1ms,

Let C1=0.1 F, R1=100K then

T = 1.1R1C1=1.1*(100 *103*0.01 *10

-6) = 1ms

Practically:

T = 2.2*0.5 at 0.95 KHz

= 1.1 msec

A = 3.8 V at triggering circuit

= 2.6 V

T =2*0.5 msec = 1 msec

PROCEDURE:-

Monostable multivibrator:-

1. Design the Monostable multivibrator circuit with the pulse width of T1= 1.1R1C1.

2. Connect the circuit as shown in the circuit diagram fig 5.5 and observe a square

waveform on the CRO as shown in fig 5.7

3. Apply the trigger to pin 2 i.e., output of circuit 5.5 to Fig 5.6

4. Observe the output waveform on the CRO as shown in fig 5.8.

5. Note down the time period and compare the theoretical and practical time periods.



MODEL WAVEFORMS:-

Monostable multivibrator:-

Fig 5.7 Trigger input

Fig 5.8 Capacitor and monostable output

RESULT:-

Hence, the monostable multivibrator using 555 Timer is studied and the output

waveforms are plotted.



Viva Questions:-

1. Draw the functional block diagram of a 555 timer.

2. What are the modes of operation of timer?

Ans: three modes of operations of timer:

1) Mono Stable Multivibrator

2) Astable Multivibrator

3) Bistable Multivibrator.

3. Define duty cycle. Ans: A duty cycle is the time that an entity spends in an active state as a fraction of the

total time under consideration

4.What are the applications of 555 timers in astable mode?

Ans: symmetrical wave generator.



5. Draw the pin diagram of 555 timers?

Ans:

6. Explain the function of reset? Ans: This pin is used to make the OUTPUT PIN (Pin 3) LOW. The reset pin must go below 0.7

volt and it needs 0.1mA to reset the chip. The RESET PIN is an overriding function. It will force

the OUTPUT PIN to go LOW regardless of the state of the TRIGGER PIN (Pin 2). It can be used

to terminate an output pulse prematurely, to gate oscillations from "on" to "off." The pin is active

when a voltage level between 0v and 0.4 volt is applied to it. When not used, it is recommended

that the RESET PIN be tied to the positive rail to avoid the possibility of false resetting.

7. What are the applications of 555 timers in monostable mode? Ans: Missing pulse detector, frequency divider, pulse width modulation.

8. What is the expression of %duty cycle in monostable

mode?

Ans: %

9. Explain capacitor output waveform in monostable mode? Ans: the capacitor gets charged upto maximum value of in given signal whenever the input

changes suddenly from high to low level the capacitor slowly decrease, again for second

pulse input the capacitor charges from that value to the maximum value i.e 2/3 Vcc.

10. Write down the expression for output pulse width in monostable mode?

Ans: T = 1.1R1C1



Experiment: 6

SCHMITT TRIGGER CIRCUIT USING IC 741 & IC 555

AIM: - 1. To Design and construct a Schmitt trigger circuit using IC 741 and IC 555.

2. Verify the output wave forms.

3. Measure the UTP and LTP values.

APPARATUS:

Regulated power supply - 1 in No.

Function generator 1 in No.

CRO - 1 in No.

IC 741 1 in No.

IC 555 1 in No.

Resistors: 1K 2 in No., 10K - 1 No., 100K - 2 in No.

Capacitor 0.01F 2 in No.

THEORY:

Inverting Schmitt Trigger:

Fig 6.1 Schmitt Trigger using op amp 741

When a positive feedback is added to an ideal comparator then the circuit acts as

a Schmitt Trigger. The input voltage is applied at the inverting (-ve ) terminal. The inverting

mode produces opposite polarity output. This is feedback to the non-inverting (+ ve) terminal of

op-amp which is of same polarity as that of the output.

ica lab manual.pdf

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