hybridpack 1
TRANSCRIPT
System Engineer ing
Appl icat ion Note V2.0, 2010-04
Hybr id Ki t for Hybr idPACK™1
Evaluat ion Ki t for Appl icat ions wi th Hybr idPACK™1 Module
Hybr idPACK™
Edition 2010-04Published byInfineon Technologies AG81726 Munich, Germany© 2010 Infineon Technologies AGAll Rights Reserved.
Legal DisclaimerThe information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.
InformationFor further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).
WarningsDue to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Application Note 3 V2.0, 2010-04
Trademarks of Infineon Technologies AGA-GOLD™, BlueMoon™, COMNEON™, CONVERGATE™, COSIC™, C166™, CROSSAVE™, CanPAK™,CIPOS™, CoolMOS™, CoolSET™, CONVERPATH™, CORECONTROL™, DAVE™, DUALFALC™, DUSLIC™,EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, E-GOLD™, EiceDRIVER™,EUPEC™, ELIC™, EPIC™, FALC™, FCOS™, FLEXISLIC™, GEMINAX™, GOLDMOS™, HITFET™,HybridPACK™, INCA™, ISAC™, ISOFACE™, IsoPACK™, IWORX™, M-GOLD™, MIPAQ™, ModSTACK™,MUSLIC™, my-d™, NovalithIC™, OCTALFALC™, OCTAT™, OmniTune™, OmniVia™, OptiMOS™,OPTIVERSE™, ORIGA™, PROFET™, PRO-SIL™, PrimePACK™, QUADFALC™, RASIC™, ReverSave™,SatRIC™, SCEPTRE™, SCOUT™, S-GOLD™, SensoNor™, SEROCCO™, SICOFI™, SIEGET™,SINDRION™, SLIC™, SMARTi™, SmartLEWIS™, SMINT™, SOCRATES™, TEMPFET™, thinQ!™,TrueNTRY™, TriCore™, TRENCHSTOP™, VINAX™, VINETIC™, VIONTIC™, WildPass™, X-GOLD™, XMM™,X-PMU™, XPOSYS™, XWAY™.
Other TrademarksAMBA™, ARM™, MULTI-ICE™, PRIMECELL™, REALVIEW™, THUMB™ of ARM Limited, UK. AUTOSAR™ islicensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum.COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ ofEpcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium.HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ ofInfrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION.MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ ofMentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc.,USA. muRata™ of MURATA MANUFACTURING CO. OmniVision™ of OmniVision Technologies, Inc.Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ ofSirius Sattelite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™,PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™,WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.Last Trademarks Update 2009-10-19
Hybrid Kit for HybridPACK™1 Revision History: 2010-04, V2.0Previous Revision: V1.1Page Subjects (major changes since last revision)All Many editorial changes due to next generation Hybrid Kit for HybridPACK™1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Table of Contents
Application Note 4 V2.0, 2010-04
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.1 How to Order Hybrid Kit for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.2 Support for Hybrid Kit for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.1 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.2 Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.3 Key Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.3.1 Driver Board (6ED100HP1-FA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.3.2 Logic Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.3.3 HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.3.4 DC-Link Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.3.5 Cooling Element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3 Evaluation Driver Board for the HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.1 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.2 Key Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.3 External Connector Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.4 Mechanical Dimensions of the Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.5 Operation of the Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.5.1 Switching Mode Power Supply (SMPS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.2 Input Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.3 IGBT Switch-off Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.4 Maximum Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.5.5 Booster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.5.6 Short Circuit Protection and Clamp Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.5.7 Fault Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253.5.8 Temperature Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263.5.9 DC Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273.6 Switching Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.7 Definition of Layers of Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.8 Schematics, Layout and Bill of Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293.8.1 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293.8.2 Assembly Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.8.3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353.8.4 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4 Logic Board for Hybrid Kit for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424.1 External Connector (X1-SIG1) Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424.2 Connector to the Driver Board (K1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.3 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.4 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.4.1 Configuration of TC1767 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.4.1.1 Boot Configuration of TC1767 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464.4.1.2 Selecting Serial/Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464.5 Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table of Contents
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Table of Contents
Application Note 5 V2.0, 2010-04
4.6 Phase Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474.7 Temperature Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474.8 Resolver Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474.9 Encoder Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.10 Hall Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.11 GMR Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.11.1 GMR SSC Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494.11.2 GMR Encoder Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504.11.3 GMR Hall Sensor Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504.12 Definition of Layers for the Logic Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504.13 Schematics, Layout and Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514.13.1 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514.13.2 Assembly Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594.13.3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 604.13.4 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
List of Figures
Application Note 6 V2.0, 2010-04
Figure 1 The Hybrid Kit for HybridPACK™1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 2 Serial number in the suitcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 3 Block Diagram of Hybrid Kit for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 4 Dimensions of the Hybrid Kit for HybridPACK™1 - front view (all dimensions are in mm). . . . . . . 12Figure 5 Dimensions of the Hybrid Kit for HybridPACK™1 - side view (all dimensions are in mm) . . . . . . . 12Figure 6 HybridPACK™1 IGBT Six-Pack Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 7 DC-Link Capacitor for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 8 Technical drawing of the DC-Link Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 9 Example of Water Cooling Element for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Figure 10 Water Cooling System Technical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Figure 11 Driver Board Mounted on the Top of the HybridPACK™1 Module. . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 12 External Connector on the Driver Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 13 Dimensions of the Driver Board (in mm). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 14 PCB Mounting Stand-offs of HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 15 Hybrid Kit for the HybridPACK™1 Evaluation Driver Board Block Diagram. . . . . . . . . . . . . . . . . . 20Figure 16 Schematic of the Input Logic Block of the Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Figure 17 Maximal Switch-off Current at Different DC-Link Voltages (Gate Resistance as a Parameter) . . . 22Figure 18 Temperature of Gate Resistors vs. Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Figure 19 Desaturation Protection and Active Clamping Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Figure 20 a) Short Circuit without Active Clamp (DC Voltage=71V, Voltage Overshoot=612V)
b) With Active Clamp Function (DC Voltage=280V, Voltage Overshoot=596V) 25Figure 21 Fault Output of a Single Driver IC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Figure 22 Fault Output During: a) Normal Operation b) Operation under Short Circuit . . . . . . . . . . . . . . . . . 26Figure 23 Characteristics of the Temperature Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Figure 24 Characteristics of the DC Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Figure 25 Copper and Isolation for Layers of Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Figure 26 Schematics Block Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Figure 27 SMPS - Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Figure 28 External Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Figure 29 Fault Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 30 Input Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 31 IGBT Driver - Bottom Transistor of Phase U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Figure 32 IGBT Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Figure 33 DC Voltage & Temperature Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Figure 34 Assembly Drawing of the Driver Board (Top) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Figure 35 Assembly Drawing of the Driver Board (Bottom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Figure 36 Driver Board - Top Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Figure 37 Driver Board - Layer-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Figure 38 Driver Board - Layer-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Figure 39 Driver Board - Layer-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Figure 40 Driver Board - Layer-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Figure 41 Driver Board - Bottom Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Figure 42 Logic Board for Hybrid Kit for the HybridPACK™1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 43 Block Diagram of the Logic Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 44 External Connector Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Figure 45 Overvoltage and Wrong Polarity Protection Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Figure 46 HW Boot Configuration of TC1767 DIP-Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Figure 47 The Boot Configuration Switch (SW1) and Serial/Parallel Interface Select Switch (SW2) . . . . . . . 47Figure 48 GMR SSC Interface - Proposal Using TLE5012. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
List of Figures
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
List of Figures
Application Note 7 V2.0, 2010-04
Figure 49 Picture of Possible Physical Implementation of the GMR Sensor . . . . . . . . . . . . . . . . . . . . . . . . . 49Figure 50 Definition of the Layers for the Logic Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50Figure 51 Schematics Block Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Figure 52 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Figure 53 JTAG Debug Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Figure 54 Connector (external) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Figure 55 Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Figure 56 Resolver Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Figure 57 Level Shifter for Adapting Logic Levels for Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Figure 58 Level Shifter for Adapting Logic Levels for Resolver IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Figure 59 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Figure 60 Input Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Figure 61 Microcontroller TC1767 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Figure 62 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Figure 63 GMR SSC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Figure 64 Temperature Sense of the Logic Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Figure 65 Connector to the Driver Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Figure 66 Assembly Drawing of the Logic Board (Top) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Figure 67 Assembly Drawing of the Logic Board (Bottom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Figure 68 Logic Board - Top Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Figure 69 Logic Board - Layer-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Figure 70 Logic Board - Layer-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Figure 71 Logic Board - Layer-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Figure 72 Logic Board - Layer-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Figure 73 Logic Board - Bottom Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
List of Tables
Application Note 8 V2.0, 2010-04
Table 1 Key Data of DC-Link Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Table 2 Key Data and Characteristic Values (Typical Values) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Table 3 Bill of Materials for Hybrid Kit for the HybridPACK™1 Evaluation Driver Board . . . . . . . . . . . . . . 39Table 4 External Connector Pin Assignment Logic Board v1.3b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Table 5 User Startup Modes for TC1767 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Table 6 Selecting Serial/Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Table 7 Bill of Materials for Logic Board for Hybrid Kit for HybridPACK™1 . . . . . . . . . . . . . . . . . . . . . . . . 64
List of Tables
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Introduction
Application Note 9 V2.0, 2010-04
1 IntroductionThe Hybrid Kit for HybridPACK™1 shown in Figure 1 was developed to support customers during their first stepsin designing applications with HybridPACK™1 IGBT module. The following chapters provide a detailed descriptionof the main components and their functionality. This information is intended to enable the customers to copy,modify and qualify the design for production, according to their specific requirements.The boards Hybrid Kit for HybridPACK™1 Evaluation Driver Board (further refered as “Driver Board” ) andHybrid Kit for HybridPACK™1 Logic Board (further refered as “Logic Board”) provided by InfineonTechnologies are subjected to functional testing only.Due to their purpose the system is not subjected to the same procedures regarding Returned Material Analysis(RMA), Process Change Notification (PCN) and Product Withdraw (PWD) as regular products.See Legal Disclaimer and Warnings for further restrictions on Infineons warranty and liability.
1.1 How to Order Hybrid Kit for HybridPACK™1Hybrid Kit for HybridPACK™1 and Hybrid Kit for HybridPACK™1 Evaluation Driver Board (that can beordered separately) have Infineon Technologies SAP numbers and can be ordered via Infineon Sales Partners.• SAP ordering number for Hybrid Kit for HybridPACK™1 : SP000806996Information can also be found at the Infineon Technologies web page: www.infineon.com
Figure 1 The Hybrid Kit for HybridPACK™1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Introduction
Application Note 10 V2.0, 2010-04
1.2 Support for Hybrid Kit for HybridPACK™1The new Hybrid Kits for HybridPACK™1 are labeled with a serial number inside the suitcase. That providesbetter support for you and a better issue tracking for us. If you need any support with the hardware or software justlet us known your issue and your serial number and we will try to help you as best we can. Where you can find theserial number inside the suitcase is shown on Figure 2.
Figure 2 Serial number in the suitcase
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 11 V2.0, 2010-04
2 Design FeaturesThe Hybrid Kit for HybridPACK™1 is made up of two PCBs (Driver Board and Logic Board) mechanically andelectrically suitable to be used with an IGBT Module HybridPACK™1 (included), a DC-link capacitor and a cooler.All these components build a complete main inverter for (H)EV applications up to 20kW.
Figure 3 Block Diagram of Hybrid Kit for HybridPACK™1
Figure 3 show the complete block diagram for the system and the following sections provide an overview of thesingle components including main features, key data, pin assignments and mechanical dimensions.
2.1 Main FeaturesComplete main inverter for (H)EV applications up to 20kW.• Automotive qualified IGBT module HybridPACK™1
– 650V/400A IGBT & Diode chip set• Automotive qualified Driver IC 1ED020I12-FA
– Based on coreless transformer technology– Up to 1200 V and 2A driving capability– VCE sat - detection
• TriCore™ family 32-bit microcontroller TC1767: member of the AUDO FUTURE product family designed for automotive applications
• Possibility of different motor position interfaces: encoder, resolver and GMR (Giant Magneto resistance))
IGBT module HybridPACK™1
6ED100HP1-FA Driver Board
IGBT driver 1ED020I12-FA
SMPS
Logic
IGBT temp mesurement
DC-voltage measurement
(isolated)
PWM
TempIGBT
FAULTSignals
RST
Vdc meas.
Logic Board
Supply
Connector
Supply
Debug Connector
MicrocontrollerTC1767
Resolver interface
Encoder / Sensor
Resolver
A/D IO
CAN / RS232
I, U, V currentmeasurement
EEPROM
Supply
Watchdog
LevelShifter
Vdc, Temp
Sensor
IGBT driver 1ED020I12-FA
IGBT driver 1ED020I12-FA
IGBT driver 1ED020I12-FA
IGBT driver 1ED020I12-FA
IGBT driver 1ED020I12-FA
ResolverEncoder
RS232CAN
Current W
Current V
Current U
Co
nn
ec
to
r
Co
nn
ec
to
r
Motor3~
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 12 V2.0, 2010-04
2.2 DimensionsFigure 4 and Figure 5 shows the dimensions of a complete Hybrid Kit for HybridPACK™1.
Figure 4 Dimensions of the Hybrid Kit for HybridPACK™1 - front view (all dimensions are in mm)
Figure 5 Dimensions of the Hybrid Kit for HybridPACK™1 - side view (all dimensions are in mm)
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 13 V2.0, 2010-04
2.3 Key ComponentsFor detailed technical information about the different components please refer to the different web pages on theInfineon Internet.
2.3.1 Driver Board (6ED100HP1-FA)The 6ED100HP1-FA is a six channel IGBT driver board, specially designed for the HybridPACK™1 IGBT module.The main features and a detailed description of the board, including schematics and layout, can be found inChapter 3.
2.3.2 Logic BoardThe Logic Board contains all necessary components for the control of the system. Furthermore it offers theconnections to the motor positioning system (encoder, resolver or GMR) and to the current measurement system.For a detailed description of the board please refer to Chapter 3.
2.3.3 HybridPACK™1(see Figure 6) is a power module designed for mild Hybrid Electrical Vehicle (HEV) applicationswith a maximumsupply voltage of 450 V and a power range up to 20kW. Designed for a junction operation temperature at 175°C,the module accommodates a six-pack configuration of 3rd generation Trench-Field-Stop IGBT and matchingemitter controlled diodes and is rated up to 400A/650V. It is based on Infineon Technologies leadingTRENCHSTOP™ IGBT Technology, which offers lowest conduction and switching losses.
HybridPACK™1 is a baseplate module and can be screwed directly to a water- or air-cooled heat sink. For acompact inverter design the driver stage PCB can easily be soldered on top of the module. All power connectionsare realized with screw terminals. For detailed technical information of the module refer to the datasheet.
Figure 6 HybridPACK™1 IGBT Six-Pack Module
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 14 V2.0, 2010-04
2.3.4 DC-Link CapacitorThe power electronic capacitor B25655J4307K from the company Epcos AG (see Figure 7) is stronglyrecommended (included). Table 1 shows the main features of the capacitor. For dimensions of the DC-LinkCapacitor have a look on Figure 8. Please refer to the Epcos datasheet for further details.
Figure 7 DC-Link Capacitor for HybridPACK™1
Table 1 Key Data of DC-Link CapacitorCharacteristics Maximum ratings Test DataCR 300 µF ±10% Vs 600 V VTT 675V DC, 10 sVR 450 V DC î 1.2 kA Rins ·C ≥ 10000 sWR 30 Ws Is 4.8 kA tan δ (50 Hz) ≤ 8 · 10-4
Imax 80 A (dV/dt)max 4 V/µsLself 25 nH (dV/dt)s 16 V/µstan δ0 2 · 10-4
Rs 0.8 mΩ
Climatic Category 0/110/21(IEC 68-1/2)
Design Data Mean Life Expentancy
Tmin - 40 °C Dimensions l × w × h 140 × 72 × 50 mm tLD 15000hTmax + 110 °C Approx. weight 750 g αFQ 300fitMax. Rel. Humidity ≤ 95% Impregnation Resin FilledTstg - 45 … +110°C Terminals Flat Copper
Clearance 9 mmValues after Test Ca, IEC 68-2 (21 days, 40°C, 93% rel. humidity)
Creepage distance 9 mm
ΔC/C ≤ 5% Plastic CaseΔtanδ ≤ 4 ·10-4
Rins ·C ≥ 3000s
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 15 V2.0, 2010-04
Figure 8 Technical drawing of the DC-Link Capacitor
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Design Features
Application Note 16 V2.0, 2010-04
2.3.5 Cooling ElementFor applications requiring higher power or higher operation temperature a usage of cooling element isrecommended. Figure 9 shows the low cost water cooling system that is included in the Hybrid Kit forHybridPACK™1 which is screwed directly to HybridPACK™1 - Figure 10 shows the technical drawings of it. Aheat sink for air cooling is also a possible solution, but it will be larger than this water heat sink.
Figure 9 Example of Water Cooling Element for HybridPACK™1
Figure 10 Water Cooling System Technical Drawings
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 17 V2.0, 2010-04
3 Evaluation Driver Board for the HybridPACK™1
Figure 11 Driver Board Mounted on the Top of the HybridPACK™1 Module
3.1 Main FeaturesThe Hybrid Kit for HybridPACK™1 Evaluation Driver Board offers the following features:• Six channel IGBT driver• Electrically and mechanically suitable for 600 V IGBT Module HybridPACK™1• Includes DC/DC power supply• Isolated voltage measurement• Short circuit protection with toff < 6 µs• Under Voltage Lockout of IGBT driver IC• Positive logic with 5 V CMOS level for PWM and Fault signals• One fault signal for each driver (LED signaling) and their combination for each leg• Design according to IEC-60664-1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 18 V2.0, 2010-04
3.2 Key DataAll values given in the Table 2 (bellow) are typical values, measured at TA = 25 °C
3.3 External Connector Pin AssignmentFigure 12 shows the pin assignment for the external connector (K1) on the Driver Board. The connector is aMMS-112-01-L-DV from Samtec, proper matching parts are the TW series for PCB connection or the TCMD seriesfor cable connection. It includes all necessary signals to get the board into operation, that is, supply, control andmonitoring.
Table 2 Key Data and Characteristic Values (Typical Values)Parameter Value UnitVSUPPLY – Voltage Supply +[8..18] VVPWM – PWM Signals for Top and Bottom IGBT (Active High) 0 / +5 VVFAULT – /FAULT Detection Output (Active Low) 0 / +5 VIFAULT – Max. /FAULT Detection Output Load Current 10 mAVRST – /RST Input (Active Low) 0 / +5 VISUPPLY – Supply Current Consumption (Idle Mode) (VSUPPLY=12V) 260 mAVOUT – Drive Voltage Level 15/-8 VIG – Maximum Peak Output Current ±10 APDC/DC – Maximum DC/DC Output Power of SMPS unit 30 WfS – Maximum PWM Signal Frequency 1)
1) The max. switching frequency for the HybridPACK™1module should be calculated separately. Limiting factors are: max. DC/DC output power of 4.6W per channel and max. PCB board temperature measured around gate resistors of 75°C for used FR4 material. For detailed information see Chapter 3.5.3
20 kHztPDELAY – Propagation Delay Time 200 nstPDISTO – Input to Output Propagation Distortion 15 nstMININ – Minimum Pulse Suppression for Turn-on and Turn-off2)
2) Minimum value tMININ given in 1ED020I12-FA IGBT driver datasheet
30 nsVDESAT – Desaturation Reference Level 9 Vdmax – Maximum Duty Cycle 100 %VCES – Maximum Collector – Emitter Voltage on IGBT 600 VTOP – Operating Temperature (Design Target)3)
3) Maximum ambient temperature strictly depends on load and cooling conditions
-40…+125 °CTSTO – Storage Temperature (Design Target) -40…+125 °CVIORM – Maximum Repetitive Insulation Voltage 4) (1ED020I12-FA Driver IC)
4) 1ED020I12-FA datasheet - complies with DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01.Basic Insulation
1420 VPEAKVISODRIVER – Maximum Insulation Test Voltage5) (1ED020I12-FA Driver IC)
5) 1ED020I12-FA datasheet - complies with UL 1577
4500 VrmsVISOBOARD – Maximum Insulation Test Voltage (Evaluation Board) 2500 Vrms
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 19 V2.0, 2010-04
Figure 12 External Connector on the Driver Board
Pins 1 to 6 provide the power supply. The Driver Board must be supplied with an external regulated DC powersupply. The input voltage must be kept between 8 V and 18 V and the current consumption will depend on differentfactors (Logic Board, PWM frequency, etc.). Pins 7-8 provide 5 V analogue power supply which can be used tosupply different devices in case of using the Hybrid Kit for HybridPACK™1 as driver board in an inverter such ascurrent measurement, ADC or the motor interface.To pins 9, 10, 15 and 19 are connected monitoring signals: DC-link voltage measurement and temperature of thethree different phases inside of the IGBT module.Pins 12, 13, 14, 16, 17, 18, 20, 21, 22 and 23 contain the logic signals for controlling the 6 drivers on the board,that are the PWM signals, Fault detection and Reset signal.
3.4 Mechanical Dimensions of the Driver BoardThe Driver Board has placed components on both sides of the PCB. The maximum height of the Parts and thedimensions of the PCB is shown in Figure 13
Figure 13 Dimensions of the Driver Board (in mm)
RST _INnFLT Wn
FLT UnFLT n
PWM VB
PWM WTPWM WB
PWM UTPWM UB
12V
GND_DIG
T EM P_IGBTVDC
K1
M MS-112-01-L-DV
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
GND_DIGGND_DIG
PWM VTFLT Vn
VANA50+5.0V
GND_ANA1
12V
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 20 V2.0, 2010-04
The Driver Boards should be fastened by self taping screws and soldered to the auxiliary connectors on top of theIGBT module. The contact joints (solder points) between PCB and module auxiliary contacts should bemechanically relieved in order to disburden the solder connection as far as possible. Relieve of the contact pointsis carried out by mounting the PCB directly onto the module at the ten mounting stand-offs (see Figure 14) usingself-tapping screws (thread forming with 2.5mm diameter) or similar assembly material. The screws should bemounted in the sequence showed in Figure 14.
Figure 14 PCB Mounting Stand-offs of HybridPACK™1
3.5 Operation of the Driver BoardFigure 15 shows the block structure of the Driver Board. The following chapter describes these blocks in detail.
Figure 15 Hybrid Kit for the HybridPACK™1 Evaluation Driver Board Block Diagram
IGBT Driver
UT
IGBT Driver
UB
IGBT Driver
VT
IGBT Driver
VB
IGBT Driver
WT
IGBT Driver WB
SMPS 15V/-8V
15V/-8V15V/-8V
15V/-8V (x3)
5V5V 5V 5V
5V 5V 5V
Connector
LOGIC FAULT UFAULT V
FAULT W
RESET
FAULT W
FAU
LT VFAU
LT UFAU
LTR
ES
ET
INPUTLOGIC(PWM)
DC LINK VOLTAGE MEASUREMENT
IGBT MODULTEMP
IGBT MODUL TEMPERATURE
12V
DC LINKVOLTAGE
MEASUREMENT
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 21 V2.0, 2010-04
3.5.1 Switching Mode Power Supply (SMPS)The Driver Board has an integrated DC/DC converter which generates the required secondary isolatedunsymmetrical supply voltage of +15/-8V. Top and bottom driver voltages are independently generated by usingone unipolar input voltage of 12 V.An additional supply voltage (5V) is generated and forwarded to the external connector (K1) so it can be used tosupply external components in the system (current measurement, motor interface, etc.)For circuit details please refer to Figure 27.
3.5.2 Input LogicThe Driver Board is a dedicated system for a six-pack HybridPACK™1 IGBT configuration - therefore it isnecessary to use 6 separated PWM signals. The schematics on Figure 16 shows the input logic block with +5Vpositive logic. The block is made up of RC filters for each PWM signal in order to reduce noise. Additionally thesesignals are pulled-down in order to avoid unwanted switching-on of the drivers. Please have in mind that the HybridKit for HybridPACK™1 does not provide dead time automatically (meaning that hardware alone provides no deadtime) - it is up to the user to generate the PWM signals with the correct dead time (by means of software).
Figure 16 Schematic of the Input Logic Block of the Driver Board
3.5.3 IGBT Switch-off BehaviorDue to the stray inductances of the system a voltage overshoots occur during the switching-off the IGBT. Suchovershoots are added to the DC-link voltage, so that the maximum blocking voltage of the IGBT or capacitor mightbe exceeded causing damages in both components (DC link capacitor and IGBT module). In order to avoid suchrisks an active clamping circuit is used (see Chapter 3.5.6).Without such protection methods the maximum current would be limited by the DC-link voltage and the voltageovershoots at switching-off. The voltage overshoots can be minimized by increasing the gate resistor, which willreduce the di/dt value. Figure 17 shows the maximal switch-off current at different DC-link voltages for a differentvalues of the gate resistor. These results were obtained with the DC-link capacitor described in Chapter 2.3.4.
C85100pF/100V/COG
R88
100R
GND_DIG1
R8915k
GND_DIG1
C86100pF/100V/COG
R90
100R
GND_DIG1
R9115k
GND_DIG1
C87100pF/100V/COG
R92
100R
GND_DIG1
R9315k
GND_DIG1
C88100pF/100V/COG
R94
100R
GND_DIG1
R9515k
GND_DIG1
C89100pF/100V/COG
R96
100R
GND_DIG1
R9715k
GND_DIG1
C90100pF/100V/COG
GND_DIG1
R98
100R R9915k
GND_DIG1
PWM _WT
PWM _WB
PWM _VT
PWM _VB
PWM _UT
PWM _UB
PWM WT
PWM WB
PWM VT
PWM VB
PWM UT
PWM UB
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 22 V2.0, 2010-04
Figure 17 Maximal Switch-off Current at Different DC-Link Voltages (Gate Resistance as a Parameter)
3.5.4 Maximum Switching FrequencyThe IGBT switching frequency is limited by the available power and by PCB temperature. According to theory thepower losses generated in the gate resistors are a function of a gate charge, voltage step at the driver output andswitching frequency. The energy is dissipated mainly through the PCB and raises the temperature around the gateresistors. When the available power of the DC/DC converter is not exceeded, the limiting factor for the switchingfrequency is the absolute maximum temperature for the FR4 material. The allowed operation temperature is105 °C.Generally the power losses generated in the gate resistors can be calculated according to Equation (1):
(1)
In Equation (1) represents the switching frequency, represents the voltage step at the driver output, is the dissipated power, is the IGBT gate charge value corresponding to +15V/-8V switching operation.
This value can be approximately calculated from the datasheet value by multiplying it by 0.77, that is. Therefore the maximum frequency limited by the available power will be:
Figure 18 shows experimentally determined board temperature dependencies with switching frequency (at 25 °Cambient temperature). From Figure 18 it can be concluded that the maximum switching frequency is limited byPCB temperature.
0
100
200
300
400
500
600
700
800
900
0 50 100 150 200 250 300 350 400 450
Rgoff=2.2Ohm Rgoff=3.8Ohm Rgoff=5.6Ohm Icnom
Ic (A
)
DC-Link voltage (V)
Ic nominal
Pdis PRGextPRGint
Vout fS Qge⋅ ⋅Δ=+=
fS VoutΔPdis Qge
Qge 3.31μC=
fSmax 4.6 W 23V 3.31μC⋅( )⁄ 60.4 kHz= =
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 23 V2.0, 2010-04
Figure 18 Temperature of Gate Resistors vs. Switching Frequency
3.5.5 BoosterTwo transistors per driver IC are used to amplify the driver ICs signals. On this way the driving IGBTs are suppliedwith sufficient current even if driver ICs alone can’t deliver enough current. One NPN transistor is used forswitching the IGBT on and another PNP transistor for switching the IGBT off.
The transistors are dimensioned to have enough peak current to drive HybridPACK™1 modules. Peak current canbe calculated like in Equation (2):
(2)
For circuit details please refer to Figure 31.
3.5.6 Short Circuit Protection and Clamp FunctionThe short circuit protection of the Driver Board basically relies on the detection of a voltage level higher as 9 V onthe DESAT pin of the 1ED020I12-FA driver IC and the implemented active clamp function. Thanks to this operationmode, the collector-emitter overvoltage, which is a result of the stray inductance and the collector current slope,is limited. Depending on the stray inductance, the current and the DC voltage the voltage overshoot during turnoff changes. Figure 19 shows the parts of the circuit needed for the desaturation function and the active clampingfunction.
35,0
40,0
45,0
50,0
55,0
60,0
65,0
70,0
75,0
1,0 5,0 9,0 13,0 17,0 21,0 25,0 29,0 33,0 37,0 41,0 45,0 49,0
gate
resi
stor
tem
pera
ture
(°C
)
switching frequency (kHz)
IpeakVΔ out
RGintRGext
RDriver+ +-----------------------------------------------------=
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 24 V2.0, 2010-04
Figure 19 Desaturation Protection and Active Clamping Diodes
In the case of a short circuit the collector-emitter saturation voltage will rise and the driver detects the short circuitoccurrence - to protect the IGBT it has to be turned off. As a consequence of IGBT turn-off process there will occuran voltage overshoot due to the stray inductance of the module and the DC-link. This voltage overshoot has to belower than the maximum IGBT blocking voltage. Therefore the Driver Board has an active clamping functionwhereby the clamping will increase the voltage for the booster and also increase the voltage directly on the gate.The typical turn-off waveform under short circuit condition and room temperature of a HybridPACK™1 modulewithout any additional protective functions is shown in Figure 20 a). Typical waveform under short circuit conditionwith active clamp function at room temperature is shown in Figure 20 b). As it can be seen, the voltage overshootwithout active clamping at a DC voltage of 71 V is close to the maximum IGBT blocking voltage of HybridPACK™1(650V), which could damage the devices. With active clamping the voltage overshoot can be reduced and the DCvoltage increased without damaging the IGBT module (at 280 V DC voltage can be observed voltage overshootof approximately 596 V, Figure 20 b). In design are implemented 440 V clamping diodes. The level of theclamping voltage must be adjusted depending on the application.
D5_UB
ZLLS1000
C15_UB4u7/25V/X7R
C19_UB33pF/100V/COG
C16_UB4u7/25V/X7R
D3_UBSMCJ440A
C23_UB100n/50V/X7R
D4_UB
ZLLS1000
D1_UBES1D
D10_UBMM 3Z9V1T 1G
VN
GND
VP
R31_UB47R_0805_T K100_1%_0.125W
D9_UBZLLS1000
R33_UB
1R0 / SM P-1R00-1.0
R35_UB 0R
R30_UB1R0 / SM P-1R00-1.0
C20_UB4u7/25V/X7R
C21_UB4u7/25V/X7RGND
R36_UB
1R0 / SM P-1R00-1.0
R32_UB
1R0 / SM P-1R00-1.0
R37_UB
0R22 / SMP-R220-1.0
R38_UB0R22 / SMP-R220-1.0
T 1_UB
ZXT N2010Z
1
2
3
GND
GND
COL
C13_UB100pF/100V/COG
GND
T 2_UB
ZXT P2012Z
1
3
2
COL
G
GND
VN
R28_UB
1K
C17_UB100n/50V/X7R
U4
1ED020I12FTA
VEE21
DESAT3
GND24
T LSET5
VCC26
OUT7
CLAMP8
VEE22
GND119
IN+13
IN-14
RDY15
/FLT16 /RST17
VCC118
GND120 VEE2
9
VEE210
GND111 GND112
D6_UB
GF1M
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 25 V2.0, 2010-04
Figure 20 a) Short Circuit without Active Clamp (DC Voltage=71V, Voltage Overshoot=612V)b) With Active Clamp Function (DC Voltage=280V, Voltage Overshoot=596V)
3.5.7 Fault OutputWhen a short circuit occurs the voltage VCE is detected by the desaturation protection of the 1ED020I12-FA andthe IGBT is switched off. The fault is reported to the primary side of the driver as long as there is no reset signalapplied to the driver. The fault signal (/FLT) is active low - the schematic of design implemented in Driver Boardcan be seen on Figure 21.
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 26 V2.0, 2010-04
Figure 21 Fault Output of a Single Driver IC
Figure 22 Fault Output During: a) Normal Operation b) Operation under Short Circuit
The fault signal (/FLT) will be in low state if a short circuit occurs until /RST signal is pulled down.On the Driver Board each of the drivers has its own fault signal (FAULT_UTn, FAULT_UBn, FAULT_VTn,FAULT_VBn, FAULT_WTn, FAULT_WBn). As it can be seen in Figure 29, a LED will warn in the case of aDESAT-FAULT condition at a IGBT. The fault signals are connected to a logic circuit and the output of this are acombined fault and one fault for each phase, which is forwarded to the external connector (K1).
3.5.8 Temperature MeasurementThe IGBT module HybridPACK™1 includes one integrated NTC (Negative Temperature Coefficient) sensor whichsimplify the thermal measurements in inverters significantly.The NTC is located on the same ceramic substrate together with the IGBT and diode chips for the middle phase.The module is filled with silicon gel for isolation purpose and under normal operation conditions the requirementsfor isolation voltages are met. The NTC isolation capability is tested with 2.5kV AC in final test for 1 minute for100% of module production.
R29_UB4k7
VDIG50+5.0V
C14_UB470pF/50V/X7R
IN+
IN-
FLT n
GND_DIG1
RST n
VDIG50+5.0V
GND_DIG1
C22_UB
100n/50V/X7R
R34_UB4k7
VDIG50+5.0V
U4
1ED020I12FTA
VEE21
DESAT3
GND24
T LSET5
VCC26
OUT7
CLAMP8
VEE22
GND119
IN+13
IN-14
RDY15
/FLT16 /RST17
VCC118
GND120 VEE2
9
VEE210
GND111 GND112
a) b)
Short circuit occurs
UGE
Fault signal
Ready signal
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 27 V2.0, 2010-04
The NTC is connected to the main connector K1 (pin 10) by means of the circuit showed in Figure 33. Figure 23shows the relationship between IGBT module base plate temperature of the three phases and output voltage ofIGBT module temperature block (TEMP_IGBT, K1.10)
Figure 23 Characteristics of the Temperature Measurements
Note: This temperature measurement is not suitable for the short circuit or short term overload detection andshould be used only for the module protection against long term overload or malfunction of the cooling system.
3.5.9 DC Voltage MeasurementOn the Hybrid Kit for HybridPACK™1 the voltage at the DC link is measured by means of a isolation amplifierwhich offers the necessary galvanic isolation (see Figure 33).The output of this circuit is connected to the external connector (Vdc, K1.9). Figure 24 shows the relationshipbetween DC link voltage and Vdc output signal.
2,5
3,0
3,5
4,0
4,5
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
Tem
p_IG
BT
(V)
module temperature (°C)
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 28 V2.0, 2010-04
Figure 24 Characteristics of the DC Voltage Measurement
3.6 Switching LossesSwitching losses can be different comparing to the values given in the HybridPACK™1 IGBT module datasheet.Main reason for this discrepancy is that switching voltages used on the Driver Board (+15V for turn-on and -8V forturn-off) differ from HybridPACK™1 characterisation switching voltages (+15V/-15V).Turn-on losses are expected to be close to the values of the datasheet of HybridPACK™1, but as mentioned, thiswill be different for the turn-off losses. In general the turn-off losses depend on the stray inductances of the DC-link and increase linear with the DC-link voltage. In the case of the Driver Board the turn-off losses do not increaselinearly because of the fact that the active clamping feature increases the turn-off losses due to decrease of thedi/dt.
3.7 Definition of Layers of Driver BoardThe Driver Board was made keeping the following rules for the copper thickness and the space between differentlayers shown in Figure 25.
Figure 25 Copper and Isolation for Layers of Driver Board
y = 7,2171x + 1294,4
0
500
1000
1500
2000
2500
3000
3500
4000
4500
0 50 100 150 200 250 300 350 400
VDC
(mV)
DC-Link Voltage (V)
Copper Isolation
1: 35 µm
2: 35 µm
3: 35 µm
4: 35 µm
5: 35 µm
1
2
3
4
5
6 6: 35 µm
1
2
3
4
5
6
1-2: 0.5 mm 2-3: 0.5 mm 3-4: 0.5 mm 4-5: 0.5 mm 5-6: 0.5 mm
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 29 V2.0, 2010-04
3.8 Schematics, Layout and Bill of MaterialTo meet the individual customer requirements and to make the Driver Board for the HybridPACK™1 module as aplatform for development or modifications, all necessary technical data like schematics, layout and componentsare included in this chapter.
3.8.1 Schematics
Figure 26 Schematics Block Overview
IGBT _M ODULE
IGBT _M ODULE
COLWT
POW
ER_V
CC
COLUT
GNDUT
GNDUB
COLVT
GNDVT
GNDVB
GNDWT
GNDWB
GUT
GVT
GWT
GUB
GVB
GWB
Tem
p0T
emp1
M EASURE
M EASURE
T em p0T em p1
T EM P_IGBT
VDC POWER_VCC
INPUT_LOGIC
INPUT_LOGIC
PWM WTPWM WB
PWM VTPWM VB
PWM UTPWM UB
PWM _WB
PWM _VBPWM _WT
PWM _UBPWM _VT
PWM _UT
FAULT_LOGIC
FAULT_LOGIC
FAULT_UnFAULT_VnFAULT_Wn
RST _INn
RST n
FAULT_n
FAULT_WT n
FAULT_VBnFAULT_WBn
FAULT_UT nFAULT_VT n
FAULT_UBn
VP15_VT+15.0V
VP15_UB+15.0V
IGBT _DRIVER_UT
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
VP15_WT+15.0V
GND_VT
GND_UB
VN8_VT-8.0V
VN8_UB-8.0V
VN8_WT-8.0V
GND_WT
IGBT _DRIVER_UB
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
VP15_UT+15.0V
IGBT _DRIVER_VT
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
GND_UT
VN8_UT-8.0V
IGBT _DRIVER_VB
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
IGBT _DRIVER_WT
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
IGBT _DRIVER_WB
IGBT _DRIVER
IN+
FLT n
IN-RST n G
COLVP
VNGND
SMPS
SMPS
12Vin
CONNECTOR
CONNECTOR
PWM VTPWM VBPWM WTPWM WB
PWM UTPWM UB
RST
_IN
n
FLT
Wn
FLT
Un
FLT
Vn
FLT
n
12V
TEM
P_I
GBT
VD
C
GND_DIG VP15_VB+15.0V
GND_VB
VN8_VB-8.0V
VP15_WB+15.0V
GND_WB
VN8_WB-8.0V
GND_DIG1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 30 V2.0, 2010-04
Figure 27 SMPS - Power Supply
Figure 28 External Connector
VDIG50+5.0V
C91
61u
F/5
0V/C
1206
F10
5K5R
ACT
U
R197
7R5_0805_T K100_1%_0.125W
GND_DIG1
GND_DIG1
Q5
IPD144N06NG
1
2
3
R1651K5 / 1% / 100ppm
GND_DIG1
GND_DIG1
D32
BZV55-C18
GND_DIG1
GND_DIG1
D31
SL23_30V_2A_SM B
UNDER_VOL_DET ECT ION
UNDER_VOL_DET ECT ION
POWER_UP12V_PROT
1206
R170
R_SMK-R000
GND_DIG1 R169
11K / 1% / 100ppm
D111SM B30AT 3G
R17
468
0R/P
RC
221
1W T
K10
0 1%
+C93622u/16V/X7R
+
C92
3
100u
F/1
2.5V
/A70
0X10
7M12
RA
TE01
5
+
C90
347
uF_2
5V_S
VPD
/AS
VPD
GND_DIG1
C921220nF/C0805F224K5RAC
C92
422
0nF
/220
nF/C
0805
F22
4K5R
AC
D8
BZV55-C13
+
C90
24u
7F/5
0V/X
7R/C
1210
C47
5K5R
ACT
U
UT_
PS
T F1
T rafo_p lanar_sm ps_8W_HP1_opt
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R17
522
K /
1%
/ 10
0ppm
C91
947
0pF
/10V
/X7R
C92
222
nF/5
0V/X
7R
Q4IPD90P03P4L-04
R15959K
WB_PS
R15
8 19K
6
R16
4 0R02
5
C91
410
n/50
V/X
7R
GND_DIG1 GND_UB
UB_PS
R16
61k
6
R16
71k
6
L1
L_47u_1A_EPCOS_B82472P
Vz=15V
R16
81k
6
+ C91822u/35V/T491
C915
4u7/
25V
/X7R
C920
4u7/
25V/
X7R
VP15_UB+15.0V
GND_UB
D19
1SM B5929BT3G
VN8_UB-8.0V
D18
ES1A
GND_DIG1
12Vin
12V_PROT
C90810n/50V/X7R
R14910K
GND_DIG1
R14
31k
6
Vz=15V
GND_DIG1R
144
1k6
VB_PS
R14
51k
6
GND_DIG1
C926
100n
/50V
/X7R
GND_DIG1
GND_DIG1
+ C89422u/35V/T491
C8934u7/25V/X7R
R15310K
C8954u7/25V/X7R
VT_PS
Vz=15V
WT _PS
R14
71k
6
R14
61k
6
R14
81k
6
C8964u7/25V/X7R
+ C89722u/35V/T491
D7
1SM B5929BT3G
C898
4u7/
25V
/X7R
GND_DIG1R
150
1k6
Vz=15V
R15
21k
6
R15
11k
6
C899
4u7/
25V
/X7R
+ C90022u/35V/T491
C901
4u7/
25V
/X7R
D10
1SM B5929BT3G
R15
61k
6
R15
51k
Vz=15V
R15
71k
6
+ C90622u/35V/T491
D5
1SM B5929BT3G
C904
4u7/
25V
/X7R
+C925
22u/16V/X7R
C907
4u7/
25V
/X7R
D15
1SM B5929BT3G
GND_DIG1
VP15_VT+15.0V
VP15_WB+15.0V
VP15_UT+15.0V
GND_UT
GND_VT
VP15_WT+15.0V
VN8_WB-8.0V
VN8_UT-8.0V
GND_WB
VN8_WT-8.0V
VN8_VT-8.0V
D4
ES1A
D6
ES1A
GND_WT
D9
ES1A
R171
opt
D13
ES1A
Vz=15V
R16
01k
6
R16
11k
6
R16
21k
6
C909
4u7/
25V/
X7R
D21
ES1A
C912
4u7/
25V
/X7R
+ C91022u/35V/T491
D17
1SM B5929BT3G
VP15_VB+15.0V
GND_VB
D16
ES1A
R17
368
0R/P
RC
221
1W T
K100
1%
GND_DIG1
VN8_VB-8.0V
C905100nF/100V/X7R
GND_DIG1
D12ES1A
VDIG50+5.0V
GND_DIG1
+C928
22u/16V/X7R
GND_DIG1D14
1SM B5929BT3G
R154 80K6
R16
34k
75
GND_DIG1
R1720R / SM K-R000
R176 opt
L3
MURAT A_BLM 21P221SN
805
GND_ANA1
C927100n/50V/X7R
VANA50+5.0V
C91
122
n/50
V/X
7R
L2
L_47u_1A_EPCOS_B82472P
C91
31u
F/5
0V/C
1206
F10
5K5R
AC
TU
C91
710
0nF/
50V/
C08
05F1
04K5
RAC
TU
IC1
T LE8366EV
EN7
SYNC1
FB4
COM P3 BDS
5VS8
BUO6
GND2
GN
D_E
P9
T 2BSS138N1
32
IC2
LM3478MM
Isen1
COM P2
FB3
AGND4
PGND5
DR6FA/SD
7Vin
8
GND_DIG1
RST _INnFLT Wn
FLT UnFLT n
PWM VB
PWM WTPWM WB
PWM UTPWM UB
12V
GND_DIG
T EM P_IGBTVDC
K1
M MS-112-01-L-DV
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
GND_DIGGND_DIG
PWM VTFLT Vn
VANA50+5.0V
GND_ANA1
12V
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 31 V2.0, 2010-04
Figure 29 Fault Logic
Figure 30 Input Logic
FAULT_UBn
FAULT_WBn
FAULT_VBn
R181
1K_0603_T K100_1%_0.063W
10k
10k
T 7A
BCR10PN
2
6
1
10k
10k
T 7B
BCR10PN
5
3
4
GND_DIG1
C93010nF_0402_X7R_50V_CER_opt
C92910nF_0402_X7R_50V_CER_opt
R1781K_0603_T K100_1%_0.063W
R198
4K7_0603_T K100_1%_0.063W
R183
1K_0603_T K100_1%_0.063W C93110nF_0402_X7R_50V_CER_opt
GND_DIG1
VDIG50+5.0V
R188
1K_0603_T K100_1%_0.063W C93310nF_0402_X7R_50V_CER_opt
GND_DIG1
10k
10k
T 6A
BCR10PN
2
6
1
GND_DIG1
10k
10k
T 6B
BCR10PN
5
3
4
VDIG50+5.0V
GND_DIG1
R186
1K_0603_T K100_1%_0.063W C93210nF_0402_X7R_50V_CER_opt
GND_DIG1
R191
1K_0603_T K100_1%_0.063W C93410nF_0402_X7R_50V_CER_opt
GND_DIG1
R192220R_0603_TK100_1%_0.063W
GND_DIG1
R25220R_0603_TK100_1%_0.063W
D22BBAS16S5
2
D22ABAS16S
61
GND_DIG1
D22CBAS16S
43
VDIG50+5.0V
VDIG50+5.0V
10k
10k
T 3ABCR183S
<PACKAGE>
2
1
610k
10k
T3BBCR183S
<PACKAGE>
5
4
3
VDIG50+5.0V
VDIG50+5.0V
R1794K7_0603_T K100_1%_0.063W
FAULT_Wn
D24 D25
GND_DIG1
FAULT_Vn
10k
10k
T 8A
BCR10PN
2
6
1
FAULT_Un
10k
10k
T 8B
BCR10PN
5
3
4
R19015K_0603_TK100_1%_0.063W
D23BBAS16S
52
D23ABAS16S
61
R18715K_0603_T K100_1%_0.063W
FAULT_n
R18215K_0603_T K100_1%_0.063W
D23CBAS16S
43
R1844K7_0603_T K100_1%_0.063W
R1894K7_0603_T K100_1%_0.063
VDIG50+5.0V
VDIG50+5.0V
VDIG50+5.0V
R18515K_0603_T K100_1%_0.063W
VDIG50+5.0V
R194220R_0603_TK100_1%_0.063W
10k
10k
T 4BBCR183S
<PACKAGE>
5
4
3
VDIG50+5.0V
D27
GND_DIG1GND_DIG1
VDIG50+5.0V
R193220R_0603_TK100_1%_0.063W
10k
10k
T 4ABCR183S
<PACKAGE>
2
1
6
D26
RST _INn
GND_DIG1
VDIG50+5.0V
R195220R_0603_TK100_1%_0.063W
10k
10k
T 5ABCR183S
<PACKAGE>
2
1
6
D28
RST n
R196220R_0603_TK100_1%_0.063W
10k
10k
T 5BBCR183S
<PACKAGE>
5
4
3
VDIG50+5.0V
D29
GND_DIG1
D30CBAS16S
43
D30BBAS16S
52
D30ABAS16S
61
FAULT_UT n
FAULT_VT n
FAULT_WT n
R18015K_0603_T K100_1%_0.063W
VDIG50+5.0V
GND_DIG1
R17715K_0603_T K100_1%_0.063W
VDIG50+5.0V
C85100pF/100V/COG
R88
100R
GND_DIG1
R8915k
GND_DIG1
C86100pF/100V/COG
R90
100R
GND_DIG1
R9115k
GND_DIG1
C87100pF/100V/COG
R92
100R
GND_DIG1
R9315k
GND_DIG1
C88100pF/100V/COG
R94
100R
GND_DIG1
R9515k
GND_DIG1
C89100pF/100V/COG
R96
100R
GND_DIG1
R9715k
GND_DIG1
C90100pF/100V/COG
GND_DIG1
R98
100R R9915k
GND_DIG1
PWM _WT
PWM _WB
PWM _VT
PWM _VB
PWM _UT
PWM _UB
PWM WT
PWM WB
PWM VT
PWM VB
PWM UT
PWM UB
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 32 V2.0, 2010-04
Figure 31 IGBT Driver - Bottom Transistor of Phase U
Figure 32 IGBT Module
D5_UB
ZLLS1000
C15_UB4u7/25V/X7R
C19_UB33pF/100V/COG
C16_UB4u7/25V/X7R
D3_UBSMCJ440A
C23_UB100n/50V/X7R
D4_UB
ZLLS1000
D1_UBES1D
D10_UBM M3Z9V1T 1G
VN
GND
VP
R31_UB
D9_UBZLLS1000
R35_UB 0R
R33_UB
1R0 / SM P-1R00-1.0
R30_UB
C20_UB4u7/25V/X7R
C21_UB4u7/25V/X7R
GND
R36_UB
R32_UB
1R0 / SM P-1R00-1 .0
R37_UB
R38_UB0R22 / SMP-R220-1.0
R29_UB4k7
VDIG50+5.0V
C14_UB470pF/50V/X7R
T 1_UB
1
2
3
GND
GND
COL
C13_UB100pF/100V/COG
GND
T 2_UB
1
3
2
IN+
IN-
FLT n
GND_DIG1
COL
G
RST n
GND
VN
GND_DIG1
VDIG50+5.0V
R28_UB
1K
C22_UB
100n/50V/X7R
R34_UB4k7
VDIG50+5.0V
C17_UB100n/50V/X7R
U4
1ED020I12FTA
VEE21
DESAT3
GND24
T LSET5
VCC26
OUT7
CLAMP8
VEE22
GND119
IN+13
IN-14
RDY15
/FLT16 /RST17
VCC118
GND120 VEE2
9
VEE210
GND111 GND112
D6_UB
GF1M
C7910n/50V/X7R
P
R8210K
C8010n/50V/X7R
R8310K
C8110n/50V/X7R
R8410K
C8210n/50V/X7R
R8510K
C8310n/50V/X7R
R8610K
C8410n/50V/X7R
R8710K
Q3A
FS400R06A1E3_opt
PACKAGE = 1
7
8
1
2
3
6
13
14
Q3B
FS400R06A1E3_opt
PACKAGE = 1
9
10
4
25
15
16
N
Q3C
FS400R06A1E3_opt
PACKAGE = 1
11
12
5
22
17
18
19
24
23Phase_W Phase_V Phase_U
POWER_VCC
COLWT COLUTCOLVT
GNDUB
GNDUT
GNDVB
GNDVT
GUT
GNDWB
GNDWT
GUB
GWT GVT
GWB GVB
T em p1
T em p0
N
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 33 V2.0, 2010-04
Figure 33 DC Voltage & Temperature Measurement
3.8.2 Assembly Drawing
GND_ANA1
GND_ANA1
C2100n/50V/X7R
VANA50+5.0V
R129 opt
R122K / 0.1%
C6150p/50V/C0G
GND_ANA1
R152K / 0.1%
R1110K / 0 .1%
R136 0R
T em p1
T em p0
VANA50+5.0V
T EM P_IGBT
GND_ANA1
GND_ANA1
GND_ANA1
VANA50+5.0V
IC4
AD8552ARZ
OUT A1 IN-A
2
IN+A3
V-4
IN+B5
IN-B6
OUT B7
V+8
C116
1u/25V/X7R
C12
110
n/50
V/X7
R
R13
010
K5/1
%
C12210n/50V/X7R
R13710K5/1%
C9354u7_X7R_16V_CER/C1206F475K4RA
GND_VBGND_VB
VP15_VB+15.0V
+5VVB+5V
C891100n/50V/X7R
IC6
T LE4296-2GV50
I3
Q4
GND2
GND5INH
1
VDC
C1 330pF/50V/COG
R4 4K02 / 0 .1%
C11310n/50V/X7R
R1590K
R3590K
R2590K
R6590K
R5590K
R7590K
HV_VB_VD
VB_13
R10158R
R83K9
500V->199mV
GND_VB
POWER_VCC
VB_11
VB_12
R939R
GND_ANA1
IC3ACPL-782T
OUT -6
IN+2
IN-3
GND
14
GND
25
Vdd1
1
OUT +7
Vdd2
8
C510n/50V/X7R
GND_VB
C3100n/50V/X7R
GND_VB
GND_VB
+5VVB+5V
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 34 V2.0, 2010-04
Figure 34 Assembly Drawing of the Driver Board (Top)
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 35 V2.0, 2010-04
Figure 35 Assembly Drawing of the Driver Board (Bottom)
For detail information use the zoom function of your PDF viewer to zoom into the drawings on Figure 34 andFigure 35.
3.8.3 LayoutLayout of the Driver Board is shown on Figure 36 (Top Layer), on Figure 37 (Layer-2), on Figure 38 (Layer-3),on Figure 39 (Layer-4), on Figure 40 (Layer-5) and on Figure 41 (Bottom Layer).
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 36 V2.0, 2010-04
Figure 36 Driver Board - Top Layer
Figure 37 Driver Board - Layer-2
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 37 V2.0, 2010-04
Figure 38 Driver Board - Layer-3
Figure 39 Driver Board - Layer-4
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 38 V2.0, 2010-04
Figure 40 Driver Board - Layer-5
Figure 41 Driver Board - Bottom Layer
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 39 V2.0, 2010-04
3.8.4 Bill of Materials
Table 3 Bill of Materials for Hybrid Kit for the HybridPACK™1 Evaluation Driver BoardReference Value / Device PackageC15_WT,C15_WB,C15_VT,C15_VB,C15_UT, C15_UB,C16_WT,C16_WB,C16_VT,C16_VB, C16_UT,C16_UB,C20_WT,C20_WB,C20_VT, C20_VB,C20_UT,C20_UB,C21_WT,C21_WB, C21_VT,C21_VB,C21_UT,C21_UB,C868,C871,C874,C880,C885,C889
4u7/25V/X7R C1206
C17_WT,C17_WB,C17_VT,C17_VB,C17_UT, C17_UB,C22_WT,C22_WB,C22_VT,C22_VB, C22_UT,C22_UB,C23_WT,C23_WB,C23_VT, C23_VB,C23_UT,C23_UB,C821
100n/50V/X7R C0603
C79,C80,C81,C82,C83,C84 22n/50V/X7R C0603C822 10u/16V/X7R C1206C827,C830,C835,C891 100n/16V/X7R C0402C828,C831 150p/50V/C0G C0402C832 330p/50V/COG C0402C833,C881,C886,C894,C895 10n/50V/X7R C0402C866,C869,C872,C877,C882,C887 4u7/50V/X7R C1210C867,C870,C873,C879,C883,C888 22u/35V DC875,C876 22u/63V C0810C878 100nF/100V/X7R C1206C884 22n/50V/X7R C0402C890,C907 22u/16V/X7R C1210C896,C898,C899 10n/50V/X7R C0603C897,C906 100n/50V/X7R C0805C900,C901,C902,C903,C904,C905 100pF/100V/COG C0603C908,C910,C911,C913,C914,C916 10n/50V/X7R C0603C909,C915 1u/16V/X7R C0603C912 1u/16VV/X7R C0603D3_WT,D3_WB,D3_VT,D3_VB,D3_UT,D3_UB
P6SMB510A SMB
D4,D6,D8,D10,D11,D14,D16,D18 ES1A DO214D4_WT,D4_WB,D4_VT,D4_VB,D4_UT,D4_UB
ES1D DO214
D5,D7,D9,D13,D15,D17 1SMA5929BT3G DO214D6_WT,D6_WB,D6_VT,D6_VB,D6_UT,D6_UB
MURA160T3G DO214
D9_WT,D9_WB,D9_VT,D9_VB,D9_UT,D9_UB
SMBJ14CA SMB
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 40 V2.0, 2010-04
D12 1SMB5935BT3 SMBD19 BZV55/C13 SMDD20 1SMB30AT3 SMBD21,D22,D23 LED_LSM676-MQ D0805K1 MMS-112-01-L-DV 24POLL1 MURATA_BLM21P221SN L0805Q4 FS800R06KE3 HybridPACK™1Q5 IPD144N06NG TO252Q10 IPD90P03P4L-04 TO252Q11,Q12 BCR183S SOT363Q13 BCR10PN SOT363R14_WT,R14_WB,R14_VT,R14_VB,R14_UT, R14_UB,R206,R207,R214
0R R0603
R28_WT,R28_WB,R28_VT,R28_VB,R28_UT, R28_UB
1K R0603
R28 10K R0805R29_WT,R29_WB,R29_VT,R29_VB,R29_UT, R29_UB
4K7 R0603
R31_WT,R31_WB,R31_VT,R31_VB,R31_UT, R31_UB
47R R0805
R32_WT,R32_WB,R32_VT,R32_VB,R32_UT, R32_UB,R33_WT,R33_WB,R33_VT,R33_VB, R33_UT,R33_UB
2R7 R2512
R34_WT,R34_WB,R34_VT,R34_VB,R34_UT, R34_UB,R193
4.75 kΩ R0402
R82,R83,R84,R85,R86,R87,R182 10K R0402R127,R510 2K /0.1% R0603R132 4K / 0.1% R0603R133,R134,R135,R136,R137,R138 590K R1206R139 3K9 R0603R145,R146 10K 0.1% R0603R169,R170,R171,R173,R174,R175,R178,R179,R180,R183,R185,R186,R190,R191,R192,R196,R197,R198
1.6 kΩ R1206
R184 80K6 R0402R187 19K6 R0603R194 0R025 R2010R199,R533 0R R1210R201 59K R0603R203,R205,R208,R209,R211,R213 10K/1% R0603
Table 3 Bill of Materials for Hybrid Kit for the HybridPACK™1 Evaluation Driver Board (cont’d)
Reference Value / Device Package
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Evaluation Driver Board for the HybridPACK™1
Application Note 41 V2.0, 2010-04
R204,R210,R212 Opt R0603R408 158R R0603R509 39R R0603R511,R513,R515,R521,R523,R525,R527,R529,R531
15k R0603
R512,R514,R516 1K R0603R517,R518,R519 220R R0603R520,R522,R524,R526,R528,R530 100R R0603R534 Opt R1210R535 226K R0603R536 5K1 R0603R537 47K R0603T1 TRANSFORMER2T1_WT,T1_WB,T1_VT,T1_VB,T1_UT,T1_UB ZXTN2010Z SOT89T2_WT,T2_WB,T2_VT,T2_VB,T2_UT,T2_UB ZXTP2012Z SOT89U4,U5,U6,U7,U8,U9 1ED020I12-FA PG-DSO-20U18,U33,U34 AD8552ARZ SO-8U19 ACPL-782T DIP-8U30 LM3478MM MSOP-8U56 TLE4296GV50 SCT595U57 74LVC1G11GW SOT363U58 MAX6457UKD3A-T SOT23-5
Table 3 Bill of Materials for Hybrid Kit for the HybridPACK™1 Evaluation Driver Board (cont’d)
Reference Value / Device Package
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 42 V2.0, 2010-04
4 Logic Board for Hybrid Kit for HybridPACK™1
Figure 42 Logic Board for Hybrid Kit for the HybridPACK™1
Logic Board (Figure 42) contains all the components for the control of the Hybrid Kit for the HybridPACK™1.Furthermore it offers the interface for all the other elements which build a complete inverter system: motor interface(encoder, resolver, sensors), current sense interface, communication (CAN and RS232) and additional analogue(x3) and digital (x4) inputs/outputs. Figure 43 shows the block structure of the Logic Board and the followingchapters describe these blocks in detail.
Figure 43 Block Diagram of the Logic Board
4.1 External Connector (X1-SIG1) Pin AssignmentConnector X1-SIG1 (Harwin M80-5125042P) provides the interface to all the external systems: motor (encoder,resolver, sensors), current sense, communication (CAN and RS232) and extra analogue and digitalinputs/outputs. Figure 44 shows the pin assignment of the connector X1-SIG1. For the description of the signalssee Table 4.
IGBT module HybridPACK™1
6ED100HP1-FA Driver Board
PWM
TempIGBT
FAULTSignals
RST
Vdc meas.
Logic Board
Supply
Connector
Supply
Debug Connector
MicrocontrollerTC1767
Resolver interface
Encoder / Sensor
Resolver
A/D IO
CAN / RS232
I, U, V currentmeasurement
EEPROM
Supply
Watchdog
LevelShifter
Vdc, Temp
Sensor
ResolverEncoder
RS232CAN
Current W
Current V
Current U
Co
nn
ec
to
r
Co
nn
ec
to
r
Motor3~
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 43 V2.0, 2010-04
Figure 44 External Connector Pin Assignment
Table 4 External Connector Pin Assignment Logic Board v1.3bPin Number Pin Name Type Description1 ADC_IN1 I/O General Purpose Analog I/O2 S2 Input Resolver Sine (high)3 ADC_IN2 I/O General Purpose Analog I/O4 S6 Input Resolver Sine (low)5 ADC_IN3 I/O General Purpose Analog I/O6 S3 Input Resolver Cosine (high)7 StatorTemp Input Motor Temperature Measurement8 S1 Input Resolver Cosine (low)9 GND_ANA1 Supply Analog Ground10 R1 Output Resolver Excitation (high)11 DIO1 I/O General Purpose Digital I/O12 R2 Output Resolver Excitation (low)
2
10
14
18
4
8
12
16
20
StatorTemp
PosA/iGMR_A+
PosA/iGMR_A-
PosB/iGMR_B+
iGMR_CSn+
iGMR_DATA-
iGMR_DATA+
S6
S2
6
1
9
13
17
3
7
11
15
19
5
21
29
33
23
27
31
25
22
30
34
24
28
32
26
S3
S1
R1
R2
DIO_2
DIO_1
I_W
VDIG50
CAN1_L
CAN1_H
ASC_RX
ASC_TX
GND_ANA1
VANA50
GND_ANA1
I_V
I_U
ADC_IN1
ADC_IN2
ADC_IN3
DIO_3
GND_DIG1
Motor Interface (Encoder)
Motor Interface(Resolver)
Phase Current Sense
Communication
General Purpose Ana/Dig IN/OUT
Power Supply
Motor Interface (Hall Sensor)
Harwin M80-5125042P
iGMR_Ren_DE+
iGMR_CSn-
iGMR_Ren_DE-
PosB/iGMR_B-
PosZ/iGMR_Z+
PosZ/iGMR_Z-
PosU/iGMR_U
PosV/iGMR_V
PosW/iGMR_W
37
35
41
39
45
43
GND_DIG1
47
49
VDIG50
iGMR_CLK-
iGMR_CLK+
38
36
40
+12V
GND_DIG1
GND_DIG1
+12V
GND_DIG1
42
46
44
48
50
Motor Interface (iGMR Sensor)
Not Connected
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 44 V2.0, 2010-04
13 DIO2 I/O General Purpose Digital I/O14 VANA50 Supply +5.0V Analog Power Supply15 DIO3 I/O General Purpose Digital I/O16 GND_ANA1 Supply Analog Ground17 VDIG50 Supply +5.0V Digital Power Supply18 I_U Input Current Sense Phase U19 GND_DIG1 Supply Digital Ground20 I_V Input Current Sense Phase V21 iGMR_CSn- Output iGMR Chip Select (differential signal)22 I_W Input Current Sense Phase W23 iGMR_REn_DE+ Output iGMR Read Enable (differential signal)24 iGMR_CSn+ Output iGMR Chip Select (differential signal)25 iGMR_REn_DE- Output iGMR Read Enable (differential signal)26 iGMR_DATA- I/O iGMR Data (differential signal)27 PosA/iGMR_A+ Input Encoder Phase A (differential signal)28 iGMR_DATA+ I/O iGMR Data (differential signal)29 PosA/iGMR_A- Input Encoder Phase A (differential signal)30 iGMR_CLK- Output iGMR SSC Clock (differential signal)31 PosB/iGMR_B+ Input Encoder Phase B (differential signal)32 iGMR_CLK+ Output iGMR SSC Clock (differential signal)33 PosB/iGMR_B- Input Encoder Phase B (differential signal)34 CAN1_L I/O Low line I/O CAN Signal35 PosZ/iGMR_Z+ Input Encoder Phase Z - index (differential signal)36 CAN1_H I/O High line I/O CAN Signal37 PosZ/iGMR_Z- Input Encoder Phase Z - index (differential signal)38 PosZ Output RS-232 Transmitter Output39 PosU/iGMR_U Input Hall Sensor Phase U40 ASC_RX Input RS-232 Receiver Input41 PosV/iGMR_V Input Hall Sensor Phase V42 GND_DIG1 Supply Digital Ground43 PosW/iGMR_W Input Hall Sensor Phase W44 KL_30_IN Supply +12.0V Power Supply45 GND_DIG1 Supply Digital Ground46 KL_30_IN Supply +12.0V Power Supply47 VDIG50 Supply +5.0V Digital Power Supply48 GND_DIG1 Supply Digital Ground49 NC NC Not Connected50 GND_DIG1 Supply Digital Ground
Table 4 External Connector Pin Assignment Logic Board v1.3b (cont’d)
Pin Number Pin Name Type Description
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 45 V2.0, 2010-04
4.2 Connector to the Driver Board (K1)See Chapter 3.3.
4.3 Power SupplyThe complete system (Driver Board and Logic Board) must to be supplied with and external regulated DC powersupply connected to connector X1-SIG1 (+12.0V on pins 44 and 46 and GND_DIG1 on pins 48 and 50) on theLogic Board. The input voltage should be kept between 8 V and 18 V and the current consumption will varydepending on different factors, i.e. PWM frequency.This supply line will be forwarded to the Driver Board through the connector K1. On both boards a protection circuitwill avoid damages in case of overvoltage or wrong polarity (see Figure 45).
Figure 45 Overvoltage and Wrong Polarity Protection Circuit
The supply block (see Figure 52) generates all the necessaries supplies for the components on the logic board(5V, 3.3 V and 1.5 V). Furthermore the 5 V (analogue and digital) are connected to the external connector (X1-SIG1) for supplying external systems (i.e. current sensor).The Logic Board use the Infineon Technologies TLE7368E Micro Controller Power Supply IC. After applying themain power supply the IC13 will be switched-on. As soon as 5 V/3.3V/1.5V power supplies reached their correctvalues the signal POWERrstn (RO_1 and RO_2 outputs of IC12) will be activated waking-up the microcontroller.For further details of the TLE7368E please refer to the datasheet.
4.4 MicrocontrollerThe microcontroller block (uC block in overview given in Figure 51) contains following elements:• TC1767 (Figure 61) is a 32-Bit Microcontroller member of the Infineon Technologies AUDO FUTURE product
family designed for automotive applications. TriCoreTM CPU providing high-end microcontroller performance combined with sophisticated DSP capabilities (please refer to datasheet for further details)
• Input filter (see Figure 60): passive filters for digital and analogue signals and voltage dividers for voltage level adaptation
• EEPROM (Figure 62): 256kB Electrically-Erasable Programmable Read-Only Memory optimized for use in automotive applications where low-power and low-voltage operations are essential (for more details refer to AT25256A-10TQ-2.7 datasheet). The communication with the microcontroller is done through SSC0 interface (high-speed synchronous serial interface, SPI-compatible)
• RS-232 & CAN Transceivers (see Figure 59)
4.4.1 Configuration of TC1767The TC1767 can be configured with the respect to the different boot modes and with the respect to the differentinterfaces (serial/parallel) to the resolver and iGMR position sensors.
Q4IPD90P03P4L-04
KL_30_IN+12.0V
KL_30+12.0V
R12810K
GND_DIG1 GND_DIG1
D2
BZV55/C13 D31SM B30AT 3
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 46 V2.0, 2010-04
4.4.1.1 Boot Configuration of TC1767
Figure 46 HW Boot Configuration of TC1767 DIP-Switch
The picture above (Figure 46) shows the definition of the boot HW configuration switch (DIP-Switch SW1 onFigure 61). The meaning of the switches will be described in the following Table 5.The ON position of the switch is equal to a logical LOW at the dedicated pin.
4.4.1.2 Selecting Serial/Parallel InterfaceDIP-4 switch (SW2 on Figure 59) is used to select serial/parallel interface for the communication with resolver oriGMR position sensor - please refer to Table 6.
Table 5 User Startup Modes for TC1767
CFG[7...0] Type of Boot TC1767 11)
1) 1 to 8 are the DIP-Switch numbers
2 3 4 5 6 7 811XXX11X2)
2) The shadowed line indicates the default settings.
Internal Start from Flash OFF OFF X3)
3) ’x’ represents the don’t care state.
X X OFF OFF X010XX110 Bootstrap Loader Mode, Generic Bootloader at
CAN pinsON OFF ON X X OFF OFF ON
10101110 Bootstrap Loader Mode, ASC Bootloader OFF ON OFF ON OFF OFF OFF ON10100110 Alternate Boot Mode, ASC Bootloader on fail OFF ON OFF ON ON OFF OFF ON1011X11X Alternate Boot Mode, Generic Bootloader at
CAN pins on failOFF ON OFF OFF X OFF OFF X
All others Reserved; don’t use this combination
Table 6 Selecting Serial/Parallel Interface
SW2[4...1] Inetrface to the Resolver/iGMR 41)
1) 1 to 4 are the DIP-Switch numbers
3 2 100002)
2) 0 is equal to open switch, “1” is equal to closed switch
iGMR enabled (SPI and Incremental mode)Resolver in Parallel Mode
OFF3)
3) ’x’ represents the don’t care state.
OFF OFF OFF
1111 Resolver in Serial ModeiGMR disabled
ON ON ON ON
All others Reserved; don’t use this combination
ON
1 2 3 4 5 6 7 8
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
HIGH
LOW
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 47 V2.0, 2010-04
Figure 47 The Boot Configuration Switch (SW1) and Serial/Parallel Interface Select Switch (SW2)
4.5 WatchdogThe Logic Board contains a pin-selectable watchdog timer that supervises the microcontroller activity andsignalizes when the system is operating improperly. During normal operation, the microcontroller (GPTA39)should repeatedly toggle the watchdog input (WDI, see Figure 55) before the selected watchdog time-out periodelapses to report that the system is processing code properly. If this does not occurs, the supervisor asserts awatchdog output (WDO) which will reset the microcontroller via PORSTn (external power-on hardware reset).The state of the three logic control pins (SET0, SET1 and SET2) determines watchdog timing characteristics (seetable in Figure 55). The jumper J1 allows disabling the watchdog functionality in a very easy way.
4.6 Phase Current SensingPhase current sensing signals should be connected to the Logic Board connector X1-SIG1 to the pins I_U, I_Vand I_W (Figure 60). The Logic Board is designed to work with current transducers (not provided with the HybridKit) with voltage output proportional to the current (usually deploying Hall effect - like LEM sensors). User can take+5V (analog) available on the X1-SIG1 pins to supply current transducers. The exact type of current transducerwill depend on many parameters in application, but usually the most important is the motor current consumption.Please notice that if you control 3-phase balanced synchronous system it is enough to measure just 2 phases,since the 3rd phase current can be calculated as algebraic combination out of the 2 measured currents. Themicrocontroller is able to convert synchronously two phase currents, it’s recommended to do an accurate currentmeasurement.
4.7 Temperature SenseThe Logic Board includes a temperature sensor (IC54, LM50-CIM3) which is located on the bottoside of the board.With the sensor it is possible to measure the ambient temperature between Logic Board and Driver Board. Forschematics and output voltage values of the circuit see Figure 64. If you need any further information about thedevice please refer to the data sheet.
4.8 Resolver InterfaceThe Logic Board includes a 12-Bit Resolver-to-digital converter (meaning A/D converter) which integrates an on-board programmable sinusoidal oscillator that provides sine wave excitation for resolvers (pins R1 and R2 onconnector X1-SIG1). For more details please refer to the data sheet of the component (AD2S1200YST) and theschematics of the circuit see Figure 56. With resistors (R155, R156, R157, R158, R159 and R160) user can trimthe LMH6672 (dual op-amp) output voltage values (resolver excitation). On the Logic Board is given additionalpossibility to trim the resolver excitation with potentiometers (R483, R484, R485 - not populated, user shouldsolder them if needed). Please refer to data sheet of used resolver to trim this values properly. The resolverresponse should be connected between pins S1 and S3 (sine) and S2 and S6 (cosine) on the connector X1-SIG1.
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 48 V2.0, 2010-04
4.9 Encoder InterfaceIf encoder is used as a sensor for the motor position/speed sensing the following pins on connector X1-SIG1should be connected: the phase A should be connected between pins PosA/iGMR_A+ and PosA/iGMR_A-, thephase B should be connected between pins PosB/iGMR_B+ and PosB/iGMR_B- and phase Z (index or zeromarker) should be connected between pins PosZ/iGMR_Z+ and PosZ/iGMR_Z- .
4.10 Hall Sensor InterfaceIf Hall sensor is used as a sensor for the motor position/speed sensing the following pins on connector X1-SIG1should be connected: the phase U should be connected to pin PosU/iGMR_U, the phase V should be connectedto pin PosV/iGMR_V and phase W should be connected to pin PosW/iGMR_W .
4.11 GMR InterfaceAs mentioned on the beginning of the Chapter 4, the Logic Board supports GMR interface by means of a bi-directional SSC (SPI compatible), encoder (or incremental) and Hall sensor interface. It is explicitly recommendedto use Infineon Technologies TLE5012 GMR-based angular sensor for rotor position sensing. The TLE 5012 is a360° angle sensor that detects the orientation of a magnetic field. This is achieved by measuring sine and cosineangle components with monolithic integrated Giant Magneto Resistance. For more details about TLE5012 pleaserefer to the data sheets on Infineon Technologies internet pages.
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 49 V2.0, 2010-04
4.11.1 GMR SSC Interface Mode
Figure 48 GMR SSC Interface - Proposal Using TLE5012
The schematics of SSC interface on the Logic Board is shown on Figure 63. Signals on connector X1-SIG thatare used for SSC interface are: iGMR_CSn+/iGMR_CSn- (Chip Select, differential signals),iGMR_REn_DE+/iGMR_REn_DE- (Read Enable, differential signals), iGMR_DATA+/iGMR_DATA- (Serial Data,differential signals) and iGMR_CLK+/iGMR_CLK- (SSC Clock, differential signals) - all signals are listed inTable 4. On Figure 48is presented the schematics of possible technical solution (implemented by InfineonTechnologies System Engineering) for usage of TLE5012. The PCB with TLE5012 and a few additionalcomponents is mounted perpendicular to the electric motor shaft - just as shown on Figure 49.
Figure 49 Picture of Possible Physical Implementation of the GMR Sensor
U4
AM26LS31C DR
1A1
1Y2
1Z3
G4
2Z 52Y6
2A7
GN D8
3A9
3Y10
3Z11
G12
4Z134Y14
4A15
VCC16
U1
D S90C 032BTM
R in1- 1
R in1+2
Rout 13
EN4
Rout 25 R in2+
6
R in2-7
GN D8
R in3-9
R in3+10
Rout 311
EN_n12
Rout 413 R in4+
14
R in4-15
VCC16
U 3
DS92LV010ATM
D E1
D in2
R out3
GND4
R E5
D O-6
D O+7
VCC8
U 2
TLE5012
C LK1
SC K2
CSQ3
DATA4
I FA5
VDD6
GND7
I FB8
R63k 30603
R 73k30603
R83k 30603
R93k 30603
R 103k30603
R113k 30603
R 554R 0603
R 41k0603
C1
100n
/16V
/X7R
/EM
K10
7B71
04K
A
0603
C2
10u
/10V
/X7
R/L
MK
316B
710
6KL
120
6
C3
100n
/16
V/X
7R
/EM
K1
07B
710
4KA
060
3
X15
H eader_7x2
1234567891011121314
C4
100
n/1
6V/X
7R/E
MK
107B
710
4K
A
0603
C5
100n
/16
V/X
7R
/EM
K1
07B
710
4KA
060
3
R3100R 0603
R2100R 0603
R1100R 0603
C6
10p
/25V
/X7R
060
3
C7
10p
/25
V/X
7R
0603
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 50 V2.0, 2010-04
4.11.2 GMR Encoder Interface ModeInfineon Technologies iGMR sensor TLE5012 can be used with encoder interface as well. This working mode isreferred as IIF Interface mode in theTLE5012 data sheet. To avoid signal integrity and EMC problems, withinHybrid Kit it is expected that the 2 phase signals (A and B) and zero (index) signal are provided differentially. Onthe connector X1_SIG (Figure 44) encoder inputs are: PosA/iGMR_A+ and PosA/iGMR_A (phase A),PosB/iGMR_B+ and PosB/iGMR_B (phase B) and PosZ/iGMR_Z and PosZ/iGMR_Z (phase Z - index) - pleaserefer to the Table 4. Please refer to the TLE5012 data sheet to get iGMR sensor running in incremental mode.
4.11.3 GMR Hall Sensor Interface ModeTLE5012 supports Hall sensor interface mode as well (iGMR emulates Hall sensor mode). For this purpose to theconnector X1-SIG inputs PosU/iGMR_U (phase U), PosV/iGMR_V (phase V) and PosW/iGMR_W (phase W)should be connected. Please notice (on Figure 60) that the pull-up resistors to 3.3 V (R491, R492 and R493) arealready provided on the Logic Board. For more details on Hall sensor mode please refer to the TLE5012 datasheet.
4.12 Definition of Layers for the Logic BoardThe Logic Board was made keeping the following rules for the copper thickness and the space between differentlayers shown in Figure 50.
Figure 50 Definition of the Layers for the Logic Board
Copper Isolation
1: 35 µm
2: 35 µm
3: 35 µm
4: 35 µm
5: 35 µm
1
2
3
4
5
6
6: 35 µm
1
2
3
4
5
6
1-2: 0.5 mm 2-3: 0.5 mm 3-4: 0.5 mm 4-5: 0.5 mm 5-6: 0.5 mm
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 51 V2.0, 2010-04
4.13 Schematics, Layout and Bill of MaterialsTo meet the individual customer requirements and to make the Logic Board for the HybridPACK™1 module as aplatform for development or modifications, all necessary technical data like schematics, layout and componentsfor the Logic Board are included in this chapter.
4.13.1 Schematics
Figure 51 Schematics Block Overview
PosW/iGMR_W
PosV/iGMR_V
PosU/iGMR_U
T EM P_BOARD
T EM P_BOARD
T em p_Board
SUPPLY
SUPPLY
POWERrstn
AD2S1200_DOS_uCAD2S1200_DOSAD2S1200_LOT _uCAD2S1200_LOT
AD2S1200_DB11_SO
OC
DS1
DEBUG
BRKINnBRKOUT n
T RSTnT CK
T DI
Resetn
T DO
T MS
AD2S1200_DB10_SCLKAD2S1200_DB9
AD2S1200_SOE_uC
AD2S1200_DB8AD2S1200_DB7AD2S1200_DB6
VDC_uC
AD2S1200_DB10_SCLK_uC
SERIAL_PARALLEL_M ODE_uC
AD2S1200_DB4AD2S1200_DB3
LEVEL_SHIFTER
LEVEL_SHIFTER
FLT Wn_uCFLT Vn_uCFLT Un_uC
RST _INn_uC
PWM WT _uCPWM WB_uC
PWM VT _uCPWM VB_uC
PWM UT _uCPWM UB_uC
FLT UnFLT Vn
FLT Wn
PWM WTPWM WB
PWM VTPWM VB
PWM UTPWM UB
RST _INnFLT n_uC FLT n
AD2S1200_DB2AD2S1200_DB1AD2S1200_DB0
CONNECTOR
CONNECTOR
I_UI_V
I_W
StatorT emp
S1
R1
S2
R2
S3
S6
ASC_RX
CAN1_LCAN1_HASC_TX
ADC_IN1
DIO_1
ADC_IN2
DIO_2DIO_3
ADC_IN3
iGM R_DAT A+
iGM R_CLK+iGM R_DAT A-
iGM R_CSn-iGM R_REn_DE+iGM R_REn_DE-
iGM R_CSn+iGM R_CLK-
PosW/iGMR_W
PosA/iGMR_A+PosA/iGMR_A-
PosU/iGMR_U
PosZ/iGMR_Z+
PosV/iGMR_V
PosZ/iGMR_Z-
PosB/iGMR_B+PosB/iGMR_B-
Resetn
AD2S1200_DB5
PWM UT _uc
AD2S1200_FS1_uC
PWM UB_ucPWM VT _uc
FLT n_uC
A
AD2S1200_DB11_SO_uC
PWM VB_ucPWM WT _ucPWM WB_uc
B
CAN1_L
AD2S1200_SAM PLEn_uC
CAN1_HASC_TXASC_RX
T MS
T DOT DI
T CKT RSTnBRKINn
S1
AD2S1200_DB0_uC
S3 NM
AD2S1200_RESET n_uC
S2S6
LEVEL_SHIFTER_RESOLVER
LEVEL_SHIFTER_RESOLVER
AD2S1200_DB0_uC
AD2S1200_DB9_uCAD2S1200_DB8_uCAD2S1200_DB7_uCAD2S1200_DB6_uCAD2S1200_DB5_uCAD2S1200_DB4_uCAD2S1200_DB3_uCAD2S1200_DB2_uCAD2S1200_DB1_uC
AD2S1200_DB0AD2S1200_DB1AD2S1200_DB2AD2S1200_DB3AD2S1200_DB4AD2S1200_DB5AD2S1200_DB6AD2S1200_DB7AD2S1200_DB8AD2S1200_DB9
AD2S1200_DB11_SO_uCAD2S1200_DB10_SCLKAD2S1200_DB11_SO
AD2S1200_DB10_SCLK_uC
AD2S1200_LOT _uCAD2S1200_DOS AD2S1200_DOS_uCAD2S1200_LOT
SERIAL_PARALLEL_M ODE_uCENn
AD2S1200_RDVELn_uC
R1R2
AD2S1200_DB1_uC
Sta torT emp
BRKOUT n
AD2S1200_DB2_uCAD2S1200_DB3_uCAD2S1200_DB4_uCAD2S1200_DB5_uC
RST n_uc
AD2S1200_DB6_uC
Resolver
Resolver
S2S6
S3S1
R2R1
BA
NM
AD2S1200_CSn
AD2S1200_DB7AD2S1200_DB8AD2S1200_DB9
AD2S1200_DB0AD2S1200_DB1AD2S1200_DB2AD2S1200_DB3AD2S1200_DB4AD2S1200_DB5AD2S1200_DB6
AD2S1200_DB10_SCLKAD2S1200_DB11_SO
AD2S1200_DOS
AD2S1200_RDVELn
AD2S1200_LOT
AD2S1200_FS1AD2S1200_FS2
AD2S1200_RESET nAD2S1200_SAM PLEn
AD2S1200_SOE
AD2S1200_DB7_uC
iGM R
iGM R
iGM R_DI_uC
iGM R_CLK_uC
iGM R_DAT A+
iGM R_CLK+iGM R_CLK-
iGM R_DAT A-iGM R_ROUT _uC
iGM R_CS_uCiGM R_RE_uCiGM R_CSn-
iGM R_REn_DE+iGM R_REn_DE-
iGM R_CSn+
iGM R_INDEX_uC
CONNECTOR_DriverBoard
CONNECTOR_DriverBoard
RST _INn
PWM WTPWM WB
PWM VTPWM VB
PWM UTPWM UB
VDC
FLT WnFLT VnFLT Un
FLT n
T EM P_HP2_UT EM P_HP2_W
T EM P_HP2_V
AD2S1200_DB8_uC
I_W
AD2S1200_DB9_uC
I_VI_U
WAT CHDOG
WAT CHDOG
WDO WDI
AD2S1200_CSn_uC
AD2S1200_FS2_uC
uC
uC
T EM P_IGBT _UT EM P_IGBT _V
T EM P_IGBT _W
BRKOUT n
T DIT MS
FLT _Wn
PWM UT n
T CK
FLT _Vn
PWM VT nPWM UBn
FLT _Un
PWM WT nPWM VBn
T RSTn
StatorT emp
PWM WBn
T DO
BRKINn
Resetn
RST n
I_UI_VI_W
ASCTXASCRX
ABNM
CAN1_LCAN1_H
ADC_IN1ADC_IN2
DIO_1DIO_2DIO_3
WDI
VDC_uC
FLT _n
T EM P_Board
ADC_IN3
AD2S1200_DB0_uC
AD2S1200_DB9_uCAD2S1200_DB8_uCAD2S1200_DB7_uCAD2S1200_DB6_uCAD2S1200_DB5_uCAD2S1200_DB4_uCAD2S1200_DB3_uCAD2S1200_DB2_uCAD2S1200_DB1_uC
AD2S1200_LOT _uC
AD2S1200_RDVELn_uC
AD2S1200_DOS_uC
AD2S1200_FS2_uCAD2S1200_FS1_uC
AD2S1200_DB11_SO_uCAD2S1200_DB10_SCLK_uC
AD2S1200_CSn_uC
AD2S1200_RESET n_uCAD2S1200_SAM PLE_uC
SERIAL_PARALLEL_M ODE_uC
iGM R_DI_uC
iGM R_CLK_uCiGM R_ROUT _uC
iGM R_CS_uCiGM R_RE_uC
PosW/iGMR_W
PosA/iGMR_A+PosA/iGMR_A-
PosU/iGMR_U
PosZ/iGMR_Z+
PosV/iGMR_V
PosZ/iGMR_Z-
PosB/iGMR_B+PosB/iGMR_B-
AD2S1200_SOE_uC
iGM R_INDEX_uC
FLT Un_ucFLT Vn_uc
PosB/iGMR_B-PosB/iGMR_B+PosA/iGMR_A-PosA/iGMR_A+
PosZ/iGMR_Z-PosZ/iGMR_Z+
FLT Wn_uc
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 52 V2.0, 2010-04
Figure 52 Power Supply
Figure 53 JTAG Debug Connector
Q4IPD90P03P4L-04
L11M URAT A_BLM21PG221SN
VDIG15+1.5V
VANA15+1.5V
KL_30_IN+12.0V
KL_30+12.0V
+
C11
5210
0uF
_35V
_MAL
2140
9700
1E3
R12810K
GND_DIG1
C11
5422
u/16
V/X
7R/F
_146
3575
C11
5522
u/16
V/X
7R/F
_146
3575
GND_DIG1
C11
664.
7u/5
0V/X
7R/C
1210
F47
5K5
+
C93
100u
F_3
5V_M
AL21
4097
001E
3
R474 10K
VDIG50+5.0V
GND_DIG1GND_DIG1
C115810u/10V/X7R
GND_DIG1
C86
22u/
16V/
X7R
/F_1
4635
75
Q_T 1+5.0V
Q_T 2+5.0V
Q_T 1+5.0V
VDIG15+1.5V
C1151100n/50V/X7R
C1153100n/50V/X7R
Q_T 2+5.0V
VDIG33+3.3V
GND_DIG1
Q_STBY+1.0V
C1156220n/25V/X7R/F_1414626
R47610K
VDIG33+3.3V
VDIG50+5.0V
VDIG33+3.3V
C11
464u
7/10
V/X
7R/F
_940
2195
R47310K
Q_STBY+1.0V
VSW+5.4V
Q_STBY+1.0V
D1M BRS340T 3
GND_DIG1
GND_DIG1 VDIG50+5.0V
R113SMK-R000 / Isabel lenhuette
POWERrstn
C11
451u
/25V
/X7R
/F_1
6370
35
KL_30+12.0V
IC13T LE7368E
GND
_A1
1
RT2
RO_13
RO_24
IN_LDO25
Q_LDO26
Q_T 17Q_T 28
EN_uC9
EN_IGN10
SEL_ST BY11
C1-12
C2-13
C1+14
C2+15
CCP16
GND
_P17
GN
D_A
218
GN
D_A
319
IN120
IN221
IN322
SEL_Q223
WDI24
WDO25
SW126
SW227
BST28
FB29
Q_LDO130
FB_EXT31
DRV_EXT32
Q_STBY33
IN_STBY34
M ON_ST BY35
GND
_A4
36
PAD
37
KL_30+12.0V
L3WE_7447709470
T yp XXL
C92
220n
F/1
00V/
C32
16X
7R2A
224K
T5
D5
SS12_1A_If_20V_Vr
VDIG15+1.5V
C11
591n
/16V
/X7R
VDIG33+3.3V
VDIG50+5.0V
GND_DIG1
IC53M AX6143AASA50
I.C._11
IN2
T EM P3
GND
4
T RIM5
OUT6
SHDN7
I.C._88
GND_DIG1
C11
42 4u7/
10V
/X7R
GND_DIG1
GND_DIG1
GND_DIG1
C115710u/10V/X7R
VDIG33+3.3V
C11
6710
0n/5
0V/X
7R/C
0805
F10
4K5
GND_ANA1
GND_DIG1
GND_ANA1
GND_DIG1
D6
SS12_1A_If_20V_Vr
R486 0R / 0.1%
R475 10K
C11
3522
u/16
V/X
7R/F
_146
3575
GND_REF1
Vref50+5.0V
GND_ANA1
VDIG33+3.3V
VANA33+3.3V
L1M URAT A_BLM21PG221SN
GND_ANA1
VANA50+5.0V
C85
100n
/50V
/X7R
GND_DIG1
C11
444u
7/10
V/X
7R/F
_940
2195
Q2BDP949
1
2
3
4
L9M URAT A_BLM21PG221SN
C123100n/16V/X7R
C11
5068
0n/5
0V/F
_141
4702
KL_30+12.0V
GND_DIG1
C11
3622
u/16
V/X
7R/F
_146
3575
D2
BZV55/C13
L10
M URAT A_BLM21PG221SN
D31SM B30AT 3
BRKOUT nT CK
BRKINn
Resetn T DI
VDIG33+3.3V
GND_DIG1
R210K
R310K
R410K
R110K
R610K
R510K
T RSTn
T DOT MS
K3-OCDS
HEADER 8X2
2468
10121416
13579111315
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 53 V2.0, 2010-04
Figure 54 Connector (external)
Figure 55 Watchdog
P20
P12
C1170
1n/5
0V/X
7RC1169
1n/5
0V/X
7R C11711n
/50V
/X7R
C12
081n
/50V
/X7R
_opt
C1172
1n/5
0V/X
7R_o
pt C1175
1n/5
0V/X
7R
GND_DIG1
GND_DIG1
GN
D_A
NA1
K2
Harwin M 80-5125042P
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3737
3939
4141
4343
4545
4747
4949
3636
3838
4040
4242
4444
4646
4848
5050
P5P3P1
GND_ANA1
P23P21
P15P13P11
P35P33P31P29P27P25
P43P41P39P37
P46P48
P42
P19P17
P9StatorT emp
iGM R_CSn-
iGM R_DAT A-
I_VI_U
ASC_RXASC_T X
ADC_IN3
I_W
R2R1
S1S3S6S2
VANA50+5.0V
VDIG50+5.0V
CAN1_LCAN1_H
GN
D_D
IG1
KL_30_IN+12.0V
GN
D_A
NA1
ADC_IN2ADC_IN1
DIO_3DIO_2DIO_1
iGM R_DAT A+
iGM R_CSn+iGM R_REn_DE+
iGM R_CLK-iGM R_CLK+
iGM R_REn_DE-
C1183
1n/5
0V/X
7RC1174
1n/5
0V/X
7R
C12
071n
/50V
/X7R
_opt
C1173
1n/5
0V/X
7R C1184
1n/5
0V/X
7R C1185
1n/5
0V/X
7R
C12
091n
/50V
/X7R
_opt
C11
971n
/50V
/X7R
C1177
1n/5
0V/X
7R
GND_DIG1
P28
P2
C11
911n
/50V
/X7R
Capacitors for ESD Protection of uC
C11
921n
/50V
/X7R
P44
C11
931n
/50V
/X7R
P24
C1176
1n/5
0V/X
7R
P26
C1178
1n/5
0V/X
7R C1179
1n/5
0V/X
7R
P30
C1180
1n/5
0V/X
7R C1181
1n/5
0V/X
7R_o
pt
P32
P4
P34P36
C1182
1n/5
0V/X
7R_o
pt
C12
051n
/50V
/X7R
_opt
C12
061n
/50V
/X7R
_opt
C12
031n
/50V
/X7R
_opt
C12
011n
/50V
/X7R
_opt
C12
021n
/50V
/X7R
_opt
C12
041n
/50V
/X7R
_opt
GND_DIG1
P6P8
P50
P14P16
C11
941n
/50V
/X7R
C11
871n
/50V
/X7R
_opt
C11
891n
/50V
/X7R
C11
881n
/50V
/X7R
_opt
C11
901n
/50V
/X7R
C11
951n
/50V
/X7R
P38P40
P22
C11
961n
/50V
/X7R
P7P10
GND_DIG1
PosZ/iGMR_Z-
PosB/iGMR_B-
PosA/iGMR_A-
PosV/iGMR_VPosU/iGMR_U
PosZ/iGMR_Z+
PosB/iGMR_B+
PosA/iGMR_A+
PosW/iGMR_WP47P45P45P45
GN
D_D
IG1
VDIG50+5.0V
P18
IC23
MAX6369KA-T
WDI1
GND2
NC3
SET 04
SET 15
SET 26
WDO7
Vcc8
W\D\O\
WDI
GND_DIG1
J1Jum per
11
22
R1514K7
R1504K7
R149opt
R1534K7
R154opt
GND_DIG1
set2 set1 set0 tdelay,twd0 0 0 1ms 0 0 1 10ms 0 1 0 30ms 0 1 1 Disabled 1 0 0 100ms 1 0 1 1s 1 1 0 10s 1 1 1 60s
C1210100n/16V/X7R
VDIG33+3.3V
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 54 V2.0, 2010-04
Figure 56 Resolver Interface
Figure 57 Level Shifter for Adapting Logic Levels for Driver Board
C1216opt
GND_ANA1
IC30
74LVC2G04GW
1A1
2A3
1Y6
2Y4
VCC
5G
ND
2
GND_ANA1
C1217opt
R1040R
R105opt
GND_ANA1GND_DIG1
R107opt
R1060R
GND_ANA1
T P1T estpad_SM D_EttingerR109
opt
R1080R
GND_ANA1
L8
M URAT A_BLM21PG221SN
T P2T estpad_SM D_Ettinger
C81
10n/
16V
/X7R
C78
10uF
/10V
/X7R
U1
HCM 49 8 .192M ABJ-UT
11
22
C84
20pF
/50V
/CO
G
C79
4u7/
25V/
X7R
C75
4u7/
16V/
X7R
C80
10n/
16V
/X7R
AD2
S120
0_D
B6
C76
10n/
16V
/X7R
C82
4u7/
25V/
X7R
T P3T estpad_SM D_Ettinger
C83
20pF
/50V
/CO
G
C77
10n/
16V
/X7R
AD2S1200_CSn
AD2S1200_RESET n
GND_DIG1
AB
AD2S1200_RDVELn
AD2S1200_FS2AD2S1200_FS1
NM
T P4T estpad_SM D_Ettinger
T P5T estpad_SM D_Ettinger
AD2S1200_DB11_SO
C111122uF/16V/X7R
T P6T estpad_SM D_Ettinger
R1
R2
R156
2K4/0.1%
R155
2K4/0.1%
R1593K3/0.1%
R157390/0 .1%
R160
2K4/0.1%
R158
2K4/0.1%
T P7T estpad_SM D_Ettinger
GND_DIG1
T P8T estpad_SM D_Ettinger
AD2S1200_LOT
VANA50+5.0V
AD2S1200_DOS
AD2
S120
0_D
B5
C1163
100n/16V/X7R
AD2S
1200
_DB4
T P9
T estpad_SM D_Ettin
AD2
S12
00_D
B3
S3
AD2
S12
00_D
B2
VDIG50+5.0V
AD2
S120
0_D
B1
GND_ANA1
AD2
S120
0_D
B0
VDIG50+5.0V
Sin
SinLO
Cos
+
-
V+
V-
IC4ALT1639HS
PACKAGE = 1
3
21
4
11
CosLO
+
-
IC4BLT1639HS
PACKAGE = 1
5
67
+
-
IC4CLT1639HS
PACKAGE = 1
10
98
VANA50+5.0V
GND_ANA1
+
-
IC4DLT1639HS
PACKAGE = 1
12
1314
VANA50+5.0V
GND_ANA1
GND_ANA1
Sin
GND_ANA1
AD2S1200_DB9AD2S1200_DB8
SinL
O
AD2S1200_DB7
S1
IC8
AD2S1200YST
DVdd1
RD2
CS3
SAM PLE4
RDVEL5
SOE6
DB11/SO7
DB10/SCLK8
DB99
DB810
DB711
DB6
12
DB5
13
DB4
14
DB3
15
DG
ND
16
DVd
d17
DB2
18
DB1
19
DB0
20
XTAL
OU
T21
CLK
IN22
DGND23CPO24A25B26NM27DIR28DOS29LOT30FS131FS232RESET33
EXC
34EX
C35
AGN
D36
Sin
37S
inLO
38AV
dd39
Cos
LO40
Cos
41A
GND
42R
EFB
YP43
REF
OUT
44
C1164
100n/16V/X7R
GND_DIG1
R47110K
D2S1200_SOE
GND_DIG1
Cos
LO
GND_DIG1
C14322uF/16V/X7R
C144100n/25V/X7R
GND_DIG1
IC6
LMH6672
OUT 11IN-1
2
IN+13
-Vs
4
IN+25
IN-26
OUT 27
+Vs
8
GND_DIG1
S2
S6
Cos
GND_DIG1
AD2S1200_SOEn
GND_ANA1
VDIG33+3.3V
GND_DIG1
R110
opt
S1200_SAM PLEn
C11
1210
0n/5
0V/X
7R/C
0805
F10
4K5
GND_ANA1
R4855K_pot_0,25W_20%_Bourns_3314J_opt
R48
45K
_pot
_0,2
5W_2
0%_B
ourn
s_33
14J_
opt
KL_30+12.0V
R4835K_pot_0,25W_20%_Bourns_3314J_opt
AD2S1200_DB10_SCLK
IC25T LE4266GSV10
I1
INH2
Q3
GND
4
R1020R
GND_ANA1
R103opt
GND_ANA1
GND_DIG1
FLT n_uC
R951K
R9315K
GND_DIG1
C68100n/16V/X7R
VDIG50+5.0V
GND_DIG1
R1001K
C71100n/16V/X7R
R9915K
GND_DIG1
FLT n
VDIG50+5.0V
GND_DIG1
GND_DIG1
GND_DIG1
GND_DIG1
C70100n/16V/X7R
R981K
R9615K VDIG50+5.0V
R921K
R9015K VDIG50+5.0V
GND_DIG1
C64100n/16V/X7R
VDIG50+5.0V
VDIG50+5.0V
R79
1K
R80
1K
R73 10K
C66100n/16V/X7R
R71
10K
R76
1K
C65100n/16V/X7R
VDIG33+3.3V
R78
1K R88
1K
R74
1K
R77
1K
R75
1K
IC2
74ALVC164245DGG
VCCA31
1DIR1
1A047
1A146
1A244
1A343
1A441
1A540
1A638
1A737
GND4
GND10
VCCB18VCCB7
1OE48
1B02
1B13
1B25
1B36
1B48
1B59
1B611
1B712
GND15
2A036
2A135
2A233
2A332
2A430
2A529
2A627
2A726
2B013
2B114
2B216
2B317
2B419
2B520
2B622
2B723
2DIR24
2OE25
GND21
GND28
GND34
GND39
GND45
VCCA42
FLT Un_uCFLT Vn_uC
FLT Wn_uC
PWM UT _uCPWM VB_uCPWM VT _uC
PWM WB_uCPWM WT _uC
RST _INn_uC
FLT Wn
FLT Vn
FLT Un
PWM UB_uCRST _INn
PWM VT
PWM WB
PWM WT
PWM UB
PWM UT
PWM VB
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 55 V2.0, 2010-04
Figure 58 Level Shifter for Adapting Logic Levels for Resolver IC
Figure 59 Microcontroller
AD2S1200_DB11_SO_uC
AD2S1200_DB0
IC29
74LVCH16T 245DL
VCCA31
1DIR1
1A047
1A146
1A244
1A343
1A441
1A540
1A638
1A737
GND4
GND10
VCCB18VCCB7
1OE48
1B02
1B13
1B25
1B36
1B48
1B59
1B611
1B712
GND15
2A036
2A135
2A233
2A332
2A430
2A529
2A627
2A726
2B013
2B114
2B216
2B317
2B419
2B520
2B622
2B723
2DIR24
2OE25
GND21
GND28
GND34
GND39
GND45
VCCA42
AD2S1200_DB1
GND_DIG1
GND_DIG1
AD2S1200_DB2
GND_DIG1
AD2S1200_DB3
AD2S1200_DB10_SCLK
AD2S1200_DB4
VDIG50+5.0V
AD2S1200_DB5AD2S1200_DB6
C1133100n/16V/X7R
VDIG33+3.3V
C1132100n/16V/X7R
AD2S1200_DB7
AD2S1200_DB0_uC
AD2S1200_DB8
AD2S1200_DB10_SCLK_uC
AD2S1200_DB1_uC
AD2S1200_DB9
AD2S1200_DB2_uCAD2S1200_DB3_uC
AD2S1200_DB11_SO
SERIAL_PARALLEL_M ODE_uC
AD2S1200_DB4_uC
AD2S1200_DOS
AD2S1200_DB5_uC
AD2S1200_LOT
AD2S1200_DB6_uCAD2S1200_DB7_uCAD2S1200_DB8_uCAD2S1200_DB9_uC
AD2S1200_DOS_uCAD2S1200_LOT _uC
ENn
R498 0R_opt
R497 0R
GND_DIG1
R456 1K
C10
7
100n
/16V
/X7R
VDIG33+3.3V
GND_DIG1
GND_DIG1
VDIG50+5.0V
GND_DIG1
AD2S1200_DOS_uC
DIO_2
FLT _Wn
DIO_3
FLT _Wn
FLT _Un
T EM P_Board
C11
2
100n
/16V
/X7R
T MST DOT DI
BRKOUT nBRKINn
T MST DO
T CKT DI
BRKOUT nBRKINn
T RSTn C10
6
100n
/16V
/X7R
C10
4
10n/
16V/
X7R
GND_DIG1
IC16EH2645ETT TS-20.000M
T RI1
GND2
OUT3
VDC4
L5M URAT A_BLM21P221SN
VDIG33+3.3V
R1335K1
C10
5
22uF
/6.3
V/X7
R
Resetn
AD2S1200_RDVELn_uC
C113
100n/16V/X7R
INPUT_FILT ER
Input_Fi l ter
ABNM
DIO_1DIO_2DIO_3
StatorT emp
VDC
T EM P_IGBT _UT EM P_IGBT _VT EM P_IGBT _W
I_UI_VI_W
AN15AN14
AN3
AN1
ADC_IN1ADC_IN2
AN17
AN19
AN13
T EM P_Board
ADC_IN3
AN31
P1_8P1_10P4_3
P0_12P0_14P0_11
P4_2P2_0P2_2
P4_0P4_1
P2_5
AN18
AN29
AN4
AN2
AN5
PosW/iGMR_W
PosA/iGMR_A+PosA/iGMR_A-
PosU/iGMR_U
PosZ/iGMR_Z+
PosV/iGMR_V
PosZ/iGMR_Z-
PosB/iGMR_B+PosB/iGMR_B-
FLT _Vn
Resetn
C111
100n/16V/X7R
GND_DIG1
WDI
R134
1K
FLT _Vn
PWM UBnPWM UT n
PWM VBn
PWM VT n
PWM WBn
PWM WT n
T CK
AD2S1200_DB0_uC
R1351K
StatorT emp
EEPR
OM
EEPROM
CSn
SCK SI SO
T RSTn
C11
5
100n
/16V
/X7R
AD2S1200_DB1_uCAD2S1200_DB2_uC
C11
4
100n
/16V
/X7R
AD2S1200_DB3_uCAD2S1200_DB4_uC
AD2S1200_RESET n_uC
AD2S1200_DB5_uCAD2S1200_DB6_uC
RST n
AD2S1200_DB7_uCAD2S1200_DB8_uC
VDIG33+3.3V
RXDOA
T XDOA
IC52M AX3232EIPWRQ1
C2+4
C1+1
C1-3
T 2out7
V-6
T 2in10
R2in8
T 1in11
R1out12
R1in13
R2out9
V+2
C2-5
Vcc16
GND15
T 1out14
GND_DIG1
GND_DIG1
GND_DIG1
AD2S1200_DB9_uC
GND_DIG1
ASCRX
ASCTX
PosA/iGMR_A+
PosZ/iGMR_Z-
PosB/iGMR_B-
PosA/iGMR_A-
PosZ/iGMR_Z+
PosB/iGMR_B+
PosU/iGMR_U
PosW/iGMR_W
PosV/iGMR_V
I_U
FLT _n
C10
8
22uF
/6.3
V/X7
R
R13160R
R13260R
C1104.7n/50V/X7R
GND_DIG1
FL1
B82789C0104N001
1
2 3
4
I_VI_W
FLT _n
VDC_uC
T EM P_IGBT _U
T EM P_IGBT _WT EM P_IGBT _V
ADC_IN1
AD2S1200_FS1_uC
SERIAL_PARALLEL_M ODE_uC
VDIG33+3.3V
iGM R_ROUT _uC
iGM R_INDEX_uC
AD2S1200_CSn_uC
AD2S1200_DB11_SO_uC
iGMR
AD2S1200_DB10_SCLK_uC
iGM R_DI_uC
SW2SW DIP-4/SM
iGMR Serial Mode/Encoder Mode: (switch pin 1 open (OFF)) -> iGMR_INDEX_uC low
iGMR disabled: (switch pin 1 closed (ON))
Resolver Serial (2,3,4 is ON)- uC_TC1767.SCLK1 drives- MRST1 as input, driven by Resolver- SERIAL_PARALLEL_MODE_uC is Default is serial mode- AD2S1200_CSn_uC
iGM R_CLK_uC
iGM R_RE_uCiGM R_CS_uC
AD2S1200_SOE_uC
A
RST n
CAN1_H
uc_T C1767
uc_T C1767
AN14AN15
GPT A27
GPT A19
GPT A18GPT A20
GPT A9GPT A8
AN1
T DOT MS
T DIT CKT RSTn
BRKINnBRKOUT n
Clk
T XD0ARXD0A
SLSO0
SLSO1
SCLK0
M TSR0M RST0
PORST n
SCLK1M RST1
RXDCAN1T XDCAN1
AN17
AN19
AN3AN4
AN2
P5_8P5_9
AN13
GPT A39
AN31GPT A3
P5_6P5_7
P5_10P5_11
P5_12P5_13
P3_11P3_12
P5_15
P5_0P5_1P5_2P5_3P5_4P5_5
P3_10
P1_8P1_10P4_3
P0_12P0_14P0_11
P2_0P2_2
P4_2
P4_0P4_1
P2_5
AN18
P1_9
P1_5P1_6P1_7
AN29
AN5
P3_13
P3_8SLSO2
P2_12
DIO_1
ADC_IN2
AD2S1200_FS2_uC
R10110K
VDIG33+3.3V
ADC_IN3
B
CAN1_L
FLT _Un
AD2S1200_LOT _uC
NM
CAN_TX1
IC17T LE6250GV33
T xD1
GND
2Vc
c3
RxD4
V33V
5
CANL6CANH7
INH8
AD2S1200_SAM PLE_uC
CAN_RX1
C10
9
100n
/16V
/X7R
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 56 V2.0, 2010-04
Figure 60 Input Filter
R223
6K8
R214
6K8
C1160
100n/16V/X7R
C1041
10p/50V/X7R
R430
100R
GND_DIG1
General Purpose
+
-
V+
V-
IC31ALT1639HS
PACKAGE = 13
21
411
C1042
10p/50V/X7R
+
-
IC31BLT1639HS
PACKAGE = 1
5
67
+
-
IC31DLT1639HS
PACKAGE = 1
12
1314
+
-
IC31CLT1639HS
PACKAGE = 1
10
98
IC33
AM26C32QD
1A+2
1Y3
Vcc
16G
ND
8
1B-1
2A+6
2B-7
3A+10
3B-9
4A+14
4B-15
2Y5
3Y11
4Y13
G+4
G-12
R217
6K8
R431
100R
Encoder Inputs/iGMR Inputs (iGMR Emulates Encoder)
C1721n/50V/X7R
GND_ANA1
R175
68KR176opt
C1761n/50V/X7RR185
opt
GND_ANA1
R184
68K
C1801n/50V/X7R
GND_ANA1
R191
68KR194opt
C1831n/50V/X7RR202
opt
GND_ANA1
R228
6K8
R198
68K
C1871n/50V/X7R
GND_ANA1
R205
68KR208opt
StatorT emp
C1916800p/10V/C0G
VDC
C1946800p/10V/C0G
C1966800p/10V/C0G
T EM P_IGBT _U
T EM P_IGBT _W
T EM P_IGBT _V
I_V
I_U
AN13
AN14
AN15
I_W
AN1
AN4
AN3
AN2
GND_ANA1
GND_ANA1
AN29
R235
6K8
Digital IN/OUT
GND_ANA1
R215
3K3
DIO_1C1161
100n/16V/X7R
GND_ANA1
General Purpose Analogue IN
GND_DIG1
R174
10K
VANA50+5.0V
VANA50+5.0V
Temperature and DC Bus MeasurementsVDIG50+5.0V
C179100p/50V/X7RR193
91K
R189
51K
R20091K
R196
51K C182100p/50V/X7R
GND_DIG1
GND_DIG1
GND_DIG1
C174100p/50V/X7RR182
91K
R179
51K
DIO_2
R180
1KR1832K
P0_14
R1902K
P0_11
R187
1K
R2012K
R197
1K
GND_DIG1
GND_DIG1
R481
optGND_ANA1
GND_DIG1
DIO_3
P0_12
R2372K
P1_10
R234
1K
R181opt
GND_ANA1
P4_3
R17851K C173
1n/50V/X7R
R238
1KR2392K
AN17ADC_IN1
R240
1KR2412K
NM
B
A P1_8
GND_DIG1
GND_DIG1
GND_DIG1
R472
3K3
C104410p/50V/X7R
R218
3K3
R192opt
GND_ANA1
R188
51K C1781n/50V/X7R
GND_ANA1
C104510p/50V/X7R
R480
opt
R17710K
C104310p/50V/X7R
GND_ANA1
C1841n/50V/X7RR203
opt
R199
51K
Phase Current Sense
AN31
R229
0R
PosA/iGMR_A+
Emulated encoder outputs out of AD2S1200
PosZ/iGMR_Z-
PosB/iGMR_B-
PosA/iGMR_A-
PosZ/iGMR_Z+
PosB/iGMR_B+
ADC_IN2
R477
opt
ADC_IN3
R18610K
L12M URAT A_BLM21PG221SN
P4_1
C10643300p/10V/C0G
R19510K
GND_ANA1
R224
0R_opt
C10653300p/10V/C0G
AN18
C10673300p/10V/C0G
AN19
R429
100R
P4_0
AN5T EM P_Board
C1040
10p/50V/X7R
P2_5
GND_DIG1
VANA50+5.0V
VANA50+5.0V
VANA50+5.0V
GND_ANA1
GND_ANA1
GND_ANA1
C114810p/50V/X7R
C114910p/50V/X7R
C114710p/50V/X7R
R496
1K
GND_DIG1
R4912K7
GND_ANA1
PosV/iGMR_V
PosU/iGMR_U
Hall Sensor/iGMR Inputs (iGMR Emulates Hall Sensor)Assumed Open-Collector output from Hall sensor
PosW/iGMR_W
VDIG33+3.3V
P2_2
C1213opt
P4_2
P2_0
C1215opt
C1214opt
R4922K7
R4932K7
GND_DIG1
D7BAT 54-04W
GND_DIG1
D8BAT 54-04W
GND_DIG1
D9BAT 54-04W
R494
1K
R495
1K
GND_ANA1
R482
0R
R230
6K8
R479
0R
R478
0R
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 57 V2.0, 2010-04
Figure 61 Microcontroller TC1767 Pin Assignment
GND_ANA1
VANA33+3.3V
P5_0
GPT A39
BRKOUT n
P1_8
GND_ANA1
P5_1P5_2
P5_4P5_3
P5_5
GND_ANA1
P0_14
P5_6
P5_11P5_10P5_9P5_8P5_7
R499 100kR500 100k
P5_15
R502 100kR501 100k
R504 100kR503 100k
R506 100kR505 100k
VDIG33+3.3V
C148100n/16V/X7R
C14
6
47n/
16V/
X7R
C14
7
47n/
16V/
X7R
CFG7
CFG5CFG6
CFG0
CFG4CFG3CFG2CFG1
AN15AN14
P0_12
GPT A27
VANA50+5.0V
GPT A19GPT A20
GPT A8GPT A9
AN1
GND_ANA1
GND_REF1
VANA33+3.3V
P1_5
P4_2
P1_6P1_7
GND_ANA1
AN3
P2_0
AN4
P5_13P5_12
GPT A18
P2_12
SW1
T yco_1-1571983-1
AN13
SLSO0
RXD0AT XD0A
SCLK1
M TSR0M RST0
M RST1
SCLK0
SLSO1
T XDCAN1RXDCAN1
GND_DIG1
AN29
VANA15+1.5V
AN17
C14
5
47n/
16V/
X7R
R161 1K
AN19
Ana log Power Supply
IC24ESAK-TC1767-256F133HL
Package = 1
V_DDM54
V_DDMF24
V_DDAF23
V_S
SM53
V_S
SM
F25
V_A
GND
051
V_F
AGN
D27
V_AREF052
V_FAREF26
GND_ANA1
P3_10
R162 1K
AN5
R163 1K
Analog Inputs
IC24FSAK-TC1767-256F133HL
Package = 1
AN067
AN166
AN265
AN364
AN463
AN562
AN661
AN736
AN860
AN959
AN1058
AN1157
AN1256
AN1355
AN1450
AN1549
AN1648
AN1747
AN1846
AN1945
AN2044
AN2143
AN2242
AN2341
AN2440
AN2539
AN2638
AN2737
AN2835
AN2934
AN3033
AN3132
AN3231
AN3330 AN34
29
AN3528
P4_1
R164 1K
Port 0: GPT A, SCU
IC24GSAK-TC1767-256F133HL
Package = 1
P0.0/IN0/HWCFG0/OUT 0/OUT 56145
P0.1/IN1/HWCFG1/OUT 1/OUT 57146
P0.2/IN2/HWCFG2/OUT 2/OUT 58147
P0.3/IN3/HWCFG3/OUT 3/OUT 59148
P0.4/IN4/HWCFG4/OUT 4/OUT 60166
P0.5/IN5/HWCFG5/OUT 5/OUT 61167
P0.6/IN6/HWCFG6/REQ2/OUT 6/OUT62173
P0.7/IN7/HWCFG7/REQ3/OUT 7/OUT63174
P0.8/IN8/OUT8/OUT 64149
P0.9/IN9/OUT9/OUT 65150
P0.10/IN10/OUT 10/OUT 66151
P0.11/IN11/OUT 11/OUT 67152
P0.12/IN12/OUT 12/OUT 68168
P0.13/IN13/OUT 13/OUT 69169
P0.14/IN14/REQ4/OUT 14/OUT 70175
P0.15/IN15/REQ5/OUT 15/OUT 71176
Port 1: GPT A, SSC1, ADC0, OCDSIC24H
SAK-TC1767-256F133HL Package = 1
P1.0 /IN16/OUT 16/OUT 72/BRKIN/BRKOUT116
P1.1 /IN17/OUT 17/OUT 73119
P1.2 /IN18/OUT 18/OUT 7493
P1.3 /IN19/OUT 19/OUT 7598
P1.4 /IN20/EMGSTOP/OUT 20/OUT 76107
P1.5 /IN21/OUT 21/OUT 77108
P1.6 /IN22/OUT 22/OUT 78109
P1.7 /IN23/OUT 23/OUT 79110
P1.8 /IN24/IN48/MT SR1B/OUT 24/OUT 4894
P1.9 /IN25/IN49/MRST1B/OUT 25/ OUT 4995
P1.10/IN26/IN50/OUT26/OUT50/SLSO1796
P1.11/IN27/IN51/SCLK1B/OUT 27/OUT 5197
P1.12/IN16/OUT 16/AD0EM UX073
P1.13/IN17/OUT 17/AD0EM UX172
P1.14/IN18/OUT 18/AD0EM UX271
P1.15/BRKIN/BRKOUT117
R165 1K
Port 2: GPT A, SSC0/1, MLI0 , M SC0IC24I
SAK-TC1767-256F133HL Package = 1
P2.0 /IN32/OUT 32/OUT 28/T CLK074
P2.1 /IN33/T READY0A/OUT 33/SLSO03/SLSO1375
P2.2 /IN34/OUT 34/OUT 29/T VALID0A76
P2.3 /IN35/OUT 35/OUT 30/T DAT A077
P2.4 /IN36/RCLK0A/OUT 36/OUT 3178
P2.5 /IN37/OUT 110/OUT 37/RREADY0A79
P2.6 /IN38/RVALID0A/OUT 111/OUT 3880
P2.7 /IN39/RDAT A0A/OUT3981
P2.8 /SLSO04/SLSO14/EN00164
P2.9 /SLSO05/SLSO15/EN01160
P2.10/IN10/OUT 0/M RST 1A161
P2.11/IN11/OUT 1/SCLK1A/FCLP0B162
P2.12/IN12/OUT 2/M TSR1A/SOP0B163
P2.13/IN13/OUT 3/SLSI11/SDI0165
C149100n/16V/X7R
R166 1K
Port 3: GPT A, ASC0/1 , SSC0/1 , SCU, CANIC24J
SAK-TC1767-256F133HL Package = 1
P3.0/OUT84/RXD0A136
P3.1/OUT85/TXD0135
P3.2/OUT86/SCLK0129
P3.3/OUT87/MRST 0130
P3.4/OUT88/MT SR0132
P3.5/SLSO00/SLSO10/SLSO00&SLSO10126
P3.6/SLSO01/SLSO11/SLSO01&SLSO11127
P3.7/SLSI01/OUT89/SLSO02&SLSO12131
P3.8/SLSO06/OUT 90/T XD1128
P3.9/OUT91/RXD1A138
P3.10/OUT 92/REQ0137
P3.11/OUT 93/REQ1144
P3.12/OUT 94/RXDCAN0/RXD0B143
P3.13/OUT 95/T XDCAN0/T XD0142
P3.14/OUT 96/RXDCAN1/RXD1B134
P3.15/OUT 97/T XDCAN1/T XD1133
R167 1K
Port 4: GPT A, SCUIC24K
SAK-TC1767-256F133HL Package = 1
P4.0/IN28/IN52/OUT 28/OUT 5286
P4.1/IN29/IN53/OUT 29/OUT 5387
P4.2/IN30/IN54/OUT 30/OUT 54/EXT CLK188
P4.3/IN31/IN55/OUT 31/OUT 55/EXT CLK090
GND_ANA1
Port 5: GPT A, M LI0IC24L
SAK-TC1767-256F133HL Package = 1
P5.0/IN26/IN40/OUT 8/OUT 401
P5.1/IN27/IN41/OUT 9/OUT 412
P5.2/IN28/IN42/OUT 10/OUT 423
P5.3/IN43/OUT 11/OUT 434
P5.4/IN29/IN44/OUT 12/OUT 445
P5.5/IN30/IN45/OUT 13/OUT 456
P5.6/IN31/IN46/OUT 14/OUT 467
P5.7/IN47/OUT 15/OUT 478
P5.8/OUT89/RDAT A0B13
P5.9/OUT90/RVALID0B14
P5.10/OUT 91/RREADY0B15
P5.11/OUT 92/RCLK0B16
P5.12/OUT 93/SLSO07/TDATA017
P5.13/SLSO16/T VALID0B18
P5.14/OUT 94/T READY0B19
P5.16/OUT 95/T CLK09
R168 1K
P4_0
Vre f50+5.0V
AN2
CFG0
P3_13
CFG6CFG7
CFG5
CFG1
GND_ANA1
AN31
P0_11
GPT A3
CFG2CFG3
P2_2
P2_5
GND_REF1
CFG4
GND_ANA1
P1_10
SLSO2P3_8
AN18
P4_3
P3_11
BRKINn
GND_ANA1
GND_ANA1
P3_12
P1_9
PORST n
R17
3
10K
VDIG33+3.3V R
172
220R
GND_DIG1
D4
LED
_LSM
676-
MQ
VDIG33+3.3V
10k
10kQ6A
BCR183S PACKAGE = 1
2
16
R17
1
4K7
VDIG33+3.3V
L6
B82422A1103K
R17
0
0R_o
pt
L7
B82422A1103K
R16
9
10K
VDIG33+3.3V
Clk
GND_DIG1
VDIG15+1.5V
VDIG33+3.3V
GND_DIG1
GND_DIG1Osci l l ator
IC24BSAK-TC1767-256F133HL
Package = 1
XTAL1102
XTAL2103
V_DDOSC105
V_DDOSC3106
VSSOSC104
General Contro l
IC24CSAK-TC1767-256F133HL
Package = 1
PORST121
T ESTM ODE118
ESR0122
ESR1120
OCDS / JTAG Contro l
IC24DSAK-TC1767-256F133HL
Package = 1
T RST114
T CK/DAP0115
T DI/BRKIN111
T DO/DAP2/BRKOUT113
T MS/DAP1112
GND_DIG1
T RSTnT CK
T MS
T DIT DO
C15010u/10V/X7R
C15110u/10V/X7R
C17
0
100n
/16V
/X7R
C16
8
100n
/16V
/X7R
C15
9
100n
/16V
/X7R
C15
8
100n
/16V
/X7R
C16
7
100n
/16V
/X7R
C16
6
100n
/16V
/X7R
C16
5
100n
/16V
/X7R
C15
3
100n
/16V
/X7R
C15
4
100n
/16V
/X7R
C17
1
100n
/16V
/X7R
C16
4
100n
/16V
/X7R
C16
0
100n
/16V
/X7R
C15
5
100n
/16V
/X7R
C161100n/16V/X7R
C16
3
100n
/16V
/X7R
C15
6
100n
/16V
/X7R
C16
9
100n
/16V
/X7R
C15
7
100n
/16V
/X7R
GND_DIG1
GND_DIG1
VDIG33+3.3V
GND_DIG1 VDIG33+3.3V
GND_DIG1
VDIG15+1.5V
C15
2
100n
/16V
/X7R
Dig i tal Ci rcu i try
Power Supply
IC24ASAK-TC1767-256F133HL
Package = 1
V_DDP11
V_DDP20
V_DDP69
V_DDP83
V_DDP91
V_DDP100
V_DDP124
V_DDP139
V_DDP154
V_DDP171
V_SS
12
V_SS
22
V_SS
70
V_SS
82
V_SS
85
V_SS
92
V_SS
101
V_SS
125
V_SS
140
V_SS
155
V_SS
172
V_DD10
V_DD(SB)21
V_DD68
V_DD84
V_DD99
V_DD123
V_DD153
V_DD170
V_DDFL3141
V_DD89
C11
10
100n
/16V
/X7R
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 58 V2.0, 2010-04
Figure 62 EEPROM
Figure 63 GMR SSC Interface
Figure 64 Temperature Sense of the Logic Board
R910K
R810K
C29 100n
/16V
/X7R
R10opt
IC1
AT25256A-10T Q-2.7CS
1SO
2
WP3
GND4
SI5SCK6
HOLD7
VCC8
R710K
SCK
CSn
SOSI
VDIG33+3.3V
GND_DIG1
IC26 DS92LV010
DE1
RE5
DIN2
ROUT3 VC
C8
GND
4
DO/RI+7
DO/RI-6
IC28 74LVC2G04GW
1A1
2A3
1Y6
2Y4
VCC
5G
ND
2
iGM R_DAT A+
iGM R_DAT A-
GND_DIG1
iGM R_CS_uC
GND_DIG1
R4891K
R4901K
GND_DIG1 GND_DIG1
VDIG33+3.3V
iGM R_RE_uC
iGM R_DI_uCiGM R_ROUT _uC R447
100R
C1127
100n/16V/X7R
GND_DIG1
iGM R_REn_DE+
iGM R_CSn+
iGM R_REn_DE-
iGM R_CSn-C1131
100n/16V/X7R
GND_DIG1
C113010p/16V/X7R
GND_DIG1
C112810p/16V/X7R
GND_DIG1
VDIG33+3.3V
iGM R_CLK-
iGM R_CLK+iGM R_CLK_uC
iGM R_INDEX_uC
R4881K
GND_DIG1
VDIG33+3.3V
GND_DIG1
C1129
100n/16V/X7R
GND_DIG1
IC32
DS90LV031A
Dout1+2
Din11
Vcc
16G
ND8
Dout1-3
Dout2+6
Dout2-5
Dout3+10
Dout3-11
Dout4+14
Dout4-13
Din27
Din39
Din415
EN4
EN*12
Unit temperature sensor (Ambient)Position: bottom of Logic BoardTemp = 10mV/°C + 500mVTemp @ -40C: +100mVTemp @ +125C: +1,750V
LPF: -3dB @ 32Hz
C12
1110
0n/5
0V/X
7R R487
270K
C121222n/50V/X7R
GND
Vout
VCC
IC54
LM50CIM3
2
3
1
T em p_Board
VANA50+5.0V
GND_ANA1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 59 V2.0, 2010-04
Figure 65 Connector to the Driver Board
4.13.2 Assembly Drawing
Figure 66 Assembly Drawing of the Logic Board (Top)
K1
T W-12-06-L-D-475-SM-A
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
PWM WTRST _INn
PWM VBPWM VTPWM WB
PWM UBPWM UT
VDC
FLT Vn
FLT Wn
FLT nFLT UnT EM P_HP2_V
T EM P_HP2_W
T EM P_HP2_U
KL_30+12.0V
GND_DIG1
KL_30+12.0V
GND_DIG1GND_ANA1
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 60 V2.0, 2010-04
Figure 67 Assembly Drawing of the Logic Board (Bottom)
For detail information use the zoom function of your PDF viewer to zoom into the drawings on Figure 66 andFigure 67.
4.13.3 LayoutLayout of the Logic Board is shown on Figure 68 (Top Layer), on Figure 69 (Layer-2), on Figure 70 (Layer-3), onFigure 71 (Layer-4), on Figure 72 (Layer-5) and on Figure 73 (Bottom Layer).
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 61 V2.0, 2010-04
Figure 68 Logic Board - Top Layer
Figure 69 Logic Board - Layer-2
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 62 V2.0, 2010-04
Figure 70 Logic Board - Layer-3
Figure 71 Logic Board - Layer-4
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 63 V2.0, 2010-04
Figure 72 Logic Board - Layer-5
Figure 73 Logic Board - Bottom Layer
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 64 V2.0, 2010-04
4.13.4 Bill of Materials
Table 7 Bill of Materials for Logic Board for Hybrid Kit for HybridPACK™1Reference Value / Device PackageC29,C64,C68,C70,C71,C106,C107,C109,C111,C112,C113,C114,C115,C123,C148,C149,C152,C153,C154,C155,C156,C157,C158,C159,C160,C161,C163,C164,C165,C166,C167,C168,C169,C170,C171,C1110,C1210
100n/16V/X7R C0402
C65,C66,C1127,C1129,C1131,C1132,C1133,C1160,C1161,C1163,C1164
100n/16V/X7R C0603
C75 4u7/16V/X7R C1206C76,C77,C80,C81,C104 10n/16V/X7R C0402C78 10uF/10V/X7R C1206C79,C82 4u7/25V/X7R C1206C83,C84 20pF/50V/COG C0402C85,C1151,C1153 100n/50V/X7R C0603C86,C1135,C1136,C1154,C1155 22u/16V/X7R/F_1463575 C1210C92 220nF/100V/C3216X7R2A2
24KT5C1206
C93,C1152 100uF_35V_MAL214097001E3
C1010_CAP_Pin1_Plus
C105,C108 22uF/6.3V/X7R C1206C110 4.7n/50V/X7R C0603C143,C1111 22uF/16V/X7R C1210C144 100n/25V/X7R C0603C145,C146,C147 47n/16V/X7R C0402C150,C151,C1157,C1158 10u/10V/X7R C1206C172,C173,C176,C178,C180,C183,C184,C187,C1169,C1170,C1171,C1173,C1174,C1175,C1176,C1177,C1178,C1179,C1180,C1183,C1184,C1185,C1189,C1190,C1191,C1192,C1193,C1194,C1195,C1196,C1197
1n/50V/X7R C0402
C174,C179,C182 100p/50V/X7R C0402C191,C194,C196 6800p/10V/C0G C0603C1040,C1041,C1042,C1043,C1044,C1045,C1147,C1148,C1149
10p/50V/X7R C0603
C1064,C1065,C1067 3300p/10V/C0G C0603C1112,C1167 100n/50V/X7R/C0805F104
K5C0805
C1128,C1130 10p/16V/X7R C0603C1142 4u7/10V/X7R C1210
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 65 V2.0, 2010-04
C1144,C1146 4u7/10V/X7R/F_9402195 C1206C1145 1u/25V/X7R/F_1637035 C0603C1150 680n/50V/F_1414702 C1206C1156 220n/25V/X7R/F_1414626 C0603C1159 1n/16V/X7R C0402C1166 4.7u/50V/X7R/C1210F475K
5C1210
C1172,C1181,C1182,C1187,C1188,C1201,C1202,C1203,C1204,C1205,C1206,C1207,C1208,C1209
1n/50V/X7R_opt C0402
C1211 100n/50V/X7R C0805C1212 22n/50V/X7R C0603R10,R103,R105,R107,R109,R110,R176,R181,R185,R192,R194,R202,R203,R208,R477,R480,R481,C1213,C1214,C1215,C1216,C1217
Opt R0603
D1 MBRS340T3 SMCD2 BZV55/C13 SOD80C_Pin1_CathodeD3 1SMB30AT3 SMBD4 LED_LSM676-MQ Vishay_TLMK2300D5,D6 SS12_1A_If_20V_Vr DO214AC_SMA_Pin1_CathodeD7,D8,D9 BAT54-04W SOT323FL1 B82789C0104N001 EPCOS_B82789C0IC1 AT25256A-10TQ-2.7 TSSOP8IC2 74ALVC164245DGG TSSOP48IC4,IC31 LT1639HS SO14IC6 LMH6672 SO8IC8 AD2S1200YST LQFP44_P0_8IC13 TLE7368E SO36-38IC16 EH2645ETTTS-20.000M Ecliptek_EH2645IC17 TLE6250GV33 SO8IC23 MAX6369KA-T SOT23-8IC24 SAK-TC1767-256F133HL LQFP176_p0_50IC25 TLE4266GSV10 SOT223IC26 DS92LV010 SO8IC28,IC30 74LVC2G04GW SOT363IC29 74LVCH16T245DL SSOP48IC32 DS90LV031A SO16-1IC33 AM26C32QD SO16-1IC52 MAX3232EIPWRQ1 TSSOP16
Table 7 Bill of Materials for (cont’d)Logic Board for Hybrid Kit for HybridPACK™1Reference Value / Device Package
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 66 V2.0, 2010-04
IC53 MAX6143AASA50 SO8IC54 LM50CIM3 SOT23J1 Jumper Jumper_2wayK1 TW-12-06-L-D-475-SM-A Samtec_TW-12-06-L-D-475-SM-
AK2 Harwin M80-5125042P Harwin_M80-5125042PK3-OCDS HEADER 8X2 tyco_1761686-6L1,L8,L9,L10,L11,L12 MURATA_BLM21PG221SN L0805L3 WE_7447709470 WE-PD_744770L5 MURATA_BLM21P221SN L0805L6,L7 B82422A1103K L1210Q2 BDP949 SOT223Q4 IPD90P03P4L-04 TO252-3Q6 BCR183S SOT363R1,R2,R3,R4,R5,R6,R7,R8,R9,R71,R73,R173,R174,R177,R186,R195,R471,R473,R474,R475,R476
10K R0402
R74,R75,R76,R77,R78,R79,R80,R88,R92,R95,R98,R100,R134,R135,R161,R162,R163,R164,R165,R166,R167,R168,R180,R187,R197,R234,R238,R240,R456
1K R0402
R90,R93,R96,R99 15K R0402R101,R128,R169 10K R0603R102,R104,R106,R108,R478,R479,R482,R497
0R R0603
R113 SMK-R000 / Isabellenhuette R1206R131,R132 60R R0603R133 5K1 R0402R149,R154 Opt R0402R150,R151,R153 4K7 R0402R155,R156,R158,R160 2K4/0.1% R0603R157 390/0.1% R0603R159 3K3/0.1% R0603R170,R224,R498 0R_opt R0603R171 4K7 R0603R172 220R R0603R175,R184,R191,R198,R205 68K R0402R178,R179,R188,R189,R196,R199 51K R0402R182,R193,R200 91K R0402R183,R190,R201,R237,R239,R241 2K R0402
Table 7 Bill of Materials for (cont’d)Logic Board for Hybrid Kit for HybridPACK™1Reference Value / Device Package
Hybrid Kit for HybridPACK™1Evaluation Kit for Applications with HybridPACK™1 Module
Logic Board for Hybrid Kit for HybridPACK™1
Application Note 67 V2.0, 2010-04
R214,R217,R223,R228,R230,R235 6K8 R0402R215,R218,R472 3K3 R0402R229 0R R0402R429,R430,R431,R447 100R R0603R483,R484,R485 5K_pot_0,25W_20%_Bourn
s_3314J_optBourns_3314J
R486 0R / 0.1% R0402R487 270K R0603R488,R489,R490,R494,R495,R496 1K R0603R491,R492,R493 2K7 R0603R499,R500,R501,R502,R503,R504,R505,R506
100k R0402
SW1 Tyco_1-1571983-1 Tyco_1-1571983-1SW2 SW DIP-4/SM SO8TP1,TP2,TP3,TP4,TP5,TP6,TP7,TP8,TP9 Testpad_SMD_Ettinger Ettinger_12_18_815_testpadU1 HCM49 8.192MABJ-UT Citizen_HCM49
Table 7 Bill of Materials for (cont’d)Logic Board for Hybrid Kit for HybridPACK™1Reference Value / Device Package