how defect coverage as a variable can be used to determine...

How defect coverage as a variable

can be used to determine

test and inspection strategies

[email protected]

Stig Oresjo

Topics

• Introduction and definitions

• Defect universe, coverage, & PCOLA - SOQ

• Scoring and Simple example

• Real board examples

• Conclusions

I would like to acknowledge the following individuals:- Kenneth P. Parker- Kathy Hird- Bill FollisFor the original work on the PCOLA – SOQ

- Chris Jacobsen - James MahonFor work on the combined ICT, AOI, AXI coverage tool

Everybody working for Agilent

Acknowledgement

Digital Functional Test:- Stuck at simulations- Often > 90% coverage claimed- Did that mean that 90% of defects detected? – NO

History of Coverage

In-circuit Test:- >95% coverage claimed in early 90’s- Problem 95% of defects detectable by ICT- Undetectable defects not considered.

A more realistic and complete coverage number is needed

Defect DefinitionA DEFECT is:“At the end of the manufacturing process, an unacceptable deviation from a norm"

Keyword = unacceptable

“Unacceptable” means the user will take corrective action if aware of the deviation.

New distinction “at the end of the manufacturing line”important to differentiate from potential defect.

Fault DefinitionA FAULT is:“A manifestation of a defect”

Faults are a subset of defectsAB

C

A B C0 0 00 1 01 0 01 1 0

FaultDefect

Example of defects that may or may not turn out as faults:- Missing bypass capacitor- Insufficient solder joint- Open connector pin that is not tested or used

Example of defects and faultsResistor pack upside down and under IC

Example of defect and maybe faultExtra Part (capacitor) on leads of IC

Example of defect, probably not a faultMissing bypass capacitor

Example of defects not a faultResistor pack insufficient solder

A PROCESS INDICATOR is:“At the end of the manufacturing process, an acceptabledeviation from a norm"

A DEFECT is:“At the end of the manufacturing process, an unacceptable deviation from a norm"

Test/inspection job - to make 4 distinctions

A FAULT is:“A manifestation of a defect”

A POTENTIAL DEFECT is:“In the manufacturing process, a deviation from a norm, that may or may not be a defect at the end of the manufacturing process"

GOOD COMPONENTS, RIGHT PLACE and GOOD JOINTS

Topics





• Conclusions

• Possible defects not included in set

Defect universe• Realistic set of possible defects• Structural information of the board (BOM) and placement• No assumption on how test and inspection is done

Defect universe

Combined coverageDefect universe

ICT

AOI AXI

PCOLA – Device propertiesIf a test/inspection passes what does that mean?

Device properties P - PresenceC - Correct componentO - Orientation (90,180, 270 degrees off)L - Live (basic function)A - Alignment

Perfect score is 100,000 (not achievable)

SOQ – Pin PropertiesIf a test/inspection passes what does that mean?

Joint propertiesS - ShortO - OpenQ - Quality

Perfect score is 100,000 (not achievable)

Topics





• Conclusions

PCOLA - SOQ - ScoringFor PCOLA - SOQA value from 0.0 – 1.0What does it mean if a test passes

1.0 = Full coverage0.5 = Partial coverage0.0 = No coverage

PCOLA – Scoring Example

AOI inspection of a chip resistor No component markings – 10 kohm, ¼ WP = 1.0C = 0.5 (Don’t know the right value)O = Not applicableL = 0.0A = 1.0


ICT test of a chip resistor No component markings – 10 kohm, ¼ WP = 1.0C = 0.5 (Don’t know the right size - wattage)O = Not applicableL = 1.0A = 0.0


Combined AOI and ICT test of a chip resistor No component markings – 10 kohm, ¼ W

0.01.0-

0.51.0ICT

1.01.0A1.00.0L--O

0.50.5C1.01.0P

TotalAOI

Total = max of ICT and AOI score for each property

Device property weightNot all properties are of equal importance Example: Presence more important than alignment

0.150.250.00.250.35Orientation irrelevant0.10.20.20.20.3Orientation relevantAwLwOwCwPw

Device property weightNot all properties are of equal importance Example: Presence more important than alignment

0.150.250.00.250.35Orientation irrelevant0.10.20.20.20.3Orientation relevantAwLwOwCwPw

0.20.40.4QwOwSw

PCOLA Property weights

SOQ Property weights

Total Coverage ScoreTwo numbers – Device & Connection score

Dt = (Ps*Pw+Cs*Cw+Os*Ow+Ls*Lw+As*Aw)*RNumber devices

Ct = (Ss*Sw+Os*Ow+Qs*Qw)*RNumber connections

R = Range = 100,000 = Maximum score

Device score = Sum of all device scores DtConnection score = Sum of all connection scores Ct

Topics





• Conclusions

Example boardVery simple, only five components

2100 pFBypass CC221 uFBypass CC12ResistorR14GullwingICU28BGAICU1

PinsNoteTypeRef. Des.

ICT CoverageSimple example

0.00.01.00.00.00.00.00.02100 pFBypassC20.01.01.00.01.00.00.51.021 uFBypassC10.01.01.00.01.0-0.51.02ResistorR10.00.01.00.00.00.00.00.04GullwingICU20.01.01.00.01.01.01.01.08BGAICU1QOSALOCPPinsNoteTypeRef. des

All PinsDevice

• No test for U2• C2 bypass capacitor and much smaller than C1• ICT can not test alignment and solder quality• Note: All pins treated the same in this example, not the case in reality

AOI CoverageSimple example

• No test for U1 pins, hidden joints• U2 no reliable component marking• AOI can not test for Live


All PinsDevice

AXI CoverageSimple example

• AXI good at joint coverage• AXI No test for Correct and Live• Orientation only for polarized capacitors


All PinsDevice

Combined AOI, AXI, & ICT CoverageSimple example

• In this example perfect score for SOQ, not typical• U2 no ICT test and no component marking• Live for bypass capacitors will be 0 for combined AOI, AXI, ICT strategy


All PinsDevice

Score for simple example

• Used scores and Property weights as shown previously• AOI, AXI, and ICT complements each other• Score of maximum 100,000 only in this simple example

100,00066,66791,11153,333Pin

81,50044,50040,50068,500Device

ALLICTAXIAOI

Some issues to be aware of

- Manually possible – not recommended- Should be done automatically

- Small inconsistencies like U1 versus U1_a, • Reference designator inconsistencies

• Harvesting the program information

program needs to identify and provide easyway to modify one of them

- Normally done after ICT, not done after AOI or AXI. • Re-test after repair

If not done, scoring assumes correct repair action. - If higher escape rates than expected, repair

operation needs to be investigated.

Topics





• Conclusions

Medium complexity – high volume• 1,000 devices, 8,000 solder joints

• Test strategy – AOI, ICT, limited AXI

50,89138,19925,4067,993Pin

65,89836,42928,79846,689DeviceALLICTAXIAOI

• Many BGAs and connectors (many hidden joints)• Mainly BGAs tested on AXI due to high volume

Device and Pin score for this example

Medium complexity – high volume

• Surprise for user

50,89138,19925,4067,993Pin

65,89836,42928,79846,689DeviceALLICTAXIAOI

- Add ICT coverage• Actions:

- Add AXI coverage

- Low ICT coverage- Low Combined coverage

High complexity – low volume• 2,500 devices, 11,000 solder joints

• No “Live” score due to only AOI & AXI

81,768081,76225,014Pin52,913027,89752,673Device

ALLICTAXIAOI

• Very low volume, no ICT test• Good AOI and AXI coverage

Device and Pin score for this example

• User happy with result, right trade-offs

Topics





• Conclusions

Conclusions

• Currently not easy to get coverage numbers for combined test strategy. • Method presented to use PCOLA – SOQ method for ICT, AOI, AXI, and Combined coverage analysis

• ICT and AOI typically good device coverage, medium to low pin coverage.• AXI typically low to medium device coverage, high pin coverage.

• Real board analysis has shown that method works for combined coverage analysis, and trade-off decisions.

how defect coverage as a variable can be used to determine...

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