high-level spectral atpg for gate-level circuits

March 8, 2006 Spectral RTL ATPG 1

High-Level Spectral ATPGfor Gate-level Circuits

Nitin Yogi and Vishwani D. AgrawalAuburn University

Department of ECEAuburn, AL 36849


Outline

• Need for High Level Testing• Problem and Approach• Spectral analysis and generation of test

sequences• RTL testing approach• Experimental Results• Conclusion• Future work• Research Goals


Need for High Level Testing

• Motivations for high level testing:– Low testing complexity– Low testing times and costs– Early detection of testability issues during

design phase at high level or RTL– Difficulty of gate-level test generation for black

box cores with known functionality

Seems interesting !But is it feasible ?


Problem and Approach

• What’s the problem ? – Develop synthesis-independent ATPG methods using

RTL circuit description.• How do we approach it ?

– Implementation-independent characterization:• RTL test generation

– RTL faults => PI, PO and inputs and outputs of flip-flops – Generate vectors for RTL faults

• Analyze RTL vectors to extract spectral components and the noise level for each PI of the circuit.

– Test generation for a gate-level implementation using RTL characterization:

• Generation of test vectors• Test vector compaction

That’s fine !But does it work ?


Walsh Functions and Hadamard Spectrum

1 1 1 1 1 1 1 11 -1 1 -1 1 -1 1 -11 1 -1 -1 1 1 -1 -11 -1 -1 1 1 -1 -1 11 1 1 1 -1 -1 -1 -11 -1 1 -1 -1 1 -1 11 1 -1 -1 -1 -1 1 11 -1 -1 1 -1 1 1 -1

H8 =

w0

w1

w2

w3

w4

w5

w6

w7

Wal

sh f

unct

ions

(or

der

8)

• Walsh functions form an orthogonal and complete set of functions representing a discretized function.

• Walsh functions form the rows of the Hadamard matrix; called its basis vectors.

• Example of Hadamard matrix of order 8:

OK…so its just another way of representing information


Analysis of a Bit Stream Using Hadamard Matrix

• Bit stream is correlated with each basis vector of the Hadamard matrix.• High correlated basis vectors are retained as essential components and

others are regarded as noise.• New bit streams can be generated keeping the essential components and

eliminating or changing the noise components.

Bit stream to analyze

Correlating with basis vectors by multiplying with Hadamard matrix.

Essential component (others noise)

Hadamard Matrix

Bit stream

Spectral coeffs.


Test Vector Generation

• The components regarded as noise are filtered or altered as per a methodology.

• The filtered components are converted back to a test vector by multiplying with Hadamard matrix

Filtering

Generation of test vectors by multiplying with Hadamard matrix

Spectral components

Essential component

retainedNew test vector

OK…so you are refining the bit stream


RTL Testing Approach (Circuit Characterization)

• RTL test generation:– Test vectors are generated for RTL faults (PI, PO and inputs -

outputs of flip-flops.)• Spectral analysis:

– Test sequences for each input are analyzed using Hadamard matrix.

– Essential components are currently determined by comparing their magnitudes Hi with the mean of the total spectrum M.

– Condition to pick-out essential components:

– The process starts with the highest magnitude component and is repeated till the criteria is not satisfied.

KM

Ηi2

2


Circuit b01: Coefficient Analysis (Vectors for RTL faults obtained from delay optimized circuit)

-25

-20

-15

-10

-5

0

5

10

15

20

25

C0 C2 C4 C6 C8 C10 C12 C14 C16 C18 C20 C22 C24 C26 C28 C30

Coefficients

Mag

nit

ud

e Input 1

Input 2

Reset

Magnitudes of 32 Hadamard Coeffs. for 3 inputs of b01

Examples of essential

components

Examples of noise

components


RTL Testing Approach (Test vector generation)

• Spectral Test Vector Generation:– Perturbation of spectral coefficients

• Retain essential spectral components • Add random noise to replace the original identified

noise.– Components considered non-essential are changed

randomly both in magnitude and sign in a confined confidence level.

– Generation of test vectors.


RTL Testing Approach (Test vector generation)

• Test Vector Compaction:– Characteristics of generated vectors depend on

inserted noise.– Characteristics determine the fault coverage, the

detectability of hard to detect faults, etc. – 10 test sets are generated using the spectral method

and compacted to achieve the best fault coverage.– Compaction currently performed by simple fault

simulation of generated test sets on the target gate-level implementation.

OK…I got that…..What about the RESULTS !!!


Experimental Results• Spectral ATPG technique was applied to three ITC’99 high level RTL

benchmark circuits, b01, b09 and b11• Characteristics of benchmark circuits:

• The benchmark circuits synthesized in two ways:– optimizing area – optimizing delay.

• Vectors for RTL faults obtained from ATPG (FlexTest).• Spectral RTL-ATPG technique applied to the circuits.

Circuit PIs POs FFs Function

b01 2 2 5 FSM that compares serial flows

b09 1 1 28 Serial to serial converter

b11 7 6 21 Scramble string with variable cipher


RTL Spectral Characterization: b01

Number of RTL faults

Number of Vectors

RTL fault cov. (%)

CPU* seconds

Number of spectral

components for three PIs

Gate level fault cov. (%) of RTL

vectors

Area 62 38 91.94 1.0(18, 8, 1)

out of max. 6492.98

Delay 62 31 91.94 1.0(10, 1, 1)

out of max. 3283.10

* Sun Ultra 5, 256MB RAM


Gate-Level Test Generation: b01

Type of gate level synthesis

Number of gate-

level faults

RTL ATPG

Spectral Test SetsGate-level ATPG

Gate level

cov. (%)

Number of vectors

CPU* seconds

Gate level cov. (%)

Number of vectors

CPU* seconds

Area optimized

228 97.81 128 20.0 97.81 75 1.0

Delay optimized

290 97.41 128 20.0 98.28 91 1.0



Gate-Level Cov. of Spectral Test Sets on Area-Optimized b01 Circuit

0

10

20

30

40

50

60

70

80

90

100

1 21 41 61 81 101 121

Vector Number

Tes

t C

ove

rag

e (%

)

Spectral TS(area RTL vec)

Spectral TS(delay RTL vec)

Gate-LevelATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5


Gate-Level Cov. of Spectral Test Sets on Delay-Optimized b01 Circuit

0

10

20

30

40

50

60

70

80

90

100

1 21 41 61 81 101 121

Vector Number

Tes

t C

ove

rag

e (%

)



Gate-LevelATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5




Number of Vectors

RTL fault cov. (%)

CPU* seconds

Number of spectral

components for two PIs


vectors

Area 248 202 68.55 485(1, 68)

out of max. 25673.98

Delay 248 310 70.16 413(1,147)






Number of gate-

level faults

RTL ATPG


Gate level

cov. (%)

Number of vectors

CPU* seconds

Gate level cov. (%)

Number of vectors

CPU* seconds

Area optimized

882 83.26 620 825 84.52 349 296

Delay optimized

1048 82.78 620 812 83.06 335 215




0

10

20

30

40

50

60

70

80

90

100

1 101 201 301 401 501 601

Vector Number

Tes

t C

ove

rag

e (%

)



Gate-LevelATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5


Gate-Level Cov. of Spectral Test Sets on Delay-Optimized b09 Circuit

0

10

20

30

40

50

60

70

80

90

100

1 101 201 301 401 501 601

Vector Number

Te

st

Co

ve

rag

e (

%)

Spectral TS (areaRTL vec)


Gate-Level ATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5




Number of Vectors

RTL fault cov. (%)

CPU* seconds

Number of spectral

components for 9 PIs


vectors

Area 240 224 68.53 541(66,62,54,55,63,51,60,1) out

of max. 25671.66

Delay 240 174 72.35 776(66,70,59,61, 58,79,45,56)






Number of gate-

level faults

RTL ATPG


Gate level

cov. (%)

Number of vectors

CPU* seconds

Gate level cov. (%)

Number of vectors

CPU* seconds

Area optimized

2380 86.62 512 826 81.85 468 1866

Delay optimized

3070 84.92 512 1061 82.31 365 3076




0

10

20

30

40

50

60

70

80

90

100

1 51 101 151 201 251 301 351 401 451 501

Vector Number

Te

st

Co

ve

rag

e (

%)



Gate-LevelATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5


Gate-Level Cov. of Spectral Test Setson Delay-Optimized b11 Circuit

0

10

20

30

40

50

60

70

80

90

100

1 51 101 151 201 251 301 351 401 451 501

Vector Number

Tes

t C

ove

rag

e (%

)



Gate-LevelATPG

area RTL vec

delay RTL vec

Rnd_Vecs1

Rnd_Vecs2

Rnd_Vecs3

Rnd_Vecs4

Rnd_Vecs5

Hmmm… interesting !


Conclusion• Spectral RTL ATPG technique was applied to ITC’99

benchmark circuits b01, b09 and b11 and found to give favorable results in two out of the three circuits.

• Results indicate promise in further development of Spectral RTL ATPG technique.

• Test generation using Spectral RTL ATPG brings with it all the benefits of high level testing

• Techniques that will enhance Spectral ATPG are:– Efficient RTL ATPG– Accurate determination of noise components– Better ways of random noise insertion with more control over

noise inserted– Better compaction algorithms


Future Work

• Model the test generation system in the frequency domain using transfer functions.• Finding the relationship

– Characterize input random vectors and output RTL vectors in the frequency domain– Obtain the transfer function for the Test generation system to target gate level faults

• Challenges in frequency domain– Linearity– Time-invariance

• Possible tools for frequency analysis:– Walsh functions– FFT

ATPG

Circuit under test

Test generation system

Random vecs. Test vectors

Analytical model


Research Goals• Extraction of spectral components from

functional vectors and their application for test generation.

• Theoretical analysis of spectral components and the noise level.

• Consideration of both temporal and spatial spectra using two-dimensional signal analysis.

• Application to combinational and sequential circuits.

• Use of improved test generation for RTL faults.• Effective application of vector compaction

methods.


Thank You !

Any Questions ?

high-level spectral atpg for gate-level circuits

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