HI-TECH C PRO for the PIC18MCU Family Compiler

Version 9.63PL3 Release Notes

Copyright (C) 2009 HI-TECH Software.All Rights Reserved. Printed in Australia.

PICC-18 is licensed exclusively to HI-TECH Softwareby Microchip Technology Inc.

Produced on: June 5, 2009

HI-TECH Software Pty. Ltd.ACN 002 724 549

45 Colebard Street WestAcacia Ridge QLD 4110

Australia

email: hitech@htsoft.comweb: http://microchip.htsoft.com

ftp: ftp://www.htsoft.com

THIS FILE CONTAINS IMPORTANT INFORMATION RELATING TOTHIS COMPILER. PLEASE READ IT BEFORE RUNNING THIS

SOFTWARE.

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4

Chapter 1

Introduction

1.1 Description

This is a minor patch-level release for version 9.63 of the HI-TECH C PRO for the PIC18TM

MCUFamily.

1.2 Support Patches

Support Patches are intermediate component updates which may be available from time to timeproviding fixes to reported bugs or additional device support. These patches can be made availablein a timely manner, but may not have been subjected to the same level of testing as a Patch LevelRelease, or Base Release product.

Support Patches can be downloaded from this compiler’s Known issues section of our on-linesupport forums http://forum.htsoft.com/. Note that the Known issues area will only becomeaccessible to members once they are logged in.

1.3 Announcements and Feedback

Additional release candidates may be made available, if required, before the next version becomesavailable. Monitor the Announcement forum HI-TECH Software’s forums for more information andupdates.

Please direct any feedback regarding this product to HI-TECH Software’s feedback page.

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Previous Version Introduction

1.4 Previous VersionThe previous release of the PRO version compiler for PIC18 was version 9.63PL2.

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Chapter 2

New Features

2.1 GeneralNew Chips Supported (9.63PL3) The following devices are now supported: 18F13K20, 18F13K22,

18F14K20, 18F14K22, 18F24J11, 18F24J50, 18F25J11, 18F25J50, 18F26J50, 18F44J11,18F44J50, 18F45J11, 18F45J50, 18F46J50. 18F66J90, 18F66J93, 18F67J90, 18J67J93, 18F86J90,18F86J93, 18F87J90, 18F87J93, 18F87K22, 18F87K90, 18LF13K22, 18LF13K50, 18LF14K22,19LF14K50, 18LF24J10, 18LF24J11, 18LF24J50, 18LF25J10, 18LF25J11, 18LF25J50, 18LF26J11,18LF26J50, 18LF44J10, 18LF44J11, 18LF44J50, 18LF45J10, 18LF45J11, 18LF45J50, 18LF46J11and 18LF46J50

New Chips Supported (9.63PL2) The following devices are now supported: 18F46J11, 18F26J11

Processing Assembly Auto Variables (9.63PL2) The compiler will now process FNSIZE and FN-CALL directives contains in assembly code (or precompiled object files) and include thisinformation into the calculation of the stack size determined by the code generator.

Disabling Function Duplication (9.63PL2) The interrupt_level pragma can now be used to pre-vent functions being duplicated when the user can guarantee that an interrupt will not occurwhile the function is executing from main-line code.

Bit types in MPLAB (9.63PL2) Previously the ’bit’ type was not a recognized type that could bewatched in Microchip’s MPLAB IDE. The compiler will now manipulate the COFF outputformat so that bit types are treated like a bit-field within a structure. Since MPLAB has noproblem watching structures and their members, this provides a convenient work-around forthis limitation.

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General New Features

ICD3 (9.63PL1) The MPLAB ICD3 is now supported. If the ICD3 is used, the option --debugger=icd3should be used.

PICKit debugger (9.63PL1) The MPLAB PICKit 2 & PICKit 3 are now supported. If the PICKitis used, the option --debugger=pickit2 or--debugger=pickit3 should be used.

REALICE Native Trace (9.63PL1) Preliminary support is available for native trace when usingREAL ICE. To do so, you must ensure that the REALICE debugger is selected when compilingunder MPLAB or HI-TIDE. If compiling on the command line, used the --DEBUGGER=realiceoption. See also the help files associated with REAL ICE published by Microchip.

New Chip-Specific Macro (9.63) The driver now defines the chip-specific symbols consisting ofdouble underscore followed by the chip name.

e.g. For the pic18f4580, the macro __18F4580 is now defined as well as the pre-existing macro _18F4580.

HI-TECH C PRO in Lite mode (9.63) A significant new feature available as of this version is theintroduction of Lite mode. This is in addition to the product’s existing PRO and 45 day evalu-ation modes. When operating in Lite mode the compiler will continue to support the completeset of devices available in PRO mode, but all compiler optimizations will now be disabled.No memory restrictions apply in Lite mode.Lite mode can be enabled without activation. Litemode will be the compiler’s mode of operation when activation is incomplete or evaluationperiod has expired. Previously, the compiler would have been inoperable in either of thesestates.The installer allows the compiler to be installed in Lite mode. Doing so allows the one-time 45 day evaluation period to be deferred, however once evaluation has been initiated itwill not be prolonged by switching back to Lite mode. Evaluation mode can only be activatedonce and will expire 45 days after this mode has been initiated.

Sample Code (9.63) Sample code for picdem2 development board and an example bootloader hasbeen supplied with this release of the compiler.

New Chips Supported (9.61PL1) The following devices are now supported:

18F13K50 and 18F14K50

REALICE Native Trace (9.61PL1) Preliminary support is available for native trace when usingREAL ICE. To do so, you must at present manually include the htdata.c, htdc18.c andhtaintpri.as files into your project. These files are contained in the REALICE directory inthe SAMPLES directory of the compiler distribution. The project will require access to theheader files also found in this sample directory. Ensure that the option to preprocess assemblyfiles is enabled. Select the ICD2 debugger when compiling under MPLAB or HI-TIDE. If

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New Features General

compiling on the command line, used the --DEBUGGER=icd2 option. See also the help filesassociated with REAL ICE published by Microchip.

Universal Binaries Under OS X (9.61PL1) The Mac OS X binaries are now universal builds, sup-porting both Intel and PowerPC processors.

New Chips Supported (9.61PL1) The following devices are now supported:

18F26K20 18F46K20 18F2458 18F2553 18F4458 18F4553 18F65J50 18F66J11 18F66J1618F6628 18F66J50 18F66J55 18F67J11 18F6723 18F67J50 18F85J50 18F86J11 18F86J1618F8628 18F86J50 18F86J55 18F87J11 18F8723 18F87J50 18F6393 18F6493 18F839318F8493

24-bit Integral Types (9.61PL1) A three-byte short long integral type has been introduced. Bothsigned and unsigned versions of this type are allowed and can be used like any other integraltype.

Code Generator Preserves Undefined Assembly Symbols (9.61PL1) The compiler now scans assembly-derived object files for symbols which are used, but not defined, in the assembly code andinstructs the code generator to preserve any C symbols which map to these assembly symbols.This prevents the code generator removing variables that are defined in C, but only referencedin assembly code.

Code Generator Obeys Assembly Memory Analysis (9.61PL1) The compiler now scans assembly-derived object files for psects which are absolute (viz. use the abs and ovrld PSECT directiveflags) and takes note of the bounds of these psects. This information is passed to the codegenerator to ensure that this memory is not allocated to any C resources. Additionally, thedriver will reserve these memory ranges so that the linker will not allocate other non-absolutepsect in these ranges.

Improved Register Allocation (9.61PL1) An improved algorithm for allocating variables to regis-ters is now employed. This will result in appropriate global and static variables being allocatedtemporary space in registers and a significant reduction in code size. Variables never used, andassignments to variables whose value is never used are eliminated.

Stack Depth Check (9.61PL1) The code generator can now issue a warning for situations wherethe maximum stack depth appears to have been exceeded. Due to the stack usage, this isintended as a guide only. More information is contained in the map file.

Absolute Functions (9.61PL1) Functions can now be placed at an absolute address by using the @address construct.

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Command-Line Driver New Features

2.2 Command-Line Driver–runtime=+plib (9.63) This new sub-option (off by default) is used to link in the MPLAB C18

compatible peripheral library.

–opt=space (9.63) This new sub-option (on by default) indicates to the compiler that it should op-timize code for space.

–opt=speed (9.63) Intended for future use to indicate the compiler that it should optimize for speed.Use this sub-option in conjunction with other sub-options if you want space specific optimiza-tion to be disabled.

__chipname predefined macro (9.63) The driver in addition to _chipname will create this prede-fined preprocessor macro for the target device.

–debugger=none (9.63) This new sub-option (selected by default) is used to indicate to the com-piler that this build is not intended for use with any hardware debugger.

–debugger=realice (9.63) This new sub-option (off by default) is used to indicate to the compilerthat realice debugger is being used. Selecting this option also defines the preprocessor symbol__MPLAB_REALICE=1.

Serial Number Label (9.61PL1) If the driver’s --SERIAL option is being used to place a serialnumber at a specific address, the runtime startup code will generate a label __serial0 whichallows this address to be referenced from assembly or C code.

Very Verbose Compilation (9.61PL1) If the -v option is now issued twice, the full path name ofeach compiler application is printed, although with the usual command-line arguments to eachcompiler application.

Disabling Error Messages (9.61PL1) In addition to warning messages, error messages can now bedisabled using the --MSGDISABLE driver option. The error number must be followed by :offfor them to be disabled.

ASMFILE suboption (9.61PL1) A new suboption to the --OPT option has been added and the ac-tion of the existing ASM suboption has changed. Previously when the ASM suboption wasenabled, all assembly code, whether derived from the user’s C code or assembly source files,was optimized by the assembler. The ASM suboption now only controls optimization of assem-bler derived from C source. The new ASMFILE suboption allows for independent control overoptimization of assembly contained in source files.

--RUNTIME=+download option (9.61PL1) The Intel hex file that is generated when this optionis used will be conditioned in a way that is preferred by bootloaders. This option is recom-mended if the application being built is expected to be downloadable by bootloader.

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New Features Parser

--ECHO option (9.61PL1) This new option allows the command line to be echo to the stderrstream before compilation commences.

--CALLGRAPH option (9.61PL1) This new option allows control over the type of callgraph infor-mation produced in the map file.

2.3 ParserAnonymous Members (9.63) The usage of anonymous structures and unions as members of struc-

tures and unions is now supported.

Extern Absolute Functions (9.61PL1) The parser has been updated to allow extern declarationsfor absolute functions (functions placed at a specific address).

2.4 Code GeneratorDelay Routines (9.61PL1) The code generator implements two new inline delay routines. See 2.9.

Auto Location Symbol (9.61PL1) The auto/parameter psect can be placed in the access bank, orthe normal RAM banks. Depending on the destination, it will reside in a psect with a differentname. The symbols __Lparam and __LHparam are now defined and equated to the correspond-ing __L and __H bounds symbols of the actual psect in which the auto/parameter objects arelocated.

Code Generation Without main (9.61PL1) The code generator will now proceed even if it doesnot “see” the main function. This allows mixed C/assembly programs to be developed wherethe main function is defined in assembly code.

Code Generator Preserves Undefined Assembly Symbols (9.61PL1) The compiler now scans assembly-derived object files for symbols which are used, but not defined, in the assembly code andinstructs the code generator to preserve any C symbols which map to these assembly symbols.This prevents the code generator removing variables that are defined in C, but only referencedin assembly code.

Code Generator Obeys Assembly Memory Analysis (9.61PL1) The compiler now scans assembly-derived object files for psects which are absolute (viz. use the abs and ovrld PSECT directiveflags) and takes note of the bounds of these psects. This information is passed to the codegenerator to ensure that this memory is not allocated to any C resources. Additionally, thedriver will reserve these memory ranges so that the linker will not allocate other non-absolutepsect in these ranges.

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Assembler New Features

Improved Register Allocation (9.61PL1) An improved algorithm for allocating variables to regis-ters is now employed. This will result in appropriate global and static variables being allocatedtemporary space in registers and a significant reduction in code size. Variables never used, andassignments to variables whose value is never used are eliminated.

Stack Depth Check (9.61PL1) The code generator can now issue a warning for situations wherethe maximum stack depth appears to have been exceeded. Due to the stack usage, this isintended as a guide only. More information is contained in the map file.

Absolute Functions (9.61PL1) Functions can now be placed at an absolute address by using the @address construct.

Rotate Ability from C Code (9.61PL1) The parser and code generator can now detect specific se-quences of C code that implements a rotate operation. The code generator encodes this usingassembly rotate instructions where possible. The code sequence for a rotate right by 1 bitlooks like:var = (var > > 1) | (var < < 7);where var must be an unsigned char or:var = (var > > 1) | (var < < 15);where var must be an unsigned int. Rotates can be either left or right and of any numberof bits. (NB a rotate left of 1 bit is equivalent to a rotate right of 7 bits when dealing withbyte-wide variables, etc.)

2.5 AssemblerOptimize for Space using Procedural Abstraction (9.63) For better and faster code, new level of

optimization is being added. If running in Lite mode, this optimization is not available.

2.6 HEXMATEDELETE Suboption (9.61PL1) A new suboption to the -FIND option has been added. This allows

for the opcodes found to be deleted.

-SIZE Size Option (9.61PL1) A new SIZE option has been added to report back the size of theHEX file.

-BREAK=address_list option (9.61PL1) This option will cause a continuous stream of data to ter-minate and recommence with a new data record beginning at the address(es) specified. Thiscan be used to create a distinction between adjacent but functionally separable regions of pro-gram memory.

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New Features Cromwell

-ADDRESSING=size option (9.61PL1) This option specifies the byte size of each addressable unitthat will be specified to hexmate on the command line. This permits addresses to be entered ina device’s native addressing mode where that addressing mode is other than byte addressing.The PIC18 architecture does use byte addressing and does not require the use of this option.

2.7 CromwellWatching bit variables (9.61PL1) Bit variables are now formed into bitfields in the COF output

allowing them to be watched in some IDEs. A bitfield is defined for each addressable locationthat contains a bit variable and will have a name based on any global symbol that shares thatlocation or bitvarsX if no symbol is found.

2.8 UtilitiesNew LIBR Option (9.61PL1) A new option has been added to LIBR to allow re-ordering of mod-

ules within a library file.

2.9 Libraries and Header filesBANKSEL and BANKMASK assembler macro (9.63PL3) Two new assembler macros have been

added. The BANKSEL will do a bank selection for the address in parameter and the BANKMASKwill mask the bankl of the address.

MPLAB C18 Compatible Peripheral Library (9.63) This release includes a peripheral library whichis compatible with MPLAB C18 library.

New Header Files (9.63) A new set of header files for each chip have been added which givescompatibility with Microchip bitfield definitions. These files are automatically included bythe file htc.h.

Delay Routines (9.61PL1) All expanded as inline assembly routines, there are two new “libraryfunctions” that can produce accurate instruction cycle delays. The functions are _delay and_delay3. See the Functions chapter in the manual for further information.

New Library Files (9.61PL1) New library routines have been added for fmod, round and trunc.

Debugging of Library Code (9.61PL1) When compiling a program, the source location of anycalled C library routines are embedded into the output debug files. This allows the abilityto C step into library routines, as well as set breakpoints within these files, as if they were

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Libraries and Header files New Features

source files in the project. The assembly listing of C library routines is also included in theassembly list file for the project.

C Library Routines (9.61PL1) All library routines are now implemented in C code, even implic-itly called library routines that perform floating-point or division, etc. Previously these werehand-written in assembly code.

New file usbregs18.h (9.61PL1) This header file creates bitfield definitions for USB endpoints andbuffer descriptors. This file is included by all PICC18 header files which describe USB relatedPIC18 devices.

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Chapter 3

Changes

3.1 General

Warning Message Repeats (9.61PL1) New functionality in the compiler messaging system maymean that some warning messages (for the same file and line number) that were output severaltimes during compilation will now only appear once.

Driver Name Change (9.61) The name of the command line driver has been changed. The newname reverts to that used by the PICC-18 STD version compiler, viz PICC18. The newMPLAB plugin and latest HI-TIDE will use this new driver name.

3.2 Preprocessor

Missing New Line (9.61PL1) The warning level of the warning regarding missing newline charac-ters from an input line has changed from 0 to -1. This warning will no longer be displayedwith the default warning level setting. If a newline character is missing from the end of aninput file, one is automatically inserted.

3.3 Parser

Redefining enumerations (9.63PL1) In the past redefining an enumeration type would cause thecompiler’s parser to emit a warning. The parser will now treat this as an error and emit theerror message 1348: enum tag “*” redefined (from *:*).

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Command-Line Driver Changes

Function Declarations (9.61PL1) A function declaration with an empty argument list, for examplefunc(), is now treated as equivalent to the list being void, e.g. func(void).

3.4 Command-Line Driver--opt=+space (9.63PL1) This optimisation sub-option (selected by default) means that all op-

timising behaviour of the compiler (e.g. the assembly or global optimisers) that has beenenabled should favor space over speed.

--opt=+speed (9.63PL1) This optimisation sub-option means that all optimising behaviour ofthe compiler (e.g. the assembly or global optimisers) that has been enabled should favor speedover space.

Preprocessor Files always Kept (9.61PL1) The .pre preprocessed files (modules) associated withC source files are now always kept, regardless of whether the --PRE option is used. The --PREoption can still be used to generate these files and stop compilation after preprocessing as it haspreviously. Previously these files were removed after compilation. This allows the contents ofthe files to be observed if you are compiling from an IDE.

--CHAR Option Removed (9.61PL1) The --CHAR option has been removed. Users should use theexplicit type of any char variables that need to hold negative quantities. The default type ofchar objects remains unchanged and is unsigned.

More Accurate Memory Summary (9.61PL1) The memory summary now includes any variablesthat are allocated addresses by the code generator. This will mean that RAM usage may appearto increase over that indicated by the previous version compiler’s memory summary, howeverthis is simply a more accurate representation of the memory usage.

ASM Suboption (9.61PL1) The action of the ASM suboption to the --OPT option has changed. See2.2 for more information.

Memory Summary on Completion (9.61PL1) A new suboption to the --SUMMARY option has beenadded. The class suboption allows for display of each memory space and the classes theycontain to be displayed after compilation has successfully completed. The default memorysummary (specified via the mem suboption) has been cut down to a more concise form. Toobtain the memory summary that would have been printed by v9.61, use the class suboptionin addition to the default mem suboption to the --SUMMARY option.

Runtime Startup Code (9.61PL1) The runtime startup code was previously placed into a tempo-rary file and deleted after each compilation. The keep suboption to --RUNTIME was able tobe used to have the runtime startup code saved permanently in the file startup.as. Thissuboption is now enabled by default.

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Changes Code Generator

Output Directory Option (9.61) The effect of the -O driver option has been changed. The changesbetter accommodate the expectations of HI-TIDE when compiling code contained in multipledirectories.

3.5 Code GeneratorIndication of Build Number (9.63) The build number of the compiler is now displayed in code

generated output.

Source Level Debugging (9.63) HTC library files, e.g. sin, tan etc, can now be debugged just likeimplicitly called routines like ftadd, flcmp etc.

Text Psects (9.61PL1) Code produced by the code generator is now output into separate numberedtext psects, e.g. text0, text1 text2 etc., rather than one big psect called text.

Structure Return Code (9.61PL1) The way that a structure is returned from functions has changed.The address of structures that are returned by a function are now stored in FSR0 rather than inthe normal memory areas allocated to function return values. All other aspects about returningstructures from C functions remain the same.

Memory Allocation and the Near Qualifier (9.61PL1) The near qualifier is now a strong recom-mendation, rather than a directive. This is part of a change made to the allocation of objectsto banked memory and the access bank. Variables referenced more often are more likely to beplaced in the access bank.

Indirect Function Calls (9.61PL1) The code generator now outputs very different code to imple-ment indirect function calls. Previously an assembly library routine was used; now in-lineassembly code is used. Although the new in-line Assembly code is similar, it is more directand may result in faster calls.

High-priority Interrupt Context Switching Code (9.61) The code generator was not using thepublished optimization relating to high-priority (default) interrupts for devices that cannotdirectly use the shadow registers.The code generator will now insert a CALL - POP instruction sequence into the interrupt contextswitching code that allows the shadow registers to be used for these interrupts.

3.6 AssemblerProcedural Abstraction (9.63PL3) For devices affected by errata, the procedural abstration opti-

mizations will be disabled.

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Linker Changes

Precedural abstraction of inline assembly (9.63PL1) Any inline assembly in a program will nolonger be considered by the assembly optimiser as a candidate for procedural abstraction.

3.7 LinkerImproved Fixup Error Message (9.61PL1) The information contained in the error messages re-

lating to fixup overflows have changed. The message will now include the source file nameand line number, where possible, and the text alludes to the nature of the error, which is typi-cally misunderstood. The unique message number of these have necessarily changed to 1267and 1268.

Better Display of Absolute Psects (9.61PL1) The linker now gives a better representation of thememory consumed by absolute psects (viz. abs and ovrld PSECT directive flags). Previouslyall absolute psects would indicate a lower, or starting, address of zero in the map file. Thisaddress now reflects the address of the first datum in the psect. Thus if the contents of anabsolute psect that starts with an ORG directive of 100h, for example, the map file will showthe psect starting at address 100h, not 0.

3.8 Libraries and Header FilesConfiguration bit macro (9.63PL3) The way how the configuration bits are programmed has changed.

So now you can’t use the literal value of the word you want to program in the __CONFIGmacro. You need to use the configuration words defined in the header file of the device se-lected.

Device Specific Header Files (9.63PL1) All register definitions in device specific header files arenow absolute variables declared “extern”.

Flash and EEPROM Libraries (9.63PL1) The naming convention of Flash and EEPROM librarieshas changed to reflect the new method of generation. The new naming convention is describedin the relevant section of the manual. Some errata that were previously applied are no longernecessary.

idloc_write Function (9.63) This function has been recoded to be slighty more optimal.

Device Specific Header Files (9.63) Each chip now has their own specific header file. This doesaway with the header file per family scheme. Previous types and definitions have been main-tained to ensure compatibility with previous versions of the compiler. Many new types anddefinitions have been added to these header files to ensure compatibility with the new periph-eral libraries. Please refer to the header files for more details.

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Changes Documentation

Static-less SFRs (9.61PL1) All SFRs defined in the header files are no longer qualified as static.This will mean that the C register definitions have a consistent name in the assembler domain.Previously the first file to reference the C SFRs in assembly would use the C lexical namewith a prepended underscore character; other files would have needed to access these by thetemporary assembly name assigned to them. This change also speeds up the compilationprocess slightly for devices with large numbers of SFRs, and also reduces the change of thesymbol hashtables from filling.

Configuration Bit Name (9.61PL1) The ICPORT configuration bit has become ICPORTDIS to bemore consistent with other definitions. Code that uses ICPORT will need to change to reflectthis code.

pic18fxx22.h (9.61PL1) Added alternate definitions for SFR bits SSP1IE/F/P and BCL1IE/F/Pwithout the numeric identifier to allow code compatibility with older devices.

stdargs.h (9.61PL1) The va_arg macro is now an in-line function. Changes in stdarg.h reflectthis. The code generator detects and processes this function to ensure correct operation withthe latest optimizations.

3.9 DocumentationChanged Manual Page Numbering (9.61PL1) Page numbering is now continuous and arabic. En-

tering a page number in your favourite PDF viewer should take you to a page that displays thesame page number.

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Documentation Changes

20

Chapter 4

Limitations

4.1 GeneralCode size In some instances the code size may be larger than that produced by the PICC-18 STD

compiler.

Auto/param size In some instances the amount of space taken up by the program’s auto/parameterarea (paramx psect) in RAM (this area also holds temporary variables) is larger than thatproduced by the PICC-18 STD compiler.

Array pointers In some instances, the size of elements of arrays of pointers may be incorrectlycalculated.

Absolute addressed const object The absolute addressing of const qaulified objects is not sup-ported in this version of the compiler.

4.2 ParserMissing parenthesis not detected A missing end parenthesis is not detected in variable declara-

tions when the variable is type cast. For example,

static char C @ ((unsigned)&PORTA;

This problem does not appear to affect any output code, but may cause problems when usingthird-party software tools.

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Preprocessor Limitations

Qualified arrays generate error The compiler generates an error when compiling complicatedqualified arrays, e.g.:

const char * const * const listnames[] = {menu0, menu1};

The error is not issued if the array is not qualified, or for arrays of more basic types.

Multiple block variable declaration Functions which have variables declared within multiple blockswhere code within the block requires the use of temporary memory, may get corrupted whencompiled with global optimizations. A workaround is to move the inner variable declarationoutside of the block.

Structure initialization Locally defined structures cannot be initialized.

Returning structures A function cannot return a copy of structure which resides in ROM.

4.3 PreprocessorSizeof Pointers The result of the sizeof preprocessor operator when applied to a pointer will always

return 1. Use of the C sizeof operator will return the correct value.

4.4 Code generatorDegenerate comparisons Additional warnings have been added in places where a degenerate com-

parison can be identified.

Far Variables Variables qualified as far may be defined, but will not be assigned initial values.The usual caveats with far variables still apply with regard to the size of the code generatedto access them.

Extended PIC18 instruction set Presently the extended PIC18 instruction set and indexed address-ing mode are not supported by either the HI-TECH C PRO for the PIC18 MCU Family orPICC-18 STD compilers. If using a device which is equipped with the extended instructionset, it can be configured for legacy mode (extended instructions disabled) with the followingconfiguration setting:__CONFIG(4, XINSTDIS);Other configuration word 4 parameters are inherently ANDed into this directive as required.

Global optimizer The global optimizer should not be used with C code that accesses the TBLPTRx,FSRxx or PRODx special function registers. The global optimizer may use these registers for

22

Limitations Libraries

temporary variable placement and currently cannot detect the use of these registers in usercode.

Error on initialization of complex bitfields Any structure using bitfields within a structure or unioncannot be initialized. For example, using the following types where a structure is a memberof a union, initialization of the structure’s bitfields will generate an error.

typedef struct {unsigned b0:1, b1:1, b2:1, b3:1, b4:1, b5:1, b6:1, b7:1

} byte_bits;typedef union {

byte_bits bits;char byte;

} byte_or_bits;

This will generate a compiler error:

byte_or_bits example = { {1,0,1,1,0,1,0,0 } };

Instead, use a single value:

byte_or_bits example = { 0b10110100 };

4.5 LibrariesFlash Write Routine The flash write routine will fail if the memory being written is in the same

400h byte aligned block as the functions associated with writing flash.

Fast Double Libraries The fast form of the floating-point library routines have not been imple-mented. The sub-option in the –double options has been removed to that effect.

Floating point accuracy The floating point math routines, despite DBL_MIN being defined as 1.17549435E-38, cannot perform operations predictably on numbers below the order of 1e-35. The result iseither correct OR zero.

4.6 Linker and PsectsPsect Pragma The #pragma psect directive, which can be used to redirect output into a psect

with a unique name, will not function as expected with HI-TECH C PRO for the PIC18 MCUFamily. Although the pragma will perform a redirection, it will do so for the entire program,

23

Microchip Debug Limitations Limitations

not just the module in which it is used. An alternative, more user-friendly mechanism is beingdeveloped to allow placement of certain objects. Non-const global objects can be placed atspecific addresses by making them absolute.

Local/auto variables The total size of data that can be used for local/auto variables at any timemust be less than the size of a RAM bank. If this limit is exceeded, a “Can’t find ??? wordsfor psect param” error will result. The critical path of function calls that caused the error canbe identified in the call graph section of a map file. An asterisk denotes a function is on thecritical path.

4.7 Microchip Debug LimitationsICE2000/4000 Users of the Microchip ICE2000/4000 should be aware of a documented limitation

of these tools concerning side-effects when reading particular SFRs. Reading the followingSFRs can affect a STATUS bit, but due to a limitation of the ICE some general purpose regis-ters will also be affected. Reading from the following SFRs can affect the GPRs as follows:

• PORTB - x81 (081, 181, 281, 391 etc.)

• RCREG1 - xAE

• RCREG2 - x6E

• PORTD - x83

• SSPBUF - xC9

It is advised to reserve the corresponding locations using a –RAM

option (while debugging) if your program reads from the above registers.

More information can be found in MPLAB via the ICE2000/4000 help

topics under Limitations: PIC18XXXX General Limitations.

COF debug limitation For users of MPLAB debugging tools please be aware that due to a limita-tion in the COF debugging format, pointers are assumed to be 16-bits in length. This limitationwill mean that larger pointers will appear truncated in the variable watch window. The actualcontents of the pointer and program execution are not affected.

24

Chapter 5

Bugfixes

The following are descriptions of bugs that were present in the previous versions of this compiler,and which have been fixed in this release. The bracketed version number indicates the version inwhich the bug was corrected.

5.1 Command-Line DriverUndefined Symbols (9.63PL1) Applications using the flash/eeprom libraries may have produced

undefined symbols.

Memory Summary (9.63) Some memory summary results for psects of a unit size greater than onebyte were being incorrectly calculated.

Disabling Error Messages (9.61PL1) The option string to the --MSGDISABLE option was not prop-erly being read when there was more than one error message number listed, and this wouldprevent the option from operating as expected.This has been corrected and more than one error_number:off item may be specified us-ing this option.

Missing Errata NOP in Startup Code (9.61PL1) Some devices are affected by the RESET erratacondition (requiring a NOP instruction at the reset vector if this location would otherwise con-tain a GOTO instruction). A GOTO would appear at address zero without the preceding NOP if allof the following conditions were true:

• The program did not define an interrupt function

• The program did not define a custom powerup routine

25

Command-Line Driver Bugfixes

• The program contained no global variables, or all of the global variables were qualified aspersistent.

Specification of Suboptions (9.61PL1) Where an option can take several suboptions in a comma-separated list, e.g. --OPT, or --RUNTIME, only the last option specified in the list had an effectif the + or - prefix was not used. For example, --OPT=9,asm should select both global level9 optimisation, and assembler optimisation, however was only selecting the latter (howeverspecifying --OPT=9,+asm did work as expected).The driver now correctly accepts suboptions without the leading + or - prefix.

Selection of redundant options (9.61PL1) The --CP and -B options are redundant in HI-TECH CPRO for the PIC18 MCU Family, however selecting these options may result in the driversearching for non-existent libraries.The options still appear in the list of available options, however their effect has been disabled.

Initialization of data psects (9.61PL1) In some instances, code in the automatically generated run-time startup code to initialize a data psect may be missing. This may only occur for data psectslinked into banked RAM.The driver has been corrected to ensure that these psects are copied correctly at startup.

Incorrect copy of data psect (9.61PL1) In the situation where any data psect ROM image waslinked at exactly 0x10000, the copy routine would fail to load the upper TBLPTR registerand the code to copy the data psect may read the initial values from the wrong location.This has been corrected and the copy routine now reads from the correct location in all in-stances.

Incorrect indirect access of data (9.61PL1) For those devices which have general purpose RAMavailable in less than a full bank, e.g. 18F6722, the driver allowed placement of const objectsinto an area of the program space which would not be correctly access by the code issuedby the code generator. The code generator assumes address above the top of general purposeRAM are program space addresses, but it only uses the upper byte of the top of RAM addressin this runtime calculation.The driver now ensures that const objects are positioned in the program space at an addressabove the top of RAM space, rounded up to the address of the next bank.

Bogus warnings (9.61PL1) The code generator may issue warnings that do not seem appropriatewhen using the --PASS1 driver option, and not all source files are specified on the commandline, in particular that const objects are defined but not initialized. IDEs, such as HI-TIDEcompile projects in such a fashion. The driver was invoking the code generator unnecessarilywhen this option was being used resulting in the warnings.The driver will no longer call the code generator when this option is used and these warningsshould no longer occur.

26

Bugfixes Preprocessor

5.2 PreprocessorC99 Style Comments Spanning Lines (9.61PL1) C99 style comments, // a comment, can now

span multiple lines when each preceding line is terminated with a backslash, \. This is inaccordance with the C99 ANSI standard.

5.3 ParserTypedef declarations (9.63PL1) In some cases typedefs made explicitly in a program or implicitly

by the parser were being output in the intermediate p-code later than required by the codegenerator. This would cause the code generator to fail or in some instances crash. This hasnow been corrected.

Constant Declaration (9.63) The parser would mistakenly emit a warning message “attempt tomodify object qualified const” for const definitions in block scope.

Benign Redefinitions (9.63) Benign function redefinitions, (e.g. void fred(); vs void fred(void)) arenow permitted by the parser.

Float Constants in Expressions (9.61PL1) In some instances, a floating-point constant using an fsuffix to indicate float type, may have been interpretted as a constant of double type. Thismay have resulted in Can’t Generate Code errors produced by the code generator.

sizeof Operator and Arrays (9.61PL1) A problem relating to the size of elements of arrays hasbeen fixed. This problem would only occur when the array contained pointer types.

Fixed Crash (9.61PL1) A problem in the parser might cause a crash when dealing with some struc-tures that define pointer members.

Spurious Warning with Arrays (9.61PL1) The compiler would produce an error message whencode contained a declaration for a unsized array, followed by a definition with the size speci-fied and the array initialized.This error should not have been produced and has been rectified so that such code now com-piles.

Float Comparisons (9.61PL1) A problem exists in some expressions where one operand is a floatvariable and the other a floating-point literal which uses the suffix ’f’ or ’F’. Such code shouldbe evaluated in float type, however the output of the parser may be interpreted incorrectlyresulting in a mis-matched operand type and cause the code generator to crash.The parser has been updated so that no misinterpretation of the intermediate code can be madeand that the generated code is more optimal.

27

Code Generator Bugfixes

5.4 Code GeneratorUndefined symbol (9.63PL3) In some arrangements of code involving multiply-assignment for

byte objects, this resulted in an undefined symbol: bmul.

Lite mode (9.63PL2) The level of optimization has been improved for Lite mode for certain expres-sions involving SFRs. This is to ensure hardware requirements are met when certain sequenceof instructions have to occur within a set time frame (eg: EEPROM read/write).

Long addition (9.63PL2) An issue was identified involving expressions that did a long integer ad-dition between a byte and a literal. This was corrected and a more optimal solution wasimplemented.

Debugging with duplicated functions (9.63PL2) For duplicated functions (those being called froman interrupt and main-line code) some symbol information may have caused difficulties whenviewing them in a debugger (eg: MPLAB).

Absolute functions (9.63PL2) It was found that a function that followed an absolute function hadits psect definition incorrect. This has been corrected.

Can’t generate code (9.63PL1) For some statements involving the additive assignment of floating-point variables the code generator was unable to generate code. This has been corrected.

TBLPTR corruption accessing const data (9.63PL1) In some instances where programs have lessthan 64k of constant data the TBLPTR could be corrupted whilst accessing said data. Thiswould only happen when accessing data at a program address before a 100h or 10000h byteboundary for programs with less than 255 bytes (smallconst) or greater than 255 bytes andless than 64k bytes (mediumconst) of constant data respectively. This has been corrected byprogramming a dummy byte at the end of either the smallconst or mediumconst psects.

Syntax Error (9.63PL1) Some projects may have failed compilation with a syntax error in the.SDB file.

Symbols Clashing (9.63) Changes made to avoid clashes between existing symbols and those formedfrom a function_name + local_name construct.

Non-use of Access Bank Memory for autos (9.63) The code generator was not allocating the auto/parameterblock to the access bank in situations where it would normally be able to do so. The resultingcode would work correctly, but would leave a section of the access bank unallocated, placemore variables in the banked memory, and the code size would increase as a result. This issuedoes not apply to programs which have a large auto/param block that does not fit in the accessbank.

28

Bugfixes Code Generator

Skipping Bank Selection (9.63) With bit skip instructions, it is possible that the operand of thenext instruction lies in different bank. In this scenario it would skip the bank selection and notthe instruction itself.

Logical Left Shift by 7 (9.63) In some instances the code generator would produce incorrect codewhile shifting byte sized unsigned by 7.

Incorrect Symbols in Duplicated Functions (9.63) The output of the code generator when it wasprocessing duplicated functions (called from both main-line and interrupt code) was not usingthe special symbol prefix while referencing symbols for temporary variables. Other localsymbols such as autos and parameter variables were using the correct symbols and this issuewill only affect code that has reentrantly called functions that allocate temporary variables.

Unnecessary Modification of TABLPTRH (9.63) In some circumstances while using mixed 16bit pointer to access the program space, the TABLPTRH would be modified unnecessarily.

Indirect Call Errors (9.61PL1) With some indirect function calls the compiler may have produceda syntax error for assembly produced by the code generator, or resulted in an assertion failure.

Compilation Speed (9.61PL1) An unnecessary operation was resulting in unreasonable compila-tion times, particularly for large projects. This situation has been corrected with no loss incompiler functionality. The slow compile times did not affect the operation of the resultantcode.

Fixup Errors with Inline Delays (9.61PL1) In some instances, a fixup error was being generatedwith the _delay inline delay routine. This would occur for cases where the requested delaywas very large and a nested assembly loop was required.

Addition of Mixed Types (9.61PL1) When adding an unsigned char and an unsigned int, andthe result was a long, there was a problem where the carry bit was not being carried throughto the third most significant byte.

Error Missing on Invalid bit Variables (9.61PL1) Bit variables that were neither static or globalwere not generating an error and the produced code was incorrect. Such bit variables nowgenerate an error and compilation is halted.

Spurious Warning Regarding Constant Operands (9.61PL1) In some situations, code contain-ing a bitwise AND or OR operation was converted to the corresponding logical operation bythe code generator. Where one operand to this operation was a constant, a warning messagewas being produced. In this instance, the warning is not valid, and has been suppressed.

29

Code Generator Bugfixes

Bank_Selection Problem (9.61PL1) A problem in the code generator may result in bank selectioninstructions not being being placed in the output when they are required. This would mainlyaffect some situations when there is code following a function call which selects another bank.

Bad Label with Switch Code (9.61PL1) In some rare instances, a malformed label reference wasgenerated for some switch statements.

Duplicate main symbol (9.61PL1) Where there is assembly code in addition to C code, and thisassembly code references _main (being the symbol associated with the main function), anadditional copy of the main function would be output, leading to an unnecessary code sizeincrease.This issue has been fixed and _main can be referenced in assembly code without the mainfunction being duplicated.

Bank Selection Problem with Type Conversion (9.61PL1) In rare cases, a bank selection instruc-tion may be absent for code that contains conversions between types.

Fixed Crash Undefined Fake Symbol with Assembly Code (9.61PL1) Where there was C codethat called a routine written entirely in assembly code, there are some situations where a sym-bol used to represent a fake compiler-generated object would be undefined.This issue has been addressed and C code can reliably call assembly routines in all circum-stances.

Bank Selection Problem with char Comparisons (9.61PL1) A bank selection instruction was po-tentially missing with code generated from comparisons with signed char operands. Equalitycomparisons (== and !=) are not affected by this issue.

Bad Code with Self Referential Structures (9.61PL1) Where there is code such as pp = pp->nextand the pp pointer is made 2 bytes wide, and is cached in an FSR register, and the offset of thenext member within the structure is zero, the code generator may produce incorrect code forthe assignment that will leave pp with the wrong result.

Crash Calling Absolute Address (9.61PL1) When C code calls a function via an absolute address,the code generator may crash.This has been rectified and absolute functions can be called.

Bank Selection after Call (9.61PL1) In some cases the wrong bank may be selected after an indi-rect function call.

Bank Selection with Conversion (9.61PL1) In some cases where a byte is converted to a longertype, the correct bank of the object will not be selected.

30

Bugfixes Code Generator

Incorrect Signed Extension (9.61PL1) When the result of an operation that calls a library routine— such as multiplication, division, etc. — in some instances the return value of these routinesmay not have been signed extended if converted to a larger type.This has been rectified and these operations can be used by any expression.

Wrong Result with Shift of Zero (9.61PL1) When shifting a long by an amount contained in an-other variable, the result will be incorrect when the shift amount is zero.This has been corrected and shifts of zero are now accurate.

Corruption with Calls as Parameters (9.61PL1) In some instances when the return value of afunction call is used as the parameter to another function, the return value address and pa-rameter address may overlap (which is acceptable), but the code that performs the copy maycorrupt the return value before it is used.The code generator has been modified so that the copy takes place via a temporary variable.

Crash with Conditional Operator (9.61PL1) The code generator may have crashed if the returnvalue of a conditional operator was used as a parameter to a function.This has been rectified and the conditional operator can be used in this context.

Bank Selection Problem (9.61PL1) A potential problem was present for code that performed anassignment-add of an unsigned int to an unsigned long. If the two operands were indifferent banks, the generated code would result in a bad result.This has been fixed and this operation performs as expected.

Extraneous NOPs after Table Read/Write (9.61PL1) The code generator was placing NOP instruc-tions after table read and table write instructions for all PIC18 devices. These NOP instructionsare only required for some devices as specified by the Errata documentation.

Can’t Generate Code Error with Bank 15 Addresses (9.61PL1) For those devices with the er-rata specifying that peripherals may misbehave if bank 15 is selected (MOVLB 15), there mayhave been Can’t generate Code error messages produced when compiling code that containsassignment operations, such as +=, &= etc.The abilities of the code generator have been enhanced in this area.

Incorrect Offset Applied to Address (9.61PL1) In some instances an incorrect constant offset maybe applied to an address. This may typically occur when the address represents an object (ar-ray/structure) whose size exceeds 128 bytes. The wrong memory location will be accessed insuch cases.This code generator has been updated to ensure that the size and type of the offset is valid forthe object being represented by the address.

31

Code Generator Bugfixes

Crash with Structures (9.61PL1) In some rare instances where there are structures or unions withsimilar member definitions, but differing in the number of members, the code generator maycrash when compiling code that accesses the structure or union members.This problem has been fixed and these structure types will be handled correctly.

Can’t Find Space for Param Psects (9.61PL1) A bug in the code generator would incorrectly cal-culate and reserve memory for the auto variables requirements for interrupt functions. Thiswould result in an error message indicating that space could not be found for a param psect.The code generator now correctly determines the size of this psect.

Crash when using Function Pointers (9.61PL1) A bug in the code generator would cause the as-sembler to crash when a function pointer with a large number of potential function targets wasencountered. This occurred when reading an FNALIGN directive that exceeded the maximumline length of the assembler.The code generator has been updated to ensure that the maximum length is not exceeded. (Seealso related changes to the assembler.)

Pointer Arithmetic (9.61PL1) In some rare instances constant values subtracted from multi-byteaddresses may not be performed properly. This will result in the wrong address being obtainedand used in expressions.The code generator has been fixed to ensure that these expressions are calculated correctly.This issue was previously listed as a limitation which has now been removed.

Crash Initializing with Enumerated Value of Zero (9.61PL1) When initializing a non-auto vari-able with an enumerated value that is zero, the code generator may crash.This problem has been fixed so that these initializations are permitted.

Incorrect Bank Selection (9.61PL1) When an absolute object is placed in memory such that partof it resides in the access bank and the remainder in bank 0, the code generator may accessthe variable as if it all resides in the access bank. This situation applies to any object allocatedmemory by the code generator, as well as user-defined absolute variables.The code generator has been updated to ensure that the entire object is treated as residing inbank 0.

Undefined Symbols with Unused Code (9.61PL1) When compiling code that contains unused (notcalled) functions, error messages regarding these function labels being undefined may result.The code generator now ensures that all references to undefined function labels are removedfrom the output.

Crash with Initializing Structures (9.61PL1) The code generator may crash when initializing aconst structure with a value that is the size of the structure itself.The code generator has been fixed so that this initialization can be made.

32

Bugfixes Code Generator

Can’t Generate Code Messages (9.61PL1) When compiling code for devices that have generalpurpose RAM in bank 15, and the compiler is employing a workaround for selection of bank15 in BSR (e.g. 18f258), these messages may occur.The code generator has been updated to better allow access to objects without selection ofbank 15 and banked instructions.

Incorrect Bank Selection (9.61PL1) A problem may be encountered where the wrong bank is se-lected in some expressions. This is unlikely to occur, but may occur for code that involvesassignment addition/subtraction of three byte pointers and a two-byte memory location; orconversion from an unsigned byte to a temporary two-byte quantity.The correct bank is now selected for these cases.

Undefined Symbol with Switch Statement in Interrupt Function (9.61PL1) When using a switchstatement inside an interrupt function, and the direct switch type is not being employed, er-rors relating to undefined temporary assembly symbols may result.This problem has been fixed and switch statements may be used inside interrupt functions.

Inappropriate Too Many Initializers Message (9.61PL1) When definition a const array of func-tion pointers, and the target device has more than 64k of program memory, the compiler wouldincorrectly issue a “too many initializers” error message, even for correctly initialized arrays.This issue has been resolved and the error message should not appear unless the code compiledis in error.

Can’t Generate Code Message Compiling Structure Code (9.61PL1) When compiling code thataccessed a structure that contained a pointer member to another structure, e.g. one.two->three,and the structure was qualified, e.g. const, a “can’t generate code” error message may havebeen produced.This was triggered by an incorrect size being determined. This has been rectified and suchcode will compile without error.

Pointer Access with >64k Program Memory (9.61) Code that used pointers or addresses may haveproduced Can’t Generate Code error messages if more than 64k of program memory was de-fined.The code generator is now better able to match such code sequences.

Assignment of NULL function Pointer (9.61) Assignment of NULL to a function pointer in a pro-gram may result in error messages from the assembler, relating to directives issued by the codegenerator, or may result in the code generator crashing.The handling of such situations has been corrected and NULL may be assigned to functionpointers in code without erroneous results.

33

Assembler Bugfixes

Initialization of Pointer to NULL (9.61) Initialization of a pointer to NULL (i.e. at its definition)may cause the code generator to crash.The problem that caused this has been fixed and pointers may be initialized with NULL attheir definition.

Forward Reference to Structures (9.61) Forward references to structures — references to struc-tures not defined at that point in the source code — may have caused the code generator tocrash.This problems has been fixed and forward references to structures will work as expected.

Conditional Operator Use in Interrupt Code (9.61) Use of the conditional operator ? : insidean interrupt function may result in references to undefined temporary symbols. This wouldspecifically occur when the code generator was duplicating a function that was called fromboth main-line and interrupt code.The correct symbols are now referenced by such code.

Structures as Members within other Structures (9.61) The use of a structure as a member withinanother structure type, or possibly a pointer to a function that takes a structure as a parameter asa member of a structure may cause the code generator to enter an infinite loop, and ultimatelycrash.The code generator has been improved to prevent this condition.

Functions Returning const Pointers (9.61) A function defined to return a const pointer (as op-posed to a pointer to const, causes the code generator to crash. The prototype for such afunction may appear as: char * const function(void). Use of this qualifier in this in-stance has no special meaning, however is not being handled correctly.The code generator has been updated to ensure that it does not crash when processing suchcode, and the const qualifier is now essentially ignored.

5.5 AssemblerProcedural Abstration (9.63PL3) An error was detected in the algorithm used to determine if this

optimization is worth doing. In some cases the optimization may have occurred and resultedin funcational, but larger code.

Code removal (9.63PL3) In some circumstances code which was procedurally abstracted may havelater been incorrectly removed by another optimization.

Psect Alignment (9.63PL3) The psect into which code that was able to be procedurally abstratedwas missing its delta flag. This resulted in this psect having the potential to not be wordaligned. When this occurred, code in this psect would not execute correctly.

34

Bugfixes Assembler

Movff Removal (9.63PL2) Corrected an optimizations that in some circumstances was removingwhat it believed was a redundant movff instruction.

Common subexpression (9.63PL2) An optimization that looked for common code within if/elsestatements was in some instances incorrectly matching differing code, as being the same.

Return from Interrupt Code (9.61PL1) A bug which may have changed instances of the RETFIEinstruction to RETLW has been corrected. The change would only have been made if the con-tents of the WREG were known by the assembler optimizer.

Bank Selection Prior to Function Return (9.61PL1) The assembler optimizer was removing cer-tain code prior to function return instructions. If this code contained bank selection instruc-tions it may result in bad code as the code generator tracks bank selections and makes assump-tions about the selected bank when a function returns. The assembler will now longer removebank selection instructions that affect the selected bank at a function’s return.

Bank Selection Removal (9.61PL1) A problem existed in the assembler optimizer that might erro-neously remove a bank selection when followed by a CALL instruction. This issue would berarely encountered, and will only occur if the assembler optimizer is enabled.

Bank Selection Removal (9.61PL1) A problem existed in the assembler optimizer that might er-roneously remove some bank selection instructions. This issue would be rarely encountered,and will only occur if the assembler optimizer is enabled.

Removal of WREG Load (9.61PL1) In some situations, the assembler optimizer was removingloads of WREG before function calls. This removal was incorrect when the load was for aninstruction located after the call, and the function did not take WREG as a parameter andWREG was not used by the routine being called.

Alignment of parameter blocks (9.61PL1) When there is more than one function pointer (to func-tions that accept parameters other than just a byte), and there is a common function addressassigned to each pointer, the alignment of the parameter blocks of all the functions accessiblevia the pointers may not occur. This may result in the parameters to these functions beingloaded to the wrong address.The assembler has been updated to ensure that multiple FNALIGN directives are correctly pro-cessed and the parameter area of appropriate functions are correctly aligned in memory. (Seealso code generator bug fixes for related issues.)

35

Linker Bugfixes

5.6 Linkermediumconst psect (9.63PL1) The map file would erroneously report that this psect was linked

into the CODE linker class and not the MEDIUMCONST class. This has been corrected.

Memory Summary (9.61PL1) For some linker classes, e.g. SMALLCONST and MEDIUMCONST, thememory summary information produced after compilation would contain inaccurate memoryuse percentages. This resulted from truncation of the class names in the map file which didnot allow the command-line driver to correctly identify the memory space.The linker has been adjusted so that the full class names are being printed in the map file andthe memory summary is now accurate.

5.7 HEXMATE-STRING option (9.61PL1) The -STRING option stored the wrong string at the wrong address.

This has now been rectified.

5.8 CromwellBreak points in interrupts (9.63PL3) An issue was identified which caused difficulty in setting

break points in interrupt functions.

Bloated COF file (9.61PL1) When interrupt functions could not be placed at the interrupt vector afunction entry point was placed there and the body elsewhere. This could cause the COF fileto grow to large sizes unnecessarily. These cases are now fixed.

Invalid Array when Debugging (9.61PL1) A problem in cromwell meant that in some instanceswatching an array in the MPLAB IDE watch view would result in the contents of the arraybeing displayed as Invalid Array Element. This has been corrected so watching these objectsis now possible.

Debugging Improvements under MPLAB IDE (9.61PL1) Fixes to improve C-level debugging un-der MPLAB IDE, including support for short long types, better support for absolute variables,improvements to line number information and size of types.

Extended instruction set in MPLAB (9.61PL1) If compiling for a PIC18FxxJxx part within theMPLAB IDE, it was common for the IDE to warn that extended instruction mode had beenselected even if the project’s configuration selected the legacy instruction set. This was due toan ambiguity in the Microchip COFF file produced by cromwell which caused MPLAB to notdetect the user’s configuration settings and default to using the enhanced instruction mode.

36

Bugfixes Libraries

5.9 LibrariesTCP/IP Stack Work-around (9.63PL1) When the preprocessor macros __TCP_H or __TCPIP_H

are defined, the new Microchip-compatible SFR definitions are not automatically included.This avoids multiple definitions

Undefined Symbols (9.63PL1) Using the Flash / EEPROM libraries could cause undefined symbolerrors to appear.

idloc_read Function (9.63) A post increment on a table read operation caused the TBLPTR toreturn a +1 address value which caused a problem when invoked from idloc_write function.

Bad Printf Output (9.61PL1) The auto-generated printf (and sprintf) functions may produce incor-rect output for placeholder sequences that request zero or space padding, or the + (mandatorysign) flag.

Flash Write Routine (9.61PL1) The routine to write flash memory has been updated. This did notwork with J devices. See also Limitations.

Printf usage (9.61) For user code that calls both printf and sprintf, an undefined symbol errorwill result for both these functions. Use of either of these functions without the other will nottrigger this error.The appropriate code has been added to the library files to allow both of these functions to beaccessed in the same program.

Printf Code (9.61) The auto-generated printf() code was malformed in some situations when theunsigned placeholder was detected in user-code, and would result in undefined symbols beingreferenced. The use of other placeholders and flag modifiers may have masked this behaviourand resulted in a valid printf() function definition.

5.10 Chip Configuration FileMemory sizes (9.63PL2) Flash erase/write size and EEPROM memory size for 18F46K20 and

18F26K20 has been corrected.

RAM Size on PIC18x7J11 Parts (9.61PL1) The RAM size for the PIC18x7J11 parts was incor-rectly set at F5Ah, and is now F40h.

18F97J60 ICD2_RAM (9.61PL1) This device family reserved an incorrect RAM memory rangewhen debugging for the MPLAB ICD2.

37

Header Files Bugfixes

5.11 Header Files

Incorrect macro name (9.63PL3) A macro (MODE0) in sw_spi.h was clobbering a bit of the samename in 18F87Jxx devices.

Configuration bits (9.63PL2) An issue was identified in J devices which left unimplemented con-figuration bits unprogrammed. This resulted in device programmer errors. The unimple-mented bit (config1H bit 3) now gets set to zero to avoid this issue.

Assembler header files (9.63PL2) An issue was identified in the process used to create assemblerheader files which may have caused some invalid definitions to be created.

Configuration Masks (9.63) WDTDIS, EXTOSC and INTOSC configuration mask have been cor-rected.

Assembler headers (9.61PL1) Assembler header files which defined a device’s SFRs and bits wouldredefine some symbols (resulting in an error) if the complimentary C header file contained pre-processor tests to allow an SFR or bit to be defined multiple ways. The pic18f97j60.h/as18f97j60.hpair were an example of this.

pic18f4520.h (9.61PL1) The PLLEN (OSCTUNE register) was incorrectly disabled for 18F4520and 18F2520 parts.These bits are now defined and can be used in the usual way.

Idloc Routines Removed for J Parts (9.61PL1) The routines for accessing the idloc memory havebeen removed for J parts, as these do not support this memory.

READTIMERx macros (9.61PL1) Brackets were missing from the definitions of the READTIMERxmacros in pic18.h. They should can now be referenced like: READTIMER3().

5.12 Demo files

Bootloader (9.61PL1) If building the bootloader in compact mode and not selecting to debug withthe ICD2, bootloader self-protection was done by enabling write protection of the boot sectorthe the device’s configuration bits. If the boot sector for the device being compiled for wasgreater than 512 bytes in size, a section of program memory that should have been writableby the bootloader would have been write protected, causing some of the incoming program toread back as unprogrammed.

38

Bugfixes MPLAB IDE Plugin

5.13 MPLAB IDE PluginRuntime Compiler Option (9.61PL1) A bug has been fixed that was not passing the correct sub-

options to the --RUNTIME compiler option.

39

MPLAB IDE Plugin Bugfixes

40

Chapter 6

Addendum

6.1 Microchip ErrataThis release of the PICC-18 compiler recognises the published silicon errata issues listed in the tablebelow. Some of these issues have been corrected and no longer apply in recent silicon revisions.Refer to Microchip’s device errata documents for details on which issues are still pertinent for yoursilicon revision. The compiler’s chip configuration file records which issues are applicable to eachdevice. Specific errata workarounds can be selectively enabled or disabled via the driver’s --ERRATAcommand line option.

PICC-18 Errata WorkaroundsName Description Workaround details

4000 Execution of some flow control opera-tions may yeild unexpected results whencertain instructions vector code execu-tion across the 4000h address boundary.

A continuous block of pro-gram code is not allowed togrow over the 4000h addressboundary. Additional NOPinstructions are inserted atprescribed locations.

LFSR Using the LFSR instruction to load avalue into a specified FSR register mayalso corrupt a RAM location.

The compiler will load FSRregisters without using theLFSR instruction.

DAW The DAW instruction may improperlyclear the CARRY bit (STATUS<0>) whenexecuted.

The compiler is not affectedby this issue.

Continued...

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Microchip Errata Addendum

PICC-18 Errata WorkaroundsName Description Workaround details

MINUS40 Table read operations above the userprogram space (>1FFFFFh) may yielderroneous results at the extreme low endof the device’s rated temperature range(-40oC).

Affected library sourcesconfig.c, idloc.c and de-vread.c employ additionalNOP instructions at pre-scribed locations.

EEDAT When reading EEPROM, the contentsof the EEDATA register may become cor-rupted in the second instruction cycleafter setting the RD bit (EECON1<0>).

The EEPROM_READ macroand eeprom_read libraryfunction read EEDATA im-meadiately.

EEADR The result returned from an EEPROMread operation can be corrupted if theRD bit is set immediately following theloading of the EEADR register.

The compiler is not affectedby this issue.

EELVD Writes to EEPROM memory may notsucceed if the internal voltage referenceis not set.

No workaround applied

FLLVD Writes to program memory may notsucceed if the internal voltage referenceis not set.

No workaround applied

RESET A GOTO instruction placed at the resetvector may not execute.

Additional NOP instructioninserted at reset vector if fol-lowing instruction is GOTO.

FASTINTS If a high-priority interrupt occurs duringa two-cycle instruction which modifiesWREG, BSR or STATUS, the fast-interruptreturn mechanism (via shadow regis-ters) will restore the value held by theregister before the instruction.

Additional code reloadsthe shadow registers withthe correct values of WREG,STATUS and BSR.

BSR15 Peripheral flags may be erroneously af-fected if the BSR register holds the value15, and an instruction is executed thatholds the value C9h in its 8 least signif-icant bits.

Compiler avoids generatingMOVLB 15 instructions. Awarning is issued if this in-struction is detected.

Continued...

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Addendum Microchip Errata

PICC-18 Errata WorkaroundsName Description Workaround details

TBLWTINT If a peripheral interrupt occurs during aTBLWT operation, data can be corrupted.

Library routine flash_write()will temporarily disable allapplicable interrupt-enablebits before execution of aTBLWT instruction.

FW4000 Self write operations initiated from andacting upon a range within the same sideof the 4000h boundary may fail basedon sequences of instructions executedfollowing the write.

No workaround applied

RESETRAM Data in a RAM location can becomecorrupted if an asynchronous reset (eg.WDT, MCLR event) occurs during awrite operation to that location.

A warning will be issuedif the length nvram psectis greater than zero bytes(persistent variables popu-late this psect).

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