fpga-based router virtualization: a power perspective
DESCRIPTION
FPGA-based Router Virtualization: A Power Perspective. Author : Thilan Ganegedara , Viktor K. Prasanna Publisher: IEEE IPDPSW, 2012 Presenter: Li- Hsien , Hsu Data: 12/12/2012. Introduction(1/2). - PowerPoint PPT PresentationTRANSCRIPT
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FPGA-based Router Virtualization: A Power Perspective
Author: Thilan Ganegedara, Viktor K. PrasannaPublisher: IEEE IPDPSW, 2012Presenter: Li-Hsien, HsuData: 12/12/2012
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Introduction(1/2)
In this paper, we study the effect of router virtualization, from a power consumption perspective, on the widely used Field Programmable Gate Array (FPGA) platform.
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Introduction(2/2)
We summarize our contributions in this work as follows: An accurate analytical model to estimate power savings
achieved using router virtualization Exploration of low power FPGAs to achieve greater power
benefits in networking applications Detailed power comparison of non-virtualized vs. virtualized
schemes on state-of-the-art FPGA Power efficiency comparison for different virtual router
configurations
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background In the research community, two main categories of
virtualization techniques can be found: 1) Separate and 2) Merged.
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Notations & assumptions(1/4)
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Notations & assumptions(2/4)
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Notations & assumptions(3/4)
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Notations & assumptions(4/4)
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Router models for power estimation(1/3)Non-virtualized
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Router models for power estimation(2/3)Virtualized-separate
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Router models for power estimation(3/3)Virtualized-merged
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Virtual routers on FPGA(1/5)For these experiments, we consider a Xilinx Virtex 6
platform (XC6VLX760) under two speed grade scenarios: 1) speed grade -2 for high performance and 2) speed grade -1L for lower power.
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Virtual routers on FPGA(2/5)Static power
The static power is the minimum power required to keep the device “powered up” with no switching.
it is proportional to the area of the device, process technology, and the operating temperature.
In our case, we examined the static power dissipation of the device under the two speed grades and the results are as follows:
• Speed grade -2: 4.5 ± 5% W• Speed grade -1L: 3.1 ± 5% W
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Virtual routers on FPGA(3/5)Power consumed by memory
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Virtual routers on FPGA(4/5)Power consumed by logic
Logic power is distributed among Look-Up Tables (LUT), shift registers, distributed RAM and flip-flops.
Signal power includes the power dissipated when communicating among the aforementioned logic resources as well as memory components.
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Virtual routers on FPGA(5/5)
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Power performance(1/3)
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Power performance(2/3)
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Power performance(3/3)we use the power dissipated per unit throughput as the
metric for our comparisons.