final exam os fall 2012-2013 with answers
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Final Exam for Operating systems part one _Fall_2012-2013-OS With answersTRANSCRIPT
Cairo University
Faculty of Computers and Information
Final Exam
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Department: Computer science Course Name: Operating systems (I) Date: 13th of January 2013 Course Code: CS241 Duration: 2 hours Instructor(s): Dr. Hussien SharafDr. Hussien SharafDr. Hussien SharafDr. Hussien Sharaf Total Marks: 60
Question 1 [5 marks] a. One of the major benefits of using threads is responsiveness. Explain how the use of threads can
enhance responsiveness of a single program that contains a GUI and two long processes; one is
calculating values and the other is doing disk-related operations. [3 marks]
b. What are the major benefits of using threads other than responsiveness? [2 marks]
Solution:
Chapter 4: Threads
a. Allow a program to continue running even if part of it is blocked or is performing a lengthy
operation.
-Three threads can be used one responsible for GUI, another for the first process and another for the I/O
processing. The separation of these processes into separate threads allows the OS to switch between
them if a thread is busy with any I/O operation.
b. Major benefits of using threads other than responsiveness
1. Resource Sharing: Threads share the memory and the resources of the process to which they
belong by default. The benefit of sharing code and data is that it allows an application to have
several different threads of activity within the same address space.
2. Scalability: A single-threaded process can only run on one processor, regardless how many are
available.
3. Economy: Because threads share the resources of the process to which they belong, it is more
economical to create and context-switch threads. [optional]
Question 2 [5 marks] a. Explain the difference between preemptive and non-preemptive scheduling. [2 marks]
b. Can starvation occur in a non-preemptive scheduling system? Can it occur in a preemptive one?
[2 marks]
c. One of the methods that solve starvation is “Aging”. What is “Aging”? [1 marks]
Solution:
Chapter 5: CPU Scheduling
a. Difference between preemptive and non-preemptive scheduling
1. Preemptive scheduling: The process that is loaded into the processor might be swapped out in
favor of another process.
2. Non-preemptive scheduling: Once the CPU has been allocated to a process, the process keeps
the CPU until it releases the CPU either by terminating or by switching to the waiting state.
b. Yes. No.
c. Aging is a technique to avoid starvation in a scheduling system. It works by adding an aging factor to
the priority of each process/thread.
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Question3: [16 marks] Consider the following set of processes, with the estimated CPU burst given in milliseconds, and lower
priority numbers corresponding to higher CPU priority (1 is the highest):
The processes are assumed, to have arrived in the order P1, P2, P3, P4,
P5, all at time 0.
a. Draw four Gantt charts that illustrate the execution of these processes using the following scheduling algorithms: non-preemptive SJF, non-preemptive priority (a smaller priority number implies a higher priority), RR (quantum= 1), and RR (quantum= 2).
[6 marks] For the following two sections you must use the following table. Do not risk losing marks:
N-P SJF N-P Priority turnaround time RR(q=1)
turnaround time RR(q=2)
turnaround Waiting turnaround Waiting turnaround Waiting turnaround Waiting P1 P2 P3 P4 P5 b. Calculate the turnaround time of each process for each of the scheduling algorithms in part (a). [4 marks] c. Calculate waiting time of each process for each of these scheduling algorithms in part (a). [6 marks] Solution Chapter 5: CPU Scheduling
a. Gantt charts SJF
P2 P4 P3 P5 P1 0 1 2 4 9 19 non-preemptive priority
P2 P5 P1 P3 P4 0 1 6 16 18 19 RR(Q=1)
P1 P2 P3 P4 P5 P1 P3 P5 P1 P5 P1 P5 P1 P5 P1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 19 RR(Q=2)
P1 P2 P3 P4 P5 P1 P5 P1 P5 P1 0 2 3 5 6 8 10 12 14 15 19
Process Burst Time
Priority
P1 10 3
P2 1 1
P3 2 3
P4 1 4
P5 5 2
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N-P SJF N-P Priority turnaround time RR(q=1)
turnaround time RR(q=2)
turnaround Waiting turnaround Waiting turnaround Waiting turnaround Waiting P1 19 9 16 6 19 9 19 9 P2 1 0 1 0 2 1 3 2 P3 4 2 18 16 7 5 5 3 P4 2 1 19 18 4 3 6 5 P5 9 4 6 1 14 9 15 10 b. Turnaround times
turnaround time SJF
turnaround time
NP Priority
turnaround time
RR(q=1)
turnaround time
RR(q=2) P1 19 16 19 19
P2 1 1 2 3
P3 4 18 7 5
P4 2 19 4 6
P5 9 6 14 15
c. Waiting times turnaround
time SJF
turnaround time
NP Priority
turnaround time
RR(q=1)
turnaround time
RR(q=2) P1 9 6 9 9
P2 0 0 1 2
P3 2 16 5 3
P4 1 18 3 5
P5 4 1 9 10
d. Average waiting time for all algorithms
SJF: 9+0+2+1+4=16 ���� 16/5 = 3.2ms NP Priority: 6+0+16+18+1=41 ���� 41/5 = 8.2ms RR(Q=1): (14-5)+(1-0)+(6-1)+(3-0)+(14-5) =9+1+5+3+9=16 ���� 27/5 = 5.4ms. RR(Q=2): (15-6)+(2-0)+(3-0)+(5-0)+(14-4) =9+2+3+5+10=29 ���� 29/5 = 5.8ms. SJF has the shortest average waiting time.
Question4: [6 marks] Consider a variant of the round robin scheduling algorithm where the entries in the ready queue are
pointers to PCBs.
a. What would be the effect on turn-around time for a process that has two pointers pointing to its
PCB in the ready queue? [2 marks] b. Assume only two levels of priorities (with value two for the highest priority); draw a circle to show
how the CPU time of eight (8) units is divided among P1, P2, P3, P4 and P5 with priorities [1, 1, 2, 2,
2] respectively. [2 marks]
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c. How would you modify the basic RR algorithm to achieve the same effect without the use of
duplicate pointers? [2 marks] Solution
Chapter 5: CPU Scheduling
a. A process that has two pointers in the ready queue pointing to its PCB; will have increased its
priority. It gets double the time quantum in a single cycle of round robin algorithm.
b. Any process with priority 2 gets two pointers in the ready queue pointing at its PCB while a process
with lower priority gets only one slice.
c. Allow a process to get double the time quantum according to its priority.
Question5: [6 marks] a. Assume two operations A(counter++) and B (counter--): [4 marks]
A: register1 = Counter
register1 = register1 + 1
Counter = register1
B: register2 = Counter;
register2 = register2 - 1
Counter = register2
Show a computation sequence to illustrate how race condition may happen. b. Why must the semaphore methods Wait() and Signal() be atomic operations? [2 marks]
Solution:
Chapter 6: Process Synchronization
a. S0: producer execute register1 = Counter {register1 = 5}
S1: producer execute register1 = register1 + 1 {register1 = 6}
S2: consumer execute register2 = Counter {register2 = 5}
S3: consumer execute register2 = register2 - 1 {register2 = 4}
S4: producer execute counter = register1 { Counter = 6 }
S5: consumer execute counter = register2 { Counter = 4}.
b. The semaphore methods Wait() and Signal() be atomic operations in order to prevent race
condition.
P1
P2 P3
P4 P5
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Question6: [6 marks] Consider the following code for solving Dinning philosophers’ problem. Write code, psedocode or a flow
chart to describe what checks are needed as preconditions for changing state of Philosopher [i] to
“eating” state.
monitor DiningPhilosophers
{
enum { THINKING; HUNGRY, EATING) state [5] ;
condition self [5];
void pickup (int i)
{
state[i] = HUNGRY;
test(i);
if (state[i] != EATING) self [i].wait;
}
void putdown (int i)
{
state[i] = THINKING;
// test left and right neighbors
test((i + 4) % 5);
test((i + 1) % 5);
}
void test (int i) { /****missing code****/ }
main() {
for (int i = 0; i < 5; i++)
state[i] = THINKING;
}
}//End of Monitor
Solution:
Chapter 6: Process Synchronization
if ( (state[(i + 4) % 5] != EATING) && ………2 marks
(state[i] == HUNGRY) && ………2 marks
(state[(i + 1) % 5] != EATING) ) ………2 marks
{
state[i] = EATING ;
self[i].signal () ;
}
Cairo University
Faculty of Computers and Information
Final Exam
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Question7: [8 marks] Consider five processes P0 through P4; and three types of resources A (10 instances), B (5 instances),
and C (7 instances). Consider the following snapshot of a system:
Allocation Need Available
A B C A B C A B C
P0 0 1 0 7 4 3 2 3 0
P1 3 0 2 0 2 0
P2 3 0 2 6 0 0
P3 2 1 1 0 1 1
P4 0 0 2 4 3 1
Use the safety algorithm to check if this system is in a safe state and specify the safe execution sequence
that you discovered (if any).
Solution:
Chapter 7: Deadlocks Allocation Need Available
A B C A B C A B C
P1 3 0 2 0 2 0 2 3 0
P3 2 1 1 0 1 1 5 3 2
P4 0 0 2 4 3 1 7 4 3
P0 0 1 0 7 4 3 7 4 5
P2 3 0 2 6 0 0 7 5 5
10 5 7
Either of P1, P3, can start: <P1, P3, P4, P0, P2>
Question8: [8 marks] Consider a logical address space of 32 pages of 2048 words each, mapped onto a physical memory of 8
frames.
a. How many bits are needed for addressing the total logical address? [2 marks]
b. How many bits are needed to indicate the page number? [2 marks]
c. How many bits are needed for addressing the physical address? [2 marks]
d. What is the effect of allowing more than one entry in a page table (each entry belongs to a process)
to point to the same frame in physical memory? [2 marks]
Solution:
Chapter 8: Main Memory
a. 32*2048=25*2
11 =2
16
Therefore 16 bits are needed for the logical address.
b. 32 =25
Therefore 5 bits are needed for the logical address.
c. 8*2048=23*2
11 =2
14
Therefore 14 bits are needed for the physical address.
d. By allowing two entries in a page table to point to the same frame in memory, processes can share
code and data.
End of Exam