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2017 Microchip Technology Inc. DS50002604A
EVB-LAN9252-SPIQuick Start Guide
DS50002604A-page 2 2017 Microchip Technology Inc.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may besuperseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NOREPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Micro-chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and holdharmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly orotherwise, under any Microchip intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 9781522417620
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTSYSTEMCERTIFIEDBYDNV
== ISO/TS16949==
EU Declaration of Conformity This declaration of conformity is issued by the manufacturer. The development/evaluation tool is designed to be used for research and development in a laboratory environment. This development/evaluation tool is not a Finished Appliance, nor is it intended for incorporation into Finished Appliances that are made commercially available as single functional units to end users under EU EMC Directive 2004/108/EC and as supported by the European Commission's Guide for the EMC Directive 2004/108/EC (8th February 2010). This development/evaluation tool complies with EU RoHS2 Directive 2011/65/EU. This development/evaluation tool, when incorporating wireless and radio-telecom functionality, is in compliance with the essential requirement and other relevant provisions of the R&TTE Directive 1999/5/EC and the FCC rules as stated in the declaration of conformity provided in the module datasheet and the module product page available at www.microchip.com. For information regarding the exclusive, limited warranties applicable to Microchip products, please see Microchip’s standard terms and conditions of sale, which are printed on our sales documentation and available at www.microchip.com. Signed for and on behalf of Microchip Technology Inc. at Chandler, Arizona, USA.
Object of Declaration: EVB-LAN9252-SPI
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EVB-LAN9252-SPIQUICK START
GUIDE
Table of Contents
Preface ........................................................................................................................... 7Introduction............................................................................................................ 7
Document Layout .................................................................................................. 7
Conventions Used in this Guide ............................................................................ 8
The Microchip Web Site ........................................................................................ 9
Development Systems Customer Change Notification Service ............................ 9
Customer Support ................................................................................................. 9
Document Revision History ................................................................................. 10
Chapter 1. Overview1.1 Introduction ................................................................................................... 11
1.1.1 References ................................................................................................ 11
Chapter 2. EVB-LAN9252-SPI2.1 EVB-LAN9252-SPI Board Design ................................................................ 13
2.1.1 SPI Headers .............................................................................................. 132.1.2 Power ........................................................................................................ 142.1.3 Digital Interface Connector ........................................................................ 14
2.2 Interfacing with a Third Party Processor via SPI .......................................... 142.2.1 Connect pins ............................................................................................. 142.2.2 Configure Slave Software .......................................................................... 152.2.3 Configure System from EtherCAT Master ................................................. 15
Appendix A. EVB-LAN9252-SPI Evaluation Board SchematicsA.1 Introduction .................................................................................................. 17
Worldwide Sales and Service .................................................................................... 22
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EVB-LAN9252-SPIQUICK START
GUIDE
Preface
INTRODUCTION
This chapter contains general information that will be useful to know before using and configuring the EVB-LAN9252-SPI. Items discussed in this chapter include:
• Document Layout
• Conventions Used in this Guide
• The Microchip Web Site
• Development Systems Customer Change Notification Service
• Customer Support
• Document Revision History
DOCUMENT LAYOUT
This document describes how to configure the EVB-LAN9252-SPI, such as the DIGIO and SPI, as well as various setup options, scanning, and programming. The manual layout is as follows:
• Chapter 1. “Overview” – Shows a brief description of the EVB-LAN9252-SPI board quick setup.
• Chapter 2. “EVB-LAN9252-SPI” – Provides instructions in configuring SPI.
• Appendix A. “EVB-LAN9252-SPI Evaluation Board Schematics” – This appendix shows how to set up Master in Windows.
NOTICE TO CUSTOMERS
All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our web site (www.microchip.com) to obtain the latest documentation available.
Documents are identified with a “DS” number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is “DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the document.
For the most up-to-date information on development tools, see the MPLAB® IDE online help. Select the Help menu, and then Topics to open a list of available online help files.
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EVB-LAN9252-SPI Quick Start Guide
CONVENTIONS USED IN THIS GUIDE
This manual uses the following documentation conventions:
DOCUMENTATION CONVENTIONS
Description Represents Examples
Arial font:
Italic characters Referenced books MPLAB® IDE User’s Guide
Emphasized text ...is the only compiler...
Initial caps A window the Output window
A dialog the Settings dialog
A menu selection select Enable Programmer
Quotes A field name in a window or dialog
“Save project before build”
Underlined, italic text with right angle bracket
A menu path File>Save
Bold characters A dialog button Click OK
A tab Click the Power tab
N‘Rnnnn A number in verilog format, where N is the total number of digits, R is the radix and n is a digit.
4‘b0010, 2‘hF1
Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>
Courier New font:
Plain Courier New Sample source code #define START
Filenames autoexec.bat
File paths c:\mcc18\h
Keywords _asm, _endasm, static
Command-line options -Opa+, -Opa-
Bit values 0, 1
Constants 0xFF, ‘A’
Italic Courier New A variable argument file.o, where file can be any valid filename
Square brackets [ ] Optional arguments mcc18 [options] file [options]
Curly brackets and pipe character: { | }
Choice of mutually exclusive arguments; an OR selection
errorlevel {0|1}
Ellipses... Replaces repeated text var_name [, var_name...]
Represents code supplied by user
void main (void){ ...}
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Preface
THE MICROCHIP WEB SITE
Microchip provides online support via our web site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online discussion groups, Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
DEVELOPMENT SYSTEMS CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest.
To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions.
The Development Systems product group categories are:• Compilers – The latest information on Microchip C compilers, assemblers, linkers
and other language tools. These include all MPLAB C compilers; all MPLAB assemblers (including MPASM assembler); all MPLAB linkers (including MPLINK object linker); and all MPLAB librarians (including MPLIB object librarian).
• Emulators – The latest information on Microchip in-circuit emulators.This includes the MPLAB REAL ICE and MPLAB ICE 2000 in-circuit emulators.
• In-Circuit Debuggers – The latest information on the Microchip in-circuit debuggers. This includes MPLAB ICD 3 in-circuit debuggers and PICkit 3 debug express.
• MPLAB IDE – The latest information on Microchip MPLAB IDE, the Windows Integrated Development Environment for development systems tools. This list is focused on the MPLAB IDE, MPLAB IDE Project Manager, MPLAB Editor and MPLAB SIM simulator, as well as general editing and debugging features.
• Programmers – The latest information on Microchip programmers. These include production programmers such as MPLAB REAL ICE in-circuit emulator, MPLAB ICD 3 in-circuit debugger and MPLAB PM3 device programmers. Also included are nonproduction development programmers such as PICSTART Plus and PIC-kit 2 and 3.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
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EVB-LAN9252-SPI Quick Start Guide
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
DOCUMENT REVISION HISTORY
Revisions Section/Figure/Entry Correction
DS50002604A (05-30-17) Initial release of document
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EVB-LAN9252-SPIQUICK START
GUIDE
Chapter 1. Overview
1.1 INTRODUCTION
The EVB-LAN9252-SPI board is intended to be a generic interface to many third party processors used in EtherCAT Slave applications. The EVB-LAN9252-SPI is designed to be a simple interface to the SPI port, with test points for power and ground. The eval-uation board uses standard RJ45 connectors to connect to the EtherCAT system and can be used to begin software development of the EtherCAT Slave code before the final hardware is completed.
1.1.1 References
The following documents should be referenced when using this quick start guide. See your Microchip representative for availability.
• LAN9252 - 2/3-Port EtherCAT Slave Controller with Integrated Ethernet PHYs
• LAN9252 Migration Guide from the Beckhoff ET1100
• LAN9252_C2000_SDK_V1.0
• LAN9252_C2000_SDK_V1.1
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Chapter 2. EVB-LAN9252-SPI
2.1 EVB-LAN9252-SPI BOARD DESIGN
This section is an overview of the EVB-LAN9252-SPI board design and interface. The board is intended to provide an interface to the SPI port of a microcontroller develop-ment platform.
FIGURE 2-1: EVB-LAN9252-SPI TOP VIEW
2.1.1 SPI Headers
The four signals used for SPI communication with LAN9252 are exposed via headers (J4-J7). These can direct the signals to the connector J3 as HBI or SPI, or be used to fly-wire SPI between boards.
• J4 is connected to pin 19 of LAN9252. Connect a jumper between pins 1 and 2 to route the signal to the D9 pin of J3. Jumper pins 2 and 3 to connect the signal to pin SCK of J3. Alternatively, remove the jumper and wire the SPI Clock directly to pin 2 of this header.
• J5 is connected to pin 50 of the LAN9252. Connect a jumper between pins 1 and 2 to route the signal to the D5 pin of J3. Jumper pins 2 and 3 to connect the signal to pin SCS# of J3. Alternatively, remove the jumper and wire the SPI Chip Select directly to pin 2 of this header.
• J6 is connected to pin 13 of the LAN9252. Connect a jumper between pins 1 and 2 to route the signal to the D1 pin of J3. Jumper pins 2 and 3 to connect the signal to pin S0 of J3. Alternatively, remove the jumper and wire the SPI Slave Data Out (SPI Master In) directly to pin 2 of this header.
• J7 is connected to pin 17 of the LAN9252. Connect a jumper between pins 1 and 2 to route the signal to the D0 pin of J3. Jumper pins 2 and 3 to connect the signal to pin SI of J3. Alternatively, remove the jumper and wire the SPI Slave Data In (SPI Master Out) directly to pin 2 of this header.
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2.1.2 Power
When connected to a compatible development system through J3, the power test points are to be used to confirm a proper voltage is present on the board. When wiring the board to an external development board, the power test points are used to connect an external power supply to the board.
• TP2 is tied to the 3.3V supply for the LAN9252 and the EEPROM for configura-tion.
• TP3 is tied to the GND plane of the board. Additional GND access can be found on J8 and J9.
2.1.3 Digital Interface Connector
EVB-LAN9252-SPI also has a mass interface connector on the bottom of the board. This interface is used to connect many of the LAN9252 signals to third party develop-ment platforms. These pins enable evaluation of HBI and SPI abstraction using LAN9252. LAN9252 must also be configured with the correct ESI (EtherCAT Slave Information) via EEPROM for these signals to be active.
FIGURE 2-2: EVB-LAN9252-SPI BOTTOM VIEW
2.2 INTERFACING WITH A THIRD PARTY PROCESSOR VIA SPI
The EVB-LAN9252-SPI can be connected to any microprocessor development plat-form with exposed SPI pins. Once the pins have been connected properly, software development can begin. The process can be broken down into three steps:
2.2.1 Connect pins
1. Connect the SPI pins to J4-J7.
2. Connect to Power Test Points to a bench supply, or 3.3V supply on the processor board. Connect GND to TP3 and 3.3V to TP2.
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EVB-LAN9252-SPI
2.2.2 Configure Slave Software
There are four ways to program the processor to act as an EtherCAT Slave Device. The different methods have different degrees of development needed to get to a solution ready for the next stage in the process.
• When using an existing EtherCAT Slave solution, refer to the LAN9252 Migration guide for details on how to replace the existing ET1100 interface libraries with the LAN9252 equivalent. All other code can remain the same.
• When using a processor with a LAN9252 SDK, the Slave Source Code (SSC) tool from Beckhoff can be used to automatically generate EtherCAT Slave code. In the SDK are template files that are used to speed the process along. Refer to the LAN9252 product page for the latest SDKs in the software library section.
• The EVB-LAN9252_HBIPLUS_SDK_V1.3 is an example of an SDK that has tem-plate libraries to help with development.
• When using a processor that only has LAN9252 drivers, the Slave Source Code tool can still be used. There will not be template files for faster development, and the developer will need to manually add the LAN9252 driver files into the SSC and develop the processor specific interface code to the necessary peripherals used.
- The LAN9252_C2000_Drivers_V1.0 is an example of the drivers provided for the LAN9252.
• When using a processor without any drivers, the developer will need to develop both the LAN9252 SPI interface libraries as well as the processor specific inter-face code to the peripherals used.
2.2.3 Configure System from EtherCAT Master
Once the Slave Source Code has been developed and programmed onto the proces-sor, the LAN9252 can be connected to an EtherCAT Master. Use the ESI files and EEPROM configuration settings to properly set up the LAN9252 for the desired digital communication. Debug and test the Slave code in the full EtherCAT development envi-ronment.
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GUIDE
Appendix A. EVB-LAN9252-SPI Evaluation Board Schematics
A.1 INTRODUCTION
This appendix shows the EVB-LAN9252-SPI Evaluation Board Schematics.
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3V3
Low
ESR 470pF
25V0603
C14
VDDCR
0.1uF25V0603
C7
0.1uF25V0603
C8
0.1uF25V0603
C9
0.1uF25V0603
C10
0.1uF25V0603
C11
0.1uF25V0603
C12
1uF16V0603
C13
C13 & C14 Close to Pin6
FV03
NP
0.1uF25V0603
C15
0.1uF25V0603
C16
FIGURE A-1: LAN9252-1
POWER
INT PORT0
INT PORT1
OSC
I2C
FXSDA/FXLOSA/FXSDENA 9
FXSDB/FXLOSB/FXSDENB 10
VD
D33
TXR
X1
51
TXNA 52
TXPA 53
RXNA 54
RXPA 55
VD
D12
TX1
56
RBIAS57
VD
D33
BIA
S58
VD
D12
TX2
59
RXPB 60RXNB 61TXPB 62TXNB 63V
DD
33TX
RX
264
OSCI1
OSCO2
OSCVDD123
OSCVSS4
REG_EN7
FXLOSEN8
RST#11
IRQ44
TESTMODE41
EESCL/TCK43
EESDA/TMS42
LINKACTLED0/TDO/CHIP_MODE048
LINKACTLED1/TDI/CHIP_MODE146
RUNLED/E2PSIZE45
VD
D33
5
VD
DIO
114
VD
DIO
220
VD
DIO
332
VD
DIO
437
VD
DIO
547
VD
DC
R1
6
VD
DC
R2
24
VD
DC
R3
38
GN
D65
U1A
0.1uF25V0603
C19
3V3 3V3
VDDCR
TXA_NTXA_PRXA_NRXA_P
TXB_NTXB_PRXB_NRXB_P
3V3
12.1k06031%
R1
RST#
I2C_SCLI2C_SDL
GPIO0GPIO1GPIO2
25MHz
Y118pF50V0603
C20
18pF50V0603
C21 Note: OSCVSS need to connect to Chip GND
0.1uF25V0603
C4
VDD12TX2
VDD12TX1
VDD33TXRX1
VDD33TXRX2
3V3
BLM18EG221SN1D
FB1
0.1uF25V0603
C2
BLM18EG221SN1D
FB2
0.1uF25V0603
C18
3V3
3V3
VDD33TXRX1
VDD33TXRX2
BLM18EG221SN1D
FB3BLM18EG221SN1D
FB4
LAN9252-PART1
10k06031%
R2
0.1uF25V0603
C22
3V3
RST#
RESET CKT
Power Supply Filtering
DNP
TP1
IRQ
VD
D12
TX2
VD
D12
TX1
0.1uF25V0603
C5
OSCIOSCO
0R0603
R25
1uF16V0603DNP
C3
1u1606D
C61uF16V0603DNP
C1
1uF16V0603DNP
C17
1423
SW1
DNPTP4
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3V3
I2C_SCLI2C_SDL
GPIO2
Br Grn
D1
270R06035%
R9
10k06031%
R10
10k06031%
R11
10k06031%
R12
3V3
4.7k06035%
R222K06030.1%
R192K06030.1%
R20
3V3
0.1uF25V0603
C28
GPIO0
GPIO1
GPIO0 = LINKACTLED0/TDO/CHIP_MODE0GPIO1 = LINKACTLED1/TDI/CHIP_MODE1GPIO2 = RUNLED/E2PSIZE
Strap
ROM
I2C EEPROM (Higher size)
"RUN"
A01
SDA 5A23 A12 WP 7
VSS 4
SCL 6
VCC8
24FC512
U2
URE A-2: LAN CONNECTORS, STRAP & EEPROM
VDD33TXRX1 1k06035%
R3GPIO0
0R0603
R8
0.022uF50V0603
C27
TXA_N
TXA_P
RXA_N
RXA_P
10pF50V0603
DNPC23
10pF50V0603
DNPC24
10pF50V0603
DNPC25
10pF50V0603
DNPC26
49.9R06031%
R449.9R06031%
R549.9R06031%
R649.9R06031%
R7
VDD33TXRX2 1k06035%
R14GPIO1
0R0603
R21
0.022uF50V0603
C33
TXB_N
TXB_P
RXB_N
RXB_P
10pF50V0603
DNPC29
10pF50V0603
DNPC30
10pF50V0603
DNPC31
10pF50V0603
DNPC32
49.9R06031%
R1549.9R06031%
R1649.9R06031%
R1749.9R06031%
R18
GPIO1
GPIO0
I2C EEP
Note:Capacitors C23 through C26 are optional for EMI purposes and are not populated in this board. These capacitors are required for operation in an EMI constrained environment.p
Note:Capacitors C29 through C32 are optional for EMI purposes and are not populated in this board. These capacitors are required for operation in an EMI constrained environment.p
0R12105%
R13
0R12105%
R23
Copper Port-A(IN)
Copper Port-B(OUT)
XMIT
RCV
75
75 75
1000 pF 2 kV
RJ45
1
4 & 5
2
3
7 & 8
6
75
GRN
YEL
XMIT
RCV
75
75 75
1000 pF 2 kV
RJ45
1
4 & 5
2
3
7 & 8
6
75
GRN
YEL
RD+3
RXCT5
RD-6
TD+1
TXCT4
TD-2
CHS GND8
GN
D13
GN
D1
14
MTG
15
MTG
116
NC7
C10
A9
C1
11
A1
12
J1
XMIT
RCV
75
75 75
1000 pF 2 kV
RJ45
1
4 & 5
2
3
7 & 8
6
75
GRN
YEL
XMIT
RCV
75
75 75
1000 pF 2 kV
RJ45
1
4 & 5
2
3
7 & 8
6
75
GRN
YEL
RD+3
RXCT5
RD-6
TD+1
TXCT4
TD-2
CHS GND8
GN
D13
GN
D1
14
MTG
15
MTG
116
NC7
C10
A9
C1
11
A1
12
J2
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DF40HC(4.0)-60DS-0.4V(51)
13579
1113151719212325272931333537394143454749
2
5153555759
4681012141618202224262830323436384042444648505254565860
J3
3V33V3
RDWRCS
A4A3A2A1
D15D14D13D12D10D8
D11D9
D7D5D3D1D0
D2D4D6
SYNC1SYNC0
IRQ
ERROR_LED
SCK SISO
SCS#
Orange
TP2
Black
TP33V3
B2B connector
Test points place 100 mils apart
270R06035%
R24
Br GrnD2
"ERR"
External 3V3 if needed
"3V3" "GND"
Q
112
HDR-2.54 Male 1x2
J8
112
HDR-2.54 Male 1x2
J9
FIGURE A-3: LAN9252-2
SYNC1/LATCH118
SYNC0/LATCH034
A4/DIGIO12/GPI12/GPO12/MII_RXD0 27
A3/DIGIO11/GPI11/GPO11/MII_RXDV 26
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/MII_LINKPOL 29
A1/ALELO/OE_EXT/MII_CLK25 25
A0/D15/AD15/DIGIO9/GPI9/GPO9/MII_RXER 33
D14/AD14/DIGIO8/GPI8/GPO8/MII_TXD3/TX_SHIFT1 15
D13/AD13/DIGIO7/GPI7/GPO7/MII_TXD2/TX_SHIFT0 16
D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1 21
D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0 22
D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN 23
D9/AD9/LATCH_IN/SCK 19
D8/AD8/DIGIO2/GPI2/GPO2/MII_MDIO 40
D7/AD7/DIGIO1/GPI1/GPO1/MII_MDC 39
D6/AD6/DIGIO0/GPI0/GPO0/MII_RXCLK 36
D5/AD5/OUTVALID/SCS# 50
D3/AD3/WD_TRIG/SIO3 35
D2/AD2/SOF/SIO2 12
D1/AD1/EOF/SO/SIO1 13
D0/AD0/WD_STATE/SI/SIO0 17
RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD331
WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD230
CS/DIGIO13/GPI13/GPO13/MII_RXD128
D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK 49
U1B
D9_SCK
D5_SCS#
D1_SO
D0_SI
D9
SCK
D5
SCS#
D1
SO
D0
SI
[A0 not used]
LAN9252-PART2
Selection Jumpers for HBI or SPI
'D9'RDWRCS
SYNC1
SYNC0
A1A2A3A4
D15D14D13D12D11D10D9_SCKD8D7D6D5_SCS#D4D3D2D1_SOD0_SI
IR
11123
HDR-2.54 Male 1x3
J4
11123
HDR-2.54 Male 1x3
J5
11123
HDR-2.54 Male 1x3
J6
11123
HDR-2.54 Male 1x3
J7
Default Short (2-3)
Default Short (2-3)
Default Short (2-3)
Default Short (2-3)
'SCK'
'D5''SCS#'
'D1''SO'
'D0''SI'
'HBI''SPI'
Place J4,J5,J6 & J7 in closeby
DNPTP5
DNPTP6
EVB-LAN9252-SPI Quick Start Guide
NOTES:
2017 Microchip Technology Inc. DS50002604A-page 21
DS50002604A-page 22 2017 Microchip Technology Inc.
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11/07/16