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    The field-effect transistor (FET) is a three-terminal device used for a variety of applications

    that match, to a large extent, those of the BJT transistor. Although there are important

    differences between the two types of devices, there are also many similarities that will be

    pointed out in the sections to follow. The primary difference between the two types of

    transistors is the fact that the BJT transistor is a current-controlleddevice as depicted in Fig.

    5.1a, while the JFET transistor is a voltage-controlleddevice.

    The field-effect transistor (FET) is a transistor that relies on an electric field to control the

    shape and hence the conductivity of a channel of one type ofcharge carrier in

    a semiconductor material. FETs are sometimes called unipolar transistors to contrast their

    single-carrier-type operation with the dual-carrier-type operation ofbipolar (junction)

    transistors (BJT). The conceptof the FET predates the BJT, though it was not physically

    implemented until afterBJTs due to the limitations of semiconductor materials and the relative

    ease of manufacturing BJTs compared to FETs at the time.

    FETs are majority-charge-carrier devices. The device consists of an active channel through

    which majority charge carriers, electrons or holes, flow from the source to the drain. Source

    and drain terminal conductors are connected to semiconductor through ohmic contacts. The

    conductivity of the channel is a function of potential applied to the gate.

    The FET's three terminals are:

    Source (S), through which the majority carriers enter the channel. Conventional current

    entering the channel at S is designated by IS.

    Drain (D), through which the majority carriers leave the channel. Conventional current

    entering the channel at D is designated by ID. Drain to Source voltage is VDS.

    Gate (G), the terminal that modulates the channel conductivity. By applying voltage to G,

    one can control ID.

    Two types of FETs:

    Junction field-effect transistor(JFET)

    Metal-oxide-semiconductor field-effect transistor (MOSFET).

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    The MOSFET category is further broken down into depletion and enhancement types,

    which are both described. The MOSFET transistor has become one of the most important

    devices used in the design and construction of integrated circuits for digital computers. Its

    thermal stability and other general characteristics make it extremely popular in computer

    circuit design. However, as a discrete element in a typical top-hat container, it must be handled

    with care. Once the FET construction and characteristics have been introduced, the biasing

    arrangements. The analysis performed using BJT transistors will prove helpful in the derivation

    of the important equations and understanding the results obtained for FET circuits.

    Junction gate field-effect transistor (JFET or JUGFET)

    The junction gate field-effect transistor (JFET or JUGFET) is the simplest type offield-effecttransistor. It can be used as anelectronically-controlledswitchor as a voltage-controlled

    resistance.Electric chargeflows through a semiconducting channel between "source" and "drain"

    terminals. By applying a biasvoltageto a "gate" terminal, the channel is "pinched", so that theelectric

    currentis impeded or switched off completely.

    Construction Diagram

    N-channel JFET P-channel JFET

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    Schematic Diagram

    N-channel JFET P-channel JFET

    Characteristic Curve

    JFET Transfer Characteristic Curve

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    Operation

    VDD provides a drain-source voltage, VDS, that causes a drain current. iD, from drain

    to source.

    The drain current, iD, which is identical to the source current, exists in the channel

    surrounded by

    p-type gate. The gate to source voltage, VGS, which is equal to -VGG, creates a depletion

    region in the channel, which reduces the channel width and hence increases the

    resistance between drain and source. Since the gate-source junction is reverse-biased, a

    zero gate current results.

    So basically, the more voltage is applied at the gate, the less current will flow from drain

    to source. Think of this as a garden hose, the more you squeeze it, the less water will

    flow through it.

    When we increase VDS, the drain current, iD, also increases. As VDS further increases, a

    point is reached where the drain current is in its saturation point. If we increase

    VDS beyond this point, iD remains constant.

    Metal

    oxide

    semiconductor field-effect transistor (

    The metaloxidesemiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is

    atransistorused for amplifying or switching electronicsignals. Like otherfield-effect transistors, a

    MOSFET is usually a three-terminal device with source (S), gate (G), and drain (D) terminals; the

    substrate of the MOSFET is sometimes connected to the source terminal, and is sometimes a separate

    fourth terminal.

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    In MOSFETs, a voltage on the oxide-insulated gate electrode can induce aconducting

    channelbetween the two other contacts called source and drain. The channel can be ofn-typeorp-

    type(see article onsemiconductor devices), and is accordingly called an nMOSFET or a pMOSFET (also

    commonly nMOS, pMOS). It is by far the most commontransistorin bothdigitaland analog circuits,

    though thebipolar junction transistorwas at one time much more common.

    The 'metal' in the name is now often amisnomerbecause the previously metal gate material is now

    often a layer ofpolysilicon(polycrystalline silicon).Aluminiumhad been the gate material until the mid

    1970s, when polysilicon became dominant, due to its capability to formself-aligned gates. Metallic gates

    are regaining popularity, since it is difficult to increase the speed of operation of transistors withoutmetal

    gates.

    Types of MOSFET:

    Depletion Enhancement MOSFET

    Enhancement type MOSFET

    DEMOSFET-Depletion Enhancement MOSFET

    We know that when the gate is biased negative with respect to the source in an N-channel JFET, the

    depletion region widths are increased. The increase in the depletion regions reduces the channel

    thickness, which increases its resistance. The net result is that drain current ID is reduced.

    If the polarity of VGG were reversed so as to apply a positive bias to the gate with respect to source, the

    P-N junctions between the gate and the channel would then be forward biased. Since a forward bias

    reduces the width of a depletion region, the thickness of channel would increase with a corresponding

    decrease in channel resistance. As a result, drain current IDwould increase beyond the JFETs IDSSvalue.

    The normal operation of aJFETis in its depletion mode of operation. However, as discussed above, it is

    also possible to enhance the conductivity of the JFET channel. However, the forward bias of the siliconP-

    N junctionis usually restricted to a maximum of 0.5 V (more conservative limit is 0.2 V) so as to limit the

    gate current.

    As we have seen that, the greater the ID is compared to IDSS the greater the transconductance gmwill be.

    We have seen before that the voltage gain is directly proportional to gm. So, in general, the higher

    the gm, the better it is. This is one of the advantages of being able to enhance the channel.

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    As its name suggests, the depletion-enhancementMOSFET(DE-MOSFET)-was developed to be used in

    either or both the depletion and enhancement modes.

    Construction Diagram

    Schematic Symbols of DEMOSFET

    Characteristic Curve

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    Operation

    DE-MOSFET can be operated with either a positive or a negative gate. When gate is positivewith respect to the source it operates in the enhancementor E-mode and when the gate is

    negative with respect to the source, as illustrated in figure, it operates in depletion-mode.

    When the drain is made positive with respect to source, a drain current will flow, even with zero

    gate potential and the MOSFET is said to be operating in E-mode. In this mode of operation gate

    attracts the negative charge carriers from the P-substrate to the N-channel and thus reduces the

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    channel resistance and increases the drain-current. The more positive the gate is made, the more

    drain current flows.

    On the other hand when the gate is made negative with respect to the substrate, the gate repels

    some of the negative charge carriers out of the N-channel. This creates a depletion region in the

    channel, as illustrated in figure, and, therefore, increases the channel resistance and reduces thedrain current. The more negative the gate, the less the drain current. In this mode of operation the

    device is referred to as a depletion-mode MOSFET. Here too much negative gate voltage can

    pinch-off the channel. Thus operation is similar to that of JFET.

    Enhancement type MOSFET

    Although there are some similarities in construction and mode of operation between depletion-type

    and enhancement-type MOSFETs, the characteristics of the enhancement- type MOSFET are quite differentfrom anything obtained thus far. The transfer curve is not defined by Shockleys equation, and the drain

    current is now cut off until the gate-to-source voltage reaches a specific magnitude. In particular, current

    control in an n-channel device is now effected by a positive gate-to-source voltage rather than the range of

    negative voltages encountered for n-channel JFETs and n-channel depletion-type MOSFETs.

    Construction Diagram

    Schematic Symbol

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    Schematic symbols for an N-channel E-MOSFET are shown in figure. For zero value of VGS,

    the E-MOSFET is OFF because there is no conducting channel between source and drain.

    Each of schematic symbols shown in figures, has broken channel line to indicate this

    normally OFF condition. As we know that for VGS exceeding the threshold voltage VGST, an

    N-type inversion layer, connecting the source to drain, is created. In each of the schematic

    symbols, the arrow points to this inversion layer, which acts like an N-channel when the

    device is conducting. In each case, the fact that the device has an insulated gate is indicated

    by the gate not making direct contact with the channel. The schematic symbol shown in

    figure shows the source and substrate internally connected, while the other symbol shown in

    figure shows the substrate connection brought out separately from the source.

    The schematic symbols for a P-channel E-MOSFET are also shown. In these cases the arrow

    points outwards.

    Characteristic Curve

    Drain characteristics of an N-channel E-MOSFET are shown in figure. The lowest curve is

    the VGSTcurve. When VGS is lesser than VGST, ID is approximately zero. When VGS is greater

    than VGST, the device turns- on and the drain current ID is controlled by the gate voltage. The

    characteristic curves have almost vertical and almost horizontal parts. The almost vertical

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    components of the curves correspond to the ohmic region, and the horizontal components

    correspond to the constant current region. Thus E-MOSFET can be operated in either of

    these regions i.e. it can be used as a variable-voltage resistor (WR) or as a constant current

    source.

    Figure shows a typical transconductance curve. The current IDSS at VGS

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    As its name indicates, this MOSFET operates only in the enhancement mode and has no

    depletion mode. It operates with large positive gate voltage only. It does not conduct when

    the gate-source voltage VGS= 0. This is the reason that it is called normally-off MOSFET. In

    these MOSFETsdrain current ID flows only when VGS exceeds VGST [gate-to-

    source threshold voltage]. When drain is applied with positive voltage with respect to source and no potential is

    applied to the gate two N-regions and one P-substrate from two P-N junctions connected

    back to back with a resistance of the P-substrate. So a very small drain current that is,

    reverse leakage current flows. If the P-type substrate is now connected to the source

    terminal, there is zero voltage across the source substrate junction, and the-drain-substrate

    junction remains reverse biased.

    When the gate is made positive with respect to the source and the substrate, negative (i.e.

    minority) charge carriers within the substrate are attracted to the positive gate and

    accumulate close to the-surface of the substrate. As the gate voltage is increased, more and

    more electrons accumulate under the gate. Since these electrons can not flow across the

    insulated layer of silicon dioxide to the gate, so they accumulate at the surface of the

    substrate just below the gate. These accumulated minority charge carriers N -type channel

    stretching from drain to source. When this occurs, a channel is induced by forming what is

    termed an inversion layer(N-type). Now a drain current start flowing. The strength of

    the drain current depends upon the channel resistance which, in turn, depends upon the

    number of charge carriers attracted to the positive gate. Thus drain current is controlled by

    the gate potential.

    Since the conductivity of the channel is enhanced by the positive bias on the gate so this

    device is also called the enhancement MOSFETor E- MOSFET.

    The minimum value of gate-to-source voltage VGS that is required to form the inversion

    layer (N-type) is termed the gate-to-source threshold voltageVGST. For VGS below VGST, the

    drain current ID = 0. But for VGS exceeding VGST an N-type inversion layer connects the

    source to drain and the drain current ID is large. Depending upon the device being used,

    VGST may vary from less than 1 V to more than 5 V.

    JFETs and DE-MOSFETs are classified as the depletion-mode devices because their

    conductivity depends on the action of depletion layers. E-MOSFET is classified as an

    enhancement-mode device because its conductivity depends on the action of the inversion

    layer. Depletion-mode devices are normally ON when the gate-source voltage VGS = 0,whereas the enhancement-mode devices are normally OFF when VGS = 0.

    Application

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