elct 1003: high speed electronic circuit high speed... · dr. mohamed abd el ghany department of...
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ELCT 1003:High Speed Electronic Circuit
Lecture 16: Power Distribution Network in High Speed Integrated Circuit (continued)
Dr. Mohamed Abd El Ghany, Department of Electronics and Electrical Engineering
Example of Communication Structures in System on Chip
2
Networks are preferred over buses:
• Higher bandwidth
• Scalability
3
Power Characterization for NoC
IP
S S S
IP
S
IP IP IP
IP
S S
Inter-switch link
switch
repeater
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
Port Architecture
The switch of different architectures has different number of ports.
Each port of the switch includes input virtual channels, output virtual channels, a header decoder, controller, input arbiter and output arbiter.
The input arbiter is used to allow only one virtual channel to access a physical port.
For different NoC topologies, the average power dissipation of the switch is determined according to the number of ports in the switch.
4
Switch
IP
Power Dissipation of the Switches
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
5
Butterfly Fat Tree (BFT) Architecture
ith level has N/(2^(i+1)) switches,
N = leaves (blocks)
Number of switches in BFT is small
S=N/4 +1/2 N/4+1/4 N/4+……… N/2
* P.P. Pande, C. Grecu, A. Ivanov, and R. Saleh, “Design of a Switch for Network on Chip Applications,” The Proceedings of the IEEE International Symposium on Circuits and Systems, vol. 5, pp. 217‐220, May 2003
Each switch has four child ports and two parent ports.
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
6
Power Characterization for (BFT)
l2,1
l1,0
where N is the number of IP blocks
Total number of repeaters The optimal length of the global interconnect
Each switch has six ports.
The total length of interconnect
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
7
Power Characterization for (BFT)
l2,1
l1,0
Problem 1:Given the BFT shown in the figure, chip size of 20mmX20mm, 90nm technology node, clock frequency of 200MHz, and port power dissipation of 0.5 mW, find:-The number of switches-The total length of interswitch links-The total number of repeaters-The power dissipation of the interswitch links-The power dissipation of repeaters-The total power dissipation of the networkHint: port-port interface consists of 8 data signal, 4 control signals.
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
8
Power Characterization for SPIN
Total number of repeaters The optimal length of the global interconnect
In this fat tree, every switch has fourchildren and the parent is replicatedfour times at any level of the tree.
The total length of interconnect
l2,1
l1,0
Redundant paths contained within the fat tree structure are utilized to reduce contention in the network.
9
Power Characterization for CLICHÉ
Total number of repeaters
Each switch, except those at the edges,is connected to four neighboringswitches and one resource (IP block)
The total length of interconnect
The number of switches equals thenumber of IPs
10
Power Characterization for (CLICHÉ)Problem 1:Given the CLICHÉ shown in the figure, chip size of 20mmX20mm, 90nm technology node, clock frequency of 200MHz, and port power dissipation of 0.5 mW, find:-The number of switches-The total length of interswitch links-The total number of repeaters-The power dissipation of the interswitch links-The power dissipation of repeaters-The total power dissipation of the networkHint: port-port interface consists of 8 data signal, 4 control signals.
Dr. Mohamed Abd el Ghany Department of Electronics and Electrical Engineering
11
Octagon Architecture
Basic Octagon Unit
Octagon with more than eight nodes
The basic Octagon unit consists ofeight nodes and 12 bidirectionallinks. Each node is associated with aprocessing element and a switch
There is two-hop communication between any two components within the basic Octagon unit.
Sub-network of eight nodes is the building block for the whole network.
The switch of OCTAGON has three ports, except the switches between different OCTAGON units; has six ports.
Design complexity is linearly proportional with the number of IPs.
12
Power Characterization for Octagon
The total length of interconnect
l4
l1
l2
l3
Total number of repeaters