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EEL 3801C EEL 3801 Part II System Architecture

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Page 1: EEL 3801C EEL 3801 Part II System Architecture. EEL 3801C Components Video Display Terminal – self explanatory Keyboard – self-explanatory Disk Drives

EEL 3801C

EEL 3801

Part IISystem Architecture

Page 2: EEL 3801C EEL 3801 Part II System Architecture. EEL 3801C Components Video Display Terminal – self explanatory Keyboard – self-explanatory Disk Drives

EEL 3801C

Components• Video Display Terminal – self

explanatory• Keyboard – self-explanatory• Disk Drives – self-explanatory• System Unit – contains the

motherboard or the system board. Otherwise self-explanatory

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EEL 3801C

Components (cont.)• Random Access Memory (RAM) –

Electronic memory where the program and the data are kept while the program is running. It is volatile since the contents are lost if there is loss of power. Additionally, it is also called dynamic since its contents must be continuously refreshed.

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EEL 3801C

Components (cont.)• Read-Only Memory (ROM) BIOS –

Contains the information on the input output peripherals.

• CMOS RAM – Keeps system setup information.

• Expansion slots – Permit expansion of the system by adding special purpose boards such as modems, communication cards, etc.

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EEL 3801C

Components (cont.)• Power Supply – Self-explanatory• Parallel Port – Output port that

transfers a set of bits simultaneously. Typically used for printers. Allow for quick transfer of data but only for short distances.

• Serial port – Output port where single bits are produced one by one. Slower, but useful for longer distances.

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Components (cont.)• Microprocessor – Intel microprocessors

are downwardly compatible with each othe.– Programs written on older versions will run

on the newer ones, but programs written for the newer versions will not run on the older ones.

• Read Section 2.1 of the textbook for more details.

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EEL 3801C

System Architecture• The Central Processing Unit (CPU) is

the most important part of the computer. It consists of the Arithmetic logic Unit (ALU) and the Control Unit (CU).

• The ALU carries out arithmetic, logic and shifting operations.

• The CU fetches data and instructions and decodes addresses for the ALU.

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EEL 3801C

System Architecture (cont.)• Additionally, there may be a math

coprocessor, which speeds up mathematical calculations, as well as many other support chips. However, they are all coordinated by the CPU.

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The CPU• The most basic tasks of the CPU are:

• Find and load the next instruction from memory.

• Execute the instruction. This is composed of several sub-instructions that we will discuss later.

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EEL 3801C

The CPU (cont.)• The CPU, besides the ALU and CU, is

composed of several other components:• Data bus: Wires that move data within the CPU

itself.

• Registers: High-speed memory elements within the CPU itself on which can significantly speed up the performance of the computer.

• Clock: A timing device whose ticks coordinate all individual operations that take place in the computer. These ticks are called machine cycles.

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Registers

• Registers are special work areas inside the CPU that can store data and/or instructions.

• These memory elements are very fast. • There are several registers on the Intel

8088 family of microprocessors:– Data registers– Segment registers– Index registers– Special registers– Flag register

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EEL 3801C

Data Registers• Also called general purpose registers.• Are used for arithmetic and data

manipulation operations. • Can be addressed as either 8 or 16 bit

values, or as both. • The 80386 and newer CPU’s use 32-bit

registers addressable as 16-bit ones.

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Data Registers (cont.)• There are several of these.

– The AX Register: the accumulator register is used by the CPU for arithmetic operations.

– It is a 16-bit register, but can be addressed as two independent 8-bit registers called AH (for high) and AL (for low).

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EEL 3801C

Data Registers (cont.)– The BX Register: the base register is also

general purpose (like the AX).

– Has the ability to hold addresses for other variables (pointers).

– Also 16-bit that can be independently addressed as two 8-bit bytes (BH and BL).

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Data Registers (cont.)– The CX register: the counter register best

serves as the counter for repeating looping instructions.

• These instructions automatically repeat and decrement the CX register, and quit when it equals 0.

– Also 16-bit that can be independently addressed as two 8-bit bytes (CH and CL).

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Data Registers (cont.)– The DX Register: the data register is also

general purpose but has a special role when doing multiplication or division.

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EEL 3801C

Segment Registers• These registers are used to store

memory locations of either instructions or data in main memory.

• These registers contain the base segment of the memory location – where the memory segment begins.

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EEL 3801C

Segment Registers (cont.)• There are several of these:

– The CS Register: the code segment register contains the base location of the executable instructions that make up the program.

– Note that the base location can only address the initial location where these instructions can be found, not the entire segment..

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EEL 3801C

Segment Registers (cont.)– The DS Register: the data segment register

is the default base location in memory for variables

– The SS Register: the stack segment register contains the base location of the run-time stack.

– The ES Register: the extra register is an additional memory location where additional base locations can be stored.

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Index Registers• Contain the offset (the distance from

the base segment) where a specific variable or instruction may be found. The base segment and the offset can uniquely identify any addressable location of any length in memory. Base segment + offset = memory location.

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Index Registers (cont.)

• There are several of these:– The SI Register: the source index

takes name from the instruction used to move strings.

• SI usually contains an offset from the DS register, but can address any variable.

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Index Registers (cont.)– The DI Register: generally acts as a

destination for string movement instructions. Typically contains an offset for the ES register, but not necessarily so.

– The BP Register: the base pointer register contains an offset from the stack register (SS).

• Used to locate variables in the stack.

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Special Registers• Do not fit into any other categories.

– The IP Register: the instruction pointer register contains the offset of the next instruction to be executed.

• Combines with CS to form the complete address of the next executable instruction.

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Special Registers (cont.)– The SP Register: the stack pointer register

contains the offset from the beginning of the stack segment to the top of the stack.

– SS and SP combine to form the complete address for the top of the stack.

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Flags Register• One single 16-bit register whose

individual bit positions serve as flags to indicate the status of the CPU or the result of some arithmetic operation.

• The individual positions are predefined, although not all 16 are defined.

Page 26: EEL 3801C EEL 3801 Part II System Architecture. EEL 3801C Components Video Display Terminal – self explanatory Keyboard – self-explanatory Disk Drives

EEL 3801C

Flags Register (cont.)• Bit positions and flags:

– 0 Carry flag: Set when result of unsigned arithmetic operation is too large to fit into destination. Values are 1=carry; 0=no carry.

– 1 undefined

– 2 Parity flag: reflects the number of bits that are set in the result of an operation. Can be even or odd.

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Flags Register (cont.)

– 3 undefined

– 4 Auxiliary carry: set when operation causes a carry from bit 3 to bit 4. Rarely ever used.

– 5 undefined.

– 6 Zero flag: Set when result of an operation results in zero. Used in jumping to other instructions based on comparison of two values. Has a value of 1when 0; 0 when ~0.

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EEL 3801C

Flags Register (cont.)– 7 Sign flag: Set when result of an

operation results in negative number. Value is 1 when negative; 0 when positive.

– 8 Trap flag: Determines whether or not the CPU will be halted after each instruction is executed. Allows Trace or stepping through a program’s execution. Allows the programmer to control the CPU in this way through the INT 3 instruction.

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EEL 3801C

Flags Register (cont.)– 9 Interrupt flag: Makes it possible for

external interrupts to occur. Interrupts can be disabled by setting this flag to 0. Controlled by the programmer through the CLI and STI instructions.

– A Direction flag: controls the assumed direction used by the string processing instruction. Values are 1=up; 0=down. Programmer can control this flag through the STD and CLD instructions.

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Flags Register (cont.)– B Overflow flag: Like the Carry flag, but

for signed arithmetic operations. Value is 1=overflow; 0=no overflow.

– C, D, E and F undefined

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EEL 3801C

The Run-Time Stack• The run-time stack is an important

element in the execution of a stored program.

• It is a temporary holding area for addresses and data.

• It resides in the stack segment identified in the SS and SP registers.

• Each “cell” in the stack is 16 bits.

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EEL 3801C

Run-Time Stack (cont.)• The stack pointer holds the last

element to be added or pushed into the stack.

• This is also the first element to be taken off the stack, or popped.

• This is referred to as Last-In-First-Out (LIFO).

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EEL 3801C

The Run-Time Stack (cont.)• There are three typical uses for the

run-time stack:– If we want to save the contents of a

register, the stack makes a great place to store their values temporarily.

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EEL 3801C

The Run-Time Stack (cont.)– When a subroutine is called from another

part of the program, it is important that the processor return to the place where the function was called after it exits. The address of the instruction that called the subroutine is saved on the stack so as to be able to return to it later.

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EEL 3801C

The Run-Time Stack (cont.)– Local variables can be created when a

subroutine is active and then popped off the stack when the subroutine returns to the calling instruction. This is done in an area inside the run-time stack called the stack frame.

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EEL 3801C

The Run-Time Stack (cont.)• Operations:

– The push operation: Used to put values of data or instructions onto the stack. There is only on place in the stack into which things can be inputted – the top of the stack.

mov ax,00A5 ; move 00A5 into AX

push ax ; pushes content of ax into stack

push bx ; assume BX has a value of 0001

push cx ; assume cx has a value of 0002

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EEL 3801C

The Run-Time Stack (cont.)• The push

instruction does not change the value of the source register (typically the ax register, but could be others). Rather it simply copies its value to the top of the stack.

0006

00A5

0001

0002

High memory

Low memory

SP

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EEL 3801C

The Run-Time Stack (cont.)– The pop operation: Used to remove the

value in the stack pointed to by the stack pointer and places it in a register or memory location (variable). Immediately upon removing the element popped, the SP moves to the immediately previous element in the stack.

pop ax ; pops stack and puts value into AX

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EEL 3801C

The Run-Time Stack (cont.)• Note that the

value remains in the stack, but not being pointed by the stack pointer, it is subject to be overwritten by the next push operation.

0006

00A5

0001

0002

High memory

Low memory

SP

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EEL 3801C

Microinstructions• Machine level instructions are not the

lowest level instructions in the computer. Microinstructions are. These are very low-level operations that carry out the machine-level instructions.

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EEL 3801C

Microinstructions (cont.)• There are three basic ones:

– fetch: the control unit fetches the instruction, copies it into the CPU (register).

– decode: this operation decodes the instruction as well as any operands specified by the instruction. If any operands, the control unit fetches the operand from main memory.

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EEL 3801C

Microinstructions (cont.)– execute: the ALU executes the operation

and passes the result operands to the CU, where they are returned to the registers and/or to main memory.

– Get next instruction

– Go back to step 1

• Microcode is the interface between the binary code level and the electronic level.

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Memory organization of DOS• The Intel 8086 processor can access 1

Mb of memory (actually, 1,048,576 bytes, which is FFFFF in a 20-bit address). This is called the Real Mode.

• The main memory is divided into RAM and ROM.– RAM occupies low memory, and starts at

00000h and continues up to BFFFFh.

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Memory organization of DOS (cont’d)

– ROM occupies high memory and begins at C0000 and continues to FFFFF.

– This is mostly used for the ROM BIOS (the hard disk controller).

– The BIOS contains diagnostic and configuration software, as well as input-output subroutines.

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EEL 3801C

Memory organization of DOS (cont’d)

– Addresses begin with a hex address of 00000 and continue incrementally until FFFFF.

– DOS allows only the first 640kB of RAM to be used for programs.

– This is misleading because DOS (74kB) itself has to occupy this area as well.

– Remaining RAM used by video display and hard disk controller.

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System Memory (cont.)• The 80286 and more notably, the

80386 and 80486 processors can run in Protected Mode. – This means that they can radically increase

the amount of memory they can address (16MB).

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System Memory (cont.)– The Pentium can address significantly

more than that. – Unfortunately, DOS can only run in real

mode. – However, Windows runs in protected mode

and liberates the programmer from the 1MB memory limit.

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System Memory (cont.)• The 80386 and beyond processor also

has the virtual 8086 mode, which allows concurrent real mode processes to be executed in by a single CPU.

• The total memory being used can total more than the available RAM. The processor uses external memory (hard disk drive or floppy) to page currently unused portions of the program to these devices.

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Address Calculations• An address is a number that refers to

an 8-bit (byte) memory location. • The addresses are numbered

consecutively, starting at 00000h and going up to the highest location in memory, depending on the amount of memory available.

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Address Calculations (cont.)• Addresses can be expressed in one of

two ways:– A 32-bit (16 + 16) segment-offset address.

This combines a base location (the base segment) with the offset to represent the actual address. For example, 08F1:0100, where 08F1 is the base location (segment) from which to start counting, and 0100 is the offset, or how much to count. The address points to the first byte in the address.

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Address Calculations (cont.)– A 20 bit absolute address, which refers to

an exact memory location. For example, F405Bh.

• Using 20 bits, the processor can only address 1 Mb (actually, 1,048,576 bytes) of memory.

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Address Calculations (cont.)• But address registers are only 16 bits

wide, limiting the addressable memory to 65,535.

• Thus, the segment-offset technique is used to expand the range of accessible memory beyond the 65,535 limit.

• Thus, when addressing memory locations, the registers combine the values of two registers, the base segment and the offset.

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Address Calculations (cont.)• The CPU uses the segment and offset

value to generate an absolute address. It adds the segment and the offset to create the absolute address. The segment value is always known to have an implied half-byte at the right (0000).

• Example: Given an address such as 08F1:0100. The absolute address (20 bit) would be calculated as follows:

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Address Calculations (cont.)Segment value plus implied byte: 0 8 F 1

0 hAdd the offset value: 0 1 0 0 h

__________________________________________

Absolute Address: 0 9 0 1 0 h

• The advantages to the segment offset method is that it allows the program to be loaded into any segment address in memory without having to recalculate the addresses of all variables.

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Address Calculations (cont’d)• Furthermore, large data structures that

occupy a large block of memory can be easily accessed by knowing their base segment and offset.