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EECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007 MOS Cap, Lecture 1 Reading: finish chapter16

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Page 1: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

EECS130 Integrated Circuit Devices

Professor Ali Javey10/09/2007

MOS Cap, Lecture 1Reading: finish chapter16

Page 2: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Announcements• Exam Results…

Page 3: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

MOS Capacitors (MOSC)

MOS: Metal-Oxide-Semiconductor

SiO2

metal

gate

Si body

Vg

gate

Si-body (P)

N+

MOS capacitor

MOS transistor

Vg

SiO2

N+

Chapter 16

MOS transistor is the most important device in modern microelectronics.

Page 4: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS
Page 5: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Ideal MOS Capacitor– Oxide has zero charge, and no current can pass through it.– No charge centers are present in the oxide or at the oxide-

semiconductor interface.– Semiconductor is uniformly doped– ΦM = ΦS = χ

+ (EC – EF )FB

Page 6: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Ideal MOS Capacitor At Equilibrium:

Page 7: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Ideal MOS Capacitor Under Bias

– Let us ground the semiconductor and start applying different voltages, VG , to the gate

– VG can be positive, negative or zero with respect to the semiconductor

– EF,metal – EF,semiconductor = – q VG

– Since oxide has no charge (it’s an insulator with no available carriers or dopants), d Eoxide / dx = ρ/ε

= 0; meaning that the E-field inside the oxide is constant.

Page 8: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

P-type Si, VG < 0 (accumulation)ε

EC

Ei

EVEFs

GqV

mΦ Accumulationof holes

const.0 oxideoxide =⇒=

∂∂ EE

x•The oxide energy band has constant slope as shown. •No current flows in the SiO2 layer EF in Si is constant.

Negative voltage attracts holes to the Si-oxide interface.This is called accumulation condition.Ei – EF shouldincreases near thesurface of Si.

Page 9: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

P-type Si, VG < 0 (accumulation)

– – – –

+

+

Sheet of holes

ρE

M O SVG < 0

Sheet ofelectrons

xAccumulation of holes nearsilicon surface, and electronsnear the metal surface.

Similar to a parallel platecapacitor structure.

Page 10: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

p-type Si, VG > 0 (depletion)

EFM

ECEiEFsEV

DepletionE

OM S

positive=ρ

0=ρnegative=ρ

+

+

+- - - -

- - - -

E

Page 11: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

p-type Si, VG >> 0 (inversion)

EC

Ei

EV

EFM

+

+

+

+

- - - - - - -

- - - - - - --

-

Immobile acceptors

Mobile electrons

EFM

EFS

E

Page 12: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Inversion conditionIf we continue to increase the positive gate voltage, the bands at the semiconductor bends more strongly. At sufficiently high voltage, Ei can be below EF indicating large concentration of electrons in the conduction band.

We say the material near the surface is “inverted”. The “inverted” layer is not gotten by chemical doping, but by applying E-field. Where did we get the electrons from?

When Ei (surface) – Ei (bulk) = 2 [EF – Ei (bulk)], the condition is start of “inversion”, and the voltage VG applied to gate is called VT (threshold voltage). For VG > VT , the Si surface is inverted.

Page 13: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS
Page 14: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Ideal MOS Capacitor – n-type Si

Page 15: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS
Page 16: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Electrostatic potential, φ(x)Define a new term, φ(x) taken to be the potential inside the semiconductor at a given point x. [The symbol φ instead of V used in MOS work to avoid confusion with externally applied voltage, V]

)]((bulk)[1)( ii xEEq

x −=φ

(surface)](bulk)[1iiS EE

q−=φ

](bulk)[1FiF EE

q−=φ

Potential at any point x

Surface potential

φF > 0 means p-type φF < 0 means n-type

| φF | related to doping concentration

Page 17: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Electrostatic potential

φS = 2φF at the depletion-inversiontransition point (threshold voltage)

φS is positive if the bands bend\ …….?

Page 18: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

QuestionConsider the following φF and φS parameters. Indicate whether the

semiconductor is p-type or n-type, specify the biasing condition, and draw the energy band diagram at the biasing condition.

(i) φF = 12 kT/q; φS = 12 kT/q

(ii) φF = − 9 kT/q; φS = −18 kT/q

Page 19: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Charge Density - Accumulation

p-type silicon accumulation condition

The accumulation charges in the semiconductor are ……. , and appearclose to the surface and fall-offrapidly as x increases.One can assume that the free carrier concentration at the oxide- semiconductor interface is a δ-function.

M O S

VG < 0p-Si

Accumulation of holes

Charge on metal = −QM

Charge on semiconductor = − (charge on metal) |QAccumulation | = |QM |

x

Page 20: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Charge Density - Depletionp-type Si, depletion conditionThe depletion charges in Si are immobile ions - results in depletionlayer similar to that in pnjunction or Schottky diode.

VG > 0

M O S

p-Si

Depletion of holes

wQM|q NA A W| = |QM |(−) (+)

If surface potential is φs , then the depletion layer width W will be

SA

Si2 φεqN

W = Does this equation look familiar?

Page 21: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Charge Density - DepletionFor a p+n junction, or a MS (n-Si) junction, the depletion layer width is given by:

biD

Si2 VqN

W ε=

Where Vbi is related to the amount of band bending. Vbi in Volts is numericallyequal to the amount of band bending in eV.

biSi

D

Si

Dmax

2 VqNWqNε

−=ε

−E

For MOS, the same equation applies, except that Vbi is replaced by φs.

||2or||2Si)(in sSi

As

Si

Dmax φ

εφ

ε−=

qNqNE

n-type p-type

Page 22: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Question?

• What Vg gives you the maximum possible depletion width in a MOSC?

Page 23: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Charge Density - Inversion

VG >>0

M O S

p-Si

Depletion of holes

wQM

Inversion electrons:δ-function-like

p-type Si, strong inversionOnce inversion charges appear, they remain close to the surface since they are …….. Any additional voltage to the gate results in extra QM in gate and get compensated by extra inversion electrons in semiconductor.

So, the depletion width does not change during inversion. Electrons appear as δ- function near the surface. Maximum depletion layer width W = WT

Page 24: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Gate Voltage RelationshipApplied gate voltage will be equal to the voltage drop across the oxide (insulator) plus the voltage across the semiconductor.

Consider p-type Si.

VG > 0

M O S

p-Si

ΔφSemi Δφox

VG = Δφox + ΔφSemi

ΔφSemi = φ(x = 0) − φ(bulk)= φS

Δφox = xox Eox

Since the interface does not have any charges (idealized MOSC), we can say that: εox Eox = εSi ESi

Eox = (εSi / εox ) ESi

When is this equation valid?

Page 25: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Gate Voltage Relationship

sSi

A

FssA

Si

Si

A

Si

ASi

2

20for2

φε

φφφεεε

qN

qNqNWqN

=

<<==E

FssSi

A

ox

Sioxs

Siox

Sioxs

oxoxsG

20for2φ≤φ≤φ

εεε

+φ=

εε

+φ=

+φ=

qNx

x

xV

E

E

Page 26: EECS130 Integrated Circuit Devicesee130/fa07/lectures/MOS-Cap_lec12-1.pdfEECS130 Integrated Circuit Devices Professor Ali Javey 10/09/2007. MOS Cap, Lecture 1 ... MOS capacitor. MOS

Question

Draw E vs x for an ideal MOSC for the case of depletion and inversion