ece 4006 capstone design gbps optoelectronic links fall...
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ECE 4006 Capstone Design Gbps Optoelectronic Links Fall 2002
Jason Harrington Nickolas Kingsley Man Le Shahriar Khushrushahi Robiel Teclemichael October 24, 2002
Georgia Institute of Technology College of Engineering
School of Electrical and Computer Engineering
Table of Contents
Abstract 1
Introduction 2
Division of Labor 5
Chronological Design Progress Reports 7
Conclusion 22
Works Cited 26
Appendix A: Final List of PDs and VCSELs A1
Appendix B: Receiver and Transmitter Board Layouts A3
Appendix C: Gantt Chart of Group 3 A6
Appendix D: Financial Budget of Group 3 A8
Appendix E: Power Budget A9
Appendix F: Open Eye Diagrams From the Designed Rx Board A11
1
Abstract
Gigabit Ethernet technology is the next stage for high-speed networking. In
addition to electronics, it utilizes fiber optic technology and is built upon the existing
Ethernet architecture. This paper focuses on the timeline involved in building a 1.25
Gbps Optoelectronic link. The project involves designing, building and testing the
transmitter and receiver circuits necessary for the data link. The receiver board designed
and built was tested, and worked optimally. The transmitter board designed and tested
has a fault and is being resolved. The group involved in this project has adhered to the
Gantt chart and are on schedule for the future tasks necessary in making a fully functional
optoelectronic link.
2
Introduction
Of all the current networking protocols, Ethernet is the most popular because it
has the highest number of installed ports, and provides the greatest cost performance
relative to Token Ring, Fiber Distributed Data Interface (FDDI), and ATM for desktop
connectivity. Ethernet has evolved greatly since its inception at Xerox Corporation in the
early 1970s. The advent of Fast Ethernet enabled networking speed to increase from 10
to 100 megabits per second (Mbps). This enabled Fast Ethernet to provide a simple, cost-
effective option for backbone and server connectivity.
In June 1998, a new protocol was standardized for the new dominant player in
high-speed local area network backbones and server connectivities. This protocol was the
Gigabit Ethernet technology. Gigabit Ethernet enables an increase in speed of tenfold
over Fast Ethernet to 1000Mbps or 1 gigabit per second (Gbps). Since it is built on top of
the Ethernet protocol, it would enable customers to utilize their existing knowledge base
to manage and maintain such a new technology (1).
To allow for the speed increase from 100 Mbps Fast Ethernet up to 1 Gbps,
changes needed to be made to the Gigabit Ethernet architecture. The Gigabit Ethernet
architecture essentially looks identical to that of Ethernet from the data link layer
upwards, but the changes reflect inclusions from the ANSI X3T11 FiberChannel
technology. The IEEE 802.3Z standard architecture for the Gigabit Ethernet is
summarized in Figure 1 below.
Figure 1. IEEE 802.3Z standard architecture
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This paper will focus on building part of the Physical Media Dependent (PMD)
Layer of the Gigabit Ethernet architecture. For this project, a transmitter and receiver will
have to be designed and built for a 1.25 Gbps Optoelectronic link. The design of the
Optoelectronic data link is illustrated in Figure 2 below.
The serial and differential data input from the transmitter drive the laser driver to
produce a modulating light signal from the Vertical Cavity Surface Emitting Laser
(VCSEL) that is transmitted down the fiber optic cable. The modulating light signal is
detected by the photodetector in the receiver, and the signal is amplified to give an
output.
The laser driver, transimpedance and limiting amplifiers that will be used in the
transmitter and receiver design are the MAX3287, MAX3266 and MAX3264 chips
provided by the semiconductor company MAXIM Integrated Products.
The MAX3287 is a high-speed laser driver for fiber optic LAN transmitters that is
optimized for Gigabit Ethernet applications. The chip is equipped with an automatic
power control that adjusts the laser’s bias current to maintain an average optical power.
The MAX3287 chip can be configured with a short wave 850nm VSCEL for Gigabit
Figure 2. The logical flow of the optoelectronic link
Serial Differential
Laser Driver VCSEL Light Intensity
Transimpedance Amp
Limiting AMP
DATA OUT
Photodetector
Current
Fiber optic cable
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Ethernet use. The typical features of the chip include 3.0V to 5.5V supply voltage, 30mA
laser modulation current and temperature compensation for modulation current (3). The
complete information about the MAX3287 can be found on the MAXIM data sheet
currently at http://pdfserv.maxim-ic.com/arpdf/MAX3286-MAX3299.pdf.
The MAX3266 is a transimpedance amplifier (TIA) for 1.25Gbps fiber optic
receivers. The TIA amplifies small PD (photodiode) current with low noise and has low
input impedance, about 600 Ohms. Another function of the TIA is to convert current to
voltage. The chip features 3.0V to 5.5V single supply voltage, 200nA input-referred
noise, and 929MHz bandwidth (4). For complete data information about the MAX3266
TIA refer to the MAXIM quick view data sheet currently at http://pdfserv.maxim-
ic.com/arpdf/MAX3266-MAX3267.pdf
The 1.25Gbps MAX3264 limiting amplifier chip is designed for Gigabit Ethernet
optical receiver systems, which accepts a wide range of input voltages and provides
constant level-output voltages. The limiting amplifier boosts the TIA output voltage. The
limiting amplifier features a 3.0 to 5.5V supply voltage, low deterministic jitter, a choice
of CML or PECL output interface (5). For complete data information about the limiting
amplifier, refer to the MAXIM data sheet currently at http://pdfserv.maxim-
ic.com/arpdf/MAX3264-MAX3765.pdf.
Photo detectors Photo detectors are used to detect the incoming light signal from the transmitter.
Photodetectors are usually of the P-I-N form where a p-type and n-type semiconductor
has an intrinsic region in between. Photodetectors have three characteristics that are
critical in optoelectronic data links. These are the photodetector responsivity, capacitance
and receiver area. Maximizing the receiver area allows more coupling between the fiber
optic line and the photodetector. Responsivity is a term used to describe the sensitivity of
the photo detector, which is given in Amps of current per Watt detected (A/W). Smaller
capacitance values decrease the response time for the photo detector, which is critically
important for the high speed that data is being transmitted.
VCSELs The Vertical-Cavity Surface-Emitting Laser (VCSEL) is used as the optical
source of Gigabit Ethernet and many other data communication systems. The foremost
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application of VCSEL is to transmit optical signals. VCSELs are generally fabricated by
employing proton-ion implantation, by dry etching, or a selective oxidation for current
isolation. There are three important characteristics of a VCSEL that need to be
considered when selecting appropriate types of VCSELs for this design. These
characteristics are the threshold current, the slope efficiency, the emitted power, and
aperture size of the VCSEL. The lasing threshold current is determined by the difference
between the gain and loss at the lasing wavelength. It is the minimum current that is
needed to drive the VCSEL. The slope efficiency is the incremental increase in power for
an incremental increase usually given with units of mill watt per milliamp (mW/mA).
Once again, the fiber optic cable should be properly aligned to allow for maximum
coupling.
For this project, unconnectorized as well as connectorized photodetectors and
VCSELs are considered. This is because the connectorized components have already
been adjusted for maximum coupling and would be used to verify a working transmitter
and receiver board. The unconnectorized components shall be used after the transmitter
and receiver board designs are verified later, to investigate the effect of optical fiber
coupling.
Division of Labor The first action taken by the group was to divide the required tasks among the
group members according to their specialties and competence. Each person was assigned
one or two specific tasks that they would be responsible for. Through group meetings
each person would present their findings and give recommendations. This sharing of
knowledge amongst the individuals in the group would enable any group member to
temporarily assume another member’s role if that person was not able to complete a task
because of other obligations. The specific areas assigned can be seen in Table 1 and are
described in detail below.
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Table 1. Labor Division.
Position Person
Leader Jason Herrington
Vendor Specialist Jason Herrington
Measurement Specialist Man Le
PD Specialist Shahriar Khushrushahi
Solder Specialist Nickolas Kingsley
Webmaster Nickolas Kingsley
Head Editor Robiel Teclemichael
Head Writer Shahriar Khushrushahi
VCSEL Specialist Man Le
Electromagnetics Specialist Nickolas Kingsley
The group leader was responsible for assigning tasks for completion before the
next group meeting or presentation, and to make sure that all points assigned to be
covered in the group meetings were discussed. In addition, the group leader was
responsible for tracking group progress on the Gantt chart to assure that the current group
progress matched or exceeded the projected values. Jason Herrington was appointed as
group leader through group consent.
The responsibility of the vendor specialist was to contact, place orders and
follow-up the delivery of group orders with vendors. This position is extremely time
critical because of the limited project time and the possible of long lead-time of some of
the components to be ordered. An unexpected challenge of this position was found to be
in working around the schedules of the people holding the purchasing credit cards. Jason
Herrington volunteered and was group appointed for this position because of extensive
vendor relations experience from past co-op responsibilities.
The Measurement Specialist’s responsibilities primarily involve familiarity with
the test equipment in the lab to expedite group component and circuit testing. The person
appointed for this position was Man Le.
The next two positions that needed to be filled were photo diode and Vertical
Cavity Surface Emitting Laser (VCSEL) specialists. These two team members were
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responsible for all researches involving photo detectors and VCSELs respectively. These
included the responsibilities for the initial selection of connectorized and unconnectorized
photodetectors and VCSELs for use in the groups’ circuits, the writing of background and
component selection sections in the report papers, and the presentation of all pertinent
data in the group meetings. Man Le was chosen as VCSEL specialist and Shahriar
Khushrushahi was chosen as PD specialist.
The responsibility of the Solder Specialist was to solder the 0805 packaged
passive components and the 8 and 16 pin CUE and CSA packaged integrated circuits to
the provided and group designed fabricated circuit boards. This position required a high
level of soldering skill to conduct soldering quickly and efficiently to reduce the chance
of an integrated circuit or passive component being damaged from over-heating.
Nickolas Kingsley had a large amount of past soldering experience and performed
adroitly at this task.
Nickolas Kingsley also volunteered to be the web master for the group as well.
The responsibility of the web master includes the creation and upkeep of the group
website. Nicolas Kingsley exceeded the expectations of the group by providing a group
logo which can be seen in Figure 3, and by creating a secure section of the website
several weeks before the idea of a group secure area was discussed in class. The website
can be visited currently at
http://www.ece.gatech.edu/academic/courses/ece4006/fall2002/group3
The final two positions were head writer and head editor for the group reports.
The responsibility of the head writer was to collect individually written sections of the
reports from each group member and compose these into a flowing presentation of the
group progress. The responsibility of the head editor was to check the paper for
grammatical or word usage errors. Shahriar Khushrushahi volunteered to be the head
writer and Robiel Teclemichael volunteered to be the head editor. Chronological Design Progress Reports Week 1: August 25- 29th 2002
On the first group meeting, research was conducted on the Maxim chips data
sheets for upcoming design considerations. In addition, the IEEE 802.3Z standard in its
entirety was located and the appropriate data was extracted. This data gave an idea of the
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specifications involved for the design, primarily in determining the criteria necessary for
the selection of the appropriate photo detectors and VCSELs. The necessary data
extracted is tabulated as follows in Figure 3:
Optical fiber: Minimum bandwidth for length 2-220 m: 160 MHz km Minimum bandwidth for length 2-275 m: 200 MHz km Channel insertion loss for bandwidth 160 MHz km: 2.33 dB Channel insertion loss for bandwidth 200 MHz km: 2.53 dB Attenuation (max): 3.75 dB/km Zero dispersion wavelength ("Lo"): 1320 nm < Lo < 1365 nm Dispersion slope (max) for 1320 nm < Lo < 1348 nm: 0.11 Dispersion slope (max) for 1348 nm < Lo < 1365 nm: 0.001*(1458-Lo) Transmit Characteristics: Signaling speed: 1.25 Gbps 100ppm Wavelength: 770-860nm Trise/Tfall (max) for wavelength > 830 nm: 0.26 ns Trise/Tfall (max) for wavelength < 830 nm: 0.21 ns RMS spectral width (max): 0.85 nm Average launch power (max): 0 dBm Average launch power (min): -9.5 dBm Average launch power of OFF transmitter (max): -30 dBm Extinction ratio (min): 9 dB Rin (max): -117 dB/Hz Coupled Power Ratio: > 9 dB Receive Characteristics: Signaling speed: 1.25 Gbps 100ppm Wavelength: 770-860 nm Average receive power (max): 0 dBm Receive sensitivity: -17 dBm Return loss (min): 12 dB Stressed receive sensitivity: -12.5 dBm Vertical eye-closure penalty: 2.60 dB Receive electrical 3 dB upper cutoff frequency (max): 1500 MHz Worst case: Power Budget Link Penalties Bandwidth (min) 160 MHz km 200 MHz km Link power budget 7.5 dB 7.5 dB Operating distance 220 m 275 m Channel insertion loss 2.38 dB 2.6 dB Link power penalties 4.27 dB 4.29 dB Figure 3. Relevant IEEE 802.3Z information (2)
Strategies were drawn up early on to allow for risk mitigation. These included
• Early high productivity to give time for “unpredicted” circumstances later in
the semester
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• Have multiple vendors for each product in case of backorder or shipping
problems
• Rigorous checking and rechecking all designs and solder jobs.
• Plan to order multiples of each component to account for any defective or
damaged components
Week 2: August 30th-September 5th 2002
The team, on the first attempt, assembled the provided board and generated an
open eye. The eye diagram for the 50 dB attenuated K28.5 data pattern is illustrated in
Figure 4.
Figure 4. 50 dB attenuated K28.5 eye diagram
Figure 5 illustrates an eye diagram for a 50 dB attenuated PRBS7 data pattern with little
jitter suggesting a near perfect implementation of the receiver board.
10
Figure 5. 50 dB attenuated PRBS7 eye diagram
The remaining eye diagrams from 50 dB down to 10 dB all looked exactly the same as
Figure 5.
A preliminary list of candidate photodetectors was comprised. They were drawn
up using the criteria from the IEEE 802.3Z standard such as operating wavelength of
770-860nm and signal speed of 1.25Gbps. The companies included Anadigics, Advanced
Photonix, Honeywell, Luxnet Corporation, Photonic Detectors and Lasermate.
Similarly an initial list of VCSELs was also drawn up and the list of products
along with relevant information about slope efficiency, threshold current and output
power. In the week that followed the list would be modified due to errors in the selection
criteria for the VCSEL. However, Table 2 has specifications for the connectorized
VCSELs tabulated.
Table 2. 1.25 Gbps Connectorized VCSELs (Honeywell product)
Characteristics HFE418X-521 HFE438X-521 HFE438X-522 HFT218X-521 HFT228X-521 Ith (mA) 6 6 1.5-6 3.5-6 6 Slope Eff. (mW/mA)
.02-.04-.1 .02-.04-.1 .06-.15-.3 .02-.04.1 .02-.04-.1
Power output (µW)
350 350 1000 350 350
11
The preliminary list of unconnectorized VCSELs and their specifications are tabulated in
Table 3 below.
Table 3. 1.25 Gbps Unconnectorized VCSELs
Characteristics HFE4080-321 (Honeywell)
HFE4081-321 (Honeywell)
HFE4084-322 (Honeywell)
HFE4085-321 (Honeywell)
HFE4086-001 (Honeywell)
Ith (mA) 1.5-6 1.5-6 1.5-6 1.5-6 1.5-6 Slope Eff. (mW/mA)
.1-.25-.4 .04-.1-.16 .1-.25-.4 .1-.25-.4 .1-.25-.4
Output power (mW)
.9-3.6 .3-1.2 .9-3.6 .9-3.6 .9-3.6
Characteristics VCT-F85A40
(Lasermate) VCT-F85A4X (Lasermate)
VCT-F85A42-S (Lasermate)
VG1A-7000 (Luxnet)
Ith (mA) 3-6 3-6 3-5 3.5-6 Output power (mW)
1-3 1-3 1 .8-2
Slope Eff. (mW/mA)
.25 .25 .25-.3 .15-.3-.5
Power Budget
The purpose of calculating the power budget is to trace the flow of power though the
system. This will allow the engineer to choose components that are compatible. A trace
of the system was shown previously in Figure 2. The following are key issues in the
power budget calculation:
Not overdriving the VCSEL
Driving the VCSEL such that the average output power is 1 mW
Calculating the passive component values
The following values were given from either the VCSEL spec, the PD spec, or the IEEE
802.3z standard (shown in Figure 3, previously):
VCSEL Threshold current (Ith)
VCSEL Slope Efficiency (η)
VCSEL Beam Divergence (Defined by 2
1e
)
PD responsivity (R)
12
PD Dark Current
PD Capacitance
Fiber loss
The following values are vitally important in ensuring a working board and must be
calculated:
VCSEL DC bias current (Ibias)
VCSEL Modulation current (Imod)
VCSEL Total current (Itot)
VCSEL Output Power (Pout)
Modulation resistance (Rmod)
Bias resistance (Rbias)
Power loss due to the fiber
To meet eye safety standards, the output of the VCSEL should be, on average, as close to
1mW as possible. The formula for calculating Pout is:
)( thtotout IIP −=η (Eqn. 1)
Pout, typical can be assumed to equal 1 mW and the maximum can be assumed to equal 2
mW (even though the value is greater than the eye safety limit, it will be 1 mW on
average). Since Pout, η, and Ith are known, Itot can be calculated.
Two formulas for the VCSEL DC bias current are given in the MAXIM 3287
spec (3, page 14):
2modIII thbias += (Eqn. 2)
modIII totbias −= (Eqn. 3)
Combining Equations 2 and 3 results in:
)(32
mod thtot III −= (Eqn. 4)
Since Itot has been calculated and Ith is given, Imod can be calculated. Equations 2
or 3 can be used to calculate Ibias.
The value of Rmod can be determined from the Electrical Characteristics section
on page three of the MAXIM 3287 spec. There are three Imod values and their respective
13
Rmod values. Using linear interpolation, an approximate formula was derived to model
their relationship. This formula is shown in Equation 5.
modmod 89.045.17 IR −≈ (Eqn. 5)
The value of Rbias can be determined from a formula given on page 14 of the
MAXIM 3287 spec (3, page 14):
biasbias ImVR /250≈ (Eqn. 6)
The loss of power due to the fiber can be calculated from information given in the
IEEE 802.3z standard (Figure 3). The maximum loss due to fiber is 7.5 dB. This
calculates to 0.1778 watts coming out of the fiber for each milliwatt sent in. Naturally,
this is the worst-case scenario and the actual loss should be much less. The maximum
attenuation is approximately 3.75 dB/km. For a one-meter fiber, the loss is only 0.391%.
For a one hundred meter fiber, the loss is 0.860%. The IEEE standard also notes that the
receive sensitivity is approximately -17 dBm. This calculates to a sensitivity of
approximately 19.95 µW! Clearly, this is very sensitive equipment. The values discussed
above have been calculated for the various components and are listed in Appendix E.
The group web page with group logo was launched and everyone in the group
placed an order for samples of the MAXIM chips to be used. This would help in the
construction of the transmitter and receiver boards.
The Gantt chart from the second week is shown in Figure 6. It illustrates all the
individual tasks to be accomplished as well as the timeline involved.
14
The light blue color was used to signify possible tasks pertaining to that week,
whilst the dark blue color was used to signify definite projected tasks.
Week 3: September 5-September 12th 2002
The individual groups in the class were given information pertaining to the
financial budget allocated for the project. Each group is allocated a budget of $350.00 for
the purchasing of all the necessary components for the implementation of the design of
the optoelectronic link. A rough financial budget was determined for this group given the
information that it would cost $62 per PCB fabrication and that two fabrications were to
be done. This would leave around $100 for photodetectors and VSCELs each, and the
remaining budget would be utilized for passives and other unforeseen expenses.
A budget of $100 for the photodetectors and VCSELs mean that the type of PDs
and VCSELs to be purchased has to be correct. However, there were problems
encountered from the first list of photodetectors and VCSELs drawn up that had to be
dealt with. These were as follows:
• Several of the photodetectors drawn up had different types of packaging such as
TO-46 and TO-18. The question that had to be answered was whether the
3p3pPapers DueAnalyze results
Assemble Rx & Tx PCB
Lay out & submit Rx & TxPCB
Design Tx PCBDesign Rx PCB
Order Rx & Tx Board Parts
Design Tx w/on-board VCSEL
Design Rx w/on-board PDDesign optical path
Order VCSEL and PDs
Design optical link
Measurements / Lab workResearch
16151413121110987654321Week
3p3pPapers DueAnalyze results
Assemble Rx & Tx PCB
Lay out & submit Rx & TxPCB
Design Tx PCBDesign Rx PCB
Order Rx & Tx Board Parts
Design Tx w/on-board VCSEL
Design Rx w/on-board PDDesign optical path
Order VCSEL and PDs
Design optical link
Measurements / Lab workResearch
16151413121110987654321Week
Figure 6. Gantt chart from presentation 1.
15
packaging type influenced the photodetector functionality. What was determined
was that the packaging that the various photodetectors used would not make a
difference but an additional criterion that surfaced was the receiver area.
• Several of the photodetectors had units of responsivities as mV/µW, which
differed from the expected units of A/W. The significance of this difference was
that such photodetectors turned out to have a pre-amplifier built in. This would
mean that there was no need for the MAXIM TIA 3264 chip, since the PDs
behave as a preamplifier. Hence, if the photodetectors with the pre-amplifiers
were to be utilized, the receiver design would have to be modified to remove the
MAXIM 3264 chip.
• Some of the VCSELs chosen had built-in photodiodes, pre-amps and different
kinds of lenses (ball lens, flat lens etc). These additional components would affect
the entire design and would be more expensive than the standard VCSEL
The solutions to the problems that were encountered helped in adding additional
criteria not only to narrow the list of photodetectors and VCSELs in mind, but also to
acquire greater understanding of the project and its requirements. The team opted to keep
the MAXIM 3264 chip and leave the receiver design untouched.
In addition, further criteria were added that helped in narrowing down the list of
photodetectors and VCSELs. Such additional criteria are:
• The need for both connectorized and unconnectorized photodetectors and
VCSELs. The connectorized photodetector and VCSEL would be used to ensure
that our designs work since they have been adjusted for optimum alignment. The
connectorized photodetector and VCSEL would have an SC receptacle. Whereas
the unconnectorized components would require tweaking the design to minimize
alignment losses.
• The need for a range of responsivities for the connectorized and unconnectorized
photodetectors, as well as a range of slope efficiencies for the connectorized and
unconnectorized VCSELs to test the robustness of our design
• The need for a small capacitance to allow for fast response times and also to allow
for proper functionality of the MAXIM chips involved in the circuit.
16
These new criteria suggested that the search for photodetectors and VCSELs had
to be started all over again. But all the work done up till then was not in vain, this time an
idea of what to look for and what not to look for had been established. The Gantt chart
for the third week is shown in Figure 7.
Figure 7. Gantt chart for third week
The Gantt chart was not very clear with respect to its color-coding, and it was
suggested in the class presentation to have an improved Gantt chart. This was because it
did not illustrate what tasks were accomplished and what task was late.
Week 4: September 12-September 26th 2002
A final list of VCSELs and photodetectors that would be used for the design of
the boards was made and the items were ordered. The lists of ordered components and
their specifications are tabulated in Appendix A.
17
The photodetectors were chosen with a range of responsivities in mind, having
low end responsivities of 0.3 A/W to high end responsivities of 0.55A/W. There are also
three capacitance values that needed to be investigated with, 0.45pF, 1.2pF and 1.5pF.
These apply to the unconnectoriezed photodetectors. Despite rigorous searching only one
connectorized photodetector was found, the LASERMATE RSC M85A306. This
variation in specifications will help test the robustness of the receiver design.
The VCSELs were also chosen with a range of slope efficiencies, threshold
currents and power outputs in mind. The range of slope efficiencies would determine the
amount of power that the receiver would be able to detect, hence would determine the
robustness of the design. For instance, the HFE4381-512 has low-end slope efficiency,
which is about 0.04 mW/mA. This is a relatively inexpensive VCSEL and if it were to
work with the design it would help reduce the total cost of the design. The other VCSELs
chosen, example the HFE4384-522, has a very wide range of slope efficiencies, 0.06-0.3
mW/mA that matches the worst and the best-case scenarios. Finally, the best and most
expensive VCSEL is chosen with a slope efficiency of 0.1-0.4 mW/mA. This VCSEL has
the highest probability of working within the design and would be used for the worst-case
scenario to guarantee that the design works. The power outputs were chosen keeping in
mind that the average output power should be within the eye safety limit of 1 mW.
The schematics for the receiver and transmitter board were completed along with
the actual receiver PCB layout. The circuit for the design of the transmitter board is
shown in Figure 8.
Figure 8. Transmitter board circuit
18
While working on the layout of the transmitter and receiver boards, there were
three guidelines that were followed:
1. Avoid transmission lines by keeping signal lines as short as possible. Lines less
than 7mm are acceptable, but less than 4mm would be best.
2. Lines that must be long should be angled at 45 degrees
3. Ground plane should be present whenever possible to minimize fluxing magnetic
fields
With only a few exceptions, all signal lines were kept below 4mm in length. The
second draft of the transmitter PCB board went for review. The layouts and their
revisions are illustrated in Appendix B.
The PCB layout had enough space for an additional design to be squeezed in. This
enabled the team to add a slighly different design of the transmitter on the PCB layout.
The new design of the transmitter added to the board was to investigate the effect of a
different VCSEL orientation in the design. The Gantt chart for week four is illustrated in
Figure 9 below.
Figure 9. Revised Gantt chart for week 4
19
The revised Gantt chart for this week was a considerable improvement from its
predecessors. It clearly illustrates the time elapsed from the crosshatch markings. The
brown blocks indicate tasks accomplished while the green blocks indicate what is
planned. The Gantt charts for all the following presentations follow the same format and
are illustrated in Appendix C.
Week 5: September 26-October 3rd 2002
Several VCSELs and photodetectors were received. However, there were several
issues encountered in the course of ordering and receiving the parts for our circuits.
These included receiving a different VCSEL than the one ordered from Lasermate. This
was because the part number ordered was out of stock and the substitute VCSEL would
perform comparably the same to the one ordered.
There was additional delay for the delivery of the packages. United Parcel Service
(UPS), the shipper chosen as default for all orders, sent the packages to Georgia Institute
of Technology Central Receiving, which added one to two days to the delivery time of all
packages.
The only positive issue encountered was in contacting Allied Electronics in
Norcross, Georgia. Through Lindy, a customer service agent, the team was able to get
samples for several Honeywell connectorized and unconnectorized VCSEL’s.
In addition the passive components had to be ordered, these included ferrite
beads, capacitors, potentiometers, and resistors.
Ferrite Beads
The ferrite beads used in the transmitter board act as inductors to reduce
deterministic jitter. The MAXIM 3286 (LAN Laser Driver- page 16) specification sheet
recommends using the Murata BLM11HA102SG ferrite bead. These particular
components have a DC resistance less than 1.6Ω and impedance greater than 100Ω at the
design operating frequency. The ferrite beads were bought from Mouser Electronics at
$0.25 each. The dimensions are illustrated in Figure 10 below.
20
Figure 10. Murata BLM11HA102SG ferrite bead Potentiometers Each transmitter circuit uses two potentiometers to adjust the current that drives
the VCSEL to 1 mW output power (to meet eye safety specifications). The Panasonic
6mm Square Carbon Trimmer Potentiometers were chosen because of their small size,
reliable manufacturer and availability. Since the exact value of the pots is unknown,
several pots of various values; 500, 1K, 10K, and 20K ohm, were ordered from Digi-Key
at a price of $0.41 each. Figure 11 illustrates the dimensions of the potentiometers.
Figure 11. Panasonic 6mm Square Carbon Trimmer Potentiometers
The overall budget, including the passives ordered, is illustrated in Table 1 of
Appendix D. Also, the final version of the transmitter and receiver layout were approved
by Professor Brooke and the printer circuit boards (PCBs) were ordered from Express
PCB.
21
The final PCB layouts for the transmitter and receiver boards are illustrated in
Figure 12.
Figure 12. PCB Layout for Transmitter and Receiver boards.
The two transmitter designs are on the left while the receiver design is on the far
right.
Week 6: October 3rd-October 10th 2002
The ExpressPCB boards arrived on time. Figure 13 below is a picture of one of
the fabrication layouts that was obtained.
22
Figure 13. Transmitter board with longest lengths labeled (in mm) Notice that all signal lines are less than 7mm in length and all lines are angled
when possible.
The components were soldered and the receiver board was tested using the
connectorized photodetector. The receiver board did not work on the first attempt and
after considerable “debugging,” two problems were identified.
1. Ground pin from powere connector was not connected to the backplane
2. Pin 14 of the limiting amplifier was not soldered correctly.
It was decided that a second construction of the receiver would help in eliminating solder
problems or faulty chips in the first failure of the receiver board.
Soldering
Although Nickolas Kingsley serves as the group’s soldering specialist, everyone
in the group has contributing to the soldering effort. Fortunately, during the first half of
the semester there were no major soldering issues. Despite Dr.Brooke’s recommendation,
flux was never used to solder. In addition, the soldering iron was rarely set above 650oF,
23
which is relatively cool compared to what the iron is capable of. During this week, most
of the receiver and transmitter components were receieved.
Week 7: October 15th-October 17th 2002
The second construction of the receiver board was accomplished and tested
through a short patch cable and the 100 meter spool of fibre. The eye obtained were
perfect. Figure 14 below illustrates the K28.5 eye diagram using the fiber optic cable.
Figure 14. Eye obtained from testing receiver board with K28.5
data pattern
Figure 15 illustrates the eye obtained when testing the receiver board with PRBS7
data pattern and the fiber optic cable.
24
Appendix F illustrates the remaining eye diagrams when utilizing the patch cable for both
PRBS7 and K28.5 data patterns.
The transmitter board did not run on its first attempt and is currently being
“debugged.”
Conclusion The progress made up till now have been very satisfying. As a group, the team
has been able to adhere to what was planned in the Gantt chart, which allows “extra time”
in the event of unforeseen problems. The risk mitigation strategies employed have helped
resolve the pitfalls experienced as quickly as possible.
Fortunately, everyone in the group has contributed significantly to the project and
there has not been any lack of commitment issues. This has greatly helped in progressing
on time and ensuring efficient progress to the development of the design.
The team is in the process of “debugging” the transmitter design and trying to get
it to work. Once this is accomplished, the second transmitter design will be assembled
Figure 15. Eye obtained from testing receiver board with PRBS7 data pattern
25
and tested. This will enable the team to determine the better design and give an idea of
how to improve the overall transmitter design for the next PCB fabrication.
Our upcoming tasks include testing the robustness of our transmitter and receiver
designs by utilizing various combinations of VCSELs and photo detectors. The
unconnectorized components will also have to be tested, which requires alignment
adjustments to be carried out on the to the fiber optic link.
26
Works Cited 1. “Technology Brief, Introduction to Gigabit Ethernet”, Cisco Systems Inc,
http://www.cisco.com/warp/public/cc/techno/media/lan/gig/tech/gigbt_tc.htm
(July 1, 2000)
2. “ IEEE 802.3Z Standard ”
3. “ Maxim Quick View Data Sheet “ available at http://pdfserv.maxim-
ic.com/arpdf/MAX3286-MAX3299.pdf
4. “ Maxim Quick View Data Sheet “ available at http://pdfserv.maxim-
ic.com/arpdf/MAX3266-MAX3267.pdf
5. “ Maxim Quick View Data Sheet “ available at http://pdfserv.maxim-
ic.com/arpdf/MAX3264-MAX3765.pdf
Appendix 1
Appendix A. Final List of PDs and VCSELs Table1. Final selected Pds from Hamamatsu
Table 2. Final Selected PDs from Lasermate
Table3. Final Selected PDs from Lasermate
S7911 (Hamamatsu technology) TO-18
Min TYP MAX
Responsivity 0.47 A/W Dark Current 1 pA 100 PA Peak Wavelength 740nm Total Capacitance 0.45pF Active area φ0.1
PDT A85A30 (Lasermate technology)
Min TYP MAX
Responsivity 0.3 A/W 0.4 A/W Dark Current 1 nA 2 nA Peak Wavelength 850nm Total Capacitance 1.2pF 1.5pF Field of View
RSC M85A306 (Lasermate technology)
Min TYP MAX
Responsivity 0.35A/W 0.4 A/W Dark Current 1 Na 2 nA Peak Wavelength 850nm Total Capacitance 1.2pF 1.5pF Field of View
Appendix 2
Table 4. 1.25 Gbps Connectorized VCSELs
Table 5. 1.25 Gbps Unconnectorized VCSELs
Characteristics HFE4381-521 (Honeywell)
HFE4384-522 (Honeywell)
Ith (mA) 6 1.5-6
Slope Eff. (mW/mA)
.02-.04-.1 .06-.15-.3
Power output (µW)
350 1 (mW)
Characteristics HFE4080-321
(Honeywell)
HFE4081-321
(Honeywell)
HFE4084-322
(Honeywell)
VCT-F85A20
(Lasermate) Ith (mA) 1.5-6 1.5-6 1.5-6 3 – 6 Slope Eff. (mW/mA)
0.1-0.25-0.4 0.04-0.1-0.16
0.1-0.25-0.4 0.1 –0.25-0.3
Power output (mW)
0.9 - 3.6 0.3 -1.2 0.9 - 3.6 1 - 3
Appendix 3
Appendix B. Receiver and Transmitter Board Layouts
Figure 1. Layout of the receiver board
Figure 2. First trial of the Tx/ Rx board layout
Appendix 4
Figure 3. Second trial of the Tx / Rx board layout
Figure 4. Third trial of the Tx/Rx board layout
Appendix 5
Figure 5. Fourth trial with extra transmitter layout
Figure 6. The final transmitter and receiver layout
Appendix 6
Appendix C. Gantt Chart of Group 3
Figure 1. Gantt Chart for Week 6
Figure 2. Gantt Chart for Week 7
REV 03 22-Aug 29-Aug 5-Sep 12-Sep 19-Sep 26-Sep 3-Oct 10-Oct 17-Oct 24-Oct 31-Oct 7-Nov 14-Nov 21-Nov 28-Nov 5-DecResearch P
Measurements/Lab Work AOptical Link Budget P
Order VCSEL and PDs O O EDesign optical Rx w/ on-board PD R R R
Design optical Tx w/on-board VCSEL D D &
Design Rx PCB E E CDesign TX PCB R R A
Lay out & submit Rx & Tx PCB TAseemble Rx & Tx PCB CMeasurements/Lab Work H
Analyze results
Papers Due 3pm U 3pmExam P
REV 03 22-Aug 29-Aug 05-Sep 12-Sep 19-Sep 26-Sep 03-Oct 10-Oct 17-Oct 24-Oct 31-Oct 07-Nov 14-Nov 21-Nov 28-Nov 05-DecResearch P
Measurements/Lab Work AOptical Link Budget P
Order VCSEL and PDs O O EDesign optical Rx w/ on-board PD R R R
Design optical Tx w/on-board VCSEL D D &
Design Rx PCB E E CDesign TX PCB R R A
Lay out & submit Rx & Tx PCB TAseemble Rx & Tx PCB CMeasurements/Lab Work H
Analyze results
Papers Due 3pm U 3pmExam P
Planning Done
Appendix 7
Figure 3. Gantt Chart for Week 8
Figure 4. Gantt Chart for Week 9
REV 03 22-Aug 29-Aug 5-Sep 12-Sep 19-Sep 26-Sep 3-Oct 10-Oct 17-Oct 24-Oct 31-Oct 7-Nov 14-Nov 21-Nov 28-Nov 5-DecResearch P
Measurements/Lab Work AOptical Link Budget P
Order VCSEL and PDs O O EDesign optical Rx w/ on-board PD R R R
Design optical Tx w/on-board VCSEL D D &
Design Rx PCB E E CDesign TX PCB R R A
Lay out & submit Rx & Tx PCB TAseemble Rx & Tx PCB CMeasurements/Lab Work H
Analyze results
Papers Due 3pm U 3pmExam P
Expected Actual
REV 03 22-Aug 29-Aug 5-Sep 12-Sep 19-Sep 26-Sep 3-Oct 10-Oct 17-Oct 24-Oct 31-Oct 7-Nov 14-Nov 21-Nov 28-Nov 5-DecResearch P
Measurements/Lab Work AOptical Link Budget P
Order VCSEL and PDs O O EDesign optical Rx w/ on-board PD R R R
Design optical Tx w/on-board VCSEL D D &
Design Rx PCB E E CDesign TX PCB R R A
Lay out & submit Rx & Tx PCB TAseemble Rx & Tx PCB CMeasurements/Lab Work H
Analyze results
Papers Due 3pm U 3pmExam P
Expected Actual
Appendix 8
Appendix D. Financial Budget of Group 3
Component Item No. Qty. Description Price Invoice
No. Company or Vendor
PD RSC-M85A306 1 GaAs PIN PD Pre-aligned for 62.5/125um
$50.00 0007172 Lasermate
PD PDT-A85A30 1 GaAS PIN PD in To-46 with cap lens
$28.00 0007172 Lasermate
VCSEL VCT-F85A20 1 780nm VCSEL diode in TO-46 no monitoring PD
$20.00 0007172
PD RSCM85A306 1 GaAs PIN PD $50.00 Lasermate Resistor P120ACT-ND 10 120 ohm
1/10W5%0805 SMD
$0.80 12821939 DIGI-KEY
Resistor P30ACT-ND 10 30 ohm 1/10W5%0805 SMD
$0.80 12821939 DIGI-KEY
Handling charge
$5.00 DIGI-KEY
VCSEL S7911 1 $21.31 HamamatsuPotentiometer DJA52CT-ND 2 500 OHM $0.82 DIGI-KEY Potentiometer DJA13CT-ND 2 1K OHM $0.82 DIGI-KEY Potentiometer DJA14CT-ND 2 10K OHM $0.82 DIGI-KEY Potentiometer DJA24CT-ND 2 20K OHM $0.82 DIGI_KEY Total Price
without shipping cost
$8.20 DIGI-KEY
Ferrite Bead 81-BLM11HA102SG
10 1K OHM Ferrite Beads Unit price $0.25
Total Price $3.28
Mouser electronics
PCB Board 1 First PCB Board
$62 PCB Express
Total $249.39 Remaining
fund = $100.61
Table 1. Detailed budget breakdown for project
Appendix 9
Appendix E. Power Budget
Figure 1. A variety of VCSEL/PD combinations to be tested.
Appendix 10
Figure 2. Power Budget
Appendix 11
Appendix F. Open Eye Diagrams From the Designed Rx Board
K28.5 Our Board
K28.5 Through Generator
PRBS7 Our Board
PRBS7 Through Generator
Patch Cable
Figure 1. Eye diagrams from the receiver board designed
Appendix 12
K28.5 Our Board
K28.5 Through Generator
PRBS7 Our Board
PRBS7 Through Generator
100 meter Cable
Figure 2. Eye diagrams from the receiver board designed