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ECE 205: Intro Elec & Electr Circuits

Final Exam Study GuideVersion 1.00

Created by Charles Fenghttp://www.fenguin.net

ECE 205: Intro Elec & Electr Circuits – Final Exam Study Guide 1

Contents

1 Introductory Matter 3

1.1 International System of Units (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Current and Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 DC Analysis 4

2.1 Passive Elements (Resistors) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1.1 Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1.2 Parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Active Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.3 Ohm’s Law . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.4 Kirchoff’s Laws . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.5 Nodal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.6 Mesh Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.7 Superposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.8 Thevenin’s and Norton’s Theorems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Transient Analysis 8

3.1 Capacitors and Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2 First-Order Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.3 Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.4 Second-Order Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Semiconductor Devices 10

4.1 Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1.1 Simple Diode Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1.2 Zener Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2 Metal Oxide Semiconductor Field Effect Transistors (MOSFET) . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.2.1 n-Channel MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.2.2 p-Channel MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.2.3 Loads for Enhancement Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.2.4 nMOS Inverter with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.2.5 nMOS Inverter with Depletion Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

This work was created by Charles Feng and is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 2.5 License. For moreinformation, please visit http://www.fenguin.net/ or consult the last page of this guide.


4.2.6 CMOS Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.3 Bipolar Junction Transistors (BJT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.4 BJT Circuit Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.5 Resistor-Transistor Logic (RTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.6 Diode-Transistor Logic (DTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.7 Transistor-Transistor Logic (TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.8 Emitter Coupled Logic (ECL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.9 Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 AC Steady-State Analysis 17

5.1 Sinusoidal Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.2 Complex Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.3 Phasors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.4 Impedance and Admittance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.5 Phasor Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.6 AC Steady State Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19



1 Introductory Matter

1.1 International System of Units (SI)

Basic units — these units represent the six fundamental con-cepts in physics.

1. Length: m (meter)

2. Time: s (second)

3. Mass: kg (kilogram)

4. Charge: C (coulomb)

5. Temperature: K (Kelvin)

6. Luminous intensity: cd (candela)

Derived units — these units can be represented as a combina-tion of basic units but exist for simplicity.

1. Force: N (newton)

2. Energy: J (joule)

3. Power: W (watt)

4. Current: A (ampere)

5. Voltage: V (volt)

6. Resistance: Ω (ohm)

7. Conductance: S (siemens)

8. Capacitance: F (faraday)

9. Inductance: H (henry)

10. Frequency: Hz (hertz)

1.2 Current and Voltage

Current is defined as the time rate of charge flow. Conventionally, it represents the motion of positive charges. It has bothmagnitude and direction.

i

a b

In the above diagram, if i > 0, then the current is going from a to b. If i < 0, the current is going from b to a. The little arrowunder the i is called the reference direction.

The voltage of an element, also known as its potential difference, measures the work done in moving a unit charge through theelement from one terminal to the other. Voltages have both magnitudes and polarities.

V

a b

Terminal a is a voltage of V higher or lower than terminal b, or V = Va−Vb. If V is positive, then Va > Vb; if V is negative, thenVb > Va.

Whenever the reference direction for the current in an element is in the direction of the reference voltage drop across the element,use a positive sign in any express that relates v to i. Otherwise, use a negative sign. We will see an example of this when we lookat power.

1.3 Power

Power is defined as the rate at which energy is dissipated. It can be written in several ways, depending on what factors are known:

p = vi = i2R =v2

R



Since the formula for power has both v and i in it, we must apply the passive sign convention. When the reference direction of thecurrent is in the direction of the reference voltage drop, we will use the formula p = vi; when it is in the direction of the referencevoltage rise, we will use the formula p = −vi.

If p > 0, that means that energy is dissipated; if p < 0, that means that energy is delivered.

2 DC Analysis

2.1 Passive Elements (Resistors)

A passive element cannot deliver power or store energy. It can only absorb and dissipate energy. Examples of passive elementsinclude resistors, inductors, and capacitors.

Passive elements can be in series (same current), in which they share a common node that has no other currents entering or leavingit, or in parallel (same voltage), in which they form a loop containing no other elements.

For two elements in series, the current is the same and the total voltage is the sum of the individual voltages of the elements.Two parallel elements have the same voltage and a total current of the sum of each of the parallel currents. To put it in a moreunderstandable format, vs = v1 + v2, is = i1 = i2, vp = v1 = v2, and ip = i1 + i1.

Extreme cases for resistors are short circuit, when R = 0 and so v = Ri = 0, and open circuit, when R = ∞ and so i =v

R≈ 0.

On the figure below, on left is a short circuit and on right is an open circuit.

v = 0 i = 0

The maximum power transfer theorem states that if you have a voltage source in series with a resistor R and a variable load resistorRL, maximum power is delivered to the load resistor when RL = R.

2.1.1 Series

a b

R1 R2

v1 v2+ – + –

Resistors in series: The total resistance is Rs =n∑

j=1

Rj . To find the voltage on each resistor, use voltage division: v1 = R1i =

R1

R1 + R2v and v2 = R2i =

R2

R1 + R2v.



2.1.2 Parallel

R1 R2i1 i2

+

–

v

Resistors in parallel: The total resistance is1

Rp=

n∑j=1

1Rj

. To find the current on each resistor, we use current division:

i1 =v

R1=

R2

R1 + R2i and i2 =

v

R2=

R1

R1 + R2i.

2.2 Active Elements

Active elements are basically those that aren’t passive. They include batteries, generators, etc.

There are two main types of sources: voltage sources and current sources. Moreover, each of these two sources has two subtypes:independent and dependent. Independent sources are not affected by the voltage or current through the source; dependent sourcesare affected by either one.

In the below diagram, from left to right: independent voltage source, independent current source, dependent voltage source, anddependent current source.

Both dependent voltage and current sources can be controlled by either voltage or current through the source.

2.3 Ohm’s Law

Basically Ohm’s Law states that v = Ri and i = Gv, where R is resistance and G is conductance. Passive sign convention mustbe used when applying Ohm’s Law.

2.4 Kirchoff’s Laws

We will begin by listing several definitions:

1. A node is a point at which two or more circuit elements are connected. Note that nodes can include more than one “vertex”as long as there is nothing between the vertices.

2. A branch is a two-terminal circuit element connected between two nodes.

3. A loop is a closed path through the circuit in which no node is crossed more than once.

4. A mesh is a loop that does not contain with it another loop.



In the below diagram, d, e, f , g, h, j, and abc are nodes. There are seven resistors and two sources and so there are 7 + 2 = 9branches. The loops are abeda, abcjhgfda, et cetera; the meshes are abeda, degfd, and bcjhgeb.

v(t)

i(t) R6

R7

R5R4

R1

R2 R3

a b c

d e

f g h

j

Kirchoff’s current law states that the algebraic sum of all the currents entering/leaving any node in a circuit is zero. If the referencedirection of the current leaves the node, use a positive sign for the current; if it enters the node, use a negative sign.

Kirchoff’s voltage law states that the algebraic sum of all the voltages around any mesh or loop in a circuit is zero. If there is areference voltage drop, use a positive sign; if there is a reference voltage rise, use a negative sign.

2.5 Nodal Analysis

The reference node is chosen to be the node to which the largest number of branches is connected. It is usually referred to asground and we will consider its voltage to be zero.

The node voltage is defined as the voltage rise from the reference node to a non-reference node. For a circuit with n nodes, thenumber of independent node voltages is n− 1.

If the circuit only has current sources, do the following:

1. Find the number of nodes n. Choose one as the reference node as defined above. Label the node voltages with respect tothe reference node. Also, label the branch currents.

2. Apply KCL at each of the non-reference nodes.

3. Express the currents in terms of node voltages using Ohm’s law.

4. Solve fot he node voltages.

If the circuit also has voltage sources, form supernodes. A supernode is a voltage source and its two terminals. Apply KCL at eachof the nodes and supernodes except the one containing the reference node.

2.6 Mesh Analysis

This type of analysis makes use of Kirchoff’s voltage law.

A mesh/loop current is a fictional current that exists only in the perimeter of a mesh/loop. It flows continously around themesh/loop, and all the elements in a mesh/loop have a common mesh/loop current.

The reference directions of the mesh/loop currents can be chosen arbitrarily; if the wrong direction is chosen then the current willturn out to be negative. The number of independent mesh/loop currents in a circuit is equal to B−N +1 where B is the numberof branches and N is the number of nodes.



The branch current is the actual current through an element. It can be expressed in terms of the mesh/loop currents; if themesh/loop currents overlap on the branch then the branch current is just their algebraic sum or difference, depending on theirreference directions.

For circuits containing only voltage sources, do the following:

1. Determine how many independent mesh/loop currents there are in the circuit.

2. Assign and label the mesh/loop currents and voltage across circuit elements.

3. Apply KVL for each mesh/loop to obtain (B −N + 1) equations containing (B −N + 1) independent mesh/loop currents.

4. Solve for the mesh/loop currents to find the branch currents and voltages.

For circuits containing current sources as well, make sure you choose your mesh/loop currents so that there is only one currentgoing through each current source. Then, apply KVL around the meshes/loops that don’t contain current sources.

2.7 Superposition

If there are multiple independent sources in a circuit, then the total current or voltage for any element is equal to the sum of allthe individual currents or voltages produced by each independent source acting alone.

To use superposition, do the following:

1. Choose one independent source.

2. Kill or zero all the other independent sources. For voltage sources, set v = 0 to make a short circuit. For current sources,set i = 0 to make an open circuit.

3. Analyze the circuit with one source. Find the current and voltage on each of the circuit elements.

4. Choose another source. Repeat steps (2) and (3).

5. Sum the individual currents and voltages caused by each source.

Note that superposition can only be used if there are only independent sources in the circuit. It cannot be used for dependentsources. Moreover, we cannot use superposition directly to calculate power.

2.8 Thevenin’s and Norton’s Theorems

The purpose of these theorems is to replace a linear circuit seen at a pair of terminals with an equivalent circuit containing onlya single independent source and a single resistor with the intent of leaving the voltage and current at the terminals the same.Thevenin’s theorem allows for a voltage source and a resistor in series; Norton’s theorem allows for a current source and a resistorin parallel.

In the figure below, on left is a Thevenin circuit and on right is a Norton circuit.

b

aRT

vT

b

a

RNi N

We can easily convert between the Thevenin voltage vT and resistance RT and the Norton current iN and resistance RN usingthe following formulas: vT = RN iN and RT = RN .



The Thevenin voltage vT of a circuit is equal to voc, the open circuit voltage across the two terminals a and b. The Norton currentis equal to isc, the short circuit current through a and b when the two terminals are shorted.

Then, to find RT and RN , we can use one of two methods: (1) RT = RN =vT

iN=

voc

isc, or (2) RT = RN = the equivalent

resistance seen looking into the two terminals with all the independent sources in the circuit killed (shorting voltage sources andturning current sources into open circuits). Note that if there are dependent sources in the circuit, RT and RN must be derivedusing the first method.

3 Transient Analysis

3.1 Capacitors and Inductors

A capacitor is a passive element that opposes change in voltage. The voltage across a capacitor cannot change instantaneously; itmust be continuous. At steady-state, a capacitor acts like an open circuit—no current flows through it and dv/dt = 0.

For a capacitor, charge is related to voltage by the formula q = Cv where C is the capacitance, measured in farads. Current is

related to voltage by the formula i =dq

dt= C

dv

dt. This equation can be solved for v to find the voltage across a capacitor, which

is v(t) = v0 +1C

∫ t

0

i(τ) dτ . Finally, the energy stored in a capacitor is WC(t) =12Cv2(t) =

12qv =

q2

2C.

For capacitors in series,1Cs

=N∑

j=1

1Cj

and for series in parallel, Cp =N∑

j=1

Cj .

An inductor is a passive element that opposes change in current. The current across an inductor cannot change instantaneouslyand must be continuous. At steady-state, an inductor acts like a short circuit, with no voltage difference at its two terminals anddi/dt = 0.

In an inductor, flux (measured in Webers) is related to current by the formula λ = Li where L is the inductance, measured in

henrys. Voltage is related to current by the formula v(t) = Ldi

dt, which can be solved for i to get i(t) = i0 +

1L

∫ t

0

v(τ) dτ . The

energy stored in an inductor is WL(t) =12Li2.

For inductors in series, Ls =N∑

j=1

Lj , and for inductors in parallel,1Lp

=N∑

j=1

1Lj

.



3.2 First-Order Networks

An RC circuit is a circuit containing a voltage source, a resistor, and a capacitor. By applying KVL, we see thatdvC

dt+

1RC

vC =vS

RC.

At steady-state, vC = vS .

vS

i(t)

R

C (t)vC

+

–

An RL circuit is a circuit containing a voltage source, a resistor, and an inductor. By applying KVL, we see thatdiLdt

+R

LiL =

vS

L.

At steady-state, iL =vS

R.

vS

i (t)

R

L (t)vL

+

–

L

The general case for circuits containing one energy-storage element isdX

dt+aX = f(t) where a = 1/RC for RC circuits, a = R/L

for RL circuits, f(t) is the forcing function, and X(t) = vC(t) or iL(t). The solution of this equation is called the completeresponse, or X(t) = Xc(t) + Xp(t).

Xc(t) is the complementary solution of the homogeneous equation and is called the natural or source free response. It occurs whenf(t) = 0. Solving for Xc, we get Xc(t) = Ae−t/τ where τ = 1/a. Note that τ = RC for an RC circuit and L/R for an RL circuit.

Xp(t) is a particular solution of the non-homogeneous equation and is called the steady state or fixed response. Its formula is given

bydXp

dt+ aXp = f(t). When f(t) is a constant, we get a special case where Xp = K.

Therefore, the complete response for f(t) being constant is:

X(t) = K + Ae−t/τ

τ is refered to as the time constant, and τ = RC for an RC circuit and τ = L/R for an RL circuit. It is measured in secondsand is the time required for the natural response to decay by a factor of e. If τ is large, things happen slowly; if τ is small, thingshappen quickly.

This gives us equations for RC and RL circuits:

vC(t) = K + Ae−t/RC iL(t) = K + Ae−tR/L

To solve the above equations, do vC(∞) which makes the equation vC = K which gives you K, and then do vC(0+) which makesthe equation vC = K + A so you can solve for A. The same method applies also for iL(t).

If there is more than one capacitor/inductor, try to reduce them if they are in series/parallel; otherwise, use node/mesh analysis toobtain a set of differential equations. If there is more than one resistor/source, use Thevenin’s theorem to reduce the circuit intoone source and one resistor.



3.3 Step Response

If vS(t) is equal to v1 for t < 0 and v2 for t > 0, then we come up to a problem called step response.

For an RC circuit, our step response formulas are vC(t) = v1 for t < 0 and vC(t) = v2 − (v2 − v1)e−t/τ for t > 0. Also, i(t) = 0

for t < 0 and i(t) =v2 − v1

Re−t/τ for t > 0.

For an RL circuit, our step response formulas are iL(t) = i1 for t < 0 and iL(t) = i2 − (i2 − i1)e−t/τ for t > 0. Also, vL(t) = 0

for t < 0 and i(t) =v2 − v1

Re−t/τ for t > 0.

3.4 Second-Order Networks

For a series RLC circuit containing a voltage source vS(t), a resistor R, an inductor L and a capacitor C, we have the formula

Ld2i

dt2+ R

di

dt+

dvC

dt=

dvS

dt

4 Semiconductor Devices

4.1 Diodes

4.1.1 Simple Diode Model

The simple diode model states that when the voltage across the diode is less than the diode turn-on voltage, vF ≈ 0.7 (for silicondiodes), the diode is off and current through it is zero (open circuit). When the current is above zero, then the voltage across thediode is equal to vF .

i

vAC+ –

To analyze diode circuits, do the following:

1. Guess on/off for each diode. If “on”, then vAC = vF = 0.7 V. If “off”, then i = 0.2. Analyze the circuit, Find i for each “on” diode and vAC for each “off” diode.

3. Look for contradictions: for example, if you guessed that a diode was on yet its current i ≤ 0; or if you guessed a diode wasoff but its vAC ≥ vF .

4. If there is a contradiction, modify your guess.

The power dissipated by a diode is equal to p = vaci =

0.7i (on)0 (off)

There are a couple other models, the diode equation model, the ideal model, and the piecewise linear model (of which the simplediode model is a special case) but we won’t go into detail on them.

4.1.2 Zener Diode

Diodes can undergo what is called reverse breakdown in which the diode converts to a set voltage called the breakdown voltage,vR, which is independent of i. This condition happens when vAC = −vR or vCA = vR. If the power dissipation is small, no



damage is done to the diode under breakdown conditions. For most common diodes, the breakdown voltage is 100 to 1000 V;however, for Zener diodes, vR = 2− 100 V.

This special property of Zener diodes make it suitable for use in reverse breakdown conditions, in which they act as a constantvoltage source or a regulator. They are used upside-down to force the current backwards through the diode in order to takeadvantage of the constant vR.

4.2 Metal Oxide Semiconductor Field Effect Transistors (MOSFET)

Transistors are a three-terminal device used for signal amplification (as opposed to diodes, which are used for rectifying, regulating,and switching). We will talk about two types of transistors: MOSFET (metal oxide semiconductor FET) and BJT (bipolar junctiontransistor).

4.2.1 n-Channel MOSFET

G

D

Si G

i D

i S

G

D

Si G

i D

i S

Above left: enhancement-mode nMOS. Above right: depletion-mode nMOS.

There are three currents going into and out of the transistor: the gate, iG, the drain, iD, and the source, iS . Between the drainand source is the base, but it is shorted with the source and so will be considered part of the latter.

A MOSFET transistor has a certain threshold voltage denoted vTN . Enhancement mode MOSFETs always have vTN > 0. Thereare three different states the transistor can be in:

1. If vGS < vTN then the transistor is in cutoff mode and iD = 0.

2. If vTN ≤ vGS ≤ vDS + vTN then the transistor is on and in saturation mode for which iD =kN

2(vGS − vTN )2.

3. If vGS > vDS + vTN then the transistor is on and in non-saturation or triode mode for which iD =kN

2(2(vGS − vTN ) −

vDS)vDS .

In order to solve a MOSFET problem, firstly assume that it is in saturation and solve for iD. Then, check if vTN ≤ vGS ≤ vDS+vTN ;if not, change your guess and check again.

For a depletion-mode MOSFET, vTN < 0 and so when vGS = 0 current still flows. Depletion-mode MOSFETs are usually onlyused as loads for enhancement-mode MOSFETS.



4.2.2 p-Channel MOSFET

GS

D

i G i S

iD

GS

D

i G i S

iD

Above left: enhancement-mode pMOS. Above right: depletion-mode pMOS.

pMOS is very similar to nMOS except that everything is backwards. Our three regions of operation are:

1. If vSG < vTP then the transistor is in cutoff mode and iD = 0.

2. If vTP ≤ vSG ≤ vSD + vTP then the transistor is on and in saturation mode for which iD =kP

2(vSG − vTP )2.

3. If vSG > vSD + vTP then the transistor is on and in non-saturation or triode mode for which iD =kP

2(2(vSG − vTP ) −

vSD)vSD.

4.2.3 Loads for Enhancement Drivers

G

D

Si G

i L

i S

vDD

vinG S

i G

i D1

i S

vDD

vout

vin

vout

Resistive Load Saturated Load

G Si G i S

vDD

vin

vout

Non-Saturated LoadvGG

G Si G i S

vDD

vin

vout

Depletion Load

RL

i Di D2

i D1

i D2

i D1

i D2

Active loads (saturated, non-saturated, depletion) are generally better than resistive loads because transistors take up less spacethan resistors in a circuit. Depletion load is the best because it doesn’t cutoff at vDD − vTN (as does the saturated load) nor doesit require another power supply (as does the nonsaturated load).

For all the loads, the driver equations are the same as outlined above for enhancement-mode nMOS systems.

A resistive load is formed simply by an nMOS logic and a resistor. The load equation iL =vDD − vout

RL.

A saturated load is, as its name suggests, always saturated since vGS1 = vDS1 < vDS + vTN1. Its load equations are vGS1 =

vDS1 = vDD − vout and iDN1 =kN1

2(vDD − vout − vTN1)2.



A non-saturated load is always non-saturated since vGG − vout > vDD − vout + vTN1. Its load equations are vGS1 = vGG − vout,

vDS1 = vDD − vout, and iDN1 =kN1

2(2(vGG − vout − vTN1)(vDD − vout)− (vDD − vout)2).

A depletion load is formed by a depletion-mode nMOS in addition to the enhancement driver. The load is always on sincevGS1 = 0 > vTN1, and its load equations are vDS1 = vDD − vout and two equations for iDN1:

1. If vout > vDD + vTN1: iDN1 =kN1

2(2(0− vTN1)(vDD − vout)− (vDD − vout)2)

2. If vDD + vTN1 > vout: iDN1 =kN1

2(0− vTN1)2

4.2.4 nMOS Inverter with Resistive Load

saturation

linear

cut-off

vout

vin

vDD

vTN2

vTN2vin –vout

=

vout =

vin

=

As you can see in the above graph, there are three zones and two boundary points:

1. When vin < vTN2, the MOSFET is cutoff and vout = 12 V.

2. The first boundary point occurs when vin = vTN2 = 2 V. At this point, vout = 12 V.

3. When vout + vTN2 > vin > vTN2, the MOSFET is in saturation. In this zone, set iL = iDN2 in order to solve for vout interms of vin.

4. The second boundary point occurs when vin = vout + vTN2.

5. When vin > vout + vTN2, the MOSFET is non-saturated. Set iL = iDN2 in order to solve for vout in terms of vin.



4.2.5 nMOS Inverter with Depletion Load

T1 sat

vout

vin

vDD

vTN1=

vout =

vin

vTN1vin –vout =

T1 nonsa

t

T2 sat

T2 nonsat

T1 off

vDDvout = vTN1+

There are four regions of operation:

1. When vin ≤ vTN1, T1 is off and T2 is nonsaturated. Furthermore, iD1 = 0 = iD2 and vout = vDD.

2. When vTN1 ≤ vin ≤ vout+vTN1 and vout ≥ vDD+vTN2, T1 is saturated and T2 is nonsaturated. Therefore, to solve for vout

in terms of vin, write a quadratic equation with iD1 = iD2 using the respective formulas for saturation and non-saturation.

3. When VTN1 ≤ vin ≤ vout + vTN1 and vin − vTN1 ≤ vout ≤ vDD + vTN2, both T1 and T2 are saturated.

4. When vout > vin − vTN1, T1 is nonsaturated and T2 is nonsaturated.

4.2.6 CMOS Inverter

GS

vin

i DN

GS

i DP

D

D

T1

vout

vDD

T2

A CMOS inverter contains both an n-channel and a p-channel MOSFET.



A CMOS inverter has five regions of operation, as outlined below:

Region nMOS driver pMOS driver

1 cut-off non-saturated2 saturated non-saturated3 saturated saturated4 non-saturated saturated5 non-saturated cut-off

vout

vin

vDD

vTN=

vout =

vin

vTNvin –vout =vDDvout = vTN1+

vTN=vin vDD –

vTPvin +vout =

3

45

1

2

4.3 Bipolar Junction Transistors (BJT)

B

C

E

i C

i E

i B

A BJT is a semiconductor device containing three doped regions of p-type and n-type materials, resulting in two p-n junctions.There are two types of BJTs: npn and pnp; we will only discuss npn BJTs here.

There are three different modes of operation for BJTs:



B

C

E

B

C

E

B

C

E

Cut-off Forward Active Saturated

When a BJT is cut-off, iC = iB = iE = 0 and VBE < VBE(on) = 0.7 V.

When a BJT is forward-active, iC = βiB , iE = iB + iC = (1 + β)iB , VBE = VBE(on) = 0.7 V, and VCE > VCE(sat) = 0.2 V.

When a BJT is in saturation, iC ≤ βiB , iE = iB + iC ≤ (1 + β)iB , VBE = VBE(on) = 0.7 V, and VCE = VCE(sat) = 0.2 V.

4.4 BJT Circuit Analysis

Our method is as follows:

1. Determine whether it is on or off by finding VBE .

2. Assume it is forward-active. Then iC = βiB and iE = (1 + β)iB . Now apply KVL around the BE circuit and solve for iBto find iCandiE . Finally, apply KVL around the CE circuit to find VCE ; if it is greater than 0.2 V then our assumption iscorrect and the transistor is forward-active.

3. If our assumption is not correct, the BJT is saturated. VCE = 0.2; we apply KVL around the BE circuit to find one equationin terms of iB and iE = iB + iC . Then we apply KVL around the CE circuit to find another equation in terms of iC andiE . We solve for iB and iC which in turn gives us iE .

The power of a BJT is p = iBVBE + iCVCE .

4.5 Resistor-Transistor Logic (RTL)

In an RTL inverter, we have three different regions of operation:

1. When Vin < 0.7 V, the BJT is cut-off and so iC = 0 and Vout = VCC .

2. When Vin ≥ 0.7 V then the BJT is on. Assume forward-active and check if VCE > 0.2 V; if not, it is saturated.

4.6 Diode-Transistor Logic (DTL)

This is a system comprised of diodes and BJTs. When solving these problems, remember the simple diode model and the BJTfirst-order model.

4.7 Transistor-Transistor Logic (TTL)

This is a system comprised of only BJTs.



4.8 Emitter Coupled Logic (ECL)

This is fast because none of the transistors are ever saturated; they are all either in cut-off or are forward-active. There are threesections of an ECL gate: the input (current steering network), the output (emitter follower), and a constant current source.

Basically, an ECL works by steering a current from the constant current source through either the “left side” or the “right side”of the input section, depending on whether the input voltage is above or below a reference voltage. The emitter follower outputsection provides an output that is always VBE(on) less than the collector voltage in the input section.

Usually ECLs are made with two transistors, one of which will be cut-off and one which will be forward-active depending on theinput voltage.

4.9 Operational Amplifiers

i

i

V+

V–

Vout

Essentially all we have to know is the ideal op amp model, in which the current going into the op amp (i) is equal to the currentgoing out which is equal to zero (virtual open principle) and V + = V− (virtual short principle). Based on these rules, we cananalyze a variety of op amp circuits.

5 AC Steady-State Analysis

5.1 Sinusoidal Signals

Any periodic function can be presented by a sum of sinusoidals. The sinusoidal functions for voltage and current are the following:

v(t) = Vm cos (ωt + θv) i(t) = Im cos (ωt + θi)

The period of the above functions is T =2π

ωand the frequency is 1/T .

To convert between sine and cosine, remember the following equations:

sin (ωt + 90) = cos (ωt) sin (ωt± 180) = − sin (ωt) cos (ωt− 90) = sin (ωt) cos (ωt± 180) = − cos (ωt)

A sinusoidal function may be represented in the form A cos (ωt) + B sin (ωt). In order to convert this into our standard form,

use the formula√

A2 + B2 cos (ωt− θ), where θ = tan−1

(B

A

)and the quadrant of θ is determined by the location of the point

(A,B).

5.2 Complex Numbers

One can represent complex numbers in one of three forms:

1. Rectangular: A = a + jb where j =√−1



2. Exponential polar: A = rejθ

3. Polar: A = r 6 θ

The real part of a complex number is equal to a = <(A) = r cos (θ). The imaginary part is equal to b = =(A) = r sin (θ). The

magnitude is r = |A| =√

a2 + b2 and the argument is θ = tan−1

(b

a

).

5.3 Phasors

A phasor is a complex number whose magnitude is the amplitude of the sinusoid and whose angle is the angle of the sinusoid.

The two sinusoids we are worrying about are

v = Vm cos (ωt + θ) = <(Vmejθv · ejωt) i = Im cos (ωt + θ) = <(Imejθi · ejωt)

and their phasors are

(V = Vm 6 θv

I = Im 6 θi

)or

(v = <(V ejωt)i = <(Iejωt)

).

Note that phasors are defined by the cosine function so if a sine function is given we must convert it to cosine using one of therules seen in the previous section.

For resistors, our equation is V = RI or Vm 6 θv = RIm 6 θi. V and I are in phase, or θv = θi.

For inductors, our equation is V = jωLI or Vm 6 θv = ωLIm 6 θi + 90. V leads I by 90, or θv = θi + 90.

For capacitors, or equation is I = jωCV , or Im 6 θi = ωCVm 6 θi + 90. V lags I by 90, or θv = θi − 90.

5.4 Impedance and Admittance

Impedance is defined as the opposition to a sinusoidal electric current. It is equal to Z =V

I.

In its polar form, Z = |Z|6 θz =Vm

Im

6 θv − θi. In rectangular form, we have Z = R + jX where R is the total resistance and X is

the total reactance.

We have four formulas to convert between polar and rectangular forms: R = |Z| cos (θz), X = |Z| sin (θz), |Z| =√

R2 + X2, and

θz = tan−1

(X

R

).

The impedances of resistors, inductors, and capacitors are defined as follows:

1. Resistor: V = RI, ZR = R (real number)

2. Inductor: V = jωLI, ZL = jωL = jXL (imaginary number)

3. Capacitor: I = jωCV , ZC =1

jωC= jXC (imagine number)

XL and XC are the inductive reactance and capacitive reactance respectively.

In general, Z is a function of ω. The unit of impedance is Ω if we use H for inductors and F for capacitors.

The admittance is defined as Y =1Z

=I

V= |Y |6 θY and is measured in siemens. When put into rectangular form, we get the

expression Y = G + jB where G is the conductance and B is the susceptance.



In series, the total impedance is equal to the sum of the individual impedances: Zs =n∑

j=1

Zj . In parallel, the total impedance is

equal to the harmonic mean of the individual impedances:1Zp

=n∑

j=1

1Zj

.

We can also use voltage division:

V 1 =Z1

Z1 + Z2V

And current division (where Y =1Z

):

I1 =Y1

Y1 + Y2I =

Z2

Z1 + Z2I I2 =

Y2

Y1 + Y2I =

Z1

Z1 + Z2I

5.5 Phasor Circuits

To solve a phasor circuit, do the following:

1. Replace resistors, inductors, and capacitors with their impedance equivalents in terms of ω. Replace v and i with the phasorsV and I. This step yields a phasor circuit.

2. Write the phasor equation using KCL, KVL, etc.

3. Solve for unknown phasors.

4. Convert phasors to time-domain sinusoidal responses.

Note that you can use KCL, KVL, nodal analysis, mesh/loop analysis, and superposition to solve phasor circuits. In circuits withsources of multiple frequencies, you must apply superposition, then find the phasor response for each frequency, and finally convertthe phasor responses to sinusoidal responses and add them to get the total response.

If the frequency is given in hertz, the units for ω is radians per second and therefore ω =ν

2πwhere ν is the hertz frequency of the

source.

Thevenin’s and Norton’s theorems can be applied to a phasor circuit as long as there is only one radian frequency ω. In this case,

V T = V oc, IN = Isc, and ZT = ZN =V oc

Isc

.

5.6 AC Steady State Power

The instantaneous power of a phasor circuit is defined as

p(t) = v(t) · i(t)= VmIm cos (ωt + θv) cos (ωt + θi)

=VmIm

2(cos (θv − θi) + cos (2ωt + θv + θi))



The average power of a phasor circuit is equal to

P =1T

∫ t0+T

t0

p(t) dt

=VmIm

2cos (θv − θi)

=VmIm

2cos θz

=12|V | |I| cos (arg V − arg I)

=12I2m|Z| cos θz

=12Im2<(Z)

Note that there are special equations for average power for resistors, inductors and capacitors:

1. Resistor: PR =12RI2

m =V 2

m

2Rm

2. Inductor: PL = 03. Capacitor: PC = 0

Ideal capacitors and inductors are lossless elements.

We can also find root-mean-square (RMS) or effective values for our periodic wave forms.

For a DC circuit, P = I2effR =

V 2eff

Rsince the current and voltage do not fluctuate. Similarly, we can set up integrals for an AC

circuit: P =1T

∫ t0+T

t0

i2R dt =1T

∫ t0+T

t0

v2

Rdt.

For an AC circuit, Ieff = Irms =

√1T

∫ t0+T

t0

i2 dt and Veff = Vrms =

√1T

∫ t0+T

t0

v2 dt.

For i(t) = Im cos (ωt + θi), Irms =Im√

2which is independent of ω or θi.

The average power of a circuit is equal to P =VmIm

2cos (θv − θi) = VrmsIrms cos (θv − θi).


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