Download - Programable Logic Devices
-
8/16/2019 Programable Logic Devices
1/16
Thinning Lines Between Software and Hardware
Programmable Logic
Devices
Adam Foust
-
8/16/2019 Programable Logic Devices
2/16
Road Ma
• Histor!
• De"nitions
•
Programmable Logic Devices – Purose
– Advantages
– T!es
• #on"guration
• #onclusion
-
8/16/2019 Programable Logic Devices
3/16
Histor!
• Programmable logic arra!s $ about%&'(
• Programmable logic devices $ about%&)(
• Field Programmable *ate Arra!s $about %&)+ – ,ilin- Logic #ell Arra!
-
8/16/2019 Programable Logic Devices
4/16
De"nitions
• Programmable Logic Device .PLD/0 – Also 1nown as 2Field Programmable
Logic Device .FPLD/3
– An integrated circuit chi that can becon"gured b! the user to imlementdi4erent digital hardware5
-
8/16/2019 Programable Logic Devices
5/16
Purose of PLDs
• Permits elaborate digital logicdesigns to be imlemented b! theuser on a single device5
• 6s caable of being erased andrerogrammed with a new design5
-
8/16/2019 Programable Logic Devices
6/16
Advantages of PLDs
• #ost e4ective inlower volumes
• Short design time
• 7ell suited foracademics androtot!ing
PLD
8olume
AS6#
# o s t
.AlicationSeci"c6ntegrated#ircuit/
-
8/16/2019 Programable Logic Devices
7/16
Advantages of PLDs
• Programmabilit!
• Re9rogrammabilit! – PLDs can be rerogrammed without
being removed from the circuit board5
• Low cost of design
• 6mmediate hardware imlementation
-
8/16/2019 Programable Logic Devices
8/16
T!es of PLDs
• SPLDs .Simle Programmable Logic Devices/ – R:M .Read9:nl! Memor!/
– PLA .Programmable Logic Arra!/
– PAL .Programmable Arra! Logic/ – *AL .*eneric Arra! Logic/
• H#PLD .High #aacit! Programmable Logic
Device/ – #PLD .#omle- Programmable Logic Device/
– FP*A .Field9Programmable *ate Arra!/
-
8/16/2019 Programable Logic Devices
9/16
T!es of PLDs .#ont5/
PLD
SPLD
R:M PLA PAL *AL
H#PLD
#PLD FP*A
-
8/16/2019 Programable Logic Devices
10/16
SPLDs
• 6n R:M; the inut connection matri- ishardwired and the user can onl! modif!the outut connection matri-5
• 6n PAL and *AL the outut connectionmatri- is also hardwired and the usercan modif! the inut connection matri-5
•
6n PLA the user can modif! both theinut connection matri- and the oututconnection matri-5
-
8/16/2019 Programable Logic Devices
11/16
H#PLDs
• #PLD .#omle- Programmable LogicDevice/ – Lies between PALs and FP*As in degree of
comle-it!5 – 6ne-ensive
• FP*A .Field9Programmable *ate Arra!/ – Trul! arallel design and oeration
– Fast turnaround design
– Arra! of logic cells surrounded b!rogrammable 6
-
8/16/2019 Programable Logic Devices
12/16
FP*A Design
-
8/16/2019 Programable Logic Devices
13/16
PLD #on"guration
• #ombination of a logic device and memor!
• Memor! stores the attern the PLD wasrogrammed with –
=PR:M• >on9volatile and rerogrammable
– ==PR:M• >on9volatile and rerogrammable
–
Static RAM .SRAM/• 8olatile memor!
– Flash memor!• >on9volatile memor!
– Antifuse• >on9volatile and no re9rogrammabilit!
-
8/16/2019 Programable Logic Devices
14/16
#on"guration .cont5/
Name Re-Programmable Volatile
SRAM ?es ?es
FLASH ?es >o
=PR:M ?es .out of the circuit/ >o
==PR:M ?es .in the circuit/ >o
Antifuse >o >o
-
8/16/2019 Programable Logic Devices
15/16
#onclusion
• Histor!
• De"nitions
•
Programmable Logic Devices – Purose
– Advantages
– T!es
• #on"guration
-
8/16/2019 Programable Logic Devices
16/16
References@#omle- Programmable Logic Devices .#PLD/ 6nformation5@ OnGlobalSpec5 >55; n5d5 7eb5 Ar5 C(%5
Ehtt0